Semiconductor device and method of manufacturing the same
By employing different solder bonding materials with varying melting points in semiconductor devices, the issue of solder voids in grooves is mitigated, thereby improving the reliability and thermal performance of the devices.
Patent Information
- Application Number
- JP2024519152
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2022-05-02
- Publication Date
- 2025-06-18
- Estimated Expiration
- 2042-05-02
AI Technical Summary
Solder voids generated in the grooves of semiconductor devices reduce the reliability of the devices due to thermal stress and substrate stress.
Using different types of solder bonding materials with distinct melting points, where the first solder bonding material filled in the grooves has a lower melting point than the second solder bonding material, allowing air bubbles to rise and reduce voids during reflow.
The approach effectively reduces solder voids within the grooves, enhancing the reliability of semiconductor devices by improving thermal fatigue tolerance and stress management.
Smart Images

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Abstract
Description
Technical Field
[0001] The present disclosure relates to a semiconductor device and a method for manufacturing the same.
Background Art
[0002] In a semiconductor power module, a solder bonding material is used when bonding an insulating substrate onto a heat sink. For the purpose of improving the thermal fatigue tolerance of the solder bonding material, it has been proposed to provide grooves in the heat sink along the outer peripheral portion of the insulating substrate (see, for example, Patent Document 1).
Prior Art Documents
Patent Documents
[0003]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0004] By filling the grooves with the solder bonding material, the solder bonding material can be thickened at the outer peripheral portion of the insulating substrate. Therefore, it is possible to suppress the occurrence of cracks in the solder bonding material due to the thermal stress generated during the operation of the semiconductor device and the stress of the insulating substrate and the semiconductor chip. However, there has been a problem that solder voids are generated in the grooves, resulting in a decrease in the reliability of the semiconductor device.
[0005] The present disclosure has been made to solve the above-described problems, and an object thereof is to obtain a semiconductor device and a method for manufacturing the same that can improve reliability.
Means for Solving the Problems
[0006] The semiconductor device according to the present disclosure includes an insulating substrate having an insulating layer, a first metal pattern provided on the lower surface of the insulating layer, and a second metal pattern provided on the upper surface of the insulating layer, a semiconductor chip bonded to the second metal pattern, a heat sink provided under the insulating substrate and having a groove provided along the outer periphery of the insulating substrate on the upper surface, a first solder bonding material filled in the groove, and a second solder bonding material provided on the upper surface of the heat sink and on the first solder bonding material, for bonding the upper surface of the heat sink and the first metal pattern. The types of the first solder bonding material and the second solder bonding material are different, and the melting point of the first solder bonding material is lower than the melting point of the second solder bonding material.
Advantages of the Invention
[0007] In the present disclosure, different types are used as the first solder bonding material and the second solder bonding material, and the melting point of the first solder bonding material filled in the groove is made lower than the melting point of the second solder bonding material. Therefore, since it melts out from the first solder bonding material during reflow, bubbles in the first solder bonding material move upward from the groove due to the pressure from above. As a result, the solder voids inside the groove decrease, so that the reliability can be improved.
Brief Description of the Drawings
[0008]
Figure 1
Figure 2
Figure 3
Figure 4
Figure 5
Figure 6
Embodiments for Carrying Out the Invention
[0009] FIG. 1 is a cross-sectional view showing a semiconductor device according to an embodiment. FIG. 2 is a plan view showing a heat sink and an insulating substrate according to the embodiment. The insulating substrate 1 has an insulating layer 1a, a first metal pattern 1b provided on the lower surface of the insulating layer 1a, and a second metal pattern 1c provided on the upper surface of the insulating layer 1a. A semiconductor chip 3 is bonded to the second metal pattern 1c of the insulating substrate 1 by a solder bonding material 4. A heat sink 5 is provided below the insulating substrate 1. The material of the heat sink 5 is, for example, copper.
[0010] A groove 6 is provided on the upper surface of the heat sink 5 along the outer periphery of the insulating substrate 1. In plan view, the insulating substrate 1 is rectangular, and the groove 6 is in a rectangular frame shape. The inner periphery of the groove 6 is inside the outer periphery of the insulating substrate 1 in plan view, and the outer periphery of the groove 6 coincides with or is outside the outer periphery of the insulating substrate 1.
[0011] The first solder bonding material 7 is filled in the groove 6. A second solder bonding material 8 is provided on the upper surface of the heat sink 5 and on the first solder bonding material 7 to bond the upper surface of the heat sink 5 and the first metal pattern 1b.
[0012] By filling the groove 6 with the first solder bonding material 7, the thickness of the solder bonding material can be increased at the outer peripheral portion of the insulating substrate 1. Therefore, it is possible to suppress the generation of cracks in the solder bonding material due to thermal stress generated during the operation of the semiconductor device and the stress of the insulating substrate 1 and the semiconductor chip 3.
[0013] Let the distance between the upper surface of the heat sink 5 and the first metal pattern 1b be H, and the distance between the bottom surface of the groove 6 and the first metal pattern 1b be L, and L>2H is satisfied. Thereby, since the thickness of the solder bonding material at the outer periphery of the insulating substrate 1 becomes twice that of the conventional one, the stress can be relaxed and the generation of cracks can be suppressed. In addition, since the thickness of the solder bonding material below the semiconductor chip 3 remains the same as that of the conventional one, the heat dissipation performance does not deteriorate.
[0014] Next, a method for manufacturing a semiconductor device according to an embodiment will be described. FIGS. 3 and 4 are cross-sectional views showing a method for manufacturing a semiconductor device according to an embodiment. As shown in FIG. 3, the cut solder as the first solder bonding material 7 is placed along the groove 6 provided on the upper surface of the heat sink 5. Next, as shown in FIG. 4, the cut solder as the second solder bonding material 8 is placed on the upper surface of the heat sink 5 and the first solder bonding material 7. Next, the insulating substrate 1 is placed on the second solder bonding material 8 so that the groove 6 is disposed along the outer periphery of the insulating substrate 1, and the first solder bonding material 7 and the second solder bonding material 8 are reflowed to bond the upper surface of the heat sink 5 and the first metal pattern 1b. Next, the semiconductor chip 3 is bonded to the second metal pattern 1c. Through the above steps, the semiconductor device according to the embodiment is manufactured.
[0015] FIGS. 5 and 6 are cross-sectional views showing a modified example of the method for manufacturing a semiconductor device according to an embodiment. As shown in FIG. 5, the paste solder is applied as the first solder bonding material 7 along the groove 6. Next, as shown in FIG. 6, the cut solder as the second solder bonding material 8 is placed on the upper surface of the heat sink 5 and the first solder bonding material 7. The subsequent steps are the same as above. By placing the first solder bonding material 7 in the groove 6 first and then placing the second solder bonding material 8, solder bonding materials of different materials can be mounted.
[0016] In this embodiment, the first solder bonding material 7 and the second solder bonding material 8 are of different types from each other, and the melting point of the first solder bonding material 7 filled in the groove 6 is made lower than the melting point of the second solder bonding material 8. Therefore, since it melts out from the first solder bonding material 7 during reflow, the air bubbles in the first solder bonding material 7 move upward from the groove 6 due to the pressure from above. As a result, the solder voids inside the groove 6 are reduced, so that the reliability can be improved. Note that the voids of the second solder bonding material 8 on the heat sink 5 can be confirmed on the surface even after reflow, and thus can be corrected by external rework.
[0017] Note that the semiconductor chip 3 is not limited to being formed of silicon, and may be formed of a wide-bandgap semiconductor having a larger bandgap than silicon. The wide-bandgap semiconductor is, for example, silicon carbide, a gallium nitride-based material, or diamond. A semiconductor chip formed of such a wide-bandgap semiconductor can be miniaturized because of its high breakdown voltage and allowable current density. By using this miniaturized semiconductor chip, a semiconductor device incorporating this semiconductor chip can also be miniaturized and highly integrated. Further, since the semiconductor chip has high heat resistance, the heat dissipation fins of the heat sink can be miniaturized and the water cooling part can be changed to air cooling, so that the semiconductor device can be further miniaturized. Further, since the semiconductor chip has low power loss and high efficiency, the semiconductor device can be made highly efficient.
Description of Symbols
[0018] 1 Insulating substrate, 1a Insulating layer, 1b First metal pattern, 1c Second metal pattern, 3 Semiconductor chip, 5 Heat sink, 6 Groove, 7 First solder bonding material, 8 Second solder bonding material
Claims
1. An insulating substrate having an insulating layer, a first metal pattern provided on the lower surface of the insulating layer, and a second metal pattern provided on the upper surface of the insulating layer; A semiconductor chip bonded to the second metal pattern; A heat sink provided under the insulating substrate and having a groove provided along the outer periphery of the insulating substrate on the upper surface; A first solder bonding material filled in the groove; A second solder bonding material provided on the upper surface of the heat sink and on the first solder bonding material, and bonding the upper surface of the heat sink and the first metal pattern; The types of the first solder bonding material and the second solder bonding material are different; A semiconductor device, wherein the melting point of the first solder bonding material is lower than the melting point of the second solder bonding material.
2. The semiconductor device according to claim 1, wherein the distance between the upper surface of the heat sink and the first metal pattern is H, and the distance between the bottom surface of the groove and the first metal pattern is L, and L>2H is satisfied.
3. The semiconductor device according to claim 1 or 2, wherein the semiconductor chip is formed of a wide bandgap semiconductor.
4. A step of disposing a first solder bonding material in a groove provided on the upper surface of the heat sink; A step of disposing a second solder bonding material on the upper surface of the heat sink and on the first solder bonding material; Placing the insulating substrate on the second solder bonding material so that the groove is disposed along the outer periphery of the insulating substrate having an insulating layer, a first metal pattern provided on the lower surface of the insulating layer, and a second metal pattern provided on the upper surface of the insulating layer, and reflowing the first solder bonding material and the second solder bonding material to bond the upper surface of the heat sink and the first metal pattern; A step of bonding a semiconductor chip to the second metal pattern. The types of the first solder bonding material and the second solder bonding material are different, A method for manufacturing a semiconductor device, characterized in that the melting point of the first solder bonding material is lower than the melting point of the second solder bonding material.
5. The method for manufacturing a semiconductor device according to claim 4, characterized in that cut solder is placed along the groove as the first solder bonding material.
6. The method for manufacturing a semiconductor device according to claim 4, characterized in that paste solder is applied along the groove as the first solder bonding material.
Citation Information
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