Metal parts

By employing a metal component with a noble metal plating layer having a granular concavo-convex shape and an aspect ratio of 0.3 or more, the reliability of semiconductor devices in high-temperature environments is improved by maintaining the adhesive strength between the resin and the plating layer.

JP7696979B2Active Publication Date: 2025-06-23MITSUI HIGH TEC INC
View PDF 2 Cites 0 Cited by

Patent Information

Application Number
JP2023202508
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2023-11-30
Publication Date
2025-06-23
Estimated Expiration
2041-07-28

AI Technical Summary

Technical Problem

The reliability of semiconductor devices is compromised due to the significant difference in thermal expansion coefficients between metal parts and resin, leading to increased stress at their interface during heat exposure, which can result in peeling and reduced adhesive strength.

Method used

A metal component with a conductive base material and a noble metal plating layer, where the plating layer has a granular concavo-convex shape with an aspect ratio of 0.3 or more, is used to enhance the bonding strength between the metal and the resin, thereby improving the reliability of semiconductor devices in high-temperature environments.

Benefits of technology

The proposed solution effectively minimizes the decrease in adhesive strength between the encapsulating resin and the plating layer at high temperatures, thereby enhancing the reliability of semiconductor devices in such environments.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 0007696979000002
    Figure 0007696979000002
  • Figure 0007696979000003
    Figure 0007696979000003
  • Figure 0007696979000004
    Figure 0007696979000004
Patent Text Reader

Abstract

To provide metal components that improve reliability of semiconductor devices in high temperature environments.SOLUTION: A metal component 1 is a metal component used in manufacture of semiconductor devices and has a conductive base material 2 and a precious metal plating layer 3 formed on a whole body or a part of a surface 2a of the base material. The precious metal plating layer has a concavo-convex shape on a surface 3a, and an aspect ratio of the convex portion 3b in the concavo-convex shape is 0.3 or more.SELECTED DRAWING: Figure 2
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The disclosed embodiments relate to metal parts.

Background Art

[0002] Conventionally, in metal parts such as lead frames used in the manufacture of semiconductor devices, a technique of forming a noble metal plating layer on a part or the entire surface of a metal base material is known. Among them, metal parts in which an Ag plating layer is formed on a part of a metal base material mainly composed of Cu are widely used in semiconductor devices that require reliability due to their high heat dissipation and electrical conductivity (see Patent Document 1).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] A semiconductor device seals semiconductor elements, metal parts, etc. with resin, and there is an interface between the metal and the resin. Since the thermal expansion coefficients of the metal and the resin are greatly different, the stress at the interface between the metal and the resin increases due to heat during mounting or driving, and the adhesive strength between the encapsulating resin and the plating layer may decrease. As a result, peeling may occur between the encapsulating resin and the plating layer, and the reliability of the semiconductor device may be reduced.

[0005] One aspect of the embodiment has been made in view of the above, and an object thereof is to provide a metal part capable of improving the reliability of a semiconductor device in a high-temperature environment.

Means for Solving the Problems

[0006] A metal component according to an aspect of the embodiment is a metal component used in the manufacture of a semiconductor device, and includes a conductive base material and a noble metal plating layer formed on the entire surface or a part of the surface of the base material. Further, the noble metal plating layer has a Granular concavo-convex shape on its surface, and the aspect ratio of the convex portion in the concavo-convex shape is 0.3 or more.

Advantages of the Invention

[0007] According to an aspect of the embodiment, the reliability of the semiconductor device in a high-temperature environment can be improved.

Brief Description of the Drawings

[0008]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, with reference to the accompanying drawings, among the metal parts used in the manufacture of the semiconductor device disclosed in the present application, a lead frame will be described as an example. Note that the present disclosure is not limited by the embodiments shown below.

[0010] Also, note that the drawings are schematic, and it is necessary to be aware that the dimensional relationships between elements, the ratios of each element, etc. may differ from reality. Furthermore, there may be parts where the dimensional relationships and ratios between the drawings are different from each other.

[0011] Conventionally, in metal parts such as lead frames used in the manufacture of semiconductor devices, a technique of forming a noble metal plating layer such as an Ag plating layer on a part or the entire surface of a metal base material is known. By forming an Ag plating layer on the surface of the metal base material, the bonding strength between the metal base material, the semiconductor element, and the bonding wire can be improved, and thus the reliability of the semiconductor device can be improved.

[0012] Among them, a lead frame in which an Ag plating layer is formed on a part of the surface of a metal base material mainly composed of Cu has high heat dissipation and conductivity, and is widely adopted in semiconductor devices that require reliability.

[0013] A semiconductor device seals semiconductor elements, metal parts, etc. with resin, and there is an interface between the metal and the resin. Since the thermal expansion coefficients of the metal and the resin are greatly different, stress increases at the interface between the metal and the resin due to heat during mounting or driving.

[0014] In particular, the reflow temperature during soldering at the time of implementation is higher than the glass transition temperature of the resin, which extremely reduces the adhesive strength between such a sealing resin and the metal parts. As a result, the noble metal plating layer with low adhesive strength to the resin cannot withstand the stress, peeling occurs between the sealing resin, and there is a risk that the reliability of the semiconductor device will decrease.

[0015] Therefore, it is expected to realize a technology that can overcome the above problems and improve the reliability of semiconductor devices in a high-temperature environment.

[0016] <Lead Frame and Semiconductor Device> First, with reference to FIG. 1, the lead frame 1 and the semiconductor device 100 according to the embodiment will be described. FIG. 1(a) is a schematic diagram of the lead frame 1 according to the embodiment, and FIG. 1(b) is a cross-sectional view showing the semiconductor device 100 according to the embodiment.

[0017] The lead frame 1 shown in FIG. 1(a) shows a lead frame used for manufacturing a semiconductor device 100 of the QFP (Quad Flat Package) type. Note that the technology of the present disclosure may be applied to lead frames used for manufacturing other types, such as SOP (Small Outline Package) or semiconductor devices such as QFN (Quad Flat Non-lead package) where leads are exposed on the back surface of the semiconductor device.

[0018] The lead frame 1 according to the embodiment has, for example, a strip shape in a plan view, and a plurality of unit lead frames 10 are arranged along the longitudinal direction. Such a unit lead frame 10 is a part corresponding to each semiconductor device 100 manufactured using the lead frame 1. Note that a plurality of unit lead frames 10 may be arranged not only along the longitudinal direction of the lead frame 1 but also along the width direction.

[0019] As shown in Fig. 1(a), the unit lead frame 10 has a die pad 11, a plurality of leads 12, and a dam bar 13. Although not shown in Fig. 1(a), pilot holes may be provided side by side on the side surface of the long side of the lead frame 1.

[0020] The die pad 11 is provided, for example, at the central portion of the unit lead frame 10. As shown in Fig. 1(b), a semiconductor element 101 can be mounted on the front surface side of such a die pad 11.

[0021] The die pad 11 is connected to the outer edge of the unit lead frame 10 by a die pad support portion 11a and is supported by the unit lead frame 10. Such a die pad support portion 11a is provided, for example, at each of the four corners of the die pad 11.

[0022] The plurality of leads 12 are arranged side by side around the die pad 11, and the tip portions 12a of each of them extend from the outer edge of the unit lead frame 10 toward the die pad 11. Such a lead 12 functions as a connection terminal of the semiconductor device 100 as shown in Fig. 1(b).

[0023] The lead 12 has a tip portion 12a and a base portion 12b. In the semiconductor device 100, as shown in Fig. 1(b), a bonding wire 102 made of Cu, a Cu alloy, Au, an Au alloy, or the like is connected to the tip portion 12a of the lead 12. Therefore, the lead frame 1 is required to have high bonding characteristics with the bonding wire 102. The dam bar 13 connects between adjacent leads 12.

[0024] In addition to the lead frame 1, the semiconductor element 101, and the bonding wire 102, the semiconductor device 100 has a sealing resin 103. The sealing resin 103 is made of, for example, an epoxy resin or the like and is molded into a predetermined shape by a molding process or the like. The sealing resin 103 seals the semiconductor element 101, the bonding wire 102, the surface of the die pad 11, the tip portion 12a of the lead 12, and the like.

[0025] Further, the base end portion 12b of the lead 12 functions as an external terminal (outer lead) of the semiconductor device 100 and is soldered to the substrate. Also, in the semiconductor device 100 of the type where the back surface of the die pad 11 is exposed from the sealing resin 103 or the type provided with a heat slug, their back surfaces are soldered to the substrate. Therefore, the lead frame 1 is required to have high wettability with respect to solder.

[0026] Note that the dam bar 13 has a function of a dam for preventing the resin used in the molding process of the sealing resin 103 from leaking to the base end portion 12b (outer lead) side, and is finally cut in the manufacturing process of the semiconductor device 100.

[0027] Here, in the lead frame 1 according to the embodiment, a plating layer 3 is formed on the die pad 11 and the tip portion 12a of the lead 12. Such a plating layer 3 is an example of a noble metal plating layer, and is composed of, for example, Ag (silver) as a main component.

[0028] Thereby, the bonding strength between the lead frame 1 and the bonding wire 102 can be improved. Further, since the bonding strength between the lead frame 1 and the solder can be improved, the bonding strength between the lead frame 1 and the semiconductor element 101 can be improved.

[0029] <Details of the lead frame> Next, the details of the lead frame 1 according to the embodiment will be described with reference to FIG. 2. FIG. 2 is an enlarged cross-sectional view of the lead frame 1 according to the embodiment.

[0030] As shown in FIG. 2, the lead frame 1 according to the embodiment includes a base material 2 and a plating layer 3. The base material 2 is made of a conductive material (for example, a metal material such as copper, a copper alloy, or an iron-nickel alloy).

[0031] The plating layer 3 is formed on the surface 2a of the base material 2, and in the embodiment, it is a plating layer mainly composed of Ag. Further, as shown in FIG. 2, the plating layer 3 has an uneven shape on the surface 3a. That is, the surface 3a of the plating layer 3 has a plurality of convex portions 3b.

[0032] Note that, between the base material 2 and the plating layer 3, at least one plating layer mainly composed of Cu, Ni, Pd, Au, Ag, etc. may be formed as an under-plating layer for the purpose of preventing metal diffusion and improving heat resistance. Also, a plating layer mainly composed of Au, Pt, Pd, Ag, etc. may be formed on the surface of the plating layer 3.

[0033] Here, in the embodiment, the aspect ratio of the convex portion 3b formed on the surface 3a of the plating layer 3 (that is, the ratio of the height of the convex portion 3b to the width of the convex portion 3b) is preferably 0.3 or more. Thereby, when the semiconductor device 100 is exposed to a high-temperature environment (for example, when mounted on a printed circuit board or the like in a reflow process), the decrease in the adhesive strength between the sealing resin 103 and the plating layer 3 can be minimized.

[0034] Therefore, according to the embodiment, the reliability of the semiconductor device 100 in a high-temperature environment can be improved.

[0035] Also, in the embodiment, the aspect ratio of the convex portion 3b formed on the surface 3a of the plating layer 3 is more preferably 0.5 or more. Thereby, when the semiconductor device 100 is exposed to a high-temperature environment, the decrease in the adhesive strength between the sealing resin 103 and the plating layer 3 can be further suppressed.

[0036] Therefore, according to the embodiment, the reliability of the semiconductor device 100 in a high-temperature environment can be further improved.

[0037] Note that, in the embodiment, the aspect ratio of the convex portion 3b formed on the surface 3a of the plating layer 3 is preferably 1.2 or less. Thereby, since the plating layer 3 having an uneven shape on the surface 3a can be easily formed, the manufacturing cost of the lead frame 1 can be reduced.

[0038] In addition, in the embodiment, the plating layer 3 formed on the base material 2 is sealed with the sealing resin 103, and the shear strength between the plating layer 3 and the sealing resin 103 when heated to 260 (°C) is preferably 2 (MPa) or more.

[0039] In this way, by setting the adhesive strength (i.e., shear strength) between the sealing resin 103 and the plating layer 3 when the semiconductor device 100 is exposed to a high-temperature environment to a predetermined value or more, the reliability of the semiconductor device 100 in a high-temperature environment can be further improved.

[0040] In addition, in the embodiment, the plating layer 3 formed on the base material 2 is sealed with the sealing resin 103, and the shear strength between the plating layer 3 and the sealing resin 103 when heated to 260 (°C) is preferably 10 (%) or more of the shear strength between the plating layer 3 and the sealing resin 103 before heating.

[0041] In this way, by setting the residual rate of the adhesive strength (i.e., shear strength) between the sealing resin 103 and the plating layer 3 that occurs when the semiconductor device 100 is exposed to a high-temperature environment to a predetermined ratio or more, the reliability of the semiconductor device 100 in a high-temperature environment can be further improved.

[0042] In addition, in the embodiment, in the stitch pull strength test for the plating layer 3, the pull strength is preferably 5.0 (g) or more. In this way, in the stitch pull strength test, which is a test regarding the bonding strength between the plating layer 3 and the bonding wire 102, by setting the bonding strength to a predetermined value or more, the reliability of the semiconductor device 100 can be further improved.

Example

[0043] Hereinafter, the content of the present disclosure will be described in more detail with reference to examples and comparative examples, but the present disclosure is not limited to the following examples.

[0044] <Evaluation 1> [Example 1] First, a lead frame substrate mainly composed of copper was prepared. Next, after degreasing and pickling the substrate, an Ag plating layer was formed on the surface of the substrate by electrolytic plating treatment.

[0045] In this electrolytic plating treatment, the plating bath was prepared by adding K(AgCN2): 120 (g / L) and roughening additive: 80 (ml / L) to a bath based on conductive salts such as nitrates and organic acid salts. Then, the treatment conditions of the electrolytic plating treatment were set as bath temperature: 61 (°C), current density: 70 (A / dm 2 ), and an Ag plating layer was formed with a thickness of 5 μm.

[0046] By performing the electrolytic plating treatment under such conditions, an Ag plating layer with an uneven surface shape was formed. Also, the aspect ratio of the convex portions in such an uneven shape was 0.55. Thereby, the lead frame of Example 1 was obtained.

[0047] In the present disclosure, the aspect ratio of the convex portions formed on the surface was measured at room temperature using a shape analysis laser microscope VK-X210 manufactured by Keyence Corporation. Also, the value of such an aspect ratio used the average value of N = 20.

[0048] [Examples 2 - 14] Using the same method as in Example 1 above, lead frames of Examples 2 - 14 having an Ag plating layer with an uneven shape formed on the surface were obtained. In Examples 2 - 14, the conditions of the electrolytic plating treatment were appropriately adjusted so that the aspect ratios of the convex portions formed on the Ag plating layer would be various values.

[0049] [Comparative Example 1] First, a lead frame substrate mainly composed of copper was prepared. Next, the substrate was degreased and pickled. Thereby, the lead frame of Comparative Example 1 was obtained. That is, the lead frame of Comparative Example 1 is a lead frame in which an Ag plating layer is not formed on the surface and the copper substrate is exposed as it is.

[0050] [Comparative Example 2] First, a lead frame substrate mainly composed of copper was prepared. Next, after degreasing and pickling the substrate, an Ag plating layer was formed on the surface of the substrate by electrolytic plating treatment.

[0051] In this electrolytic plating treatment, the plating bath was prepared by adding K(AgCN2): 120 (g / L) to a bath based on conductive salts such as nitrates and organic acid salts. Then, the treatment conditions of the electrolytic plating treatment were set as bath temperature: 65 (°C), current density: 70 (A / dm 2 ), and an Ag plating layer was formed with a thickness of 5 μm.

[0052] By performing the electrolytic plating treatment under such conditions, a smooth Ag plating layer was formed on the surface of the Ag plating layer. That is, in the Ag plating layer of Comparative Example 2, the aspect ratio of the convex portion was almost zero. Thus, the lead frame of Comparative Example 2 was obtained.

[0053] Subsequently, the shear strength of the lead frames of Examples 1 to 14 and Comparative Examples 1 and 2 obtained above was evaluated. FIG. 3 is a diagram for explaining the test sample of the shear strength test. First, as shown in FIG. 3, a resin cup made of an epoxy resin (EME-G631H) was molded on the surfaces of the lead frames of Examples 1 to 14 and Comparative Examples 1 and 2.

[0054] The molding conditions of such a resin cup were molding temperature: 180 (°C), molding time: 90 (seconds), cure temperature: 180 (°C), and cure time: 4 (hours).

[0055] Next, a cup shear test was performed according to the procedure defined by the SEMI standard specification G69-0996. Specifically, a gauge (not shown) was pressed against the resin cup of each test sample and moved in the direction of the arrow in FIG. 3 to measure the shear strength. The height of the gauge (shear height) during such measurement was 100 (μm), and the speed of the gauge (shear speed) was 100 (μm / s).

[0056] Fig. 4(a) is a diagram showing the shear strength of the lead frames according to Comparative Examples 1 and 2 and Example 1 at room temperature. As shown in Fig. 4(a), by comparing Comparative Example 2 in which a smooth Ag plating layer was formed with Example 1 in which an Ag plating layer having an aspect ratio of 0.3 or more for the convex portions was formed, it can be seen that the lead frame of Example 1 has an increased shear strength at room temperature.

[0057] Therefore, according to the embodiment, the reliability of the semiconductor device at room temperature can be improved.

[0058] Since copper shows better adhesion to the encapsulating resin than silver, as shown in Fig. 4(a), the shear strength of the lead frame of Comparative Example 1 shows a good value at room temperature.

[0059] Fig. 4(b) is a diagram showing the shear strength of the lead frames according to Comparative Examples 1 and 2 and Example 1 at high temperature. Such measurement results are the results of a shear strength test performed in an environment of 260 (°C).

[0060] As shown in Fig. 4(b), at high temperature, the shear strength of the lead frames of Comparative Examples 1 and 2 has significantly decreased, while for the lead frame of Example 1, the decrease in shear strength is minimized.

[0061] Specifically, the shear strength of the lead frame of Comparative Example 1 has decreased by about 6 (%) at high temperature compared to that at room temperature. Also, the shear strength of the lead frame of Comparative Example 2 has decreased by about 5 (%) at high temperature compared to that at room temperature. On the other hand, the shear strength of the lead frame of Example 1 has only decreased by about 15 (%) at high temperature compared to that at room temperature.

[0062] Thus, by comparing Comparative Examples 1 and 2 with Example 1, it can be seen that in the lead frame of Example 1, the decrease in the adhesive strength between the encapsulating resin and the plating layer is minimized in a high-temperature environment. Therefore, according to the embodiment, the reliability of the semiconductor device in a high-temperature environment can be improved.

[0063] Subsequently, the surface roughness Ra and the surface area increase rate of the lead frames of Examples 2 to 6 and Comparative Example 2 were evaluated. The surface roughness Ra and the surface area increase rate of such lead frames were measured at room temperature using a shape analysis laser microscope VK-X210 manufactured by Keyence Corporation.

[0064] FIG. 5(a) is a diagram showing the relationship between the shear strength at high temperature (260° C.) and the surface roughness Ra of the lead frames according to Comparative Example 2 and Examples 2 to 6. By comparing Examples 2 to 6 shown in FIG. 5(a), it can be seen that even for a lead frame with a high surface roughness Ra of the plating layer, the shear strength at high temperature is not improved.

[0065] That is, in the embodiment, it has become clear that there is a low correlation between the surface roughness Ra of the plating layer and the shear strength at high temperature.

[0066] FIG. 5(b) is a diagram showing the relationship between the shear strength at high temperature (260° C.) and the surface area increase rate of the lead frames according to Comparative Example 2 and Examples 2 to 6. By comparing Examples 2 to 6 shown in FIG. 5(b), it can be seen that even for a lead frame with a high surface area increase rate of the plating layer, the shear strength at high temperature is not improved.

[0067] That is, in the embodiment, it has become clear that there is a low correlation between the surface area increase rate of the plating layer and the shear strength at high temperature.

[0068] FIG. 6 is a diagram showing the relationship between the shear strength and the aspect ratio of the lead frame according to Comparative Example 2 and Examples 2 to 6 under a high-temperature environment. By comparing Examples 2 to 6 shown in FIG. 6, it can be seen that in the lead frame with a high aspect ratio of the convex portions formed in the plating layer, the shear strength under a high-temperature environment is improved.

[0069] That is, in the embodiment, it has been clarified that there is a high correlation between the aspect ratio of the convex portions formed in the plating layer and the shear strength under a high-temperature environment.

[0070] FIG. 7 is a diagram showing the correlation between the aspect ratio and the shear strength under a high-temperature environment in the lead frame according to the embodiment. From the results shown in FIG. 7, it has been clarified that there is a high correlation between the aspect ratio of the convex portions formed in the plating layer and the shear strength under a high-temperature environment.

[0071] As described so far, in the embodiment, attention is paid to the aspect ratio of the convex portions instead of the surface roughness and the surface area increase rate of the plating layer, and the surface morphology of the plating layer is modified.

[0072] And in the embodiment, by forming a plating layer having an aspect ratio of the convex portions of 0.3 or more on the lead frame, the shear strength under a high-temperature environment can be increased, so that the reliability of the semiconductor device under a high-temperature environment can be improved.

[0073] <Evaluation 2> [Comparative Example 3] First, a lead frame substrate mainly composed of copper was prepared. Next, after degreasing and pickling the substrate, an Ag plating layer was formed on the surface of the substrate by electrolytic plating treatment.

[0074] The plating bath in this electrolytic plating treatment was prepared by adding K(AgCN2): 120 (g / L) to a bath based on conductive salts such as nitrates and organic acid salts. Then, the treatment conditions of the electrolytic plating treatment were bath temperature: 65 (° C), current density: 90 (A / dm 2 ), and an Ag plating layer was formed with a thickness of 5 μm.

[0075] By performing the electrolytic plating treatment under such conditions, a matte Ag plating layer with a roughened surface was formed. Further, in the Ag plating layer of Comparative Example 3, the aspect ratio of the convex portions was less than 0.3. Thus, the lead frame of Comparative Example 3 was obtained.

[0076] Subsequently, for the lead frames of Comparative Example 3 and Example 2 obtained above, a commercially available scanning electron microscope (SEM) (manufactured by Hitachi High-Technologies Fielding Co., Ltd., Hitachi ultra-high resolution field emission scanning electron microscope S-4800) was used to evaluate the surface morphology and the cross-sectional morphology in the vicinity of the surface.

[0077] The evaluation of such surface morphology and cross-sectional morphology in the vicinity of the surface was performed both before the heat treatment and after a predetermined heat treatment (400 (°C), 10 minutes).

[0078] FIG. 8 is a diagram showing the surface morphology and cross-sectional morphology before and after the heat treatment of the plating layer formed on the lead frame according to Comparative Example 3. As shown in FIG. 8, in the lead frame of Comparative Example 3, it can be seen that the surface morphology of the plating layer after the heat treatment has changed significantly because recrystallization has progressed.

[0079] That is, in the semiconductor device using the lead frame of Comparative Example 3, due to such a large change in the surface morphology, there is a possibility that peeling between the plating layer and the sealing resin may occur in a high-temperature environment, so the reliability in a high-temperature environment may deteriorate.

[0080] FIG. 9 is a diagram showing the surface morphology and cross-sectional morphology before and after the heat treatment of the plating layer formed on the lead frame according to Example 2. As shown in FIG. 9, it can be seen that in the lead frame of Example 2, the surface morphology hardly changes even after the heat treatment.

[0081] In addition, in the lead frame of Example 2 shown in FIG. 9, the aspect ratio before heat treatment was 0.54, while the aspect ratio after heat treatment was 0.53. That is, it can be seen that in the lead frame of Modification 2, the aspect ratio hardly changes even after heat treatment.

[0082] As described above, since the surface morphology of the lead frame of Example 2 does not change significantly even after the heat history is applied, and the high aspect ratio of the convex portion is maintained, the decrease in the adhesive strength between the encapsulating resin and the plating layer can be minimized.

[0083] <Evaluation 3> Next, the transition of the shear strength when the measurement temperature changes (that is, the transition of the shear strength when the heat history applied to the lead frame changes) was evaluated. Specifically, for the lead frame of Example 1 in which the resin cup shown in FIG. 3 was formed on the surface, the shear strength after holding at a predetermined temperature between 160 (°C) and 400 (°C) for 10 minutes was measured respectively. The results are shown in FIG. 10.

[0084] FIG. 10 is a diagram showing the transition of the shear strength due to the heat history of the lead frame according to Example 1. As shown in FIG. 10, it can be seen that in the lead frame according to Example 1, the shear strength in the thermal environment is maintained even when a heat history is applied in the range of 160 (°C) to 400 (°C).

[0085] Therefore, according to the embodiment, even when a heat history is applied in the range of 160 (°C) to 400 (°C), the decrease in the adhesive strength between the encapsulating resin and the plating layer can be minimized.

[0086] <Evaluation 4> Next, an assembly evaluation was performed when assembling a semiconductor device using the lead frames of Example 1 and Comparative Example 2, and a reliability evaluation was performed on the semiconductor devices assembled using the lead frames of Example 1 and Comparative Example 2. The results are shown in Table 1.

[0087]

Table 1

[0088] As shown in Table 1, both the assembly evaluation when using the lead frame of Comparative Example 2 and the assembly evaluation when using the lead frame of Example 1 had good results in all items.

[0089] Furthermore, regarding the pull strength of the stitch pull strength test, which tends to have a low value for a surface having an uneven shape, the lead frame of Example 1 having an uneven shape had better results (Min. 5.5 (g)) than the lead frame of Comparative Example 2 having a smooth surface. Thereby, in the embodiment, the semiconductor device can be assembled more stably.

[0090] Note that the stitch pull strength test in the present disclosure was evaluated as follows. First, bonding wires were joined in a stitch shape to the surface of the plating layer. Next, a hook was hooked on this stitch-shaped bonding wire and a tensile test was performed at a speed of 170 μm / s, and the tensile strength in such a tensile test was taken as the result of the stitch pull strength test.

[0091] Also, as shown in Table 1, the reliability evaluation of the semiconductor device using the lead frame of Comparative Example 2 did not give good results, whereas the reliability evaluation of the semiconductor device using the lead frame of Example 1 gave good results.

[0092] That is, in the embodiment, by using a plating layer in which the aspect ratio of the convex portions formed on the surface is 0.3 or more, high reliability can be imparted to the semiconductor device.

[0093] As described above, the embodiments of the present invention have been explained. However, the present invention is not limited to the above-described embodiments, and various modifications are possible without departing from the spirit thereof. For example, in the above embodiment, the plating layer mainly composed of Ag has been shown. However, the present disclosure is not limited to such an example, and in the plating layer mainly composed of a noble metal element other than Ag, the aspect ratio of the convex portions formed on the surface may be 0.3 or more.

[0094] As described above, the metal component (lead frame 1) according to the embodiment is a metal component used in the manufacture of a semiconductor device, and includes a base material 2 and a noble metal plating layer (plating layer 3). The base material 2 has conductivity. The noble metal plating layer (plating layer 3) is formed on the entire surface or a part of the surface of the base material 2. Further, the noble metal plating layer (plating layer 3) has an uneven shape on the surface 3a, and the aspect ratio of the convex portions 3b in the uneven shape is 0.3 or more. Thereby, the reliability of the semiconductor device 100 in a high-temperature environment can be improved.

[0095] Also, in the metal component (lead frame 1) according to the embodiment, the noble metal plating layer (plating layer 3) contains Ag as a main component. Thereby, the bonding strength between the lead frame 1 and the bonding wire 102 can be improved, and the bonding strength between the lead frame 1 and the semiconductor element 101 can be improved.

[0096] Also, in the metal component (lead frame 1) according to the embodiment, the aspect ratio of the convex portions 3b is 0.5 or more. Thereby, the reliability of the semiconductor device 100 in a high-temperature environment can be further improved.

[0097] Further effects and modification examples can be easily derived by those skilled in the art. Therefore, the broader aspects of the present invention are not limited to the specific details and representative embodiments represented and described as above. Accordingly, various modifications can be made without departing from the spirit or scope of the general inventive concept defined by the appended claims and their equivalents.

Description of Reference Numerals

[0098] 1 Lead frame (an example of a metal part) 2 Substrate 2a Surface 3 Plating layer (an example of a noble metal plating layer) 3a Surface 3b Protrusion 100 Semiconductor device 101 Semiconductor element 102 Bonding wire 103 Encapsulating resin

Claims

1. In a metal component used in the manufacture of a semiconductor device, a conductive base material, a noble metal plating layer formed on the entire surface or a part of the surface of the base material, and the noble metal plating layer has a granular uneven shape on the surface, and the aspect ratio of the convex portions in the uneven shape is 0.3 or more and 1.2 or less metal component.

2. The noble metal plating layer contains Ag as a main component The metal component according to claim 1.

3. The aspect ratio of the convex portions is 0.5 or more The metal component according to claim 1 or 2.

Citation Information

Patent Citations

  • Semiconductor device

    JP1993003277A

  • Silver plated metallic member and method of manufacturing the same

    JP2008088493A