Silicon carbide device having a trench gate
The silicon carbide device addresses the need for expanded application range by incorporating a stripe-shaped trench gate structure with a shielding region, enhancing its performance and reliability for heavy inductive loads.
Patent Information
- Application Number
- JP2020135517
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2019-08-14
- Filing Date
- 2020-08-11
- Publication Date
- 2025-06-24
- Estimated Expiration
- 2040-08-11
AI Technical Summary
There is a need to expand the range of applications for silicon carbide devices, particularly in enhancing their performance and reliability for heavy inductive loads.
The silicon carbide device incorporates a stripe-shaped trench gate structure with a shielding region of a second conductivity type that contacts the gate structure's bottom edge over at least 20% of its length, improving the device's switching performance and reducing capacitance.
The solution enhances the silicon carbide device's ability to handle heavy inductive loads by reducing gate-drain capacitance, improving short-circuit robustness, and increasing the reliability of the gate dielectric, thus expanding its application range.
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Abstract
Description
Technical Field
[0001] The present disclosure relates to silicon carbide devices, and more particularly to silicon carbide switches using transistor cells.
Background Art
[0002] For example, in a DC / AC converter, an AC / AC converter, or an AC / DC converter, and also in an electric circuit for driving an inductive load, such as a motor driver circuit, the electric circuit for converting electric energy may include a power semiconductor device as a switch. To switch a heavy inductive load, LC oscillation may be triggered. On the other hand, the breakdown electric field strength of silicon carbide (SiC) is higher than that of silicon. The SiC device may be significantly thinner than an equivalent silicon device with the same nominal blocking voltage capability, and as a result, the on-resistance of the SiC device can be significantly lower.
Summary of the Invention
Problems to be Solved by the Invention
[0003] There is a need to expand the range of applications that can be realized in silicon carbide devices.
Means for Solving the Problems
[0004] One embodiment of the present disclosure relates to a silicon carbide device. The silicon carbide device includes a stripe-shaped trench gate structure extending from a first surface into the silicon carbide body. The gate structure has a gate length along a first lateral direction. The bottom surface and the first gate sidewall of the gate structure are connected via a first bottom edge portion of the gate structure. The silicon carbide device further includes at least one source region of a first conductivity type. A shielding region of a second conductivity type is in contact with the first bottom edge portion of the gate structure over at least 20% of the gate length.
[0005] The accompanying drawings are attached to facilitate a further understanding of each embodiment, incorporated herein, and form a part thereof. Each drawing shows an embodiment of a silicon carbide device and serves to explain the principles of each embodiment together with this description. Further embodiments are described in the following detailed description and claims.
Brief Description of the Drawings
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DETAILED DESCRIPTION OF THE INVENTION
[0007] In the following detailed description, reference will be made to the accompanying drawings which form a part hereof and which illustrate specific embodiments by which the silicon carbide device can be implemented. It should be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present disclosure. For example, features illustrated or described for one embodiment can be used in other embodiments or in combination with other embodiments to produce further embodiments. The present disclosure includes such modifications and variations. Each example is described using specific language and should not be construed as limiting the scope set forth in the appended claims. The scale of each drawing is not accurate and is for illustrative purposes only. Unless otherwise noted, corresponding elements are designated by the same reference numerals in the various drawings.
[0008] Terms such as "having", "containing", "including", "comprising" are not exclusive and indicate the presence of a given structure, element, or feature but do not preclude the presence of additional elements or features. The articles "a", "an", and "the" include not only the singular but also the plural unless the context clearly indicates otherwise.
[0009] The term "electrically connected" represents a permanent low-resistance connection between electrically connected elements, for example, direct contact between the elements, or a low-resistance connection through a metal and / or highly doped semiconductor material. The term "electrically coupled" means that one or more intervening elements adapted for signal and / or power transmission may be connected between electrically coupled elements, for example, between elements that are controllable to temporarily achieve a low-resistance connection in a first state and a high-resistance electrical decoupling in a second state. An ohmic contact is a non-rectifying electrical junction having a linear or substantially linear current / voltage characteristic.
[0010] In each figure, relative doping concentrations are indicated by showing "-" or "+" next to the doping type "n" or "p". For example, "n-" means that the doping concentration is lower than that of the "n" doping region, and the "n+" doping region has a higher doping concentration than the "n" doping region. Doping regions with the same relative doping concentration do not necessarily have the same absolute doping concentration. For example, two different "n" doping regions may have the same or different absolute doping concentrations.
[0011] Two adjacent doping regions having the same conductivity type but different dopant concentrations form a unipolar junction, for example, an n / n+ or p / p+ junction, along the interface between the two doping regions. At the unipolar junction, the dopant concentration profile orthogonal to the unipolar junction may show a step or a transition point where the dopant concentration profile changes from concave to convex or vice versa.
[0012] The range given for a physical dimension includes the boundary values. For example, the range of parameter y from a to b is interpreted as a ≤ y ≤ b. The same applies to a range with a boundary value such as "more than" and "at least".
[0013] The main component of a layer or structure from a compound or alloy is an element whose atoms form the compound or alloy. For example, nickel and silicon are the main components of a nickel silicide layer, and copper and aluminum are the main components of a copper aluminum alloy.
[0014] The term "above" should not be construed to mean "directly above". Rather, when one element is disposed "above" another element (e.g., a layer is "above" another layer or "above" a substrate), additional components (e.g., an additional layer) may be disposed between the two elements (e.g., when a layer is "above" a substrate, another layer may be disposed between this layer and the substrate).
[0015] Regarding the structure and doped region formed in the silicon carbide body, when the minimum distance between the second region and the first surface on the front side of the silicon carbide body is longer than the maximum distance between the first region and the first surface, the second region is "below" the first region. When the perpendicular projections of the first region and the second region onto the first surface overlap, the second region is "directly below" the first region. This perpendicular projection is a projection orthogonal to the first surface.
[0016] Each region and / or each structure may be laterally separated from each other within the same horizontal layer. The laterally separated regions and / or structures may also be vertically separated (i.e., may be disposed in different horizontal layers). In the latter case, the orthogonal projections of these separated regions and / or structures onto the horizontal projection plane are laterally separated. When the orthogonal projections of each region and / or each structure onto the horizontal projection plane overlap laterally, the said regions and / or structures overlap laterally.
[0017] The term "power semiconductor device" refers to a semiconductor device having a high voltage blocking capability of at least 30V, for example 100V, 600V, 3.3kV or more, and having a nominal on-current or forward current of at least 1A, for example 10A or more.
[0018] According to one embodiment, the silicon carbide device may include a stripe-shaped trench-gate structure extending from a first surface into the silicon carbide body.
[0019] The silicon carbide body may have two substantially parallel main surfaces that are the same in shape and size, and an outer surface region connecting each edge of the two main surfaces. For example, the silicon carbide body may be a polygonal (e.g., rectangular or hexagonal) prism with or without rounded edges, or a cylinder. The silicon carbide body may have surface extensions along two horizontal directions and a thickness along a vertical direction perpendicular to the horizontal direction. This horizontal direction is also referred to as the lateral direction hereinafter.
[0020] The material of the silicon carbide body may be, for example, 15R-SiC (15R polytype silicon carbide), or, as an example, hexagonal polytype silicon carbide such as 2H-SiC, 4H-SiC, 6H-SiC. In addition to the main components silicon and carbon, the silicon carbide body may contain dopant atoms such as nitrogen (N), phosphorus (P), beryllium (Be), boron (B), aluminum (Al), and / or gallium (Ga). Further, the silicon carbide body may contain unnecessary impurities such as, for example, hydrogen, fluorine, and / or oxygen.
[0021] The stripe-shaped trench-gate structure may extend from a first surface on the front side of the silicon carbide body into the silicon carbide body. The gate structure has a gate length along a first lateral direction and a gate width along a second lateral direction orthogonal to the first direction. This gate structure may include a conductive gate electrode. The gate structure may further include a gate dielectric formed between the gate electrode and the silicon carbide body. The two opposing first gate sidewalls and the second gate sidewalls may be perpendicular, or may be slightly inclined with respect to the vertical direction. The first gate sidewalls and the second gate sidewalls may be tapered or parallel.
[0022] Generally, at least the first gate sidewall may extend substantially along a crystal plane of a silicon carbide body having a high carrier mobility (for example, one of the {11-20} or {1-100} crystal planes). The first gate sidewall may be an active sidewall, that is, the transistor channel may extend along the first gate sidewall. In some embodiments, (for example, in the case of parallel first and second gate sidewalls such as a vertical trench gate structure), this second gate sidewall may also be an active sidewall. In other embodiments (for example, in the case of a tapered trench gate structure), this second gate sidewall may be a non-active sidewall. When viewed from the front side of the silicon carbide body, the first gate sidewall is present on the first side portion of the gate structure, and the second gate sidewall is present on the second side portion opposite to the first side portion of the gate structure.
[0023] The bottom surface at the lower end of the gate structure connects the first gate sidewall and the second gate sidewall via a first bottom edge and a second bottom edge. This bottom surface may include a horizontal portion. The first gate sidewall may include a straight section. The first bottom edge may connect the horizontal portion of the bottom surface and the straight section of the first gate sidewall. Thus, the second bottom edge may connect the horizontal portion of the bottom surface and the straight section of the second gate sidewall. The first bottom edge between the bottom surface and the first gate sidewall may be an acute angle, or rounded, and / or chamfered (for example, at an obtuse angle). The second bottom edge between the bottom surface and the second gate sidewall may be an acute angle, or rounded, and / or chamfered (for example, at an obtuse angle).
[0024] The silicon carbide device may further include at least one source region. This at least one source region may be a doped region of a first conductivity type. The source region may be in contact with the first gate sidewall of the gate structure, or may be in contact with the first gate sidewall of a further gate structure. That is, along the first gate sidewall of the gate structure, the source region may not be formed, or a single source region or a plurality of source regions may be formed. When the source region is not formed along the first gate sidewall of the gate structure, at least one source region may be formed along a further gate structure. The source regions formed along the same gate structure may be separated from each other along a first direction. The length of each source region along the first direction may be at least 500 nm, for example, at least 1 μm.
[0025] The silicon carbide device may further include a shielding region. This shielding region may be a doped region of a second conductivity type. The first conductivity type and the second conductivity type are complementary conductivity types. The first conductivity type may be n-type, and the second conductivity type may be p-type. Alternatively, the first conductivity type may be p-type, and the second conductivity type may be n-type.
[0026] This shielding region is in contact with the first bottom edge over at least 20% of the gate length of the gate structure. For example, the shielding region may extend along the entire length of the gate structure. The shielding region may extend at least partially along the first gate sidewall. According to another example, the shielding region extends over at least 20% of the first gate sidewall. Along the first bottom edge, the shielding region may not be present in at least the vertical section under the source region. When the shielding region is in contact with the first bottom edge, this shielding region may extend vertically from the first surface to the first bottom edge along the first gate sidewall.
[0027] According to another example, the shielding region may extend over at least 30% of the distance between adjacent source regions.
[0028] The shielding region may further be in contact with the second gate sidewall, the second bottom edge portion, and / or the bottom surface of the gate structure. The shielding region may be in contact with the second gate sidewall and the second bottom edge portion over the entire gate length of the gate structure. The shielding region may be in contact with the complete shielding section of the bottom surface along the second bottom edge portion over the entire gate length of the gate structure. The shielding region may be in contact with the partial shielding section of the bottom surface along the first bottom edge portion in each section between adjacent source regions.
[0029] In a state where the shielding region is in contact with a substantial section of the first bottom edge portion, a substantial portion of the gate structure may be completely embedded within the shielding region. Since the shielding region may shield the gate structure from the backside potential, for example, the potential applied to the drain potential, the increased portion of the shielding region along the first gate sidewall may reduce the gate-drain capacitance C GD . The shielding region may be electrically connected to the front-side potential, for example, the source potential. In this case, when a part of the shielding portion increases with respect to the source region, the gate-source capacitance C GS may increase. When C GS increases and C GD decreases, the turn-off oscillation tendency is significantly weakened.
[0030] When the portion of the shielding region increases along the first surface, the contact area between this shielding region and the front-side electrode formed on the first surface may further increase. When the contact area increases, the ohmic contact resistance value between the front-side electrode and the shielding region may decrease. Furthermore, when the regional portion of the shielding region increases along the first surface, it may become easier to form a highly reliable low-resistance ohmic contact between this shielding region and the front-side electrode. As a result, the ruggedness of the surge current of the body diode formed by the shielding region in the drift structure may be significantly improved. When the contact area increases and the ohmic resistance value of the contact between the front-side electrode and the shielding portion decreases, it may also contribute to the reduction of current overshoot during turn-on, the reduction of body diode loss, and / or the reduction of the oscillation tendency during turn-off.
[0031] A shielding region may be formed along the first gate sidewall to reduce the regional portion of the source region, and as a result, the width of the entire transistor channel may be reduced. Along with the improved shielding of the transistor channel from such portions of the shielding region formed between each source region along the first direction, when the transistor channel width decreases, it contributes to a decrease in the saturation current of the transistor, and thus the short-circuit robustness can be improved. Further, the completely shielded portion of the bottom surface can be enlarged, and the incompletely shielded portion of the bottom surface can be effectively shielded from all four sides. Both of these effects can further contribute to an improvement in the reliability of the gate dielectric.
[0032] In high-voltage devices, such as devices with a voltage blocking capability of at least 600V, for example at least 3kV, the resistance value of the voltage sustaining layer is dominant in the on-state loss, so in some cases the on-resistance of the transistor channel, which may increase slightly, can be ignored. On the other hand, forming a shielding region along a significant portion of the first gate sidewall may significantly smooth the switching operation, improve the characteristics of the body diode, and / or improve the short-circuit durability. In particular, high-voltage devices with a voltage blocking capability of at least 600V, for example at least 3kV, can benefit from a shielding region extending over a significant portion of the first gate sidewall.
[0033] According to one embodiment, the shielding region may be in contact with the first bottom edge over at least 30%, for example at least 50%, of the gate length. A relatively large portion of the shielding region further reduces C GD and further increases C GS and / or can further improve the reliability of the device.
[0034] According to one embodiment, the shielding region may include a top shielding portion and a deep shielding portion. The top shielding portion is disposed between the first surface and the deep shielding portion. The top shielding portion may be adjacent to (e.g., directly adjacent to) the first surface. The vertical extension of the top shielding portion may be larger than the vertical extension of the gate structure. The top shielding portion may be in contact with the first bottom edge, at least in some places, for example.
[0035] The top shielding portion may be in contact with the second bottom edge of the gate structure along the entire length of the gate structure. The deep shielding portion may be formed within the layer of the silicon carbide body between the bottom edge of the gate structure and the second surface on the back side of the silicon carbide body.
[0036] The horizontal cross-sectional area of the deep shielding portion may be the same as or substantially the same as the horizontal cross-section of the top shielding portion, and the same implantation mask may be used to form the deep shielding portion and the top shielding portion. Alternatively, the horizontal cross-sectional area or the top shielding portion and the deep shielding portion may be quite different. In the latter case, different implantation masks may define the deep shielding portion and the top shielding portion.
[0037] The top shielding portion and the deep shielding portion may be directly connected to each other along the vertical direction. In the sense that one or more range end peaks of the implantation portion defining the deep shielding portion may be disposed within the top shielding portion, the top shielding portion and the deep shielding portion may overlap each other. The deep shielding portion may be continuous along the vertical direction.
[0038] The deep shielding portion can improve the shielding effect on the transistor channel and on those portions of the gate dielectric that are not directly embedded in the shielding region. When the shielding of the transistor channel is improved, DIBL (Drain Induced Barrier Lowering) may be reduced.
[0039] When the lateral shielding effect is improved in this way, sufficient shielding may be facilitated even in a relatively low vertical extension portion of the shielding region, for example, in a deep shielding portion. For example, when the lateral shielding is improved, by omitting an implantation portion where the implantation energy is higher than 1.3 MeV, a reduction in the vertical extension portion of the deep shielding portion can be at least partially compensated for. For example, the vertical distance between the bottom surface of the gate and the lower edge of the deep shielding portion may be shortened to at least 50 nm, for example, at least 300 nm.
[0040] According to one embodiment, the first distance between the top shielding portion and the first gate sidewall may be shorter than the second distance between the deep shielding portion and the first gate sidewall. For example, the surface section of the top shielding portion may be directly adjacent to the source region. The deep shielding portion may have a lateral distance with respect to each source region along at least one lateral direction, and / or may laterally overlap with the source region along at least one lateral direction.
[0041] According to one embodiment, the top shielding portion may include a separation section. This separation section may be in contact with the first gate sidewall. The separation section may extend downward from the first surface to the first bottom edge. The separation section may laterally separate the source region formed along the first direction along the gate structure. In this case, the top shielding portion can shield each transistor channel from all four lateral sides.
[0042] According to one embodiment, the top shielding portion may include a separation section. Each separation section may be disposed between each source region. For example, this separation section may be in contact with the first gate sidewall. Along the first surface, each separation section and each source region may cover a continuous portion of the first gate sidewall of the gate structure along the first direction. Each separation section and each source region may completely cover the first gate sidewall along the first surface.
[0043] Each separation interval and each source region may have the same width along the second direction. Along the first surface, each separation interval and each source region of the top shielding portion may complement each other into a first continuous region without gaps. If there is no additional doped region along the first gate sidewall or in the vicinity of the first gate sidewall, the formation of the top shielding portion and the source region can be facilitated by using a relatively simple photomask.
[0044] According to one embodiment, the silicon carbide device may include a first gate structure and an adjacent second gate structure. Each of the first gate structure and the second gate structure may be implemented as the aforementioned gate structure. The first gate structure or the second gate structure may further correspond to the aforementioned gate structure.
[0045] The top shielding portion and the source region assigned to the first gate structure may be disposed between the first gate sidewall of the first gate structure and the second gate sidewall of the second gate structure.
[0046] In particular, it is possible that there is no additional doped region adjacent to the first surface in the region between the first gate structure and the second gate structure, which has the conductivity type of the source region and is electrically connected to the voltage maintaining layer via an ohmic path.
[0047] On the first surface, the region between the first gate sidewall and the second gate sidewall may be filled with the top shielding portion and the source region. Specifically, the region between the first gate structure and the second gate structure may be completely filled with the exposed surfaces of the shielding portion and the source region.
[0048] That is, between the first gate sidewall of the first gate structure and the second gate sidewall of the second gate structure, the top shielding portion and the source region may complement each other into a second continuous region along the first surface. The second continuous region includes the first continuous region and a further stripe-shaped portion on the upper surface of the top shielding portion on the first surface. If there is no further doped region between adjacent gate structures, the formation of the top shielding portion and the source region can be made easier.
[0049] According to one embodiment, along the first direction, the lateral dopant profile passing through the transition between one of the separation intervals and one of the source regions may include a plateau interval. This plateau interval may indicate that along the first direction, the opening in the implantation mask for source region implantation can be made narrower than the length of the mask column in the implantation mask for top shielding portion implantation. The length of the plateau interval corresponds to the difference between the extension of the mask column for top shielding portion implantation and the extension along the first direction of the mask opening for source region implantation. The length of each plateau interval may be at least 50 nm, 200 nm, or even 500 nm. For example, in the plateau interval, the dopant concentration may change by less than one order of magnitude over a distance of 50 nm, or 200 nm, or even 500 nm. In the plateau interval, the conductivity type may be the same as that of the separation interval, or the same as that of the source region, or may be unique. The plateau interval may simplify the alignment of the implantation mask for forming the source region and / or the separation interval.
[0050] According to one embodiment, the silicon carbide device may include a first gate structure and an adjacent second gate structure. The first gate structure and the second gate structure may be implemented as the aforementioned gate structures. The first gate structure or the second gate structure may further correspond to the aforementioned gate structure.
[0051] The deep shielding portion may include a deep section. Along a second direction, the deep section may be laterally separated from a first gate sidewall of the first gate structure. Further, each deep section may laterally overlap with a second gate sidewall of the second gate structure.
[0052] For example, a silicon carbide device may include a plurality of gate structures. The deep shielding portion may include a plurality of deep sections that are separated from each other at least along a second direction. Along the second direction, each deep section may be laterally separated from a first gate sidewall of a first one of two adjacent gate structures, and may also laterally overlap with a second gate sidewall of a second one of the two adjacent gate structures.
[0053] According to one embodiment, the deep section may form a continuous stripe having a longitudinal axis parallel to a first direction. This deep section may extend over at least 90% of the gate length or over the entire gate length.
[0054] For example, a silicon carbide device may include a plurality of gate structures and a plurality of deep sections. These deep sections may be laterally separated along a second direction. The deep sections may form continuous stripes having longitudinal axes parallel to a first direction. For example, each deep section may extend over at least 90% of the gate length or over the entire gate length. In the case of stripe-shaped deep sections, it may be possible to successfully form the deep sections without fine-tuning of a photomask along the first direction. Each stripe-shaped deep section may contribute to a shielded transistor channel formed on the opposite side in the longitudinal direction of this stripe-shaped deep section.
[0055] According to another example, the deep section may include a plurality of deep sub - sections. These deep sub - sections may be laterally separated along a first direction. The deep sub - sections may be arranged in a matrix of rows and columns, and each row may extend orthogonal to each column. Two of these deep sub - sections are formed on both sides of each source region along a second direction. In this way, each transistor channel may be shielded by at least two deep sub - sections formed on both lateral sides.
[0056] If each source region assigned to adjacent gate structures is offset from each other, for example, by a distance equal to half of the center - to - center distance between adjacent source regions, each transistor channel may be shielded by four deep sub - sections formed on four opposing sides. There may be no deep sub - sections in regions where the shielding effect of the shielding region is very small or negligible. In the deep section arranged in a matrix, it may be possible to maintain a high lateral diffusion of the on - current. The deep sub - sections arranged in a matrix can keep the possible adverse effects of the deep sub - sections on other electrical characteristics of the silicon carbide device, such as the on - resistance, to a small level.
[0057] According to another embodiment, the horizontal cross - section of the deep shielding portion may comprise a grid having grid openings. Each grid opening may laterally surround at least a portion of one source region. For example, each grid opening may laterally surround one complete source region. According to another example, each grid opening may surround a channel side - wall section. For example, the horizontal cross - section of the deep shielding portion may be more or less the same as the horizontal cross - section of the top shielding portion under a plurality of gate trenches and may be formed using the same implantation mask. The grid - shaped deep shielding portion can facilitate a high shielding effect.
[0058] According to another embodiment, the silicon carbide device may include a first gate structure and an adjacent second gate structure. The first gate structure and the second gate structure may be implemented as the aforementioned gate structures. The first gate structure or the second gate structure may further correspond to the aforementioned gate structure.
[0059] The shielding region may be in contact with the first bottom edge over the gate length of the first gate structure. Alignment of the shielding region along the first direction may not be required. Thus, the manufacturing process can be very efficient.
[0060] According to one embodiment, the source region may extend along the gate length of the second gate structure. Alignment of the source region along the first direction may not be required. Thus, the manufacturing process can be very efficient.
[0061] According to another embodiment, the silicon carbide device may include a body region of a second conductivity type and a current diffusion region of a first conductivity type. The body region and the current diffusion region may be formed in the silicon carbide body. The body region may separate the source region and the current diffusion region.
[0062] In the on-state of the silicon carbide device, a transistor channel may be formed in the body region. This transistor channel may be an inversion layer formed along the gate structure. This inversion layer facilitates the flow of unipolar charge carriers between the source region and the current diffusion region in the on-state.
[0063] According to another embodiment, the silicon carbide device may include a drift structure between the gate structure and a second surface of the silicon carbide body. This drift structure may include a voltage sustaining structure. This voltage sustaining structure may include a lightly doped drift region having a vertical extent of at least 4 μm, 12 μm, 20 μm, or even at least 100 μm. The minimum vertical extent may depend on the desired blocking capability of the silicon carbide device. For example, at a desired blocking capability of 650 V (or 1.2 kV, or 1.7 V, or 3.3 kV, or 6.5 kV), the vertical extent of the drift region may be at least 4 μm (or respectively, at least 8 μm, or at least 12 μm, or at least 20 μm, or at least 40 μm). Alternatively, or additionally, the voltage sustaining structure may include a compensation structure, such as a superjunction structure.
[0064] The shielding region and the drift structure can form a pn junction. The pn junction may be effective as a body diode or as part of a body diode, which goes into the forward conduction mode when the silicon carbide device is reverse biased. A large contact area in the shielding region along the first surface facilitates a low-ohmic contact between this shielding region and the front-side electrode and can improve the electrical characteristics of the body diode.
[0065] Figures 1A - 1D show a portion of a silicon carbide device 500 having a silicon carbide body 100. The silicon carbide device 500 may be, by way of example, an IGFET (insulated gate field effect transistor), for example, a MOSFET (metal oxide semiconductor FET), or an MCD (MOS controlled diode), or an IGBT (insulated gate bipolar transistor), or may include them.
[0066] The silicon carbide body 100 may include, or may be composed of, single-crystalline silicon carbide, for example, a silicon carbide crystal containing silicon and carbon as main components. The silicon carbide crystal may contain unnecessary impurities such as hydrogen and / or oxygen, and / or intentional impurities such as dopant atoms. The polytype of the silicon carbide crystal may be 15R, or may be hexagonal, for example, 2H, 6H, or 4H. The silicon carbide body 100 may include, or may be composed of, a silicon carbide layer grown by epitaxy.
[0067] The first surface 101 on the front side of the silicon carbide body 100 may be flat or rib-shaped. The average plane of the first surface 101 extends along the horizontal direction. The average plane of the planar first surface 101 is the same as the planar first surface 101. In the case of the non-planar first surface 101, for example, in the case of the rib-shaped first surface 101, the average plane may be the planar least-squares plane. The position and orientation of the planar least-squares plane are defined such that the sum of the squares of the displacements of each surface point of the rib-shaped first surface 101 from the planar least-squares plane has a minimum value. The vertical direction 104 is orthogonal to the horizontal direction and is, for example, parallel to the surface normal to the average plane. This horizontal direction is also referred to as the lateral direction below.
[0068] The vertical direction 104 may coincide with the main lattice direction or may be inclined by an off-axis angle with respect to the main lattice direction. This off-axis angle may be in the range of 2° to 8°, specifically, 4°. On the back side of the silicon carbide body 100, the second surface may extend parallel to the flat first surface 101 or parallel to the least-squares plane of the rib-shaped first surface 101.
[0069] The transistor cell TC is formed on the front side of the silicon carbide body 100. The drift structure 130 extends laterally through the silicon carbide body 100 between the transistor cell TC and the second surface. This drift structure 130 may include a voltage sustaining structure, for example, a lightly doped drift region, and / or a compensation structure, for example, a super junction structure.
[0070] Each transistor cell TC includes a source region 110 of a first conductivity type and a body region 120 of a second conductivity type. The body region 120 and the drift structure 130 form a first pn junction pn1. The body region 120 and the source region 110 form a second pn junction pn2. The vertical extension dimension of the body region 120 corresponds to the length of the channel of the transistor cell TC and may be in the range of 0.2 μm to 1.5 μm.
[0071] The stripe-shaped trench gate structure 150 extends along a first lateral direction 291. At least one gate structure 150 is in contact with the source region 110 and the body region 120 of the transistor cell TC. The gate structure 150 includes a conductive gate electrode 155 that may include, and / or may be composed of, a highly doped polycrystalline silicon layer and / or a metal-containing layer. A gate dielectric 159 separates the gate electrode 155 from the silicon carbide body 100 along at least one side of the gate structure 150. The gate dielectric 159 may include, or may be composed of, thermally grown or deposited silicon oxide, silicon nitride, silicon oxynitride, another deposited dielectric material, or any combination thereof. The thickness of the gate dielectric 159 may be selected to obtain a transistor cell TC with a threshold voltage in the range of 1.0 V to 8 V. The gate structure 150 may include only the gate electrode 155 and the gate dielectric 159, or may include additional conductive and / or dielectric structures in addition to the gate electrode 155 and the gate dielectric 159.
[0072] The gate structures 150 may be arranged at equal intervals and / or may have a uniform gate width w0. The center-to-center distance between adjacent gate structures 150 may be in the range of 0.5 μm to 10 μm, for example, 1 μm to 5 μm. The gate length L0 of the gate structure 150 may be up to several millimeters. The vertical gate extension v0 of the gate structure 150 may be in the range of 0.3 μm to 5 μm, for example, in the range of 0.5 μm to 2 μm.
[0073] The opposing first gate sidewall 151 and second gate sidewall 152 of each gate structure 150 may extend substantially along the vertical direction 104, or may be inclined by a certain inclination angle with respect to the vertical direction 104. In the latter case, the gate structure 150 may have parallel first gate sidewall 151 and second gate sidewall 152, or the gate structure 150 may taper as the distance from the first surface 101 increases. According to the arrangement of the crystal axes and / or according to the off-axis angle, the inclination angle formed by the gate sidewalls 151, 152 and the vertical direction 104 may be selected.
[0074] For example, the absolute value of the inclination angle formed by the first gate sidewall 151 and the vertical direction 104 may differ from the absolute value of the off-axis angle by an angle of ±1° or less (for example, in the case of 4H-SiC, the inclination angle can range from at least 3° to at most 5°). However, the inclination angle may have a different orientation from the off-axis angle. The inclination angle formed by the second gate sidewall 152 on the opposite side of the first gate sidewall 151 and the vertical direction 104 may be oriented in the same direction as the inclination angle of the first gate sidewall 151, or may be oriented in the opposite direction. As the inclination angle increases, the tapered gate structure 150 becomes narrower from the first surface 101.
[0075] Generally, at least the first gate sidewall 151 may extend substantially along the crystal plane of the silicon carbide body 100 with high charge carrier mobility (for example, one of the {11-20} or {1-100} crystal planes). The first gate sidewall 151 may be an active sidewall, that is, the transistor channel may extend along the first gate sidewall 151. In some embodiments, (for example, in the case of a vertical trench gate structure 150), the second gate sidewall 152 may also be an active sidewall. In other embodiments (for example, in the case of a tapered trench gate structure 150), this second gate sidewall 152 may be a non-active sidewall.
[0076] The bottom surface 158 at the lower end of the gate structure 150 connects the first gate sidewall 151 and the second gate sidewall 152, or forms at least a part of the connection between the first gate sidewall 151 and the second gate sidewall 152. This bottom surface 158 may include a horizontal portion. The bottom surface 158 of each gate structure 150 and the first gate sidewall 151 may be connected via a first bottom edge portion 156. The bottom surface 158 of each gate structure 150 and the second gate sidewall 152 may be connected via a second bottom edge portion 157. The first bottom edge portion 156 may be an acute angle, or may be rounded and / or chamfered. The second bottom edge portion 157 may be an acute angle, or may be rounded and / or chamfered.
[0077] In FIG. 1A, a plurality of separated (voneinander separierten in German) source regions 110 are formed in a part of the silicon carbide body 100 between two adjacent gate structures 150. The lateral length L1 of the source region 110 along the first direction 291 may be at least 500 nm, for example, at least 1 μm.
[0078] The separation section 161 of the shielding region 160 may laterally separate adjacent source regions 110 on the first surface 101 along the first direction 291. The width w2 of the separation section 161 may be equal to the width w1 of the source region 110. The separation section 161 and the source region 110 formed between two identical gate structures 150 may complement each other into a first continuous region 410 within the plane of the first surface 101. The first continuous region 410 does not include a gap.
[0079] FIG. 1B shows a single source region 110 formed between two adjacent gate structures 150. This source region 110 may extend without interruption along the entire gate length L0. That is, the source region 110 may extend from one longitudinal end of the gate structure 150 to the opposite longitudinal end. Along another gate structure 150 where the source region 110 is absent, a shielding region 160 may extend without interruption along the entire gate length L0.
[0080] The shielding region 160 may extend along one or more additional gate structures 150 from one longitudinal end of the gate structure 150 to the opposite longitudinal end.
[0081] The channel sidewall section 153 of the first gate sidewall 151 extends downward from the source region 110 to the first bottom edge 156.
[0082] As shown in FIGS. 1C and 1D, the shielding region 160 extends into the silicon carbide body 100 from the first surface 101. The shielding region 160 may be in direct contact with the non-active second gate sidewall 152 over the gate length L0 and over the vertical gate extension v0. Along the second gate sidewall 152, the shielding region 160 extends from the first surface 101 to below the gate structure 150. The first vertical extension v1 of the shielding region 160 is larger than the vertical gate extension v0. For example, the vertical distance v3 between the gate bottom surface 158 and the lower edge of the shielding region 160 may be at least 50 nm, for example at least 300 nm.
[0083] The shielding region 160 includes the section between the body region 120 and the non-active second gate sidewall 152. The body region 120 and the shielding region 160 may form a unipolar junction. The shielding region 160 may include a separation section 161 that separates each adjacent source region 110 along the first direction 291. This separation section 161 is in direct contact with the first gate sidewall 151 outside the channel sidewall section 153.
[0084] The maximum dopant concentration in the shielding region 160 may be higher than the maximum dopant concentration in the body region 120. The vertical dopant concentration profile in the shielding region 160 may have a maximum value at a position below the gate structure 150. Along the second gate sidewall 152, the dopant concentration in the shielding region 160 may be relatively high, that is, at least 10 times higher than the dopant concentration in the body region 120 along the first gate sidewall 151.
[0085] In FIGS. 2A-2D, the shielding region 160 includes a top shielding portion 168 and a deep shielding portion 169. The deep shielding portion 169 and the top shielding portion 168 are connected to each other along the vertical direction 104.
[0086] The vertical extension v2 of the top shielding portion 168 is larger than the vertical gate extension v0. The deep shielding portion 169 includes a plurality of deep sub-regions 164 arranged along parallel columns and parallel rows, and each row extends orthogonally to each column. Along the horizontal second direction 292, each deep sub-region 164 is formed between two adjacent source regions 110. The deep sub-region 164 may be laterally separated from the source region 110. Along the horizontal first direction 291, the adjacent deep sub-regions 164 in the same row are laterally separated. The horizontal length of the deep sub-region 164 along the first direction 291 may be equal to, shorter than, or longer than the length of the source region 110 along the first direction 291.
[0087] For example, as shown in the figure, the top shielding portion 168 may improve the lateral shielding of the gate dielectric and the transistor channel to some extent so that the deep sub-regions 164 can be symmetrically drawn along the first direction 291 with respect to each edge of the source region 110. In this case, the horizontal length of the deep sub-region 164 is shorter than the length of the source region 110.
[0088] The first distance d1 between the top shielding portion and the first gate sidewall 151 may be shorter than the second distance d2 between the deep shielding portion 169 and the first gate sidewall 151.
[0089] The drift structure 130 may include a drift region 131 of a first conductivity type. The drift region 131 forms a voltage sustaining structure, and here, the vertical extensions and dopant concentrations within this drift region 131 may be selected such that the silicon carbide device 500 realizes its nominal blocking voltage capability in the off state of the silicon carbide device 500. The drift region 131 may be formed in an epitaxially grown layer. The average net dopant concentration in the drift region 131 may be, for example, in the range of 1E15 cm -3 ~5E16 cm -3 . According to another example, the drift structure 130 may include a compensation structure, such as a super junction structure.
[0090] A highly doped contact portion 139 may be formed between the drift structure 130 and the backside electrode directly adjacent to the second surface 102 of the silicon carbide body 100. The highly doped contact portion 139 and the backside electrode form a low-resistance ohmic contact. The contact portion 139 may have the same conductivity type as the drift region 131, the opposite conductivity type, or may include regions of both conductivity types.
[0091] The drift structure 130 may include a current diffusion region 137. This current diffusion region 137 may be formed between the body region 120 and a voltage sustaining structure, such as the drift region 131. The current diffusion region 137 may be in contact with the body region 120. The current diffusion region 137 may laterally separate adjacent deep sub-intervals 164. Each part of the current diffusion region 137 may be formed directly below a deep shielding portion 169. The current diffusion region 137 has a higher average dopant concentration than the drift region 131 and can facilitate relatively good lateral diffusion of the on-current.
[0092] The implantation mask that defines the deep subinterval 164 and / or the source region 110 may have rounded openings, such as elliptical or circular openings. Accordingly, the horizontal cross-sectional area of the deep subinterval 164 and / or the source region 110 may include circular segments, elliptical segments, circles, and / or ellipses. The implantation mask that defines the top shielding portion 168 may include rounded pillars, such as elliptical or circular pillars. Accordingly, the horizontal cross-sectional area of the opening at the top shielding portion 168 may be a circular segment, an elliptical segment, a circle, and / or an ellipse.
[0093] The first load electrode 310 on the front side of the silicon carbide body 100 is electrically connected to the source region 110, the body region 120, and the shielding region 160. The gate electrode 155 may be electrically connected to the gate metallization on the front side of the silicon carbide body 100. This gate metallization forms a gate terminal or is electrically connected or coupled to a gate terminal.
[0094] Each portion of the interlayer insulating film 210 separates the first load electrode 310 and the gate electrode 155 in the gate structure 150. The first load electrode 310 may form a first load terminal or be electrically connected or coupled thereto, and this terminal may be the anode terminal of an MCD or the source terminal of a MOSFET.
[0095] The second load electrode 320 forms a low-resistance ohmic contact with the contact portion 139. The second load electrode 320 may form a second load terminal or be electrically connected or coupled thereto, and this terminal may be the cathode terminal of an MCD or the drain terminal of a MOSFET.
[0096] The silicon carbide device 500 shown in the figure is an n-channel SiC-TMOSFET. The first load electrode 310 forms, or is electrically connected or coupled to, the source terminal S. The second load electrode 320 forms, or is electrically connected or coupled to, the drain terminal D. The silicon carbide device 500 includes a plurality of transistor cells TC and a plurality of gate structures 150. The transistor cells TC may be electrically connected in parallel.
[0097] In FIGS. 3A to 3D, the deep section 163 of the deep shielding portion 169 forms a continuous stripe having a longitudinal axis parallel to the horizontal first direction 291.
[0098] In FIGS. 4A to 4D, the horizontal cross-sectional area of the deep shielding portion 169 forms a grid having grid openings 167. Each grid opening 167 is formed around the source region 110.
[0099] FIGS. 5A to 5B show a perspective view of the silicon carbide device 500 having a source region 110 formed along the channel sidewall section 153 of the first gate sidewall 151. The deep shielding portion 169 includes dot-shaped deep subsections 164. The shielding region 160 includes a highly doped contact section 162 formed along the first surface 101.
[0100] FIGS. 6A and 6B show a silicon carbide device 500 having a plurality of gate structures 150. The plurality of source regions 110 are formed along the first gate sidewall 151 of the gate structure 150. Along the first surface 101, the top shielding portion 168 of the shielding region and the source region 110 complement each other in the second continuous region 400 between two adjacent gate structures 150.
[0101] In FIG. 6A, the source regions 110 are arranged in a matrix of rows and columns, with each row extending orthogonally to each column. That is, the source regions 110 are formed in the black and white portions of a checkerboard.
[0102] In FIG. 6B, the source regions 110 of adjacent gate structures 150 are offset from each other along the first direction 291 by half of the center-to-center distance between adjacent source regions 110. That is, the source regions 110 may be formed only in the "white" portions of the checkerboard.
[0103] In FIG. 6C, each source region 110 extends along the full gate length of the gate structures 150 of the first type and does not exist at all along the first gate sidewall 151 of the gate structures 150 of the second type. The gate structures 150 of the first type and the gate structures 150 of the second type may form a regular pattern. For example, one, two, three or more gate structures 150 of the first type (in contact with the source region 110) may be formed between each pair of gate structures 150 of the second type (not in contact with the source region 110).
[0104] For purposes of illustration, various situations have been described with respect to silicon carbide devices. Similar techniques may be implemented in semiconductor devices based on other types and kinds of compound semiconductor materials for the semiconductor body, such as gallium nitride (GaN) or gallium arsenide (GaAs).
[0105] For purposes of illustration, various situations have been described with respect to silicon carbide devices that do not incorporate a Schottky diode. In some embodiments, it may be combined with a Schottky contact between the front-side electrode of the first conductivity type and the diode region. This diode region may extend between adjacent gate structures from the first surface to the drift structure. Alternatively, or additionally, each separation section may laterally separate the Schottky contact from the source region. For example, a p-doped separation section may laterally separate an n-doped diode region from an n-doped source region.
Description of Reference Numerals
[0106] 100 Silicon carbide body 101 First surface 102 Second surface 104 Vertical direction 110 Source region 120 Body region 130 Drift structure 131 Drift region 137 Current diffusion region 139 Contact portion 150 Gate structure 151 First gate sidewall 152 Second gate sidewall 153 Channel sidewall section 155 Gate electrode 156 First bottom edge 157 Second bottom edge 158 Bottom surface 159 Gate dielectric 160 Shielding region 161 Separation section 162 High-concentration doped contact section 163 Deep section 164 Deep sub-section 167 Lattice opening 168 Top shielding portion 169 Deep shielding portion 210 Interlayer insulating film 291 First direction 292 Second direction 310 First load electrode 320 Second load electrode 400 Second continuous region 410 First continuous region 500 Silicon carbide device
Claims
1. A stripe-shaped trench gate structure (150) extending from a first surface (101) into a silicon carbide body (100), wherein the gate structure (150) has a gate length (L0) along a first lateral direction (291), and a bottom surface (158) and a first gate sidewall (151) of the gate structure (150) are connected via a first bottom edge portion (156) of the gate structure (150); a stripe-shaped trench gate structure (150), At least one source region (110) of a first conductivity type; A shielding region (160) of a second conductivity type in contact with the first bottom edge portion (156) of the gate structure (150) over at least 20% of the gate length (L0); Comprising; A silicon carbide device (500) in which a second gate sidewall (152) of the gate structure (150) does not contact the source region (110).
2. The silicon carbide device according to claim 1, wherein the shielding region (160) is in contact with the first bottom edge portion (156) over at least 30% of the gate length (L0).
3. The silicon carbide device according to claim 1 or 2, wherein the shielding region (160) includes a top shielding portion (168) and a deep shielding portion (169), the top shielding portion (168) is present between the first surface (101) and the deep shielding portion (169), and the top shielding portion (168) is in contact with a second bottom edge portion (157) of the gate structure (150).
4. The silicon carbide device according to claim 3, wherein a first distance (d1) between the top shielding portion (168) and the first gate sidewall (151) is shorter than a second distance (d2) between the deep shielding portion (169) and the first gate sidewall (151).
5. The top shielding portion (168) includes a separation section (161); The separation section (161) is in contact with the first gate sidewall (151); The silicon carbide device according to claim 3 or 4, wherein each separation section (161) laterally separates a source region (110) formed along the first direction (291).
6. The top shielding portion (168) includes a separation section (161) disposed between the source regions (110). The silicon carbide device according to any one of claims 3 to 5, wherein along the first surface (101), the separation section (161) and the source region (110) cover a continuous portion of the first gate sidewall (151) of the gate structure (150).
7. The silicon carbide device includes a first gate structure (150) and an adjacent second gate structure (150), the top shielding portion (168) of the first gate structure (150) and the source region (110) are disposed between the first gate sidewall (151) of the first gate structure (150) and the second gate sidewall (152) of the second gate structure (150), The silicon carbide device according to any one of claims 3 to 6, wherein in the first surface (101), the region between the first gate sidewall (151) and the second gate sidewall (152) is filled with the top shielding portion (168) and the source region (110).
8. The top shielding portion (168) includes a separation section (161), The silicon carbide device according to any one of claims 3 to 7, wherein a lateral dopant profile passing through the transition between one of the separation sections (161) and one of the source regions (110) along the first direction (291) includes a plateau section.
9. The silicon carbide device includes a first gate structure (150) and an adjacent second gate structure (150), the deep shielding portion (169) includes a deep section (163), along a second direction (292), the deep section (163) is separated from the first gate sidewall (151) of the first gate structure (150), The silicon carbide device according to any one of claims 3 to 8, wherein the deep section (163) overlaps with the second gate sidewall (152) of the second gate structure (150) in the second direction (292).
10. The silicon carbide device according to claim 9, wherein the deep section (163) forms a continuous stripe having a longitudinal axis parallel to the first direction (291).
11. The deep section (163) includes a plurality of deep subsections (164), The silicon carbide device according to claim 9, wherein the deep subsections (164) are laterally separated along the first direction (291).
12. The horizontal cross-section of the deep shielding portion (169) includes a grid having grid openings (167), The silicon carbide device according to any one of claims 3 to 8, wherein each grid opening (167) surrounds at least a part of one of the source regions (110).
13. The silicon carbide device includes a first gate structure (150) and an adjacent second gate structure (150), The silicon carbide device according to any one of claims 1 to 8, wherein the shielding region (160) is in contact with the first bottom edge (156) of the first gate structure (150) over the gate length (L0).
14. The silicon carbide device according to claim 13, wherein the source region (110) extends along the gate length (L0) of the second gate structure (150).
15. The silicon carbide body (100) includes a body region (120) of the second conductivity type and a current diffusion region (137) of the first conductivity type, and the body region (120) separates the source region (110) from the current diffusion region (137). The silicon carbide device according to any one of claims 1 to 14.
16. The silicon carbide body (100) includes a drift structure (130) between the gate structure (150) and a second surface (102) of the silicon carbide body (100), and the shielding region (160) and the drift structure (130) form a pn junction. The silicon carbide device according to any one of claims 1 to 15.
17. A stripe-shaped trench gate structure (150) extending from the first surface (101) into the silicon carbide body (100), the gate structure (150) having a gate length (L0) along a lateral first direction (291), a bottom surface (158), a first gate sidewall (151), a second gate sidewall (152) opposite to the first gate sidewall (151), a first bottom edge (156) connecting the first gate sidewall (151) and the bottom surface (158), and a second bottom edge (157) connecting the second gate sidewall (152) and the bottom surface (158); a stripe-shaped trench gate structure (150), A source region (110) of the first conductivity type in contact with the first gate sidewall (151) formed along the first direction (291), A top shielding portion (168) of the second conductivity type A silicon carbide device comprising wherein the top shielding portion (168) comprises a separation partition (161) that separates the source region (110) along the first direction (291), and the separation partition (161) is in contact with the first gate sidewall (151); the silicon carbide device comprising a first gate structure (150) and an adjacent second gate structure (150); the top shielding portion (168) and the source region (110) of the first gate structure (150) are disposed between the first gate sidewall (151) of the first gate structure (150) and the second gate sidewall (152) of the second gate structure (150); a silicon carbide device (500) in which, on the first surface (101), the region between the first gate sidewall (151) and the second gate sidewall (152) is filled with the top shielding portion (168) and the source region (110).
18. The silicon carbide device according to claim 17, wherein a vertical extension portion (v2) of the top shielding portion (168) is larger than a vertical gate extension portion (v0).
19. The silicon carbide device according to claim 17 or 18, further comprising a deep shielding portion (169) of the second conductivity type, wherein the top shielding portion (168) is between the first surface (101) and the deep shielding portion (169).
20. The silicon carbide device according to claim 19, wherein the top shielding portion (168) and the deep shielding portion (169) are directly connected to each other.
21. The silicon carbide device according to claim 19 or 20, wherein the deep shielding portion (169) is disposed at a lateral distance (d2) from the first gate sidewall (151).
22. The silicon carbide device according to any one of claims 19 to 21, wherein the deep shielding portion (169) laterally overlaps at least one of the source regions (110).
23. The silicon carbide device according to any one of claims 19 to 21, wherein the deep shielding portion (169) is disposed at a lateral distance from at least one of the source regions (110).
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