Temporary fixing substrate, method for manufacturing temporary fixing substrate, and temporary fixing method

Abstract

Provided is a temporary fixed substrate that suppresses peeling defects and enables semiconductor packages to be obtained at a higher yield than in the related art. A temporarily fixed substrate, in which a plurality of electronic components are adhered on one main surface, and which is temporarily fixed by a resin mold, has a chamfered region at the end of each of the one main surface and the other main surface over the entire outer circumference, and the arithmetic mean roughness of the chamfered region on at least one main surface side is 0.1 μm to 10 μm and larger than the arithmetic mean roughness of the one main surface.

Description

Technical Field

[0001] The present invention relates to a temporary fixing substrate used in a manufacturing process of a semiconductor package.

Background Art

[0002] As a semiconductor package manufacturing technology, FOWLP (Fan-out Wafer Level Package) technology is known. The FOWLP technology generally includes a step of resin molding on a temporary fixing substrate on which a semiconductor chip is temporarily fixed with an adhesive, a step of grinding the resin mold to expose the electrode ends of the semiconductor chip, a step of forming a thin film rewiring layer (multilayer wiring) and solder balls on the surface where the electrode ends are exposed, and a step of singulating individual packages and peeling them from the temporary fixing substrate, to obtain a semiconductor package with a lower profile than conventional ones.

[0003] As a temporary fixing substrate for a chip in such FOWLP technology, an aspect of using a translucent ceramic substrate is already known (see, for example, Patent Document 1 and Patent Document 2). The translucent ceramic substrate has all the requirements for a temporary fixing substrate, such as high flatness necessary for electrode end exposure, high rigidity and reverse warping shape necessary for suppressing warping during multilayer wiring formation, translucency that allows laser light for curing the adhesive to pass through, and chemical resistance for washing and reusing after use.

[0004] However, the conventional temporary fixing substrate has a problem that peeling failure occurs where the resin part peels off at the outer peripheral part, resulting in a decrease in yield.

[0005] In addition, the conventional temporary fixing substrate also has a problem that the yield decreases due to chipping (chipping) at the outer peripheral part.

Prior Art Documents

Patent Documents

[0006]

Patent Document 1

[0007] The present invention has been made in view of the above problems, and an object thereof is to provide a temporary fixing substrate capable of suppressing peeling defects and obtaining a semiconductor package with a higher yield than conventional ones.

[0008] Another object of the present invention is to suppress the occurrence of chipping at the outer peripheral portion of the temporary fixing substrate.

[0009] To solve the above problems, a first aspect of the present invention is a temporary fixing substrate on which a predetermined object to be fixed is temporarily fixed on one main surface, the end portions extending over the entire outer periphery of each of the one main surface and the other main surface are provided with chamfered regions, and the arithmetic mean roughness of at least the chamfered region on the one main surface side is 0.1 μm to 10 μm and is larger than the arithmetic mean roughness of the one main surface.

[0010] A second aspect of the present invention is the temporary fixing substrate according to the first aspect, wherein the chamfered region includes a first chamfered portion and a second chamfered portion having different inclination angles with respect to the one main surface.

[0011] A third aspect of the present invention is the temporary fixing substrate according to the first or second aspect, wherein the arithmetic mean roughness of the one main surface and the other main surface is 100 nm or less.

[0012] A fourth aspect of the present invention is the temporary fixing substrate according to the first Or a second aspect wherein the arithmetic mean roughness of the side end portion is smaller than the arithmetic mean roughness of the chamfered region.

[0013] A fifth aspect of the present invention is the temporary fixing substrate according to the fourth aspect, wherein the arithmetic mean roughness of the side end portion is larger than the arithmetic mean roughness of the one main surface and is 5 μm or less.

[0014] A sixth aspect of the present invention is a temporary fixing substrate according to the fifth aspect, characterized in that an arithmetic mean roughness of the side end portion is 2 μm or less.

[0015] A seventh aspect of the present invention is a temporary fixing substrate according to the first Or a second aspect aspect, characterized in that the predetermined object to be fixed is a plurality of electronic components or a semiconductor substrate.

[0016] An eighth aspect of the present invention is a method for manufacturing a temporary fixing substrate on which a predetermined object to be fixed is temporarily fixed on one main surface, the method including: a molding step of producing a disk-shaped molded body mainly composed of a translucent ceramic; a firing step of firing the molded body to obtain a sintered body; a chamfering step of forming a chamfering region at an end portion extending over the entire outer periphery of each of one main surface and the other Main surface of the sintered body; and a polishing step of polishing the sintered body having the chamfering region formed thereon to obtain a temporary fixing substrate, wherein an arithmetic mean roughness of the chamfering region on at least one main surface side of the temporary fixing substrate obtained by the polishing step is 0.1 μm to 10 μm, which is a value larger than an arithmetic mean roughness of one main surface of the temporary fixing substrate.

[0017] A ninth aspect of the present invention is a method for manufacturing a temporary fixing substrate according to the eighth aspect, characterized in that in the chamfering step, the chamfering region is formed in two stages of a first chamfering portion and a second chamfering portion having different inclination angles with respect to the one main surface of the temporary fixing substrate.

[0018] A tenth aspect of the present invention is a method for manufacturing a temporary fixing substrate according to the eighth or ninth aspect, characterized in that an arithmetic mean roughness of the one main surface and the other main surface of the temporary fixing substrate obtained by the polishing step is 100 nm or less.

[0019] An eleventh aspect of the present invention is a method for manufacturing a temporary fixing substrate according to the eighth Or a ninth aspect aspect, characterized in that an arithmetic mean roughness of a side end portion of the temporary fixing substrate obtained by the polishing step is made smaller than an arithmetic mean roughness of the chamfering region.

[0020] The twelfth aspect of the present invention is a method for manufacturing a temporary fixing substrate according to the eleventh aspect, wherein the arithmetic mean roughness of the side end portion is set to a value greater than the arithmetic mean roughness of the one main surface of the temporary fixing substrate and equal to or less than 5 μm.

[0021] The thirteenth aspect of the present invention is a method for manufacturing a temporary fixing substrate according to the eighth aspect, wherein the predetermined object to be fixed is a plurality of electronic components or a semiconductor substrate. Or a ninth aspect characterized in that.

[0022] The fourteenth aspect of the present invention is a method for temporarily fixing a predetermined object to be fixed to a temporary fixing substrate, comprising the steps of preparing a temporary fixing substrate having a chamfered region at an end portion extending over the entire outer periphery of one main surface, forming an adhesive layer on the temporary fixing substrate, disposing a predetermined object to be fixed on the adhesive layer, and curing the adhesive layer to form an adhesive layer to adhere the predetermined object to be fixed to the temporary fixing substrate, wherein the arithmetic mean roughness of the chamfered region is 0.1 μm to 10 μm and is greater than the arithmetic mean roughness of the one main surface.

[0023] The fifteenth aspect of the present invention is a temporary fixing method according to the fourteenth aspect, wherein the chamfered region includes a first chamfered portion and a second chamfered portion having different inclination angles with respect to the one main surface.

[0024] The sixteenth aspect of the present invention is a temporary fixing method according to the fourteenth or fifteenth aspect, wherein the predetermined object to be fixed is a plurality of electronic components, and further comprises a step of forming a resin mold on the adhesive layer and the plurality of electronic components adhered to the temporary fixing substrate by the adhesive layer.

[0025] The seventeenth aspect of the present invention is a temporary fixing method according to the fourteenth or fifteenth aspect, wherein the predetermined object to be fixed is a semiconductor substrate.

[0026] According to the 1st to 17th aspects of the present invention, during the process of temporarily fixing an object to be fixed, such as an electronic component, to a temporary fixing substrate, the occurrence of peeling between the temporary fixing substrate and the object to be fixed, the adhesive layer, or other resins can be preferably suppressed.

[0027] In particular, according to the 5th, 6th, and 12th aspects, the occurrence of chipping at the side end portion of the temporary fixing substrate can be preferably suppressed.

Brief Description of the Drawings

[0028]

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Modes for Carrying Out the Invention

[0029] <The First Embodiment> <Temporary Fixing Substrate> FIG. 1 is a plan view of one main surface (front surface) 1a of a temporary fixing substrate 1 according to the first embodiment of the present invention. The temporary fixing substrate 1 is a substrate to which a semiconductor chip is temporarily fixed in manufacturing a semiconductor package by FOWLP (Fan-out Wafer Level Package) technology.

[0030] The temporary fixing substrate 1 is a translucent ceramic substrate having a diameter of several hundred mm (for example, 300 mm) and a thickness of about several hundred μm to several mm (for example, 1 mm), with an in-plane thickness difference within several μm (for example, within 3 μm) and a warpage amount of several hundred μm or less (for example, 200 μm). In this embodiment, the translucent ceramics is defined as ceramics having a total forward light transmittance of 20% or more in the entire wavelength range of 200 nm to 1500 nm. Examples of such translucent ceramics include alumina, silicon nitride, aluminum nitride, and silicon oxide. For example, a material mainly composed of alumina and having a total forward light transmittance of 70% or more at a wavelength of 1500 nm is a preferred example of the temporary fixing substrate 1. When alumina is the main component, it is preferable to use high-purity alumina powder of 99.9% or more (preferably 99.95% or more) as a raw material, and it is preferable to add magnesium oxide, zirconia (ZrO2), and yttria (Y2O3) as sintering aids to such alumina powder.

[0031] Both the front surface 1a, which is the placement surface of the semiconductor chip, and the other main surface (back surface) 1b are flat polished surfaces with a small surface roughness by being polished in advance. More specifically, in the front surface 1a and the back surface 1b, the in-plane thickness difference of several μm or less described above and the arithmetic mean roughness Ra of 100 nm or less (preferably 20 nm or less) are realized. More specifically, both the front surface 1a and the back surface 1b are surfaces subjected to lapping and polishing. Although there is no particular limitation on the lower limit value of the arithmetic mean roughness Ra of the front surface 1a and the back surface 1b, 1 nm is sufficient for practical use.

[0032] However, the temporary fixing substrate 1 according to the present embodiment includes a chamfered region 2 at the end over the entire outer periphery of the surface 1a. Although not shown in the figure, the chamfered region 2 is similarly provided on the back surface 1b. Therefore, strictly speaking, the arithmetic mean roughness Ra of the surface 1a and the back surface 1b of 100 nm or less described above is realized in the region excluding the chamfered region 2. Hereinafter, the surface 1a and the back surface 1b excluding the chamfered region 2 are also referred to as a flat surface 1a and a flat back surface 1b, respectively.

[0033] FIG. 2 is an enlarged cross-sectional view near the side end portion 1e of the temporary fixing substrate 1 showing the state of the chamfered region 2.

[0034] In the case shown in FIG. 2, an example is illustrated in which the chamfered region 2 has a two-stage configuration including a first chamfered portion 2a inclined at an inclination angle θ1 with respect to the flat surface 1a and a second chamfered portion 2b inclined at an inclination angle θ2 (>θ1) with respect to the flat surface 1a. The second chamfered portion 2b is provided in a range of a predetermined width b (<a) from the side end portion 1e. Similarly, on the flat back surface 1b side, a chamfered region 2 having a two-stage configuration of the first chamfered portion 2a and the second chamfered portion 2b is provided. Note that the second chamfered portion 2b may be omitted and the chamfered region 2 may have a one-stage configuration including only the first chamfered portion 2a.

[0035] The inclination angle θ1 is preferably 5° to 55° (for example, 30°). Further, when the chamfered region 2 has a two-stage configuration, the inclination angle θ2 is preferably 35° to 85° (for example, 60°). However, θ1 < θ2.

[0036] By providing the chamfered area 2 that satisfies the range of the inclination angle as described above, chipping is preferably suppressed in the temporary fixing substrate 1. That is, in the case of the temporary fixing substrate 1 without the chamfered area 2, chipping is likely to occur where the corners where the front surface 1a, the back surface 1b, and the side end portion 1e are perpendicular are chipped. However, in the case of the temporary fixing substrate 1 according to the present embodiment, since there is no such perpendicular corner by providing the chamfered area 2, and the angles formed by the chamfered area 2 with the front surface 1a and the back surface 1b and the angle formed by the chamfered area 2 with the side end portion 1e are all obtuse angles, chipping is extremely unlikely to occur.

[0037] That is, the provision of the chamfered area 2 has the effect of suppressing the occurrence of defects due to chipping and increasing the manufacturing yield of the temporary fixing substrate 1. In particular, making the chamfered area 2 a two-stage configuration of the first chamfered portion 2a and the second chamfered portion 2b is effective in suppressing such chipping because such obtuse angles are provided in two stages.

[0038] <Effect of the manufacturing process of the semiconductor package and the roughening of the chamfered portion> Among the chamfered areas 2 provided in the temporary fixing substrate 1 in the above-described manner, at least the chamfered area 2 provided on the surface (one main surface) 1a side has a rough surface with a surface roughness greater than that of the flat surface 1a. Specifically, the arithmetic mean roughness Ra of such a chamfered area 2 is 0.1 μm to 10 μm. This is intended to ensure the manufacturing yield of the semiconductor package. Hereinafter, this point will be described.

[0039] FIG. 3 is a schematic cross-sectional view showing step by step the state in the middle of the manufacturing process of the semiconductor package by the FOWLP technique using the temporary fixing substrate 1. However, in FIG. 3, for simplicity of illustration, the chamfered area 2 is shown by hatching only on the surface 1a side.

[0040] In the manufacturing process of a semiconductor package, first, as shown in Fig. 3(a), a layer (adhesive layer) 3α made of an adhesive is formed on a temporary fixing substrate 1. Examples of the adhesive include double-sided tape and hot-melt types, and its formation can be achieved by various known methods such as roll coating, spray coating, screen printing, spin coating, etc.

[0041] Next, as shown in Fig. 3(b), a plurality of (many) semiconductor chips 4 are arranged on such an adhesive layer 3α. The semiconductor chips 4 are arranged in a region inside the chamfered region 2. Subsequently, the adhesive layer 3α is cured to form an adhesive layer 3. The method of such curing is selected from heating, ultraviolet irradiation, etc., according to the material of the adhesive used for the adhesive layer 3α. Thereby, the semiconductor chips 4 are adhesively fixed to the temporary fixing substrate 1.

[0042] When the semiconductor chips 4 are fixed to the temporary fixing substrate 1 in such a manner, a mold resin is poured over the entire upper surface of the temporary fixing substrate 1, that is, across the gap 5 between the semiconductor chips 4 and the entire upper surface of the semiconductor chips 4. By curing such a mold resin, as shown in Fig. 3(c), a resin mold 6 is formed. Examples of the mold resin include epoxy resins, polyimide resins, polyurethane resins, urethane resins, etc.

[0043] After that, the resin mold 6 is ground until the electrode terminals provided on the semiconductor chips 4 are exposed, and then a rewiring layer is formed on such a ground surface and solder balls are formed. Finally, singulation into individual packages and separation of the temporary fixing substrate 1 by laser lift-off are performed.

[0044] The chamfered region 2 provided on the outer periphery of the temporary fixing substrate 1 has an effect (peeling suppression effect) of suppressing the occurrence of a defect (peeling defect) in which the resin (adhesive layer 3 and resin mold 6) peels off from the temporary fixing substrate 1 until before singulation and laser lift-off are performed in the manufacturing process of the semiconductor package as described above.

[0045] In the case of a conventional temporary fixing substrate, during the manufacturing process of the semiconductor package described above, air may enter from the outside between the temporary fixing substrate and the resin near the outer periphery of the temporary fixing substrate, causing bubbles to form, which may cause the temporary fixing substrate and the resin to peel off.

[0046] However, when using the temporary fixing substrate 1 according to the present embodiment, the adhesive and even the mold resin enter the chamfered region 2 provided on the outer periphery of the surface 1a, which has a sufficiently larger surface roughness than the surface 1a, thereby generating an anchor effect between the resin and the chamfered region 2. Due to such an anchor effect, the formation of bubbles and even the peeling of the resin on the outer periphery of the temporary fixing substrate 1 are suppressed. The presence or absence of bubbles can be confirmed by visually observing the temporary fixing substrate 1 from the back surface 1b side or using a stereomicroscope. In the present embodiment, not only when a location where the resin and the temporary fixing substrate 1 are separated is confirmed as a result of visually observing the temporary fixing substrate 1 from the side end portion 1e side, but also when bubbles with a size of 3 mm or more in the longitudinal or short-side direction are confirmed as a result of visual or stereomicroscopic observation from the back surface 1b side, it is considered that the resin has peeled off.

[0047] When the chamfered region 2 having an arithmetic mean roughness Ra of 0.1 μm to 10 μm is provided on the temporary fixing substrate 1, the occurrence rate of peeling defects (peeling defect rate) counted per substrate unit is suppressed to 3% or less. Preferably, the arithmetic mean roughness Ra of the chamfered region 2 is 0.5 μm to 2 μm.

[0048] From the viewpoint of suppressing such peeling, the width a of the chamfered region 2 may be at most 1% of the radius r of the temporary fixing substrate 1, and it is not necessary to provide the chamfered region 2 further inward beyond this. For example, in the case of a temporary fixing substrate 1 with a diameter of 300 mm (r = 150 mm), it is preferably about 0.2 mm to 0.5 mm. The width b of the second chamfered portion 2b is preferably about 0.01 mm to 0.11 mm. The presence of the chamfered region 2 does not interfere with laser lift-off.

[0049] <Manufacturing process of the temporary fixing substrate> Next, the manufacturing process of the temporary fixing substrate 1 provided with the chamfered region 2 will be described. FIG. 4 is a flowchart schematically showing the manufacturing process of such a temporary fixing substrate 1. The temporary fixing substrate 1 is generally manufactured through a formed body production process (step S1), a firing process (step S2), a chamfering process (step S3), and a polishing process (step S4).

[0050] In manufacturing the temporary fixing substrate 1, first, a formed body mainly composed of a translucent ceramic powder is produced (step S1). For example, the above-described alumina or other translucent ceramic raw material powders, Oxidation ceramic powders such as magnesium and sintering aids, and organic materials such as binders and solvents are kneaded by a ball mill or the like to produce a slurry, and this slurry is formed into a tape. A plurality of rectangular sheets of a predetermined size obtained by slitting (cutting) the obtained tape are laminated and pressed, and the laminated body after such pressing is die-cut into a circular shape. Thereby, a disk-shaped formed body is obtained. Alternatively, a mode of obtaining a formed body by a doctor blade method, an extrusion method, a gel casting method, or the like may be used.

[0051] Next, the formed body formed is fired (step S2). Thereby, the organic components are removed, and a sintered body of ceramics (the temporary fixing substrate 1 before chamfering and polishing) is obtained.

[0052] For firing, it is preferable to perform pre-firing in an atmospheric furnace and then perform main firing in a hydrogen furnace. From the viewpoint of densification of the sintered body, the sintering temperature during the main firing is preferably 1700°C to 1900°C, and more preferably 1750°C to 1850°C.

[0053] In addition, after the main firing, for the purpose of adjusting (correcting) warpage, the obtained sintered body may be further annealed in a hydrogen furnace. The annealing treatment is preferably performed at a temperature within ±100°C of the highest temperature during the main firing, and more preferably at 1900°C or lower, from the viewpoint of preventing deformation and abnormal grain growth and promoting the discharge of the sintering aid. Also, the annealing time is preferably 1 to 6 hours.

[0054] When a sintered body (the temporary fixing substrate 1 before chamfering and polishing) is obtained, next, chamfering is performed on the entire outer periphery of the front and back surfaces (both main surfaces) of such a sintered body (step S3). In the following description, for the sake of convenience, the temporary fixing substrate 1 before chamfering and the temporary fixing substrate 1 before polishing are also simply referred to as the temporary fixing substrate 1.

[0055] FIG. 5 is a diagram schematically showing a state in which chamfering of the temporary fixing substrate 1 is performed using a chamfering device (beveling machine) 100. The chamfering device 100 includes a table 101, a table rotation mechanism 102, a grindstone holding and moving mechanism 103, and a grindstone 104. FIG. 6 is an enlarged schematic view of a portion A of FIG. 5 showing a state in which chamfering is executed.

[0056] The table 101 is configured such that the temporary fixing substrate 1 to be chamfered can be horizontally placed on its upper surface, and when the table rotation mechanism 102 operates, the placed temporary fixing substrate 1 can also be rotated within a horizontal plane.

[0057] The grindstone holding and moving mechanism 103 is configured such that a disk-shaped grindstone 104 can be held in a horizontal posture at its lower end, and in a state of holding such a grindstone 104, both a rotational operation and a forward and backward movement within a horizontal plane are possible.

[0058] The grindstone 104 has a disk shape, and as shown in FIG. 6, its outer peripheral end portion is a blade portion 104a having an isosceles triangular cross-section. The number of the grindstone 104 (blade portion 104a) is selected such that the arithmetic mean roughness Ra of the chamfered region 2 finally formed falls within the range of 0.1 μm to 10 μm described above.

[0059] At the time of chamfering, first, the temporary fixing substrate 1 is placed on the upper surface of the table 101. On the other hand, the grindstone 104 is attached to the grindstone holding and moving mechanism 103. At that time, alignment is performed so that the center heights (positions in the vertical direction) in the thickness directions of the temporary fixing substrate 1 and the grindstone 104 coincide with each other.

[0060] Then, with the table 101 on which the temporary fixing substrate 1 is placed being horizontally rotated as shown by the arrow AR1 (AR1a, AR1b) by the table rotation mechanism 102, the grindstone holding and moving mechanism 103 horizontally rotates the grindstone 104 in the direction opposite to the table 101 as shown by the arrow AR2 (AR2a, AR2b), and at the same time, translates it toward the side end portion 1e of the temporary fixing substrate 1 as shown by the arrow AR3 (AR3a, AR3b).

[0061] With such rotation and translation, the cutting edge portion 104a of the grindstone 104 approaches the side end portion 1e of the temporary fixing substrate 1 and eventually abuts against the upper and lower two edge portions 1ea, 1eb of the side end portion 1e of the temporary fixing substrate 1. Even after such abutment, by continuing the rotation and translation of the grindstone 104, the side end portion 1e of the temporary fixing substrate 1 is gradually shaved off from the edge portions 1ea, 1eb, and finally the chamfered region 2 is formed.

[0062] When the chamfered region 2 is configured in two stages, two types of grindstones 104 with different angles of the cutting edge portion 104a are sequentially used. Alternatively, one grindstone 104 may be provided with a plurality of cutting edge portions 104a having different angles, and by sequentially using them, the chamfered region 2 may also be configured in two stages.

[0063] Note that since the semiconductor chip 4 is not usually mounted on the back surface 1b of the temporary fixing substrate 1 by the above process, roughening of the chamfered region 2 formed on the back surface 1b side is not essential from the viewpoint of suppressing resin peeling. However, there is no particular inconvenience in that the chamfered region 2 on the back surface 1b side is roughened together with the surface 1a side when chamfering in the chamfering device 100. Rather, it can be said that it is preferable from the viewpoint of the symmetry of the shape of the side end portion 1e that the front and back surfaces (both main surfaces) of the temporary fixing substrate 1 after chamfering are polished (step S4).

[0064] Finally, the front and back surfaces (both main surfaces) of the temporary fixing substrate 1 after chamfering are polished (step S4).

[0065] FIG. 7 is a schematic cross-sectional view showing a main part of a lapping device 200 for performing lapping on the temporary fixing substrate 1. The lapping device 200 includes a lower surface plate 201, an upper surface plate 202, and a plurality of carriers 203. FIG. 8 is a perspective view of a main part of the lapping device 200 with the upper surface plate 202 omitted.

[0066] The lower surface plate 201 and the upper surface plate 202 are rotatable in the horizontal plane coaxially and in opposite directions as indicated by arrows AR4 and AR5. Examples of the materials of the lower surface plate 201 and the upper surface plate 202 include copper, resin copper, and tin. Alternatively, a polishing pad may be attached to a metal surface plate for use. In such a case, examples of the polishing pad include a hard urethane pad, a non-woven fabric pad, and a suede pad.

[0067] Each carrier 203 is provided with a circular through-hole 203h into which the temporary fixing substrate 1 to be polished is fitted, and is capable of self-rotation and revolution between an annular guide 204 and a central axis 205 as the lower surface plate 201 and the upper surface plate 202 rotate.

[0068] In the lapping device 200, generally, with a plurality of carriers 203 each having the temporary fixing substrate 1 to be polished fitted therebetween sandwiched between the lower surface plate 201 and the upper surface plate 202, while dropping a slurry SL between the lower surface plate 201 and the upper surface plate 202, the lower surface plate 201 and the upper surface plate 202 are rotated in opposite directions as indicated by arrows AR4 and AR5. Thereby, both main surfaces of the temporary fixing substrate 1 are polished simultaneously, and a flat surface 1a and a flat back surface 1b with an arithmetic mean roughness Ra of 100 nm or less (preferably 20 nm or less) can be obtained. Examples of the slurry SL include an aqueous or oily diamond slurry.

[0069] Note that the chamfered region 2 is also polished to some extent with such lapping, but the surface roughness of the chamfered region 2 that has been roughened in advance hardly changes from that before polishing.

[0070] By going through the above steps, the temporary fixing substrate 1 according to the present embodiment having the chamfered region 2 is obtained.

[0071] As described above, according to the present embodiment, in the manufacturing process of a semiconductor package by the FOWLP technology, by providing a chamfered region on the entire outer periphery of both main surfaces of the temporary fixing substrate used for temporarily fixing a semiconductor chip, the occurrence of chipping at the corner portions of the temporary fixing substrate can be suitably suppressed. In addition to this, by making the chamfered region provided on the outer periphery of the main surface to which the semiconductor chip is temporarily fixed a rough surface having a larger surface roughness than the main surface, the peeling between the temporary fixing substrate and the resin during the above process can be suitably suppressed.

[0072] <Second Embodiment> In the above-described first embodiment, after forming the chamfered region 2 as a rough surface in the chamfering device 100, both main surfaces of the temporary fixing substrate 1 are lapped and polished by the lapping and polishing device 200, so that the flat surface 1a to which the semiconductor chip 4 is temporarily fixed is formed.

[0073] In the step of performing lapping and polishing by the lapping and polishing device 200, due to the nature of the method, the side end portion 1e is also polished to some extent. That is, with the lapping and polishing, the surface roughness of the side end portion 1e decreases. Therefore, in addition to the flat surface 1a and the flat back surface 1b, the surface roughness (arithmetic mean roughness Ra) of the side end portion 1e is also smaller than the surface roughness (arithmetic mean roughness Ra) of the chamfered region 2. By subjecting the side end portion 1e to such lapping and polishing to reduce the surface roughness, there is an effect of suppressing the occurrence of chipping in the plane of the side end portion 1e. Moreover, such an effect can be obtained not only in the temporary fixing substrate 1 in which the chamfered region 2 is formed, but in other words, also in the temporary fixing substrate 1 in which the chamfering step is omitted.

[0074] FIG. 9 is a diagram schematically showing the state of polishing of the side end portion 1e of the temporary fixing substrate 1 in which the chamfered region 2 is not formed in the lapping and polishing device 200.

[0075] As described above, in the lapping and polishing apparatus, slurry SL is dropped between the lower surface plate 201 and the upper surface plate 202 sandwiching the carrier 203 and the temporary fixing substrate 1. Such slurry SL also enters between the side end portion 1e of the temporary fixing substrate 1 and the carrier 203 as shown in FIG. 9. The side end portion 1e of the temporary fixing substrate 1 is polished by the entered slurry SL. This is the same even when the chamfering region 2 is provided on the temporary fixing substrate 1.

[0076] When the arithmetic mean roughness Ra of the side end portion 1e is 5 μm or less, the occurrence rate of chipping (chipping defect rate) counted in terms of the substrate unit is suppressed to less than 3.0%. When the arithmetic mean roughness Ra of the side end portion 1e is 2 μm or less, the chipping defect rate is suppressed to 1.0% or less.

[0077] Furthermore, in the case of the temporary fixing substrate 1 having the chamfering region 2 as in the first embodiment, if the arithmetic mean roughness Ra of the side end portion 1e is 2 μm or less, the chipping defect rate is suppressed to 0.5% or less.

[0078] There is no particular limitation on the lower limit value of the arithmetic mean roughness Ra of the side end portion 1e, but in practical use, it is sufficient if it is 0.01 μm or more. However, since lapping and polishing is mainly targeted at the main surface of the temporary fixing substrate 1, the progress of polishing of the side end portion 1e is slower than that of the main surface. Therefore, the arithmetic mean roughness Ra of the side end portion 1e usually becomes a larger value than the arithmetic mean roughness Ra of the flat front surface 1a and the flat back surface 1b.

[0079] As described above, according to the present embodiment, by setting the arithmetic mean roughness Ra of the side end portion of the temporary fixing substrate used for temporarily fixing the semiconductor chip in the manufacturing process of the semiconductor package by the FOWLP technology to 5 μm or less, the occurrence of chipping at the side end portion can be preferably suppressed.

[0080] (Modification example) In the above-described embodiments, the temporary fixing substrate having a chamfered region is targeted for use as a substrate to which a plurality of semiconductor chips are temporarily fixed when manufacturing a semiconductor package by the FOWLP technique. However, the usage scenario of such a temporary fixing substrate is not limited to this, and it may also be an aspect used for temporarily fixing electronic components other than semiconductor chips. That is, after a plurality of electronic components are adhesively fixed to the temporary fixing substrate with an adhesive, in a case where a resin mold is formed, the temporary fixing substrate according to the above-described embodiments may be used for the purpose of suppressing the peeling between the resin and the temporary fixing substrate.

[0081] Alternatively, various semiconductor substrates may be adhesively fixed to the temporary fixing substrate having a chamfered region, and after performing desired processing on the semiconductor substrate after such temporary fixing, the temporary fixing substrate may be peeled off in the same manner as in the above-described embodiments. Examples of the semiconductor substrate include various ones such as a silicon substrate, a compound semiconductor substrate, or an epitaxial substrate having these as a base substrate, as well as other composite substrates, multi-layer substrates, and multi-layer substrates. Even in such a case, the same operational effects as in the above-described embodiments can be obtained.

Example

[0082] (Effect confirmation of roughening of the chamfered region) Two hundred pieces each of five types of temporary fixing substrates 1 (conditions 1 to 5) with different combinations of the arithmetic mean roughness Ra of the flat surface 1a and the chamfered region 2 were fabricated. The chamfered region 2 had a two-stage configuration, and the inclination angles θ1 and θ2 were 30° and 60°, respectively. For each temporary fixing substrate 1, up to the temporary fixing of the semiconductor chip 4 with the resin mold 6 was performed according to the process illustrated in FIG. 3.

[0083] Also, temporary fixing substrates were fabricated in the same manner as in conditions 1, 4, and 5 except that the chamfered region 2 was not formed (condition 6).

[0084] For all the obtained samples (laminates of the temporary fixing substrate 1, the semiconductor chip 4, and the resin), the presence or absence of peeling between the temporary fixing substrate 1 and the resin was visually confirmed, and the peeling failure rate in each example was determined. Specifically, the temporary fixing substrate 1 was visually inspected from the side end portion 1e side and the back surface 1b side. When a separation between the resin mold 6 and the temporary fixing substrate 1 was confirmed at the side end portion 1e, or when bubbles with a minimum size of 3 mm or more were present in at least one of the radial direction or the circumferential direction of the temporary fixing substrate 1 in the observation from the back surface 1b side, it was determined that peeling had occurred.

[0085] Table 1 lists the arithmetic mean roughness Ra values of the flat surface 1a and the chamfered region 2, and the evaluation results of the peeling failure rate for each example and comparative example.

[0086]

Table 1

[0087] Regarding the evaluation of the peeling failure rate, for the temporary fixing substrate 1 produced under the condition that the value of the peeling failure rate was 3% or less, it was determined that the peeling of the resin was well suppressed. Specifically, Conditions 1 to 5 corresponded to this. In Table 1, an "〇" (circle) is marked in the "Peeling Failure Rate" column for these Conditions 1 to 5.

[0088] On the other hand, for the temporary fixing substrate 1 produced under the condition that the value of the peeling failure rate exceeded 3%, it was determined that the suppression of the peeling of the resin was not sufficient. Specifically, only Condition 6 corresponded to this. Specifically, the peeling failure rate in the case of Condition 6 was 4.5%. In Table 1, an "×" ( Cross mark) is marked in the "Peeling Failure Rate" column for such Condition 6.

[0089] The above results indicate that providing a chamfered region 2, which is a sufficiently rough surface compared to the surface 1a and has an arithmetic mean roughness Ra in the range of 0.1 μm to 10 μm, is effective in suppressing the peeling between the temporary fixing substrate 1 and the resin.

[0090] (Confirmation of the Effect of Polishing the Side End) While forming the chamfered area 2 in the same manner as in Condition 3, 200 pieces each of five types of temporary fixing substrates 1 (Condition 3-1 to Condition 3-5) with different arithmetic mean roughness Ra of the side end 1e were produced. The arithmetic mean roughness Ra was measured by a laser microscope. Also, while forming the chamfered area 2 in the same manner as in Condition 4, 200 pieces each of three types of temporary fixing substrates 1 (Condition 4-1 to Condition 4-3) with different arithmetic mean roughness Ra of the side end 1e were produced. Furthermore, without forming the chamfered area 2 in the same manner as in Condition 6, 200 pieces each of two types of temporary fixing substrates 1 (Condition 6-1 to Condition 6-2) with different arithmetic mean roughness Ra of the side end 1e were produced.

[0091] The side end 1e of each temporary fixing substrate 1 was observed with a stereomicroscope to confirm the presence or absence of chipping. When a chip with a size of 5 mm or more in the circumferential direction and a size of 1 mm or more in the radial direction of the temporary fixing substrate 1 was confirmed, it was determined that chipping had occurred.

[0092] Table 2 lists the values of the arithmetic mean roughness Ra of the chamfered area 2 and the side end 1e, and the evaluation results of the chipping defect rate for each example.

[0093]

Table 2

[0094] Regarding the evaluation of the chipping defect rate, when the value of the chipping defect rate was 0.5% or less, it was determined that the occurrence of chipping was extremely well suppressed. Specifically, Condition 3-1, Condition 3-3, Condition 4-2, and Condition 4-3 corresponded to this. In Table 2, an "◎" (double circle mark) is attached to the "Chipping Defect Rate" column for these conditions.

[0095] Also, when the value of the chipping defect rate was more than 0.5% and 1.0% or less, it was determined that the occurrence of chipping was generally well suppressed. Specifically, Condition 6-2 corresponded to this. In Table 2, a "〇" (circle mark) is attached to the "Chipping Defect Rate" column for such conditions.

[0096] Furthermore, when the value of the chipping defect rate was more than 1.0% and less than 3.0%, it was determined that the occurrence of chipping was suppressed to a certain extent. Specifically, Conditions 3-2, 3-4, and 4-1 corresponded to this. In Table 2, a "△" (triangle mark) is attached to the "Chipping Defect Rate" column for these conditions.

[0097] On the other hand, when the obtained value of the chipping defect rate was more than 3%, it was determined that the suppression of chipping was not sufficient. Specifically, Conditions 3-5 and 6-1 corresponded to this. In the table 2 a "×" ( Cross mark) is attached to the "Chipping Defect Rate" column for these conditions. For example, the chipping defect rate in the case of Condition 6-1 was 4.0%.

[0098] The above results show that providing the side end portion 1e with an arithmetic mean roughness Ra of 5 μm or less has a certain effect on suppressing chipping at the side end portion 1e. Specifically, it shows that the chipping occurrence rate is suppressed to less than 3%. Also, when the arithmetic mean roughness Ra of the side end portion 1e is 2 μm or less, the chipping occurrence rate is suppressed to 1% or less. In addition, when the temporary fixing substrate 1 further includes the chamfered region 2, the chipping occurrence rate is 0.5 % or less, which is shown.

Claims

1. A temporary fixing substrate on which a predetermined object to be fixed is temporarily fixed on one main surface, comprising chamfered regions at ends extending across the entire outer periphery of each of the one main surface and the other main surface, wherein the arithmetic mean roughness of at least the chamfered region on the one main surface side is 0.1 μm to 10 μm and is greater than the arithmetic mean roughness of the one main surface, characterized in that it is a temporary fixing substrate.

2. The temporary fixing substrate according to claim 1, wherein the chamfered region includes a first chamfered portion and a second chamfered portion having different inclination angles with respect to the one main surface, characterized in that it is a temporary fixing substrate.

3. The temporary fixing substrate according to claim 1 or claim 2, wherein the arithmetic mean roughness of the one main surface and the other main surface is 100 nm or less, characterized in that it is a temporary fixing substrate.

4. The temporary fixing substrate according to claim 1 or claim 2, wherein the arithmetic mean roughness of the side end portion is smaller than the arithmetic mean roughness of the chamfered region, characterized in that it is a temporary fixing substrate.

5. The temporary fixing substrate according to claim 4, wherein the arithmetic mean roughness of the side end portion is greater than the arithmetic mean roughness of the one main surface and is 5 μm or less, characterized in that it is a temporary fixing substrate.

6. The temporary fixing substrate according to claim 5, wherein the arithmetic mean roughness of the side end portion is 2 μm or less, characterized in that it is a temporary fixing substrate.

7. The temporary fixing substrate according to claim 1 or claim 2, wherein the predetermined object to be fixed is a plurality of electronic components or a semiconductor substrate, characterized in that it is a temporary fixing substrate.

8. A method for manufacturing a temporary fixing substrate on which a predetermined object to be fixed is temporarily fixed on one main surface, a forming step of producing a disk-shaped formed body mainly composed of a translucent ceramic, a firing step of firing the formed body to obtain a sintered body, a chamfering step of forming chamfered regions at ends extending across the entire outer periphery of each of the one main surface and the other main surface of the sintered body, a polishing step of polishing the sintered body on which the chamfered regions are formed to obtain a temporary fixing substrate, comprising: setting the arithmetic mean roughness of at least the chamfered region on the one main surface side of the temporary fixing substrate obtained by the polishing step to a value of 0.1 μm to 10 μm and greater than the arithmetic mean roughness of the one main surface of the temporary fixing substrate, characterized in that it is a method for manufacturing a temporary fixing substrate.

9. The method for manufacturing a temporary fixing substrate according to claim 8, In the chamfering step, the chamfering region is formed in two stages, namely a first chamfering portion and a second chamfering portion, having different inclination angles with respect to the one main surface of the temporary fixing substrate. A method for manufacturing a temporary fixing substrate, characterized by the above.

10. A method for manufacturing a temporary fixing substrate according to Claim 8 or Claim 9, wherein the arithmetic mean roughness of the one main surface and the other main surface of the temporary fixing substrate obtained by the polishing step is 100 nm or less. A method for manufacturing a temporary fixing substrate, characterized by the above.

11. A method for manufacturing a temporary fixing substrate according to Claim 8 or Claim 9, wherein the arithmetic mean roughness of the side end portion of the temporary fixing substrate obtained by the polishing step is made smaller than the arithmetic mean roughness of the chamfering region. A method for manufacturing a temporary fixing substrate, characterized by the above.

12. A method for manufacturing a temporary fixing substrate according to Claim 11, wherein the arithmetic mean roughness of the side end portion is made larger than the arithmetic mean roughness of the one main surface of the temporary fixing substrate and is a value of 5 μm or less. A method for manufacturing a temporary fixing substrate, characterized by the above.

13. A method for manufacturing a temporary fixing substrate according to Claim 8 or Claim 9, wherein the predetermined object to be fixed is a plurality of electronic components or a semiconductor substrate. A method for manufacturing a temporary fixing substrate, characterized by the above.

14. A method for temporarily fixing a predetermined object to be fixed to a temporary fixing substrate, comprising the steps of preparing a temporary fixing substrate having a chamfering region at an end portion extending over the entire outer periphery of one main surface, forming an adhesive layer on the temporary fixing substrate, disposing a predetermined object to be fixed on the adhesive layer, and curing the adhesive layer to form an adhesive layer, thereby adhering the predetermined object to be fixed to the temporary fixing substrate. The method includes: wherein the arithmetic mean roughness of the chamfering region is 0.1 μm to 10 μm and is larger than the arithmetic mean roughness of the one main surface. A temporary fixing method, characterized by the above.

15. A temporary fixing method according to Claim 14, wherein the chamfering region includes a first chamfering portion and a second chamfering portion having different inclination angles with respect to the one main surface. A temporary fixing method, characterized by the above.

16. A temporary fixing method according to Claim 14 or Claim 15, wherein the predetermined object to be fixed is a plurality of electronic components, and further comprising the step of forming a resin mold on the adhesive layer and the plurality of electronic components adhered to the temporary fixing substrate by the adhesive layer. A temporary fixing method, characterized by the above.

17. The temporary fixing method according to claim 14 or claim 15, wherein the predetermined object to be fixed is a semiconductor substrate characterized in that it is a temporary fixing method.

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