Optical Module and Optical Communication Device

Abstract

In this optical module, a power supply IC supplies power to a first optical IC and second optical IC that perform photoelectric conversion. In a module board, a first wiring connects the power supply IC and the first optical IC, and a second wiring connects the power supply IC and the second optical IC. The resistance value of the first wiring is represented by R1, the resistance value of the second wiring is represented by R2, the length of a shortest path from the power supply IC to the first optical IC within the first wiring is represented by L1, and the length of a shortest path from the power supply IC to the second optical IC within the second wiring is represented by L2. L2 is longer than L1, and |R2-R1| is smaller than (L2-L1) / L1×R1.

Description

Technical Field

[0001] The present disclosure relates to an optical module that performs at least one of conversion from an optical signal to an electrical signal and conversion from an electrical signal to an optical signal, and an optical communication device including the optical module.

Background Art

[0002] Devices that perform mutual conversion between optical signals and electrical signals are known (for example, Patent Document 1 below). In Patent Document 1, a plurality of optical communication devices are mounted on a host circuit board. Each optical communication device has an optical element that performs optoelectronic conversion (referred to as an optoelectronic conversion element in the present disclosure) and an IC (Integrated Circuit) that is electrically connected to the optical element. In the present disclosure, an electronic component having such an optoelectronic conversion element and an IC is referred to as an optical IC.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

[0004] An optical module according to an aspect of the present disclosure includes a first optical IC, a second optical IC, a first power supply IC, and a module substrate. The first optical IC and the second optical IC perform photoelectric conversion. The first power supply IC supplies power to the first optical IC and the second optical IC. The first optical IC, the second optical IC, and the first power supply IC are located on the module substrate. The module substrate has a first wiring and a second wiring. The first wiring connects the first power supply IC and the first optical IC. The second wiring connects the first power supply IC and the second optical IC. Let the resistance value of the first wiring be R1, the resistance value of the second wiring be R2, the length of the shortest path from the first power supply IC to the first optical IC in the first wiring be L1, and the length of the shortest path from the first power supply IC to the second optical IC in the second wiring be L2. At this time, L2 is longer than L1, and |R2 - R1| is smaller than (L2 - L1) / L1×R1.

[0005] An optical communication device according to an aspect of the present disclosure includes the above optical module and a motherboard electrically connected to the optical module.

Brief Description of the Drawings

[0006]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10A

Figure 10B

Figure 10C

Figure 10D

Figure 11

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Figure 13A

Figure 13B

Embodiments for Carrying Out the Invention

[0007] Hereinafter, embodiments according to the present disclosure will be described with reference to the drawings. The drawings used in the following description are schematic. Therefore, for example, the dimensional ratios on the drawings do not necessarily match the actual ones. The dimensional ratios of the same members in different drawings also do not match. Also, detailed illustrations may be omitted, and some shapes may be exaggerated. However, the above does not deny that the actual dimensional ratios may be as shown in the drawings, and that features such as shapes and dimensional ratios may be extracted from the drawings.

[0008] For convenience, a rectangular coordinate system xyz is attached to the drawings. The relationship between the rectangular coordinate system xyz and the vertical direction etc. is arbitrary. However, for convenience, an expression with the +z side being upward may be used. Also, a plan view or a plan perspective view refers to viewing in the z direction unless otherwise specified.

[0009] After the description of the first embodiment, basically, only the differences from the previously described aspects will be described. Matters not particularly mentioned may be the same as or analogous to the previously described aspects. For members corresponding to each other among a plurality of embodiments, for convenience, even if there are differences, they may be given the same reference numerals.

[0010] <First Embodiment> (Overview of Optical Module) FIG. 1 is a perspective view of an optical module 1 according to the first embodiment of the present disclosure as viewed from the +z side. FIG. 2 is a perspective view of the optical module 1 as viewed from the -z side.

[0011] The optical module 1 performs at least one of conversion from an optical signal to an electrical signal and conversion from an electrical signal to an optical signal (hereinafter sometimes referred to as "opto - electrical conversion"). In order to realize such an operation, the optical module 1 has, for example, a plurality (four in the illustrated example) of optical ICs 7 that perform opto - electrical conversion, a power supply IC 15 that supplies power to the optical ICs 7, and a module substrate 5 on which the optical ICs 7 and the power supply IC 15 are mounted.

[0012] FIG. 5 is a schematic diagram showing an example of a plurality of wirings 21 (more specifically, first wiring 21A to fourth wiring 21D) of the module substrate 5.

[0013] The plurality of wirings 21 connect the power supply IC 15 and the plurality of optical ICs 7 (specifically, first optical IC 7A to fourth optical IC 7D). FIG. 5 is, more specifically, a schematic plan view showing the internal layer of the module substrate 5 composed of a multilayer substrate. Also, the power supply IC 15 and the plurality of optical ICs 7 are also shown by dotted lines.

[0014] The plurality of optical ICs 7 are located differently from each other. Therefore, it is highly probable that the relative positions of the plurality of optical ICs 7 with respect to one power supply IC 15 are different from each other. When the relative positions are different from each other, the lengths of the plurality of wirings 21 (in the illustrated example, a part on the power supply IC 15 side is shared) from the power supply IC 15 to the optical ICs 7 corresponding to the respective wirings 21 are different from each other.

[0015] When the lengths of the plurality of wirings 21 are different from each other in this way, the resistance values of the plurality of wirings 21 are different from each other, and as a result, variations occur in the amount of voltage and / or current drop in the plurality of wirings 21. That is, the longer the wiring 21, the larger the resistance value and the larger the drop amount. Then, variations also occur in the power (voltage and / or current) supplied to the plurality of optical ICs 7. As a result, for example, the probability of malfunction occurring in any one of the optical ICs 7 increases.

[0016] Therefore, the module substrate 5 has a structure that approximates the resistance values of the plurality of wirings 21 having different lengths from each other. For example, the module substrate 5 has a structure in which the relatively longer the wiring 21, the larger the substantially cross-sectional area in part or all of the path of the wiring 21. Specifically, it is as follows.

[0017] FIG. 6 is a cross-sectional view of a module substrate 5A as an example of the module substrate 5. FIG. 6 is a cross-sectional view seen in the direction indicated by the line VI-VI in FIG. 1, but since it is a schematic diagram, configurations that are not in the same cross-section as each other are also shown.

[0018] As shown in this figure, the module substrate 5A has a plurality of conductor layers 25 (first conductor layer 25A to fourth conductor layer 25D) inside thereof. The planar shape of each conductor layer 25 is, for example, the same as the planar shape of the conductor layer 25 shown in FIG. 5. The power supply IC 15 is electrically connected to the plurality of conductor layers 25 by (at least one) via conductor 37. Each optical IC 7 is electrically connected to at least one conductor layer 25 by (at least one) via conductor 39 (specifically, any one of the first via conductor 39A to the fourth via conductor 39D). That is, each wiring 21 has a via conductor 37, at least one conductor layer 25, and a via conductor 39.

[0019] Here, the longer each wiring 21 is, the larger the number of conductor layers 25 it passes through. For example, the first wiring 21A connecting the power supply IC 15 and the first optical IC 7A passes only through the first conductor layer 25A, while the second wiring 21B connecting the power supply IC 15 and the second optical IC 7B passes through the first conductor layer 25A and the second conductor layer 25B. As a result, the relatively longer the wiring 21 is, the larger the substantially cross-sectional area is.

[0020] By making the resistance values of the plurality of wirings 21 having different lengths from each other closer to each other in this way, variations in the power (voltage and / or current) applied to the plurality of optical ICs 7 can be reduced. As a comparative example, for example, there is a mode in which the cross-sectional areas of the plurality of wirings 21 are made equal to each other, and the wirings 21 connected to the optical ICs 7 closer to the power supply IC 15 are detoured in a plan view to make the lengths of the plurality of wirings 21 equal. Compared with such a mode, for example, in a plan view, the path of the wiring 21 can be simplified or the shortest path can be used. Also, for example, it is advantageous from the viewpoint of reducing the area of the module substrate 5.

[0021] Here, consider yet another comparative example. In this comparative example, assume that the cross-sectional area of each wiring 21 is constant over the entire length of the wiring 21, and the cross-sectional areas of the plurality of wirings 21 are the same as each other. In this comparative example, the ratio of the resistance values between the wirings 21 is the same as the ratio of the lengths of the wirings 21. For example, let the resistance value of the first wiring 21A be R1, the resistance value of the second wiring 21B be R2, the length of the first wiring 21A be L1, and the length of the second wiring 21B be L2. Also, assume that L2 > L1. At this time, L1:L2 = R1:R2. From another perspective, since the ratio of the lengths of the wirings corresponds to the ratio of the resistance values of the wirings, L2 / L1 = R2 / R1, or R2 = L2 / L1 × R1, the absolute value of the difference in resistance values |R2 - R1| is (L2 - L1) / L1 × R1.

[0022] Therefore, in comparison with the above comparative example, it can be said that the module substrate 5 according to the embodiment has a structure in which L2 > L1 and |R2 - R1| is smaller than (L2 - L1) / L1 × R1. More specifically, for example, |R2 - R1| may be 9 / 10 or less, 2 / 3 or less, 1 / 2 or less, 1 / 3 or less, 1 / 5 or less, or 1 / 10 or less with respect to (L2 - L1) / L1 × R1. Ideally, R2 and R1 are equal (even when saying so, there may be a tolerance). Although the first wiring 21A and the second wiring 21B are taken as examples, the above description may be applied to any two wirings 21.

[0023] The above is the outline of the first embodiment. Hereinafter, the explanation will be carried out generally in the following order. 1. Overall configuration of the optical module 1 (Figs. 1 and 2) 2. Example of processing of the optical IC 7 and the control IC 13 (described later) (Fig. 3) 3. Configuration of the wiring 21 (Figs. 4 to 6) 4. Summary of the first embodiment

[0024] (1. Overall configuration of the optical module) The optical module 1 shown in FIGS. 1 and 2 is electrically connected to, for example, an external electronic device (e.g., the motherboard 3 shown by a dotted line in FIG. 2). Further, the optical module 1 is optically connected to an optical element outside the optical module 1 (e.g., an optical waveguide not shown). Then, the optical module 1 contributes to the transmission of signals between the motherboard 3 and a counterpart device (or a counterpart device having an optical waveguide, which is not shown hereinafter) connected to the end of the optical waveguide. From another perspective, the optical module 1 contributes to the transmission of information between the motherboard 3 and the counterpart device.

[0025] Note that the optical waveguide includes, in addition to an optical fiber, those having a sheet-like or plate-like structure. The optical module 1 may be optically connected to an external light-emitting element or light-receiving element without passing through an external optical waveguide. However, in the description of this embodiment, there may be an expression on the premise that the optical module 1 is connected to an external optical waveguide. The counterpart device to be optically connected may be, for example, another electronic device that performs optical communication with an electronic device including the motherboard 3, or a device within the electronic device including the motherboard 3.

[0026] The role sharing between the motherboard 3 and the optical module 1 may be set as appropriate. For example, the optical module 1 does not substantially modify the information contained in the input and / or output optical signals and only contributes to the transmission of information. Further, the optical module 1 does not perform signal modulation and / or demodulation, signal frequency change, signal filtering, and AD conversion of signals, and only performs optical-electric conversion and signal amplification. However, at least a part of the processes described as not being performed by the optical module 1 above may be performed by the optical module 1. Also, the optical signals and / or electrical signals input to and / or output from the optical module 1 may be, for example, binary digital signals or signals in other formats.

[0027] To realize the above operations, the optical module 1 includes, for example, the following components. 1.1. Module substrate 5 (described above) 1.2. Optical IC 7 (described above) 1.3. A plurality (the same number as the optical ICs 7) of fiber bundles 9 extending from the plurality of optical ICs 7 1.4. A plurality (the same number as the fiber bundles 9) of optical connectors 11 located on the side opposite to the plurality of optical ICs 7 of the plurality of fiber bundles 9 1.5. At least one (one in the illustrated example) control IC 13 mounted on the module substrate 5 and controlling the plurality of optical ICs 7 1.6. Power supply IC 15 (described above) 1.7. An electrical connector 17 mounted on the module substrate 5 and electrically connected to an external electronic device (here, the motherboard 3) for the optical module 1 1.8. Passive components 19 mounted on the module substrate 5

[0028] The optical module 1 may include components other than those described above. For example, although not particularly shown, the optical module 1 may have cooling components (such as a heat sink) that contribute to the cooling of the plurality of optical ICs 7. The heat sink may be constituted by, for example, a metal that abuts from the +z side against the illustrated configuration. Conversely, the optical module 1 may not include any of the illustrated components (such as the control IC 13 and / or the passive components 19).

[0029] Each fiber bundle 9 has a plurality (four in the illustrated example) of optical fibers 23 extending in parallel with each other. In other words, each optical IC 7 can input and / or output multi-channel optical signals. And the optical module 1 can input and / or output optical signals with the number of channels obtained by adding up the number of channels of the plurality of optical ICs 7. However, different from the illustrated example, each optical IC 7 may correspond to only one channel.

[0030] The module substrate 5 has a plurality of optical ICs 7 mounted thereon, and also has a control IC 13, a power supply IC 15, and an electrical connector 17 mounted thereon. Thereby, for example, the multifunctionalization and miniaturization of the optical module 1 are realized. Note that the mounting of the ICs (7, 13, 15, etc.) may be realized, for example, by bonding the ICs to the module substrate 5 with a conductive bonding material (not shown) such as solder (including lead-free solder). However, the ICs may be detachably arranged on the module substrate 5 by connectors.

[0031] In the present disclosure, when the number of ICs is described as being located on the module substrate or the like, the number of ICs may be counted based on the unit of direct mounting on the module substrate 5. For example, the entire plurality of optical ICs 7 is not conceptually regarded as one IC. Conversely, even if one optical IC 7 includes a plurality of IC chips, one optical IC 7 is not regarded as a plurality of ICs.

[0032] Hereinafter, with reference to FIGS. 1 and 2, the configurations of the components of the optical module 1 will be schematically described in the order listed in the bullet points above.

[0033] (1.1. Module Substrate (Excluding the Specific Configuration of Wiring)) The module substrate 5 is, for example, a flat member. The front and back surfaces of the flat plate (in other words, the widest surfaces, main surfaces) are the first surface 5a and the second surface 5b on which electronic components (such as optical ICs 7) are mounted, respectively. The module substrate 5 is constituted by, for example, a rigid printed wiring board. In the rigid printed wiring board, the basic configuration (the configuration excluding the specific configuration such as the path of the wiring 21) may be various configurations, and may be, for example, a known configuration.

[0034] For example, the printed wiring board may be a double-sided board or a multilayer board on which electronic components (such as an optical IC 7, etc.) can be mounted on both the front and back sides. The double-sided board has a plate-shaped insulator 41 (the reference numeral is shown in FIGS. 4 to 6) and conductor layers 25 that overlap both sides of the insulator 41 (not shown in FIGS. 1 and 2. Refer to FIGS. 4 to 6 for the reference numerals). The multilayer board has a plate-shaped insulator 41 and three or more conductor layers 25 located on both sides and inside the insulator 41. The conductor layers 25 may be connected to each other by via conductors (refer to the via conductors 37 and 39, etc. in FIGS. 4 to 6), for example, that penetrate part or all of the thickness of the insulator 41. A part of the conductor layers 25 on the front and back sides of the insulator may be covered by an insulating film (solder resist).

[0035] In the present embodiment, the printed wiring board is a double-sided board or a multilayer board in order to realize a plurality of wirings 21 having different numbers of conductor layers 25 passing through. However, in other embodiments, the printed wiring board may be a single-sided board in which a conductor layer is formed only on one side of a plate-shaped insulator in some cases.

[0036] Also, for example, in the printed wiring board, the material of the insulator 41 and the material of the conductor may be appropriate ones. For example, the insulator 41 may be composed of an organic material, an inorganic material, or a combination thereof. More specifically, the insulator 41 may be, for example, a material obtained by impregnating a base material such as glass cloth with resin, or may be ceramic. The conductor may be a metal such as copper. The conductor layer 25 may be composed of the same material substantially throughout, for example, or may be composed of two or more layers made of different materials from each other, with part or all of them laminated.

[0037] The conductors (conductor layers and via conductors) included in the module substrate 5 may include portions with appropriate roles. For example, the conductors may have lands on which various electronic components (7, 13, 15, 17, and 19) are mounted, and wirings that connect the lands to each other. The lands may be pads for surface mounting or those for through-hole mounting. Further, in addition to the above, the conductors may include portions that constitute electronic elements. The electronic elements are, for example, passive elements such as resistors, inductors, or capacitors.

[0038] The planar shape and various dimensions of the module substrate 5 may be appropriately set according to the number and size of the electronic components (such as the optical IC 7) mounted on the module substrate 5. In the illustrated example, the planar shape of the module substrate 5 is a rectangular shape having four sides parallel to the x direction or the y direction. Taking an example of the dimensions in the relatively small optical module 1, the length of each side in the plan view of the module substrate 5 is 30 mm or more and 50 mm or less. Note that when the module substrate 5 is not rectangular, each side of the smallest rectangle including the module substrate 5 may satisfy the above dimension range.

[0039] (1.2. Optical IC) The configurations of the plurality of optical ICs 7 are, for example, the same as each other. Different from the illustrated example, the configurations of at least some of the optical ICs 7 may be different from the configurations of other optical ICs 7 in terms of internal configuration and / or external appearance configuration. For example, some of the optical ICs 7 may be configured to transmit optical signals, and the remaining optical ICs 7 may be configured to receive optical signals. Also, the number of channels of some of the optical ICs 7 may be different from the number of channels of other optical ICs 7. Note that in the description of this embodiment, for convenience, there may be expressions assuming that the plurality of optical ICs 7 have the same configuration as each other.

[0040] The optical IC 7 is, for example, generally a rectangular parallelepiped-shaped component with a thin shape (the length in the z direction is shorter than the lengths in the x and y directions). From one face of the rectangular parallelepiped (the face on the -y side), a fiber bundle 9 (a plurality of optical fibers 23) extends. The optical IC 7 performs optoelectronic conversion on a plurality of optical signals transmitted by the plurality of optical fibers 23. The optical IC 7 may have, for example, an electronic element (described later) such as an optoelectronic conversion element and a package 7a that houses the electronic element. The size of the optical IC 7 (package 7a) may be appropriately set according to the number and diameter of the optical fibers 23 and the number and size of the internal electronic elements, etc.

[0041] Except for the point where the optical fiber 23 extends, the configuration of the package 7a of the optical IC 7 may be various configurations, and for example, it may be the same as a known configuration. For example, the material of the sealing portion 7b of the package 7a may be ceramic or resin. Also, the package 7a may be surface-mounted (example shown in the figure) or may be through-hole mounted. In the case of surface mounting, the terminal 7c may be a pin (example shown in the figure) or may be a pad (or a bump joined to the pad). The shape and number of the pins are arbitrary. In FIG. 1, a mode in which pins as terminals extend from two side faces along the yz plane is illustrated.

[0042] In the illustrated example, a plurality of optical ICs 7 are mounted together on the first surface 5a of the module substrate 5. Also, the plurality of optical ICs 7 are mounted such that the directions in which the fiber bundles 9 extend are the same as each other. The plurality of optical ICs 7 are mounted with different positions in the direction orthogonal to the direction in which the fiber bundles 9 extend (x direction) so that the plurality of fiber bundles 9 do not overlap each other. The plurality of optical ICs 7 are arranged in a row in the x direction. In other words, the positions of the plurality of optical ICs 7 in the y direction are the same as each other. The pitch of the array is constant.

[0043] Unlike the illustrated example, there may be an optical IC 7 mounted on the second surface 5b (see FIG. 11 described later). Also, the orientations (the directions in which the fiber bundles 9 extend) of the plurality of optical ICs 7 may be different from each other. The plurality of fiber bundles 9 etc. may overlap each other. In a mode where the orientations of the plurality of optical ICs 7 are the same as each other, the positions of the plurality of optical ICs 7 in the y direction (the direction in which the fiber bundles 9 extend) may be different from each other (the plurality of optical ICs 7 do not have to be arranged in a single row). The pitch of the plurality of optical ICs 7 is also arbitrary. In the description of the position of the electronic component in a plan view, unless otherwise specified, for example, the position of the geometric center of the electronic component in the plan view may be referred to.

[0044] The number of the optical ICs 7 may be any number of 2 or more. In the illustrated example, four optical ICs 7 are illustrated. This is only an example. For example, the number of the optical ICs 7 may be 2, or may be 10 or more. It does not matter whether it is odd or even.

[0045] As will be described later in the description of the power supply IC 15, each optical IC 7 may be supplied with a plurality of types of electric power having different voltages and / or currents, or may be supplied with only one type of electric power. In the former mode, the optical IC 7 may use the plurality of types of electric power for different purposes. For example, although not particularly illustrated, the optical IC 7 may distribute the plurality of types of electric power to at least two or more of an internal core logic circuit, an I / O (input / output) circuit, an auxiliary logic circuit, a circuit for applying a voltage to a photoelectric conversion element 33 (described later), and a memory.

[0046] (1.3. Fiber Bundle) The configurations of the plurality of fiber bundles 9 are, for example, the same as each other. Unlike the illustrated example, the configurations of at least some of the fiber bundles 9 may be different from the configurations of the other fiber bundles 9. For example, the number of the optical fibers 23 included in some of the fiber bundles 9 may be different from the number of the optical fibers 23 included in the other fiber bundles 9. Also, for example, the length of some of the fiber bundles 9 may be different from the length of the other fiber bundles 9.

[0047] In each fiber bundle 9, the plurality of optical fibers 23 may or may not be covered and bundled by a sheath. FIGS. 1 and 2 illustrate an embodiment in which no sheath is provided in order to clearly show that the fiber bundle 9 has the optical fibers 23. As is clear from the fact that the plurality of optical fibers 23 may not be bundled, when the plurality of optical fibers 23 extend in parallel, the plurality of optical fibers 23 do not have to extend parallel to each other.

[0048] The number of optical fibers 23 included in each fiber bundle 9 may be any number of 2 or more. In the illustrated example, four optical fibers 23 are illustrated. This is merely an example. For example, the number of optical fibers 23 included in each fiber bundle 9 may be 2 or may be 10 or more. It does not matter whether it is odd or even.

[0049] In each fiber bundle 9, the arrangement of the optical fibers 23 in its cross section is arbitrary. In the illustrated example, all the optical fibers 23 are arranged in a row in one radial direction (x direction) of the optical fibers 23 at least inside the optical IC 7 and inside the optical connector 11. Inside the optical IC 7, the arrangement direction of the optical fibers 23 is, for example, the longitudinal direction of the side surface (-y side surface) of the optical IC 7, and from another viewpoint, it is the direction along the first surface 5a of the module substrate 5. Different from the illustrated example, the optical fibers 23 may be arranged in two or more rows or may be arranged in a manner that does not conform to the concept of arrangement.

[0050] The configuration of each optical fiber 23 may be various configurations, and for example, it may be a known configuration. For example, although not particularly illustrated, the optical fiber 23 has a core and a cladding that covers the core and has a refractive index higher than that of the core. The core and the cladding are made of a light-transmissive material (for example, quartz glass or plastic). The optical fiber 23 may further have a coating made of an appropriate material (for example, resin or fiber) that covers the cladding. Also, for example, the optical fiber 23 may be a single-mode one or a multi-mode one. The diameter of the optical fiber 23 is arbitrary.

[0051] The optical fiber 23 has, for example, a certain degree of flexibility. Consequently, the fiber bundle 9 has flexibility. Therefore, the optical connector 11 can be oriented in various directions other than the direction illustrated in the drawing. In the illustrated example, since the plurality of optical fibers 23 are arranged in the x direction, deformation in the z direction is relatively easy.

[0052] The fiber bundle 9 is, for example, fixedly attached to the optical IC 7 in a non-removable manner. In other words, the fiber bundle 9 cannot be separated from the optical IC 7 without destroying the optical IC 7. For example, the fiber bundle 9 and the sealing portion 7b are fixed by an adhesive or by direct contact, and / or are fixed by the sealing portion 7b clamping the fiber bundle 9. The same may hold true for the fixing of the fiber bundle 9 and the optical connector 11. However, the optical connector 11 may be configured such that two or more members are fixed by screws or the like, and some or all of the members may be separable from the fiber bundle 9.

[0053] (1.4. Optical Connector) The optical connector 11 is removably connected to a mating connector (not shown) that an optical waveguide (not shown) outside the optical module 1 has, and optically connects the optical IC 7 and the external optical waveguide. The configurations of the plurality of optical connectors 11 are, for example, the same as each other. Different from the illustrated example, the configurations of at least some of the optical connectors 11 may be different from the configurations of the other optical connectors 11.

[0054] The configuration of each optical connector 11 (and the mating connector) may be various configurations, for example, it may be a known configuration. For example, in the optical connector 11 and the mating connector, positioning in the radial direction of the optical fiber 23 may be performed by inserting (fitting) one housing into the other housing, and / or positioning in the radial direction of the optical fiber 23 may be performed by inserting (fitting) a guide pin provided on one connector into a guide hole provided on the other. The end face of the optical fiber 23 and the end face of the external optical waveguide may directly face each other, or may be optically connected via an optical component (for example, a lens) provided on at least one connector.

[0055] (1.5. Control IC) The control IC 13 is mounted on the module substrate 5 and is electrically connected to at least one optical IC 7 via the conductor (wiring) of the module substrate 5. Then, the control IC 13 inputs a control signal to at least one optical IC 7. The specific operations of the optical IC 7 controlled by the control IC 13 may be various, and an example will be shown later with reference to FIG. 3.

[0056] The number of control ICs 13 is arbitrary. In the illustrated example, only one control IC 13 is provided, and one control IC 13 controls all the optical ICs 7. Different from the illustrated example, for example, the same number of control ICs 13 as the plurality of optical ICs 7 may be provided, and one control IC 13 may control only one optical IC 7. Also, for example, a number of 2 or more and less than the number of the plurality of optical ICs 7 may be provided, or a number of control ICs 13 more than the number of the plurality of optical ICs 7 may be provided. From another perspective, the number of optical ICs 7 to be controlled may be different between the control ICs 13, or two or more control ICs 13 may perform different controls on one optical IC 7. As described above, the optical module 1 may have at least one control IC 13 that controls at least one optical IC 7.

[0057] As can be understood from the above description, in the aspect where a plurality of control ICs 13 are provided, the configurations of the plurality of control ICs 13 may be the same as each other internally and / or externally, or may be different from each other. Also, the configuration of the control IC 13 may be various configurations. For example, except for the specific configuration according to the processing content and the like, it may be a known configuration. The description of the package 7a of the optical IC 7 described above may be applied to the package (reference numeral omitted) of the control IC 13 as long as there is no contradiction or the like. Different from the optical IC 7, since the fiber bundle 9 does not extend out, pins (reference numeral omitted) may be provided on the four side surfaces, different from the illustrated example.

[0058] The position where the control IC 13 is mounted is arbitrary. In the illustrated example, the control IC 13 is mounted on the first surface 5a. In other words, the control IC 13 is mounted on the same mounting surface as the mounting surface on which a plurality of optical ICs 7 are mounted. Different from the illustrated example, one or a plurality of control ICs 13 may be mounted on the second surface 5b. Also, a plurality of control ICs 13 may be dispersedly mounted on the first surface 5a and the second surface 5b.

[0059] (1.6. Power Supply IC) The power supply IC 15 is mounted on the module substrate 5 and is electrically connected to at least one optical IC 7 via the conductor (wiring 21) of the module substrate 5. Then, the power supply IC 15 supplies power to at least one optical IC 7.

[0060] The number of power supply ICs 15 is arbitrary. Also, the number of optical ICs 7 powered by one power supply IC 15 is arbitrary. However, in the optical module 1 according to the embodiment, at least one power supply IC 15 supplies power to two or more optical ICs 7 by itself. The above-mentioned description regarding the length of the wiring 21 with reference to FIGS. 5 and 6 focuses on the power supply IC 15 that supplies power to such two or more optical ICs 7. In other words, for example, in addition to the power supply IC 15 and the wiring 21 being described, the power supply IC 15 and the wiring 21 may or may not exist. Also, for example, when there are power supply ICs 15 and wiring 21 other than those being described, the configuration with reference to FIGS. 5 and 6 may or may not hold for the power supply ICs 15 and the wiring 21 other than those being described.

[0061] One power supply IC 15 may be capable of supplying a plurality of types of power with different voltages or currents, or may be capable of supplying only one type of power. As the power supply IC 15 in the former aspect that supplies power to two or more optical ICs 7, for example, typically, the following first aspect and second aspect can be mentioned. The first aspect is to supply each of two or more types (all or part of the available types) of power to two or more optical ICs 7. For example, there is an aspect in which a power supply IC 15 capable of supplying power of voltages V1 and V2 supplies voltage V1 to two or more optical ICs 7 via two or more wirings 21, and supplies voltage V2 to the same two or more optical ICs as above via two or more wirings 21 different from the above-mentioned two or more wirings 21. The second aspect is an aspect in which the types of power supplied to two or more optical ICs 7 are different from each other.

[0062] Regardless of the number of types of power that the power supply IC 15 can supply, the above description regarding the length of the wiring 21 with reference to FIGS. 5 and 6 focuses on the path through which one type of power is supplied to two or more optical ICs 7. For example, the description regarding the wiring 21 may be the description of a plurality of wirings 21 connected to a power supply IC 15 that can supply only one type of power, or may be the description of a plurality of wirings 21 corresponding to only one type of power among a plurality of wirings 21 connected to a power supply IC 15 that can supply a plurality of types of power. In other words, there may or may not be wirings 21 corresponding to types of power different from the type of power corresponding to the wiring 21 to be described. When there are wirings 21 corresponding to powers different from the types of power other than the power to be described, the configuration with reference to FIGS. 5 and 6 may or may not hold for the wirings 21 other than the wiring to be described.

[0063] In the illustrated example, only one power supply IC 15 is provided, and one power supply IC 15 supplies power to all the optical ICs 7. As understood from the above description, this power supply IC 15 may supply, for example, only one type of power to all the optical ICs 7, or may supply each of two or more types of power to all the optical ICs 7.

[0064] As also understood from the above description, the number of power supply ICs 15 may be different from the illustrated example. For example, two or more power supply ICs 15 may be provided, and each power supply IC 15 may supply power to all the optical ICs 7. In this case, the power supplied by each power supply IC 15 may be, for example, one type of power, and the types may be different from each other among the plurality of power supply ICs 15. Also, for example, two or more power supply ICs 15 may be provided, and the optical ICs 7 to which power is supplied may be different from each other among the power supply ICs 15. In this case, one or more types of power supplied by each power supply IC 15 may be the same as each other among the power supply ICs 15, or some or all of them may be different from each other.

[0065] As can be understood from the above description, in the embodiment where a plurality of power supply ICs 15 are provided, the configurations of the plurality of power supply ICs 15 may be the same as each other either internally in terms of configuration and / or externally in terms of the configuration that appears, or may be different from each other. Also, the configuration of the power supply IC 15 may be various configurations. For example, except for the specific configuration according to the role content and the like, it may be a known configuration. The description of the package 7a of the optical IC 7 described above may be applied to the package 15a of the power supply IC 15 as long as there is no contradiction or the like. At this time, the terms of the sealing portion 7b and the terminal 7c may be replaced with the sealing portion 15b and the terminal 15c. Different from the optical IC 7, since the fiber bundle 9 does not extend out, unlike the illustrated example, pin-shaped terminals (reference numerals omitted) may be provided on four side surfaces.

[0066] The power supply IC 15 may be configured as, for example, a DC (Direct Current) / DC converter. For example, the power supply IC 15 converts the DC power supplied from the outside (motherboard 3) via the electrical connector 17 into DC power with an appropriate voltage or an appropriate current and supplies it to the optical IC 7. The power supply IC 15 may be, for example, a constant voltage power supply or a constant current power supply. Different from the above description, the power supply IC 15 may be a converter other than a DC / DC converter. Also, the power supply IC 15 may contribute to the power supply to the control IC 13 or may not contribute. Different from the illustrated example, another power supply IC may be interposed between the electrical connector 17 and the power supply IC 15.

[0067] The position where the power supply IC 15 is mounted is arbitrary. In the illustrated example, the power supply IC 15 is mounted on the first surface 5a. In other words, the power supply IC 15 is mounted on the same mounting surface as the mounting surface on which a plurality of optical ICs 7 are mounted. Different from the illustrated example, one or a plurality of power supply ICs 15 may be mounted on the second surface 5b (the surface on which the optical IC 7 is not mounted). Also, a plurality of power supply ICs 15 may be dispersed and mounted on the first surface 5a and the second surface 5b (see FIG. 11 described later).

[0068] (1.7. Electrical Connector) The electrical connector 17 is removably connected to a mating connector (not shown) that the motherboard 3 (or a cable that mediates between the motherboard 3 and the optical module 1) has, and electrically connects the module substrate 5 and the motherboard 3. The electrical connector 17 (the motherboard 3 connected to the electrical connector 17 from another perspective) is electrically connected to the electronic components mounted on the module substrate 5 via the conductors (wiring) that the module substrate 5 has. For example, the electrical connector 17 is directly or indirectly connected to the optical IC 7, the control IC 13, and the power supply IC 15 via other electronic elements. The other electronic elements are, for example, active elements or passive elements mounted on the module substrate 5, or passive elements constituted by the conductors of the module substrate 5.

[0069] The number of the electrical connectors 17 is arbitrary. In the illustrated example, only one electrical connector 17 is provided. Different from the illustrated example, in an embodiment where two or more electrical connectors 17 are provided, the two or more electrical connectors 17 may be connected to the same device (here, the motherboard 3) with each other, or may be connected to different devices with each other.

[0070] The position where the electrical connector 17 is mounted is arbitrary. In the illustrated example, the electrical connector 17 is mounted on the second surface 5b (the surface on which the optical IC 7 is not mounted), and mates with the connector of the mating device in the z direction. Different from the illustrated example, one or more electrical connectors 17 may be mounted on the first surface 5a (the surface on which the optical IC 7 is mounted), or may be arranged at the edge of the module substrate 5 and mate with the electrical connector of the mating device in the direction along the module substrate 5. Also, the plurality of electrical connectors 17 may be dispersedly mounted on the first surface 5a and the second surface 5b.

[0071] The configurations of the respective electrical connectors 17 (and the mating connectors) may be various configurations, for example, they may be known configurations. For example, the electrical connector 17 and the mating connector may be positioned relative to each other by inserting (fitting) one housing into the other housing, and / or may be positioned relative to each other by contact between the terminals. Also, for example, the electrical connector 17 and the mating connector may be electrically connected to each other by inserting a plurality of pin-shaped terminals of one connector into a plurality of cylindrical terminals of the other connector, or a plurality of layered terminals formed on the surface of a substrate of one connector may abut against leaf spring-shaped terminals provided in a recess of the other connector and be electrically connected to each other.

[0072] (1.8. Passive Components) The passive component 19 is, for example, a resistor, a capacitor element, or an inductor. One passive component 19 may be interposed between any two of, for example, the electrical connector 17, the optical IC 7, the control IC 13, and the power supply IC 15 to contribute to impedance matching. The number, function (such as resistor, capacitor element, or inductor), shape (such as chip type), size, mounting method (such as surface mounting or through-hole mounting), mounting position, etc. of the passive component 19 are arbitrary.

[0073] (2. An Example of Processing of the Optical IC and the Control IC) FIG. 3 is a block diagram showing an example of the configuration of the signal processing system of the optical module 1. Here, one optical IC 7, one control IC 13, and one power supply IC 15 are shown.

[0074] The optical IC 7 has, for example, a conversion unit 27 that directly performs photoelectric conversion, a processing unit 29 that processes an electrical signal related to the conversion unit 27, and a sensor 31 that detects temperature.

[0075] The conversion unit 27 has, for example, the same number of optoelectronic conversion elements 33 as the number of channels (the number of optical fibers 23 connected to one optical IC 7). The optoelectronic conversion element 33 is, for example, a laser diode for transmitting an optical signal or a photodiode for receiving an optical signal. The laser diode generates an optical signal corresponding to the electrical signal input from the processing unit 29 and outputs it to the optical fiber 23. The photodiode generates an electrical signal corresponding to the optical signal input from the optical fiber 23 and outputs it to the processing unit 29.

[0076] The processing unit 29 has, for example, the same number of individual circuits 35 as the number of channels. The plurality of individual circuits 35 are individually (one-to-one) connected to the plurality of optoelectronic conversion elements 33. The individual circuit 35 is a drive circuit for transmitting an optical signal or an amplifier circuit for receiving an optical signal. The drive circuit outputs an electrical signal corresponding to the electrical signal input from outside the optical module 1 via the electrical connector 17 to the optoelectronic conversion element 33. The amplifier circuit amplifies the electrical signal input from the optoelectronic conversion element 33 and outputs it to the outside of the optical module 1 via the electrical connector 17.

[0077] The relationship between the above configuration from the viewpoint of signal processing and the configuration from the hardware viewpoint of the optical IC 7 is arbitrary. For example, the plurality of optoelectronic conversion elements 33 may be fabricated as mutually separated elements and mounted on the same substrate, or may be fabricated on the same substrate. The plurality of individual circuits 35 may be fabricated as mutually separated IC chips and mounted on the same substrate, or may be fabricated within one IC chip. The conversion unit 27 and the processing unit 29 may be fabricated as separate chips and mounted on the same substrate, or may be fabricated on the same chip as each other. The same applies to the sensor 31.

[0078] Sensor 31 outputs an electrical signal according to the temperature to control IC 13. Control IC 13 controls individual circuit 35 based on the detected temperature of sensor 31, for example, to compensate for the characteristic change of photoelectric conversion element 33 caused by temperature change. Specifically, for example, individual circuit 35 applies a bias to the anode or cathode of photoelectric conversion element 33 with a voltage or current according to the value stored in its own register. Control IC 13 rewrites the value stored in the register according to the detected value of sensor 31. Thereby, the change caused by temperature change in the relative relationship between the intensity of the optical signal and the intensity of the electrical signal is reduced.

[0079] The configuration, number, and arrangement position of sensor 31 are arbitrary. For example, sensor 31 is composed of a thermistor or a resistance temperature detector and changes its electrical resistance according to the temperature. Sensor 31 may have only a transducer, or may have a circuit that performs a predetermined process (for example, amplification) in addition to the transducer. Also, only one sensor 31 may be provided for one optical IC 7 (the example shown in the figure), or a plurality of sensors 31 may be individually provided for a plurality of photoelectric conversion elements 33. Sensors 31 may be provided in a plurality less than the number of a plurality of photoelectric conversion elements 33, and the detected value of the nearest sensor 31 or the representative value of the detected values may be used for each photoelectric conversion element 33.

[0080] An example of the above process may be appropriately changed. For example, in the above description, a plurality of individual circuits 35 individually apply a bias to a plurality of photoelectric conversion elements 33. However, one circuit that applies a common bias to a plurality of photoelectric conversion elements 33 may be provided. Also, for example, instead of the processing unit 29 in optical IC 7 generating the bias, control IC 13 may generate the bias.

[0081] Note that, as described above, in the illustrated example, the control IC 13 is not interposed between the electrical connector 17 and the optical IC 7. In other words, the control IC 13 does not have a function of transmitting an electrical signal to be converted into an optical signal and / or an electrical signal converted from an optical signal. However, the control IC 13 may have such a function. Further, the control IC 13 may have other functions such as a function of monitoring a current applied to the optoelectronic conversion element 33.

[0082] (3. Configuration of Wiring 21) The following description of the wiring 21 will be generally made in the following order. 3.1. Outline of Wiring 21 in the Illustrated Example (Figs. 4 to 6) 3.2. Other Examples of Wiring 21 (not shown) 3.3. Details of Wiring 21

[0083] (3.1. Outline of Wiring in the Illustrated Example) Fig. 4 is a top view of the module substrate 5. However, here, only the power supply IC 15 and the plurality of optical ICs 7 are shown as the components located on the first surface 5a. Also, the aforementioned via conductors 37 and 39 are shown.

[0084] As described above, the plurality of wirings 21 described here relate to the same type of power supplied from one power supply IC 15 to the plurality of optical ICs 7. Also, here, only the wirings 21 having different lengths from each other are focused on. In other words, there may or may not be a wiring 21 that supplies the same type of power as the power supplied from the illustrated power supply IC 15 to the illustrated plurality of optical ICs 7 to an optical IC 7 not shown and has the same length as the illustrated wiring 21.

[0085] As shown in FIGS. 4 to 6 and as described above, each of the plurality of wirings 21 connecting the power supply IC 15 and the plurality of optical ICs 7 has at least one via conductor 37, at least a part of at least one conductor layer 25, and at least one via conductor 39. The via conductor 37 is electrically connected to the power supply IC 15 via a pad 43 (FIG. 4). The via conductor 39 is electrically connected to the optical IC 7 via a pad 45 (FIG. 4). Each conductor layer 25 has a plurality of wiring patterns 25w (the power supply IC 15 side is shared) that constitute the plurality of wirings 21. Note that each conductor layer 25 may have a portion other than the plurality of wiring patterns 25w, but in the description of the embodiment, there may be an expression assuming that the conductor layer 25 does not have such a portion for the sake of convenience. For example, when referring to the planar shape of the conductor layer 25, it may refer to the planar shape of the entire plurality of wiring patterns 25w shown in FIG. 5.

[0086] The pad 43 is for mounting the power supply IC 15. More specifically, for example, one terminal 15c (FIG. 1) and one pad 43 are joined by a conductive bonding material (not shown. For example, solder). Therefore, for example, the same number of pads 43 as the plurality of terminals 15c may be located on the first surface 5a in an arrangement corresponding to the arrangement of the plurality of terminals 15c. In FIG. 4, for the sake of convenience, only one pad 43 is extracted and the size of the pad 43 is exaggerated. However, the pad 43 may actually have the size as shown in FIG. 4. The specific position, planar shape, dimensions, and material of the pad 43 are arbitrary. The pad 43 may be regarded as a part of the conductor layer 25 that overlaps the upper surface of the insulator 41 of the module substrate 5.

[0087] Pad 45 is where the optical IC 7 is mounted. More specifically, for example, one terminal 7c (Fig. 1) and one pad 45 are joined by a conductive bonding material (not shown. For example, solder). Accordingly, the same number of pads 45 as the number of terminals 7c may be located on the first surface 5a in an arrangement corresponding to the arrangement of the plurality of terminals 7c. In Fig. 4, for convenience, only one pad 45 is extracted and the size of the pad 45 is exaggerated. Also, the relative position of the pad 45 with respect to the optical IC 7 does not match Fig. 1 either, and this is for ease of illustration. However, the pad 45 may actually be at the position and / or size as shown in Fig. 4. The specific position, planar shape, dimensions, and material of the pad 45 are arbitrary. The pad 45 may be regarded as a part of the conductor layer 25 that overlaps the upper surface of the insulator 41 of the module substrate 5.

[0088] As can be understood from the above description of the pads 43 and 45, the via conductors 37 and 39 shown in Figs. 4 and 5 have exaggerated sizes and / or the area of the arrangement region (for two or more via conductors), and their positions (for example, the relative positions with respect to the power supply IC 15 or the optical IC 7) do not match Fig. 1 either. However, the via conductors 37 and 39 may actually be at the sizes and / or arrangements as shown in Figs. 4 and 5. The wiring pattern 25w has, for example, an exaggerated width at least at the ends (in other words, the portions connected to the via conductors 37 or 39), and the position does not match Fig. 1 either. However, the wiring pattern 25w may actually be at the width and / or position as shown in the figure.

[0089] The insulator 41 may be regarded as having a plurality of insulating layers 47 (FIG. 6). The via conductors 37 and 39 are conductors that penetrate part or all of the thickness of the insulator 41, and from another perspective, are conductors that penetrate one or more insulating layers 47. Note that, among the via conductors 37, the portions that penetrate each insulating layer 47 may be regarded as via conductors 37a. Similarly, among the via conductors 39, the portions that penetrate each insulating layer 47 may be regarded as via conductors 39a. The plurality of conductor layers 25 are generally layered conductors parallel to both surfaces of the insulator 41, and their positions in the thickness direction of the insulator 41 are different from each other. In the illustrated example, all (four) of the conductor layers 25 that constitute the wiring 21 are located inside the insulator 41 (between the insulating layers 47 from another perspective).

[0090] As shown in FIG. 6, the upper end of the via conductor 37 is connected to the pad 43. Also, the via conductor 37 penetrates the insulator 41 to a depth that reaches at least the lowermost conductor layer 25 (here, the fourth conductor layer 25D) among the plurality of conductor layers 25 that constitute the wiring 21, and is connected to all the conductor layers 25. Thereby, the power supply IC 15 can supply power to all the conductor layers 25 that constitute the wiring 21.

[0091] Also, the upper end of each via conductor 39 is connected to the pad 45. Also, the plurality of via conductors 39 corresponding to different optical ICs 7 penetrate the insulator 41 to different depths (reach different conductor layers 25 from another perspective), and are connected to different numbers of conductor layers 25.

[0092] More specifically, in the example of FIG. 6, the first via conductor 39A connected to the first optical IC 7A is connected to the first conductor layer 25A. The second via conductor 39B connected to the second optical IC 7B is connected to the first conductor layer 25A and the second conductor layer 25B. The third via conductor 39C connected to the third optical IC 7C is connected to the first conductor layer 25A to the third conductor layer 25C. The fourth via conductor 39D connected to the fourth optical IC 7D is connected to the first conductor layer 25A to the fourth conductor layer 25D.

[0093] With such a configuration, a structure of the module substrate 5 is realized in which the longer the wiring 21 is, the larger the number of conductor layers 25 it passes through becomes.

[0094] As understood from the above description, one wiring 21 may have two or more paths that are parallel to each other (electrically parallel). For example, the second wiring 21B has a path passing through the first conductor layer 25A and a path passing through the second conductor layer 25B. Therefore, when comparing the lengths of the wirings 21, for example, the shortest paths may be compared with each other. Also, even for the same path, if the length of the wiring 21 differs depending on the position, the length of the wiring 21 may be reasonably measured. For example, when the wiring pattern 25w included in the conductor layer 25 is curved in a plan view, the lengths are different between the inner side and the outer side. In such a case, the length of the center line may be regarded as the length of the wiring pattern 25w.

[0095] The pads 43 and 45 generally have a cross-sectional area larger than that of the wiring 21 in the direction of the current flow and have a small influence on the resistance value from the power supply IC 15 to the optical IC 7. Also, even if there is an influence, generally, the magnitude of the influence is substantially the same among the plurality of optical ICs 7. Therefore, in the present disclosure, there may be an expression that ignores the existence of the pads 43 and 45. For example, although the total length of the shortest path in the wiring 21 is exactly the length from the pad 43 to the pad 45, it may be referred to as "the length of the shortest path from the power supply IC 15 to the optical IC 7". If the influence of the pads 43 and / or 45 on the difference in the resistance values from the power supply IC 15 to the plurality of optical ICs 7 is large, the pads 43 and / or 45 may be regarded as a part of the wiring 21. In other words, the lengths of the pads 43 and / or 45 may be included in the above "the length of the shortest path from the power supply IC 15 to the optical IC 7". The description in this paragraph also applies to lands for through-hole mounting as well as pads for surface mounting.

[0096] The number of via conductors 37 is arbitrary. In the illustrated example, two via conductors 37 are shown, but this is merely an example. For instance, the number of via conductors 37 may be one, or may be three or more. The same applies to the number of via conductors 39 corresponding to each optical IC 7. Also, the magnitude relationship between the number of via conductors 37 and the number of via conductors 39 corresponding to each optical IC 7 is arbitrary.

[0097] (3.2. Other Examples of Wiring) In this embodiment, various specific configurations are possible in which the longer the long wiring 21 is, the greater the number of conductor layers 25 passed through, and the configurations in FIGS. 4 to 6 may be appropriately changed.

[0098] For example, in the illustrated example, the via conductor 37 is configured to be able to be regarded as one conductor penetrating from the first surface 5a to the fourth conductor layer 25D. Although not particularly illustrated, different from the illustrated example, a via conductor 37a penetrating the insulator 41 from the first surface 5a to the first conductor layer 25A and a via conductor 37a penetrating the insulator 41 from the first conductor layer 25A to the second conductor layer 25B may be separated from each other in the xy plane. The same applies between other conductor layers 25. The same also applies to the via conductor 39 connecting the optical IC 7 and two or more conductor layers 25.

[0099] Also, in relation to the above, the number of insulating layers 47 penetrated by a via conductor (for example, the one corresponding to the via conductor 37) that can be regarded as one conductor is arbitrary. For example, instead of the via conductor 37, a via conductor 37a penetrating one insulating layer 47 from the first surface 5a to the first conductor layer 25A and one via conductor (a stack of three via conductors 37a) penetrating three insulating layers 47 from the first conductor layer 25A to the fourth conductor layer 25D may be provided. Although the via conductor 37 is taken as an example, the same applies to the via conductor 39.

[0100] Also, the number of via conductors 37a may be different between a plurality of insulating layers 47. For example, there are two via conductors 37a penetrating one insulating layer 47 from the first surface 5a to the first conductor layer 25A, while there may be one or three or more via conductors 37a penetrating one insulating layer 47 from the first conductor layer 25A to the second conductor layer 25B. Although the via conductor 37a is taken as an example, the same applies to the via conductor 39a.

[0101] In the example of FIG. 6, the wiring 21 passing through two or more conductor layers 25 passes through all the conductor layers 25 passed through by the other wiring 21 passing through a smaller number of conductor layers 25 than itself. For example, the fourth wiring 21D passes through all of the first conductor layer 25A to the third conductor layer 25C passed through by the third wiring 21C. Different from the illustrated example, the former wiring 21 (the fourth wiring 21D) may not pass through at least one of the conductor layers 25 passed through by the latter wiring 21 (the third wiring 21C).

[0102] For example, the via conductor 39 (for example, the fourth via conductor 39D) can be made non-contact with any number of conductor layers 25 (at least one of the first conductor layer 25A to the third conductor layer 25C) between the first surface 5a and the lowermost conductor layer 25 (the fourth conductor layer 25D) to which itself is connected (see FIG. 9, which has a different gist from this embodiment). Thereby, a configuration may be realized in which the wiring 21 passing through two or more conductor layers 25 does not pass through all the conductor layers 25 passed through by the other wiring 21 passing through a smaller number of conductor layers 25 than itself.

[0103] However, in this case, in order to maintain a configuration in which the longer the wiring 21 is, the larger the number of conductor layers 25 passed through (for example, a configuration in which the fourth wiring 21D passes through more conductor layers 25 than the third wiring 21C), other conductor layers 25 (conductor layers 25 not shown that constitute the fourth wiring 21D) other than those shown are required. Therefore, it is easier to reduce the number of conductor layers 25 included in the module substrate 5 in the example of FIG. 6.

[0104] As already mentioned, the conductor layer 25 through which the wiring 21 passes may be a conductor layer 25 located on the surface (the first surface 5a and / or the second surface 5b) of the insulator 41, rather than a conductor layer 25 inside the insulator 41. That is, the two or more conductor layers 25 used for the two or more wirings 21 may be only the internal conductor layers 25 (the example shown in the figure), or only the surface conductor layers 25, or a combination of the internal conductor layers 25 and the surface conductor layers 25.

[0105] In the example of FIG. 6, all the conductor layers 25 are used to form the wiring 21. Different from the example shown in the figure, the module substrate 5 may have conductor layers 25 that are not used to form the wiring 21. Such conductor layers 25 may be used, for example, to form wirings other than the wiring 21, to form electronic elements (for example, resistors, inductors, or capacitors), or to form a reference potential layer with a large area. Note that FIG. 6 may be regarded as a figure in which the illustration of other conductor layers 25 is omitted in the module substrate 5 including conductor layers 25 other than the conductor layers 25 forming the wiring 21. In the description of the embodiment, for the sake of convenience, there may be an expression on the premise that the conductor layer 25 forms the wiring 21.

[0106] The planar shape of the conductor layer 25 in FIG. 5 has been described as corresponding to any of the first conductor layer 25A to the fourth conductor layer 25D. In other words, the first conductor layer 25A to the fourth conductor layer 25D have the same planar shape (and dimensions) as each other and overlap each other (more specifically, their outer edges coincide) in a planar perspective view. Different from the example shown in the figure, the planar shapes, dimensions, and / or positions of the first conductor layer 25A to the fourth conductor layer 25D may be different from each other. For example, in the second conductor layer 25B, since the wiring pattern 25w corresponding to the first wiring 21A (excluding the shared portion with other wiring patterns 25w) is unnecessary, the wiring pattern 25w may be deleted.

[0107] (3.3. Details of Wiring) The planar shape of the conductor layer 25 (the portion constituting the wiring 21 thereof) is arbitrary. In the example of FIG. 5, although not particularly labeled, the conductor layer 25 has a first portion connected to the power supply IC 15 via the via conductor 37, and a plurality of second portions branching and extending from the first portion. The plurality of second portions are individually connected to the plurality of optical ICs 7 via the plurality of via conductors 39. That is, one wiring pattern 25w connecting one power supply IC 15 and one optical IC 7 has the first portion and the second portion. The plurality of wiring patterns 25w share the first portion. With such a configuration, one type of power of the power supply IC 15 is distributed to the plurality of optical ICs 7.

[0108] From another perspective, in the example of FIG. 5, the conductor layer 25 has four branch points corresponding to the four wiring patterns 25w. In other words, although not particularly labeled, the conductor layer 25 has a main line extending from the via conductor 37 (the portion extending parallel to the x direction) and a plurality of branch lines branching one by one from the main line in different positions in the direction in which the main line extends. However, at the last branch point (the branch point between the third wiring 21C and the fourth wiring 21D), the two branch lines branch from each other. One wiring pattern 25w connecting one power supply IC 15 and one optical IC 7 has at least a part of the main line and one branch line.

[0109] The planar shape of the conductor layer 25 illustrated in FIG. 5 is premised on a mode in which the plurality of optical ICs 7 are arranged in a row and the power supply IC 15 is located outside the range (-x side) where the plurality of optical ICs 7 are located in the arrangement direction (x direction) of the plurality of optical ICs 7. However, as described above, the arrangements of the power supply IC 15 and the optical IC 7 are arbitrary. For example, with respect to the position in the x direction, the power supply IC 15 may be located between the second optical IC 7B and the third optical IC 7C, and / or the optical ICs 7 may be located on both the +y side and the -y side with respect to the power supply IC 15. The planar shape of the conductor layer 25 may be appropriately changed according to the arrangements of the power supply IC 15 and the optical IC 7. Also, in the arrangement of the power supply IC 15 and the optical IC 7 illustrated in FIG. 5, a planar shape different from the planar shape of the conductor layer 25 illustrated in FIG. 5 may be adopted.

[0110] Examples of planar shapes of the conductor layer 25 other than the planar shape illustrated in FIG. 5 include various shapes. Some examples are given below. A shape in which two or more branch lines branch from the main line at the same branch point in the middle of the main line. A shape in which three or more branch lines branch from each other at the last branch point. A shape with only one branch point. A shape in which further branching occurs from the branch line. A shape in which branch lines branch to both sides of the main line (for example, the +y side and the -y side with respect to the main line extending in the x direction). A shape in which the power supply IC 15 is connected to a midway position of the main line (in other words, a shape in which the main line (or branch line) extends from the power supply IC 15 in both the +x side and the -x side). A shape in which the distinction between the main line (first part) and the branch line (second part) is not clear. A shape including a line (non-branching line) extending from the position of a via conductor 39 (for example, the first via conductor 39A) corresponding to one optical IC 7 from the power supply IC 15 to the position of a via conductor (for example, the second via conductor 39B) corresponding to another optical IC 7.

[0111] The planar shape and dimensions of one wiring pattern 25w are arbitrary. In the illustrated example, the above-mentioned main line extends linearly and extends in the x direction (in another aspect, the arrangement direction of a plurality of optical ICs 7 and / or the direction orthogonal to the fiber bundle 9). Also, each branch line branches obliquely with respect to the direction in which the main line extends (x direction) and then extends in a direction orthogonal to the main line. The wiring pattern 25w extends from one end to the other end with a substantially constant width. In another aspect, the width of the main line and the width of the branch line are substantially the same. However, such a configuration is only an example and may be changed as appropriate.

[0112] For example, the main line may be inclined, curved, or bent in the x direction. Also, as described above, the positions of the via conductors 37 and 39 do not necessarily match the actual ones, and the details of the wiring pattern 25w may be different from the illustrated shape. The wiring pattern 25w may have portions with different widths. For example, the width of the main line (first part) may be made larger than the width of the branch line (second part).

[0113] The dimensions of the conductor layer 25 (or the wiring pattern 25w from another perspective) in plan view and the thickness of the conductor layer 25 are also arbitrary. These may be appropriately set so as to have an appropriate resistance value according to the specifications of the power supply IC 15, the optical IC 7, etc. It has already been described that the material of the conductor layer 25 is arbitrary.

[0114] The configurations (e.g., shape, dimensions, and / or material) of the plurality of conductor layers 25 may be the same as each other or may be different from each other. In the latter aspect, the difference may be utilized to bring the resistance values of the plurality of wirings 21 closer. For example, by adjusting the width of the wiring pattern 25w, adjusting the length of the wiring pattern 25w, and / or adjusting the thickness of the conductor layer 25, the resistance value may be adjusted, and thus, the resistance values of the plurality of wirings 21 may be brought closer.

[0115] The configurations of the via conductors (37, 37a, 39, and 39b) may be various. For example, for example, the via conductor may be columnar (a mode without a cavity inside) as in the illustrated example, or may be cylindrical (a mode with a cavity inside) different from the illustrated example. In the latter case, the inside of the cylinder may be in a vacuum state or a state where gas exists, or may be filled with an insulator. Also, as described above, the columnar via conductor may be entirely composed of the same material, or the inside and the outer peripheral surface may be composed of different materials.

[0116] Also, for example, the via conductors (37, 37a, 39, and 39b) may have a shape of the cross section (a cross section parallel to the xy plane) that is constant in the length direction (z direction), or may not be constant. Examples of the latter include a tapered shape where the diameter becomes smaller toward the +z side or the -z side. Also, a shape in which two or more tapered shapes are stacked in the z direction, or a shape in which two or more shapes with different diameters are stacked in the z direction can be cited. Also, for example, the via conductor may or may not have a flange-like portion in the middle of the z direction. Such a flange-like portion may be regarded as a part separate from the via conductor.

[0117] The shape of the cross-section (a cross-section parallel to the xy plane) of the via conductors (37, 37a, 39, and 39b) is arbitrary. In the illustrated example, and generally, the shape of the cross-section is circular. The length of the via conductor (in another aspect, the thickness of one or more insulating layers 47), and the diameter of the via conductor (the maximum length or the equivalent diameter of a circle) are also arbitrary.

[0118] The configurations (for example, shape, dimensions, and / or material) of the plurality of via conductors (37, 37a, 39, and 39b) may be the same as each other or different from each other. In the latter aspect, the difference may be utilized to make the resistance values of the plurality of wirings 21 closer to each other, similar to the conductor layer 25. For example, by adjusting the diameter of the via conductor, the resistance value may be adjusted, and thus, the resistance values of the plurality of wirings 21 may be made closer to each other.

[0119] In addition, at the connection portion between the via conductors (37, 37a, 39, and 39b) and the conductor layers (conductor layer 25, and pads 43 and 45), when viewed from the perspective of materials, etc., the end portion (upper end or lower end) of the via conductor and the surface (lower surface or upper surface) of the conductor layer may be joined, the via conductor may penetrate the conductor layer, or such a distinction may be impossible.

[0120] (4. Summary of the Embodiment) As described above, the optical module 1 according to the present embodiment includes a first optical IC 7A, a second optical IC 7B, a first power supply IC (power supply IC 15), and a module substrate 5 (5A). The first optical IC 7A and the second optical IC 7B perform photoelectric conversion. The power supply IC 15 supplies power to the first optical IC 7A and the second optical IC 7B. The first optical IC 7A, the second optical IC 7B, and the power supply IC 15 are located on the module substrate 5. The module substrate 5 has a first wiring 21A and a second wiring 21B. The first wiring 21A connects the power supply IC 15 and the first optical IC 7A. The second wiring 21B connects the power supply IC 15 and the second optical IC 7B. Here, let the resistance value of the first wiring 21A be R1, the resistance value of the second wiring 21B be R2, the length of the shortest path from the power supply IC 15 to the first optical IC 7A in the first wiring 21A be L1, and the length of the shortest path from the power supply IC 15 to the second optical IC 7B in the second wiring 21B be L2. At this time, L2 is longer than L1, and |R2 - R1| is smaller than (L2 - L1) / L1 × R1.

[0121] Therefore, for example, as described above, variations in the voltage and / or current supplied to the plurality of optical ICs 7 due to differences in the lengths of the wirings 21 can be reduced. As a result, for example, the probability of malfunction occurring in any of the optical ICs 7 can be reduced. Whether L2 is longer than L1 can often be determined by visual inspection or by looking at a magnified image without accurately measuring the lengths of the respective wirings 21. Regarding whether |R2 - R1| is smaller than (L2 - L1) / L1 × R1, measurement of L1, L2, R1, and R2 is not necessarily required. For example, in the present embodiment, even without measuring L1, L2, R1, and R2, it is possible to determine whether |R2 - R1| is smaller than (L2 - L1) / L1 × R1 based on the number of conductor layers 25 through which the wiring 21 passes.

[0122] The module substrate 5A may have a plurality of conductor layers 25 whose positions in the thickness direction of the module substrate 5A are different from each other. The first wiring 21A may pass through at least one (one in the example of FIG. 6) of the plurality of conductor layers 25 in the process from the power supply IC 15 to the first optical IC 7A. The second wiring 21B may pass through in parallel a number of conductor layers 25 (two in the example of FIG. 6) that is larger than the number of conductor layers 25 through which the first wiring 21A passes among the plurality of conductor layers 25 in the process from the power supply IC 15 to the second optical IC 7B.

[0123] In this case, since the resistance value is adjusted by the number of the conductor layers 25, for example, compared with an aspect of adjusting the resistance value only by the planar shape of the conductor layer 25 (this aspect may also be included in the technology according to the present disclosure), the degree of freedom in the design of each conductor layer 25 is high. Also, since the conductor layers 25 may overlap each other in planar perspective, it is also advantageous from the viewpoint of reducing the area of the module substrate 5A. Note that in the above, "parallel" is not a structural parallel but an electrical parallel (parallel of series connection and parallel connection).

[0124] The plurality of conductor layers 25 may include a first conductor layer 25A through which both the first wiring 21A and the second wiring 21B pass, and a second conductor layer 25B through which only the second wiring 21B of the first wiring 21A and the second wiring 21B passes.

[0125] In this case, for example, as can be understood from the above description, compared with an aspect of allocating completely separate conductor layers 25 to the first wiring 21A and the second wiring 21B and making the number of conductor layers 25 through which both wirings 21 pass different (this aspect may also be included in the technology according to the present disclosure), the number of conductor layers 25 can be reduced. As a result, it is advantageous for thinning the module substrate 5A.

[0126] The first conductor layer 25A may have a first pattern (wiring pattern 25w) that constitutes the second wiring 21B. The second conductor layer 25B may have a second pattern (a wiring pattern 25w different from the above) that constitutes the second wiring 21B. In a plan view, at least a part of the first pattern and at least a part of the second pattern may overlap. For example, as described above, the planar shape of the conductor layer 25 illustrated in FIG. 5 may be the planar shape of the first conductor layer 25A and the planar shape of the second conductor layer 25B, and the first pattern and the second pattern may coincide.

[0127] In this case, for example, both the first pattern and the second pattern can be basically the shortest paths from the power supply IC 15 to the second optical IC 7B in a plan view. Thereby, for example, the resistance value of the second wiring 21B can be efficiently reduced. In addition, the effect of reducing the area of the above-described module substrate 5A is easily obtained.

[0128] The optical module 1 may include first and second fiber bundles (9), first and second optical connectors (11), and at least one control IC 13. The first or second fiber bundle (9) may each have a plurality of optical fibers 23 extending in parallel with each other, and may extend from the first optical IC 7A or the second optical IC 7B. The first or second optical connector (11) may be located at an end of the first or second fiber bundle (9) opposite to the first optical IC 7A or the second optical IC 7B, and may be communicably connected to an external optical element to transmit an optical signal. The at least one control IC 13 may be located on the module substrate 5, and may control at least one of the first optical IC 7A and the second optical IC 7B.

[0129] In this case, for example, since the optical IC 7, the power supply IC 15, and the control IC 13 are located on one module substrate 5, the optical module 1 corresponding to multiple channels is miniaturized. In such a configuration, since the power supply IC 15 is shared by a plurality of optical ICs 7, further miniaturization is achieved. Regarding the variation in the dropout amount, which is one of the inconveniences caused by sharing the power supply IC 15 by a plurality of optical ICs 7, it is reduced as described above.

[0130] <Second Embodiment> FIG. 7 is a plan view showing a module substrate 5 (module substrate 5B as an example thereof) of the optical module 201 according to the second embodiment. This figure corresponds to FIG. 4 of the first embodiment. Further, FIG. 8 is a view showing an example of a cross-sectional structure of the module substrate 5B. This figure corresponds to FIG. 6 of the first embodiment.

[0131] As shown in FIG. 8, the module substrate 5B has only one conductor layer 25 as a conductor layer constituting a plurality of wirings 21. The conductor layer 25 is connected to the power supply IC 15 by the via conductor 37 and to the optical IC 7 by the via conductor 39, similarly to the first embodiment. Note that FIG. 5 referred to in the description of the first embodiment may be regarded as a plan view showing the conductor layer 25 of the module substrate 5B.

[0132] In the present embodiment, as shown in FIG. 7, the longer the wiring 21 is, the larger the number of via conductors 39 connecting the conductor layer 25 and the optical IC 7 is. As a result, at least a part of the length of the longer wiring 21 has a larger cross-sectional area, and the resistance value is reduced. As a result, the resistance values of the plurality of wirings 21 are made closer to each other.

[0133] The plurality of via conductors 39 (or via conductors 39a) may, for example, have the same diameter (cross-sectional area) as each other. Then, the cross-sectional area of the portion of the wiring 21 formed by the via conductors 39 may be adjusted only by the number of the via conductors 39. However, the diameters of the plurality of via conductors 39 may be different from each other among those corresponding to different optical ICs 7 and / or among those corresponding to the same optical IC 7. Then, the cross-sectional area (in other words, the resistance value) of the wiring 21 may be adjusted by both the number and the diameter of the via conductors 39. Although the diameter of the via conductor 39 is taken as an example, the same applies to other conditions (shape, dimensions, material, etc.).

[0134] In FIG. 8, as an example of the cross-sectional structure of the module substrate 5B, an aspect in which there is only one conductor layer 25 constituting the plurality of wirings 21 is shown. However, the cross-sectional structure of the module substrate 5B may be the same as the structure of the first embodiment shown in FIG. 6. That is, the adjustment of the resistance value of the wiring 21 may be performed by both the number of conductor layers 25 through which the current passes and the number of via conductors 39.

[0135] More specifically, for example, all of the first wiring 21A to the fourth wiring 21D may have different numbers of conductor layers 25 through which the current passes and different numbers of via conductors 39, respectively. Also, for example, some of the wirings 21 may have the same number of conductor layers 25 through which the current passes but different numbers of via conductors 39, and some other wirings 21 may have different numbers of conductor layers 25 through which the current passes but the same number of via conductors 39. That is, the methods used for adjusting the resistance value may be different for different wirings 21. Also, for example, some of the wirings 21 may have only one of the number of conductor layers 25 through which the current passes and the number of via conductors 39 different from each other, and some other wirings 21 may have both the number of conductor layers 25 through which the current passes and the number of via conductors 39 different from each other. That is, the number of methods used for adjusting the resistance value may be different for different wirings 21.

[0136] Also in the above second embodiment, for example, L2 is longer than L1, and |R2 - R1| is smaller than (L2 - L1) / L1 × R1. Thereby, the same effects as those of the first embodiment are achieved. For example, the probability that any one of the optical ICs 7 malfunctions can be reduced.

[0137] Also, in the present embodiment, the module substrate 5 (module substrate 5B as an example thereof) may have one or more conductor layers 25 electrically connected to the power supply IC 15 inside. The first wiring 21A may have at least one first via conductor 39A that electrically connects at least one of the one or more conductor layers 25 and the first optical IC 7A. The second wiring 21B may have at least one second via conductor 39B that electrically connects at least one of the one or more conductor layers 25 (which may be the same as or different from the conductor layer 25 to which the first via conductor 39A is connected) and the second optical IC 7B. The number of the second via conductors 39B (the via conductors 39 of the relatively long wiring 21) may be made larger than the number of the first via conductors 39A.

[0138] In this case, by a simple method of adjusting the number of the via conductors 39, the resistance values of the wirings 21 having different lengths can be made closer to each other.

[0139] <Third Embodiment> FIG. 9 is a cross-sectional view showing the module substrate 5 (module substrate 5C as an example thereof) of the optical module 301 according to the third embodiment. This figure corresponds to FIG. 6 of the first embodiment.

[0140] As shown in this figure, the plurality of wirings 21 (first wiring 21A to fourth wiring 21D) pass through different conductor layers 325 (corresponding to the conductor layer 25 of the first embodiment). Specifically, the first wiring 21A passes through the first conductor layer 325A. The second wiring 21B passes through the second conductor layer 325B. The third wiring 21C passes through the third conductor layer 325C. The fourth wiring 21D passes through the fourth conductor layer 325D. Such a configuration is realized, for example, by the fact that the via conductors 39 of each wiring 21 are connected only to the conductor layer 325 corresponding to itself. The via conductor 39 is non-connected to the conductor layer 325 that does not correspond to itself between the first surface 5a and the conductor layer 325 corresponding to itself by passing through a non-arrangement region (for example, an opening or a notch) of the conductor layer 325.

[0141] Figures 10A to 10D are plan views showing the shapes of the first conductor layer 325A to the fourth conductor layer 325D. These figures correspond to FIG. 5 of the first embodiment.

[0142] As shown in these figures, in the present embodiment, the longer the wiring 21, the wider the width of the conductor layer 325 (wiring pattern 25w). As a result, the longer the wiring 21, the larger the cross-sectional area at at least a part of its length, and thus the lower the resistance value. As a result, the resistance values of the plurality of wirings 21 are made closer. Note that, similar to the first embodiment, the planar shape and dimensions of the wiring pattern 25w are arbitrary. For example, each wiring pattern 25w may extend with a substantially constant width from one end to the other end (illustrated example), or may have portions with different widths from each other. In the latter aspect, there may be a portion where the widths are equal among the wirings 21 having different lengths. In the present disclosure, unless otherwise specified, when the widths of the wiring patterns 25w are compared, the width may be, for example, the average width over the entire length of the wiring pattern 25w.

[0143] In the illustrated example, the shape of the wiring pattern 25w follows the shape of the wiring pattern 25w in FIG. 5. That is, the planar shape of each conductor layer 325 is a shape obtained by extracting a portion corresponding to one wiring pattern 25w from the planar shape of the conductor layer 25 in FIG. 5. However, the degree of freedom in the shape of the wiring pattern 25w in the present embodiment is higher than the degree of freedom in the shape of the wiring pattern 25w in the first embodiment. For example, in the first embodiment, as described above, one conductor layer 25 has a main line extending from the power supply IC 15 and a plurality of branch lines branching in order from the main line. The plurality of branch lines are, of course, located in different regions from each other. On the other hand, in the present embodiment, the wiring patterns 25w (for example, portions corresponding to the branch lines in the first embodiment) corresponding to different optical ICs 7 are constituted by different conductor layers 25, and thus may overlap each other in a planar perspective. Therefore, in the present embodiment, the wiring pattern 25w does not need to follow FIG. 5.

[0144] In the illustrated example, the longer (more likely to be long) wiring 21 passes through the conductor layer 325 on the upper side (the side of the surface on which the power supply IC 15 and the optical IC 7 are mounted). As a result, for example, the longer the wiring 21, the shorter the z-direction length of the via conductors 37 and 39, and it becomes easier to make the resistance values of the plurality of wirings 21 closer to each other. However, in the thin-module substrate 5, the lengths of the via conductors 37 and 39 are likely to be shorter compared to the length in the xy plane of the wiring pattern 25w. Therefore, the relationship between the length of the wiring 21 (the relative position of the optical IC 7 with respect to the power supply IC 15 from another perspective) and the z-direction position of the conductor layer 325 through which it passes may be reversed from the illustrated example in all or part of it.

[0145] In the description of the second embodiment, it was stated that the second embodiment may be combined with the first embodiment. Similarly, the second embodiment may be combined with this embodiment. For example, the longer the wiring 21, the larger the number of via conductors 39 and the width of the wiring pattern 25w may be increased. Also, in the description of this embodiment, basically, the concept of dividing the conductor layer 325 for each wiring 21 was explained. However, the features inherent in this embodiment may be appropriately combined with the first embodiment. For example, the longer the wiring 21, the larger the number of conductor layers 25 through which it passes and the width of the wiring pattern 25w may be increased. Furthermore, the second embodiment may be combined with such a combination. In these various combination modes, the methods used for resistance value adjustment may be the same or different between some of the wirings 21 and some other wirings 21. Also, the number of methods used for resistance value adjustment may be different between some of the wirings 21 and some other wirings 21.

[0146] Also in the above-described third embodiment, for example, L2 is longer than L1, and |R2 - R1| is smaller than (L2 - L1) / L1 × R1. As a result, the same effect as in the first embodiment is achieved. For example, the probability of any of the optical ICs 7 malfunctioning can be reduced.

[0147] The module substrate 5C may have a first conductor layer 325A and a second conductor layer 325B whose positions in the thickness direction of the module substrate 5C are different from each other. The first wiring 21A may pass only through the first conductor layer 325A among the first conductor layer 325A and the second conductor layer 325B in the process from the power supply IC 15 to the first optical IC 7A. The second wiring 21B may pass only through the second conductor layer 325B among the first conductor layer 325A and the second conductor layer 325B in the process from the power supply IC 15 to the second optical IC 7B. The width of the pattern (wiring pattern 25w) constituting the second wiring 21B of the second conductor layer 325B may be made wider than the width of the pattern (wiring pattern 25w) constituting the second wiring of the first conductor layer 325A.

[0148] In this case, for example, as described above, since the wiring pattern 25w of the first wiring 21A and the wiring pattern 25w of the second wiring 21B are realized by different conductor layers 325, the degree of freedom in design (in other words, the degree of freedom in the width of the wiring pattern 25w) is high. And by a simple method of adjusting the width of the wiring pattern 25w, the resistance value of the first wiring 21A and the resistance value of the second wiring 21B can be made closer to each other.

[0149] <Fourth to Sixth Embodiments> In the first to third embodiments, an aspect in which the number of power supply ICs 15 is one is taken as an example. In the fourth to sixth embodiments, an aspect in which there are a plurality of power supply ICs 15 is taken as an example. The plurality of power supply ICs 15 may supply different types of power from each other, for example, as described in the description of the first embodiment, and the power of each power supply IC 15 may be supplied to two or more (for example, all) optical ICs 7.

[0150] Note that the structure of the module substrate 5 in the first to third embodiments may be applied to the fourth to sixth embodiments as long as there is no contradiction or the like. From another perspective, in the fourth to sixth embodiments, when focusing on one power supply IC 15, the description of the first to third embodiments may be incorporated.

[0151] <Fourth Embodiment> FIG. 11 is a cross-sectional view showing the configuration of the optical module 401 according to the fourth embodiment. This figure corresponds to FIG. 6 of the first embodiment.

[0152] Briefly speaking, the optical module 401 has a configuration in which a plurality of power supply ICs 15 and a plurality of optical ICs 7 are arranged symmetrically above and below. That is, in a plan view, there is at least one set (one set in the illustrated example) of two overlapping power supply ICs 15, and at least one set (two sets in the illustrated example) of two overlapping optical ICs 7. This facilitates making the lengths of the plurality of wirings 21 closer, and in turn, facilitates making the resistance values of the plurality of wirings 21 closer.

[0153] For example, in the illustrated example, since the first optical IC 7A and the second optical IC 7B are arranged symmetrically above and below, it is facilitated to make the length of the wiring 21 from the first power supply IC 15A to the first optical IC 7A and the length of the wiring 21 from the first power supply IC 15A to the second optical IC 7B closer. Thereby, for example, the variation in the same type of power supplied to the first optical IC 7A and the second optical IC 7B is reduced. Note that the difference in resistance value due to the difference in the lengths of the two wirings may be reduced by applying at least one of the first to third embodiments. Similarly, the difference in resistance value due to the difference in length between two or more optical ICs 7 (for example, the first optical IC 7A and the third optical IC 7C) mounted on the same mounting surface (the first surface 5a or the second surface 5b) may be reduced by applying at least one of the first to third embodiments.

[0154] Also, for example, in the illustrated example, since the first power supply IC 15A and the second power supply IC 15B are arranged symmetrically with respect to the vertical direction, it is facilitated to make the lengths of the wirings 21 from these power supply ICs 15 to each optical IC 7 closer to each other. For example, it is facilitated to make the length of the wiring 21 from the first power supply IC 15A to the first optical IC 7A and the length of the wiring 21 from the second power supply IC 15B to the first optical IC 7A closer to each other. Thereby, for example, in each optical IC 7, the variation in the potential difference between the potential supplied from the first power supply IC 15A and the potential supplied from the second power supply IC 15B is likely to be reduced. As a result, for example, in an aspect where the potential difference is utilized in the optical IC 7, the operation of the optical IC 7 becomes stable.

[0155] Also, for example, in the illustrated example, since the first power supply IC 15A and the second power supply IC 15B are arranged symmetrically with respect to the vertical direction, and the first optical IC 7A and the second optical IC 7B are arranged symmetrically with respect to the vertical direction, all of the above effects are achieved. Also, for example, it is easy to make a part of the wiring 21 from the first power supply IC 15A to the first optical IC 7A (or the second optical IC 7B) and a part of the wiring 21 from the second power supply IC 15B to the second optical IC 7B (or the first optical IC 7A) have a vertically symmetric configuration. As a result, for example, it is possible to similarly predict the resistance values of the wirings 21 where both the power supply source and the supply destination are different from each other, and the design burden is reduced. Also, for example, since both the power supply IC 15 and the optical IC 7 are arranged symmetrically with respect to the vertical direction, it is advantageous for reducing the area of the module substrate 5D.

[0156] The total number of two or more power supply ICs 15 that supply power to two or more common optical ICs 7 is not limited to two (the example shown in the figure), and may be odd or even. Similarly, the number of two or more common optical ICs 7 described above is not limited to four (the example shown in the figure), and may be odd or even. For example, when paying attention to at least two power supply ICs 15 and at least two optical ICs 7, the above relationship may hold. Of course, four or more even numbers of power supply ICs 15 (each set of two or more sets of power supply ICs 15) may be arranged symmetrically up and down, and / or four or more even numbers of optical ICs 7 (each set of two or more sets of optical ICs 7) may be arranged symmetrically up and down. Also, from another perspective, an even number of power supply ICs 15 that is one less than the total number (even) or the total number (odd) may be arranged symmetrically up and down, and / or an even number of optical ICs 7 that is one less than the total number (even) or the total number (odd) may be arranged symmetrically up and down. Note that the description in this paragraph may be applied to the fifth embodiment (Figure 12) described later by replacing the term "symmetric up and down" with the term "symmetric left and right".

[0157] When it is said that two power supply ICs 15 are arranged symmetrically up and down, the two power supply ICs 15 may completely overlap in a planar perspective (they may coincide except for tolerances), or there may be some deviation. When there is a deviation, whether they are arranged symmetrically up and down may be reasonably determined. For example, in the following cases, it may be determined that they are arranged symmetrically up and down. In a planar perspective, when the overlapping area of the two power supply ICs 15 is 1 / 2 or more or 2 / 3 or more with respect to the area of each power supply IC 15 (the smaller one if the two power supply ICs 15 are different from each other), and neither of them overlaps with other power supply ICs 15. And / or, in a planar perspective, when the distance between the centers of the two power supply ICs 15 is 1 / 2 or less or 1 / 3 or less of the minimum width of each power supply IC 15 (the smaller one if the two power supply ICs 15 are different from each other), and neither of them overlaps with other power supply ICs 15. Note that the center may be, for example, a geometric center (the same applies hereinafter). The area and the center may be based on the sealing portion 15b or the package 15a (the same applies hereinafter). Although the power supply IC 15 is taken as an example, the same applies to the optical IC 7.

[0158] For the sake of description, as can be understood from the description of the first embodiment, the y-direction positions of a plurality of ICs mounted on the same surface (for example, the first power supply IC 15A, the first optical IC 7A, and the third optical IC 7C mounted on the first surface 5a) are arbitrary. For example, the y-direction position of the first optical IC 7A and the y-direction position of the second optical IC 7B may be the same or different. The same applies to the fifth embodiment (FIG. 12) described later.

[0159] In the illustrated example, the wiring 21 connected to the first power supply IC 15A and the wiring 21 connected to the second power supply IC 15B pass through different conductor layers 425 (the first conductor layer 425A and the second conductor layer 425B). Further, in the illustrated example, the z-direction positions of the two conductor layers 425 are, for example, vertically symmetric with respect to the center in the thickness direction of the module substrate 5D. In this case, since the lengths of the via conductors 37 and 39 corresponding to the first power supply IC 15A and the lengths of the via conductors 37 and 39 corresponding to the second power supply IC 15B are equal, it becomes easier to make the lengths of the wiring 21 closer.

[0160] However, in the thinned module substrate 5, the lengths (z-direction) of the via conductors 37 and 39 tend to be shorter than the length of the wiring pattern 25w. Therefore, the depth-direction positions of the two conductor layers 425 may be different from each other. Also, unlike the illustrated example, a pattern connected to the first power supply IC 15A and a pattern connected to the second power supply IC 15B may be included in one conductor layer 425 so as not to short-circuit each other. For example, with respect to the arrangement of the plurality of optical ICs 7, one pattern may be located on the +y side and the other pattern may be located on the -y side. In such a mode, a part of the two patterns may have, for example, line-symmetric positions, shapes, and dimensions.

[0161] Also, as already mentioned, when viewed in a plane perspective, the positions, shapes, and dimensions of parts of the two conductor layers 425 may be the same as each other or different from each other. In the former aspect, the area of the above-mentioned part may be, for example, 1 / 2 or more or 2 / 3 or more of the area of each conductor layer 425 (the smaller one if the areas of both are different). In addition, as also described in the explanation of the first embodiment, the thicknesses and materials of the two conductor layers 425 may be the same as each other or different from each other. The planar shape of the conductor layer 425 is arbitrary, and for example, a shape obtained by omitting two wiring patterns 25w (branch lines among them) from the conductor layer 25 shown in FIG. 5 can be cited.

[0162] As described above, in addition to the first power supply IC 15A, the optical module 401 may have a second power supply IC 15B that supplies power to the first optical IC 7A and the second optical IC 7B. The module substrate 5D may have a first surface 5a and a second surface 5b on the opposite side of the first surface 5a. The first power supply IC 15A and the first optical IC 7A may be located on the first surface 5a. The second power supply IC 15B and the second optical IC 7B may be located on the second surface 5b.

[0163] In this case, for example, as described above, it is possible to approximate the lengths of the plurality of wirings 21 by, for example, the plurality of wirings 21 having a symmetric path. Further, since the plurality of power supply ICs 15 and the plurality of optical ICs 7 are dispersed on the first surface 5a and the second surface 5b, it is advantageous for reducing the area of the module substrate 5D.

[0164] In a plane perspective, the first power supply IC 15A and the second power supply IC 15B may overlap. Also, the first optical IC 7A and the second optical IC 7B may overlap. That is, the positional relationship between the power supply IC 15 and the optical IC 7 may be vertically symmetric or nearly vertically symmetric.

[0165] In this case, for example, as described above, it is easy to configure the plurality of wirings 21 symmetrically. Consequently, it is facilitated to approximate the lengths of the plurality of wirings 21.

[0166] <Fifth Embodiment> FIG. 12 is a cross-sectional view showing the configuration of an optical module 501 according to the fifth embodiment. This figure corresponds to FIG. 6 of the first embodiment.

[0167] Briefly speaking, the optical module 501 has a configuration in which a plurality of power supply ICs 15 and a plurality of optical ICs 7 are arranged symmetrically with respect to the left and right. That is, there is at least one set (one set in the illustrated example) of two power supply ICs 15 that are symmetric with respect to the left and right, and at least one set (two sets in the illustrated example) of two optical ICs 7 that are symmetric with respect to the left and right. More specifically, in a plan view, each set (two) of power supply ICs 15 is arranged symmetrically with respect to a symmetry axis A1 parallel to a predetermined direction (the y direction in the illustrated example). Similarly, each set (two) of optical ICs 7 is arranged symmetrically with respect to the symmetry axis A1.

[0168] Such symmetry in a plan view is possible even when a plurality of power supply ICs 15 and a plurality of optical ICs 7 are dispersed on the first surface 5a and the second surface 5b (the illustrated example), and can also be realized when a plurality of power supply ICs 15 and a plurality of optical ICs 7 are mounted on the same surface (see FIG. 13 described later). In the illustrated example, the former aspect is exemplified. More specifically, in the illustrated example, all the power supply ICs 15 are mounted on the second surface 5b, and all the optical ICs 7 are mounted on the first surface 5a.

[0169] With the above-described left-right symmetric configuration, for example, it is easy to make a part of the wiring 21 from the first power supply IC 15A to the first optical IC 7A (or the second optical IC 7B) and a part of the wiring 21 from the second power supply IC 15B to the second optical IC 7B (or the first optical IC 7A) have a left-right symmetric configuration. As a result, for example, it is possible to similarly predict the resistance values of the wirings 21 where both the power supply source and the supply destination are different from each other, and the design burden is reduced.

[0170] When two power supply ICs 15 are arranged symmetrically left and right, the two power supply ICs 15 may be in completely symmetric positions (tolerances may exist) in a plan view, or there may be some deviation. When there is a deviation, whether they are arranged symmetrically left and right may be reasonably determined. For example, in a plan view, when the distance between the centers of the two power supply ICs 15 is 1 / 2 or less, 1 / 3 or less, or 1 / 5 or less of the minimum width of each power supply IC 15 (the smaller one if they are different between the two power supply ICs 15), it may be determined that they are arranged symmetrically left and right.

[0171] In the illustrated example, the wiring 21 connected to the first power supply IC 15A and the wiring 21 connected to the second power supply IC 15B pass through different conductor layers 525 (the first conductor layer 525A and the second conductor layer 525B). In this case, for example, since the conductor layers 525 can be overlapped, it is facilitated to make the positions, shapes, and dimensions of a part of the two conductor layers 525 line-symmetric with respect to the symmetry axis A1. In this case, the above part may be, for example, 1 / 2 or more or 2 / 3 or more of the area of each conductor layer 525 (the smaller one if the areas of both are different).

[0172] However, different from the illustrated example, the wiring 21 connected to the first power supply IC 15A and the wiring 21 connected to the second power supply IC 15B may pass through the same conductor layer 525. Even in this case, for example, when the y-direction positions of the power supply IC 15 and the optical IC 7 are the same as each other, a part of the two conductor layers 525 can be made line-symmetric with respect to a symmetry axis (not shown) parallel to the x direction.

[0173] As described above, in addition to the first power supply IC 15A, the optical module 501 may have a second power supply IC 15B that supplies power to the first optical IC 7A and the second optical IC 7B. In a plane perspective view, the first power supply IC 15A and the second power supply IC 15B may be located line-symmetrically with respect to a predetermined symmetry axis A1. The first optical IC 7A and the second optical IC 7B may be located line-symmetrically with respect to the symmetry axis A1.

[0174] In this case, as described above, it is easy to make the plurality of wirings 21 symmetric with respect to the left and right. As a result, for example, the design burden is reduced.

[0175] The module substrate 5E may have a first surface 5a and a second surface 5b on the opposite side of the first surface 5a. The first optical IC 7A and the second optical IC 7B may be located on the first surface 5a. The first power supply IC 15A and the second power supply IC 15B may be located on the second surface 5b.

[0176] In this case, for example, since the power supply IC 15 and the optical IC 7 may overlap, it is easy to reduce the area of the module substrate 5D.

[0177] <Sixth Embodiment> FIGS. 13A and 13B are plan perspective views showing the configuration of the optical module 601 according to the sixth embodiment. These figures correspond to FIG. 4 of the first embodiment. However, the illustration of the pads 43 and 49 is omitted. Also, conductor layers 625 (first conductor layer 625A and second conductor layer 625B) having different positions in the z direction are shown by dotted lines.

[0178] Furthermore, this figure is schematic, as in FIG. 5, and the arrangement of the wiring 21 and the like do not necessarily match the actual ones. For example, in FIGS. 13A and 13B, the connection portion of the first conductor layer 625A to the optical IC 7 (in other words, the arrangement region of the via conductor 39) and the connection portion of the second conductor layer 625B to the optical IC 7 overlap. Actually, since different electric powers (for example, different potentials) are applied to both, they are located in different regions.

[0179] In the optical module 601, to put it simply, among the plurality of wirings 21 that connect one power supply IC 15 and a plurality of optical ICs 7, the longer the wiring 21, the wider the width and the larger the number of via conductors 39. Also, such a configuration is applied to both of the two groups of wirings 21 related to (at least) two power supply ICs 15. From another perspective, the relationships described using the aforementioned R1, R2, L1, and L2 hold for at least four wirings related to two power supply ICs 15.

[0180] More specifically, in the illustrated example, the optical IC 7 to which a relatively long wiring 21 among the plurality of wirings 21 related to the first power supply IC 15A is connected is connected to a relatively short wiring 21 among the plurality of wirings 21 related to the second power supply IC 15B. Accordingly, with respect to the wiring 21 related to the first power supply IC 15A, the optical IC 7 with a relatively narrow width and a relatively small number of via conductors 39 has a relatively wide width and a relatively large number of via conductors 39 with respect to the wiring 21 related to the second power supply IC 15B.

[0181] For example, the wiring 21AA connecting the first power supply IC 15A and the first optical IC 7A is shorter than the wiring 21AB connecting the first power supply IC 15A and the second optical IC 7B. Therefore, the former has a narrower width of the wiring pattern 25w and a smaller number of via conductors 39 than the latter. On the other hand, the wiring 21BA connecting the second power supply IC 15B and the first optical IC 7A is longer than the wiring 21BB connecting the second power supply IC 15B and the second optical IC 7B. Therefore, the former has a wider width of the wiring pattern 25w and a larger number of via conductors 39 than the latter.

[0182] In the illustrated example, the above relationship regarding the two power supply ICs 15, the two optical ICs 7, and the four wirings 21 connecting these ICs holds for any two power supply ICs 15 and any two optical ICs 7. In other words, the above relationship holds for all the power supply ICs 15 and all the optical ICs 7. Of course, the above relationship does not necessarily have to hold for all the power supply ICs 15 and all the optical ICs 7. That is, when paying attention to some even number (two or more) of the power supply ICs 15 out of the total number of power supply ICs 15 which may be odd or even, and some even number (two or more) of the optical ICs 7 out of the total number of optical ICs 7 which may be odd or even, the above relationship may hold.

[0183] In the illustrated example, (at least) two power supply ICs 15 are located on both sides (-x side or +x side) of the arrangement of three or more (all in the illustrated example) optical ICs 7. As a result, for example, in each conductor layer 625, the lengths of all the wiring patterns 25w tend to become longer (or shorter) in order as the corresponding optical IC 7 is located on one side in the x direction. However, as described in the explanation of the first embodiment, the positions of the power supply IC 15 and the optical IC 7 are arbitrary. For example, the power supply IC 15 may be located within the range of the arrangement of a plurality of optical ICs 7. As can be understood from this, it is not necessarily the case that the lengths of all the wiring patterns 25w become longer (or shorter) in order.

[0184] In the illustrated example, at least two (and / or all) of the power supply ICs 15 and at least two (and / or all) of the optical ICs 7 are arranged symmetrically with respect to the symmetry axis A1. Therefore, as described in the explanation of the fifth embodiment (FIG. 12), it is facilitated to make the first conductor layer 625A and the second conductor layer 625B have a symmetric configuration. Thereby, for example, the design burden is reduced. Of course, the arrangement of the plurality of ICs does not have to be symmetric.

[0185] In the illustrated example, two or more power supply ICs 15 and two or more optical ICs 7 are mounted on the same surface (the first surface 5a). However, these multiple ICs may be dispersed on the first surface 5a and the second surface 5b. For example, similar to the fifth embodiment (FIG. 12), a plurality of optical ICs 7 (7A to 7D) may be mounted on the first surface 5a, and a plurality of power supply ICs 15 (15A and 15B) may be mounted on the second surface 5b. Also, a plurality of optical ICs 7 (7A to 7D) may be mounted on the first surface 5a, the first power supply IC 15 may be mounted on the first surface 5a, and the second power supply IC 15 may be mounted on the second surface 5b. Note that even in a mode where such two power supply ICs 15 are mounted on different surfaces, it is possible to arrange the two power supply ICs 15 symmetrically left and right in a planar perspective to obtain the effect of symmetry.

[0186] As described above, in addition to the first power supply IC 15A, the optical module 601 may further include a second power supply IC that supplies power to the first optical IC 7A and the second optical IC 7B. The module substrate 5F may have first to fourth wirings (for example, wirings 21AA, 21AB, 21BA, and 21BB). The wiring 21AA connects the first power supply IC 15A and the first optical IC 7A. The wiring 21AB connects the first power supply IC 15A and the second optical IC 7B. The wiring 21BA connects the second power supply IC 15B and the first optical IC 7A. The wiring 21BB connects the second power supply IC 15B and the second optical IC 7B.

[0187] Let the lengths of the four wirings 21AA, 21AB, 21BA, and 21BB be L1, L2, L3, and L4. Also, let the resistance values of these four wirings 21 be R1, R2, R3, and R4. At this time, as described above, L2 > L1 and |R2 - R1| < (L2 - L1) / L1 × R1 may hold. Further, L3 > L4 and |R3 - R4| < (L3 - L4) / L4 × R4 may hold.

[0188] In this case, for example, in a configuration where two power supply ICs 15 and two optical ICs 7 are arranged symmetrically, the power drop amounts of the power supplied from the two power supply ICs 15 can be made closer to each other. As a result, for example, the probability that the optical IC 7 malfunctions is reduced. Also, from another perspective, it becomes possible to realize the above-described symmetrical arrangement so as not to cause a malfunction. Although the symmetrical arrangement has been taken as an example for easy understanding, the same can be said for an asymmetrical arrangement that approximates symmetry.

[0189] The four wirings 21AA, 21AB, 21BA, and 21BB may each have a wiring pattern 25w and at least one via conductor 39. Each wiring pattern 25w is located inside the module substrate 5F and is connected to the first power supply IC 15A or the second power supply IC 15B. Each via conductor 39 electrically connects one of the wiring patterns 25w and the first optical IC 7A or the second optical IC 7B. The width of the wiring pattern 25w (second wiring pattern) of the wiring 21AB may be made wider than the width of the wiring pattern 25w (first wiring pattern) of the wiring 21AA. The number of via conductors 39 (second via conductors) of the wiring 21AB may be made larger than the number of via conductors 39 (first via conductors) of the wiring 21AA. The width of the wiring pattern 25w (third wiring pattern) of the wiring 21BA may be made wider than the width of the wiring pattern 25w (fourth wiring pattern) of the wiring 21BB. The number of via conductors 39 (third via conductors) of the wiring 21BA may be made larger than the number of the wiring 21BB (fourth via conductors).

[0190] In this case, for example, by adjusting both the width of the wiring pattern 25w and the number of via conductors 39, the adjustable range of the resistance value is wide. Also, regarding the design conditions (the length of the wiring 21, the width of the wiring pattern 25w, and the number of via conductors 39), since the magnitude relationship between the wirings 21AA and 21AB related to the first power supply IC 15A is opposite to the magnitude relationship between the wirings 21BA and 21BB related to the second power supply IC 15B, the conditions of the former two wirings 21 and the conditions of the latter two wirings 21 can be made closer (symmetrical). As a result, for example, the design is simplified.

[0191] The technology according to the present disclosure is not limited to the above embodiments and may be implemented in various modes.

[0192] For example, in addition to the fiber bundle, wiring for transmitting an electrical signal may extend from the optical IC. In this case, separate connectors may be provided for the fiber bundle and the wiring, or a common connector may be provided. In other words, the optical connector may also serve as an electrical connector. Further, as mentioned in the description of the embodiment, the optical IC may correspond to one channel. In other words, instead of a fiber bundle, a single optical fiber may extend. Furthermore, the optical IC may not have an extending optical fiber.

Explanation of Reference Numerals

[0193] 1... optical module, 5... module substrate, 7... optical IC, 7A... first optical IC, 7B... second optical IC, 15... power supply IC, 15A... first power supply IC, 21... wiring, 21A... first wiring, 21B... second wiring.

Claims

1. A first optical IC and a second optical IC that perform photoelectric conversion, a first power supply IC that supplies power to the first optical IC and the second optical IC, a module substrate on which the first optical IC, the second optical IC, and the first power supply IC are located, and having, the module substrate, a first wiring connecting the first power supply IC and the first optical IC, a second wiring connecting the first power supply IC and the second optical IC, and having, when the resistance value of the first wiring is R1, the resistance value of the second wiring is R2, the length of the shortest path from the first power supply IC to the first optical IC in the first wiring is L1, and the length of the shortest path from the first power supply IC to the second optical IC in the second wiring is L2, L2 is longer than L1, and |R2 - R1| is smaller than (L2 - L1) / L1 × R1 an optical module.

2. The module substrate has a plurality of conductor layers whose positions in the thickness direction of the module substrate are different from each other, the first wiring passes through at least one of the plurality of conductor layers in the process from the power supply IC to the first optical IC, the second wiring passes through a number of conductor layers in parallel that is greater than the number of conductor layers through which the first wiring passes in the process from the power supply IC to the second optical IC The optical module according to Claim 1.

3. The plurality of conductor layers, a first conductor layer through which both the first wiring and the second wiring pass, a second conductor layer through which only the second wiring of the first wiring and the second wiring passes, and having The optical module according to Claim 2.

4. The plurality of conductor layers, a first conductor layer having a first pattern constituting the second wiring, a second conductor layer having a second pattern constituting the second wiring, and having, in a plan view, at least a part of the first pattern and at least a part of the second pattern overlap The optical module according to Claim 2.

5. The module substrate has one or more conductor layers electrically connected to the first power supply IC inside, the first wiring has at least one first via conductor electrically connecting at least one of the one or more conductor layers and the first optical IC, The second wiring has at least one second via conductor that electrically connects at least one of the one or more conductor layers to the second optical IC. The number of the second via conductors is larger than the number of the first via conductors. The optical module according to claim 1.

6. The module substrate has a first conductor layer and a second conductor layer whose positions in the thickness direction of the module substrate are different from each other. The first wiring passes only through the first conductor layer among the first conductor layer and the second conductor layer in the process from the power supply IC to the first optical IC. The second wiring passes only through the second conductor layer among the first conductor layer and the second conductor layer in the process from the power supply IC to the second optical IC. The width of the pattern constituting the second wiring of the second conductor layer is wider than the width of the pattern constituting the first wiring of the first conductor layer. The optical module according to claim 1.

7. It further has a second power supply IC that supplies power to the first optical IC and the second optical IC. The module substrate has a first surface and a second surface on the opposite side of the first surface. The first power supply IC and the first optical IC are located on the first surface. The second power supply IC and the second optical IC are located on the second surface. The optical module according to claim 1.

8. In a plan view, The first power supply IC and the second power supply IC overlap. The first optical IC and the second optical IC overlap. The optical module according to claim 7.

9. It further has a second power supply IC that supplies power to the first optical IC and the second optical IC. In a plan view, The first power supply IC and the second power supply IC are symmetrically located with respect to a predetermined axis of symmetry. The first optical IC and the second optical IC are symmetrically located with respect to the axis of symmetry. The optical module according to claim 1.

10. The module substrate has a first surface and a second surface on the opposite side of the first surface. The first optical IC and the second optical IC are located on the first surface. The first power supply IC and the second power supply IC are located on the second surface. The optical module according to claim 9.

11. It further has a second power supply IC that supplies power to the first optical IC and the second optical IC. The module substrate A third wiring connecting the second power supply IC and the first optical IC It has a fourth wiring connecting the second power supply IC and the second optical IC. When the resistance value of the third wiring is R3, the resistance value of the fourth wiring is R4, the length of the shortest path from the second power supply IC to the first optical IC in the third wiring is L3, and the length of the shortest path from the second power supply IC to the second optical IC in the fourth wiring is L4. L3 is longer than L4, and |R3 - R4| is smaller than (L3 - L4) / L4 × R4 The optical module according to claim 1.

12. The first wiring is located inside the module substrate and has a layered first wiring pattern connected to the first power supply IC, and at least one first via conductor electrically connecting the first wiring pattern and the first optical IC. The second wiring is located inside the module substrate and has a layered second wiring pattern connected to the first power supply IC, and at least one second via conductor electrically connecting the second wiring pattern and the second optical IC. The third wiring is located inside the module substrate and has a layered third wiring pattern connected to the second power supply IC, and at least one third via conductor electrically connecting the third wiring pattern and the first optical IC. The fourth wiring is located inside the module substrate and has a layered fourth wiring pattern connected to the second power supply IC, and at least one fourth via conductor electrically connecting the fourth wiring pattern and the second optical IC. The width of the second wiring pattern is wider than the width of the first wiring pattern. The number of the at least one second via conductor is larger than the number of the at least one first via conductor. The width of the third wiring pattern is wider than the width of the fourth wiring pattern. The number of the at least one third via conductor is larger than the number of the at least one fourth via conductor. The optical module according to claim 11.

13. It has a plurality of optical fibers extending in parallel with each other, a first fiber bundle extending from the first optical IC, and a plurality of optical fibers extending in parallel with each other, a second fiber bundle extending from the second optical IC, and a first optical connector located at an end of the first fiber bundle opposite to the first optical IC and connected to an external optical element so as to be capable of transmitting an optical signal. A second optical connector that is located at an end of the second fiber bundle opposite to the second optical IC and is connected to an external optical element so as to be able to transmit an optical signal; At least one control IC that is located on the module substrate and controls at least one of the first optical IC and the second optical IC; The optical module according to claim 1, further comprising:

14. The optical module according to any one of claims 1 to 13, A mother board that is electrically connected to the optical module, An optical communication device comprising:

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