Output circuit

The output circuit addresses the challenge of large circuit scale and high power consumption by using a transconductance amplifier and resistors to control current flow, achieving miniaturization and reduced power usage in open-drain transistors.

JP7704572B2Active Publication Date: 2025-07-08NISSHINBO MICRO DEVICES INC
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Patent Information

Application Number
JP2021086354
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2021-05-21
Publication Date
2025-07-08
Estimated Expiration
2041-05-21

AI Technical Summary

Technical Problem

Existing overcurrent protection circuits for open-drain transistors require a large circuit scale due to the need for current sense resistors and amplifiers, and increasing the gate width of output transistors to reduce reference current leads to increased element area.

Method used

An output circuit utilizing a first MOS transistor with a drain connected to an output terminal, a second MOS transistor for drive signal input, a transconductance amplifier with differential input stage, and resistors to control current flow through the first MOS transistor, allowing for miniaturization and reduced current consumption.

Benefits of technology

The solution enables a miniaturized output circuit with low power consumption and a simple configuration, effectively limiting the drain current of the open-drain transistor without requiring large transistor areas.

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Abstract

To provide an output circuit capable of reducing current consumption and miniaturizing an open-drain transistor with a simple configuration.SOLUTION: A current generation part 2 of an output circuit 1A has: a transconductance amplifier AMP that has gates of transistors MN1 and MN2 with different gate aspect ratios as a differential input stage 22; a resistor R1 connected between the gates of the transistors MN1 and MN2; and a transistor MP3 that supplies a current according to an output of the transconductance amplifier AMP to the resistor R1. An output drive part 3 has: a transistor MP4 whose gate and source are respectively connected with the transistor MP3 in common; and a resistor R2 and a transistor MN5 supplied with a current flowing in the transistor MP3 mirrored to the transistor MP4. The output drive part 3 supplies a gate-source voltage Vgsn6 according to a voltage drop generated at the resistor R2 and a gate-source voltage of the transistor MN5 to between a gate and a source of a transistor MN6.SELECTED DRAWING: Figure 1
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Description

Technical Field

[0001] The present invention relates to an output circuit.

Background Art

[0002] An open-drain output terminal is often used as an output of an interface when communicating between ICs with different power supply voltages, such as a microcomputer and a motor driver circuit driven thereby. The drain of the transistor used as the output terminal is pulled up by a resistor or the like to the power supply voltage. Therefore, when both ends of the resistor are short-circuited, a large current may flow through the transistor and cause damage. For this reason, an overcurrent protection circuit for limiting the current flowing through the transistor is required.

[0003] As such an overcurrent protection circuit, those described in Patent Documents 1 and 2 have been proposed. The overcurrent protection circuit of Patent Document 1 detects the current flowing through the transistor and turns off the transistor when it is determined that an overcurrent is flowing. However, the overcurrent protection circuit of Patent Document 1 has a problem that when there are a plurality of transistors, a current sense resistor for detecting the current for each of the plurality of transistors and an amplifier for determining an overcurrent are required, resulting in a large circuit scale.

[0004] The overcurrent protection circuit of Patent Document 2 uses an open-drain transistor as the output terminal as the output of the current mirror circuit and supplies a reference current to the input transistor. According to this overcurrent protection circuit, the limit current of the output transistor is determined by the gate aspect ratio of the input transistor and the output transistor and the reference current. For example, when the current ratio between the input and output of this current mirror circuit is about 100 times and the current is limited at 50 mA, the reference current is about 500 μA. When trying to reduce this reference current, it is necessary to increase the gate width of the output transistor with respect to the gate width of the input transistor, resulting in an increase in the element area of the open-drain transistor.

Prior Art Documents

Patent Documents

[0005] Patent Document 1 Japanese Patent Application Laid-Open No. 6-38363 Patent Document 2 Japanese Patent Application Laid-Open No. 2013-232760 SUMMARY OF THE INVENTION PROBLEMS TO BE SOLVED BY THE INVENTION

[0006] The present invention has been made in view of the above circumstances, and an object thereof is to provide an output circuit that has a simple configuration, a small consumption current, and can miniaturize an open-drain transistor that is an output terminal. MEANS FOR SOLVING THE PROBLEMS

[0007] In order to achieve the above object, the output circuit according to the present invention is characterized by the following [1] to [4]. [1] A first MOS transistor having a drain connected to an output terminal, drain and source each is connected to the gate of the first MOS transistor, and a second MOS transistor to which a drive signal for turning on or off the first MOS transistor is input is connected to the gate, and A transconductance amplifier having a source connected to a current source and having gates of a third MOS transistor and a fourth MOS transistor having different gate aspect ratios as a differential input stage, a first resistor, and a fifth MOS transistor that supplies a current corresponding to the output of the transconductance amplifier to the first resistor, and by connecting the first resistor between the gates of the third MOS transistor and the fourth MOS transistor, a current generation unit that causes a current determined by negative feedback by the transconductance amplifier to flow through the first resistor, ​A sixth MOS transistor having a gate and a source commonly connected to the fifth MOS transistor, a second resistor supplied with a current equal to the current flowing through the fifth MOS transistor mirrored by the sixth MOS transistor, and a seventh MOS transistor having a drain-gate diode-connected, and an output driving unit that supplies a driving voltage corresponding to the voltage drop generated in the second resistor and the gate-source voltage of the seventh MOS transistor between the gate and the source of the first MOS transistor. eh limiting the drain current of the first MOS transistor to a value according to the ratio between the first resistor and the second resistor and the ratio between the transconductance coefficient of the first MOS transistor and the transconductance coefficient of the fourth MOS transistor It is an output circuit. [2] In the output circuit according to [1], Further provided is a switch that cuts off the driving voltage supplied between the gate and the source of the first MOS transistor from the output driving unit when the drain voltage of the first MOS transistor drops, and raises the gate voltage of the first MOS transistor. It is an output circuit. [3] In the output circuit according to [2], The switch is composed of an eighth MOS transistor having a drain-source connected between the second resistor and the ground and a gate connected to the drain of the first MOS transistor. It is an output circuit. [4] In the output circuit according to any one of [1] to [3], A plurality of the first MOS transistors and the output driving units are provided. The sixth MOS transistors of the plurality of output driving units are current mirror-connected to one fifth MOS transistor. It is an output circuit.

Advantages of the Invention

[0008] According to the present invention, it is possible to provide an output circuit that can be miniaturized with a simple configuration, has a small current consumption, and is an open-drain transistor as an output terminal.

[0009] The present invention has been briefly described above. Furthermore, the details of the present invention will be further clarified by reading through the embodiments for carrying out the invention described below (hereinafter referred to as "embodiments") with reference to the attached drawings.

Brief Description of the Drawings

[0010]

Figure 1

Figure 2

Figure 3

Embodiments for Carrying out the Invention

[0011] Specific embodiments of the present invention will be described below with reference to the respective drawings.

[0012] (First Embodiment) As shown in FIG. 1, the output circuit 1A of the first embodiment includes a transistor MN6 (first MOS transistor) serving as an open-drain output terminal, a transistor MN4 (second MOS transistor), a current generation unit 2, and an output drive unit 3. The drain of the transistor MN6 is connected to the output terminal Tout, and the source is connected to the ground. Further, a resistor RL and a battery V2 are connected between the output terminal Tout and the ground.

[0013] Transistor MN4 is composed of an Nch MOSFET. The drain-source of transistor MN4 is connected between the gate-source of transistor MN6. A drive signal VIN for turning transistor MN6 on or off is supplied to the gate of this transistor MN4. When the drive signal VIN is supplied to this transistor MN4 and transistor MN4 turns on, the gate-source of transistor MN6 is short-circuited and transistor MN6 turns off. On the other hand, when the drive signal VIN of transistor MN4 is cut off and transistor MN4 turns off, a gate voltage Vgsn6 (drive voltage) described later is supplied between the gate-source of transistor MN6 and it turns on.

[0014] The current generation unit 2 is a circuit that generates a drain current Idp3 proportional to 1 / R1. Also, the output drive unit 3 is a circuit that supplies a drain current Idp4 equal to the drain current Idp3 to the resistor R2, generates a gate-source voltage Vgsn6 (drive voltage) proportional to R2 / R1, and supplies it to the gate-source of transistor MN6. Here, R1 and R2 are the resistance values of resistor R1 and resistor R2.

[0015] The current generation unit 2 includes a transconductance amplifier AMP, a transistor MP3 (fifth MOS transistor), a resistor R1 (first resistor), and a transistor MN3. The transconductance amplifier AMP has a current mirror circuit 21 composed of transistors MP1 and MP2, a differential input stage 22 composed of transistors MN1 and MN2 (third and fourth MOS transistors), and a current source I1.

[0016] The transistors MP1 and MP2 that make up the current mirror circuit 21 are composed of Pch MOSFETs. The sources of the transistors MP1 and MP2 are connected to the power supply voltage VDD supplied from the battery V1, and the gates of the transistors MP1 and MP2 are connected to each other. The gate and drain of the transistor MP2 are connected. The transistors MP1 and MP2 are provided such that the current mirror ratio is 1:1. As a result, the drain currents of the transistors MP1 and MP2 become equal.

[0017] The transistors MN1 and MN2 that make up the differential input stage 22 are composed of Nch MOSFETs. The drain of the transistor MN1 is connected to the drain of the transistor MP1, and the drain of the transistor MN2 is connected to the drain of the transistor MP2. The sources of the transistors MN1 and MN2 are connected to the current source I1. Also, the aspect ratio of the transistor MN1 > the aspect ratio of the transistor MN2. In this embodiment, the aspect ratio of the transistor MN1: the aspect ratio of the transistor MN2 is 4:1. The current source I1 is connected between the sources of the transistors MN1 and MN2 and the ground.

[0018] The transistor MP3, the resistor R1, and the transistor MN3 are connected in series with each other. The transistor MP3 is composed of a Pch MOSFET. The gate of the transistor MP3 is connected to the output of the transconductance amplifier AMP (the drains of the transistors MP1 and MN1). The source of the transistor MP3 is connected to the power supply voltage VDD. The resistor R1 is connected between the drain of the transistor MP3 and the drain of the transistor MN3 described later.

[0019] Transistor MN3 is composed of an Nch MOSFET. The gate of transistor MN3 is diode-connected to the drain, and the source is connected to the ground. This transistor MN3 is provided to set the operating voltages of transistors MN1 and MN2 that form the differential input stage 22. Any configuration that can set the operating voltages of transistors MN1 and MN2 is acceptable, and other configurations besides transistor MN3 are also possible.

[0020] The gate of transistor MN1 that forms the differential input stage 22 described above is connected to one end of resistor R1 on the ground side, and the gate of transistor MN2 is connected to one end of resistor R1 on the VDD side of the power supply. As a result, the drain current Idp3 of transistor MP3 flowing through resistor R1 can be made equal to the current determined by negative feedback by the transconductance amplifier AMP.

[0021] The transconductance amplifier AMP operates so that the same drain current flows through transistors MN1 and MN2 by the current mirror circuit 21. Also, the aspect ratio of transistor MN1 > the aspect ratio of transistor MN2. For this reason, the transconductance amplifier AMP generates a voltage drop across resistor R1, makes the gate voltage of transistor MN1 lower than the gate voltage of transistor MN2, and equalizes the drain currents Idn1 and Idn2 of transistors MN1 and MN2. That is, the transconductance amplifier AMP outputs to the gate of transistor MP3 such that the drain currents Idn1 and Idn2 of transistors MN1 and MN2 become equal to each other. As a result, as will be described later, the drain current Idp3 of transistor MP3 becomes a current proportional to 1 / R1.

[0022] The output driving unit 3 includes a transistor MP4 (the sixth MOS transistor), a resistor R2 (the second resistor), and a transistor MN5 (the seventh MOS transistor). The transistor MP4, the resistor R2, and the transistor MN5 are connected in series with each other. The transistor MP4 is composed of a Pch MOSFET. The gates and sources of the transistor MP4 and the transistor MP3 are commonly connected, and the aspect ratios of the transistors MP3 and MP4 are provided as 1:1. Thereby, the drain current Idp3 of the transistor MP3 is mirrored to the drain current Idp4 of the transistor MP4, and the drain currents Idp3 and Idp4 become equal.

[0023] The resistor R2 is connected between the drain of the transistor MP4 and the drain of the transistor MN5, and the drain current Idp4 is supplied. The transistor MN5 is composed of an Nch MOSFET. The transistor MN5 has a diode connection with its gate connected to the drain, and its source is connected to the ground.

[0024] The relational expression between the drain current Idn1 of the transistor MN1 and the gate-source voltage Vgsn1 of the transistor MN1 is represented by the following formula (1).

[0025]

Equation

[0026] Also, the relational expression between the drain current Idn2 of the transistor MN2 and the gate-source voltage Vgsn1 of the transistor MN1 is represented by the following formula (2).

[0027]

Equation

[0028] Also, as described above, the current mirror circuit 21 operates so that the same drain current flows through the transistors MN1 and MN2. As shown in the following equations (3) and (4), the drain currents Idn1 and Idn2 of the transistors MN1 and MN2 are equal to each other, and their sum is equal to the current source I1. Idn1 = Idn2 …(3) Idn1 + Idn2 = I1 …(4) Also, when the aspect ratio of the transistor MN1: the aspect ratio of the transistor MN2 is 4:1, the following equation (5) is obtained. βn1 = 4βn2 …(5)

[0029] From the above equations (1) to (5), the drain current Idp3 of the transistor MP3 can be expressed by the following equation (6). As shown in equation (6), the drain current Idp3 is proportional to 1 / R1.

[0030]

Equation

[0031] The drain current Idp4 of the transistor MP4 can be expressed by the following equation (7) where the drain current Idp3 is mirrored.

[0032]

Equation

[0033] Therefore, when the drain current Idp4 is supplied to the resistor R2, a voltage drop VR2 shown in the following equation (8) occurs across the resistor R2.

[0034]

Equation

[0035] Also, the gate-source voltage Vgsn5 of the transistor MN5 can be expressed by the following equation (9).

[0036]

Number

[0037] Also, the gate-source voltage Vgsn6 of transistor MN6 can be expressed by the following equation (10).

[0038]

Number

[0039] Here, when the gate aspect ratio of transistor MN5 is increased to increase the transconductance coefficient βn5, the gate-source voltage Vgsn5 approaches the threshold voltage Vthn and can thus be expressed by the following equation (11).

[0040]

Number

[0041] Also, the drain current Idn6 of transistor MN6 can be expressed by the following equation (12).

[0042]

Number

[0043] Therefore, from equations (11) and (12), the drain current Idn6 can be expressed by the following equation (13).

[0044]

Number

[0045] As is clear from the above formula (13), when transistors MN1, MN2, MN5, and MN6 are elements having the same threshold voltage Vthn, carrier mobility μn, and gate oxide film thickness COX, the drain current Idn6 is not affected by Vthn. That is, the drain current Idn6 can be limited to a value corresponding to the ratio of the resistors R1 and R2 and the ratio of the transconductance coefficients βn6 and βn2. In this case, the ratio of the transconductance coefficients βn6 and βn2 is the size ratio of the transistors MN2 and MN6. As a result, in the present embodiment, it is possible to limit the drain current Idn6 of the transistor MN6, which is less affected by variations in the characteristics of the transistors MN1, MN2, MN5, and MN6, variations in the absolute values of the resistors R1 and R2, and temperature variations.

[0046] According to the above configuration, since the limit current of the drain current Idn6 depends not only on the size ratio of the transistors MN2 and MN6 but also on the resistance value ratio of the resistors R2 and R1, even if the current source I1 is reduced to a small value, it is not necessary to make the size ratio of the transistors MN2 and MN6 extremely large. Thereby, it is possible to miniaturize the transistor MN6 with a simple configuration and low power consumption.

[0047] (Second Embodiment) Next, the second embodiment will be described with reference to FIG. 2. In the figure, the same reference numerals are given to the parts equivalent to the output circuit 1A shown in FIG. 1 already described in the first embodiment described above with respect to FIG. 1, and the detailed description thereof is omitted.

[0048] A major difference between the first embodiment and the second embodiment is that the output circuit 1B includes a transistor MN7 (switch, eighth MOS transistor). The transistor MN7 is composed of an Nch MOSFET. The source and drain of the transistor MN7 are connected between the transistor MN5 and the ground. Also, the gate of the transistor MN7 is connected to the drain of the transistor MN6.

[0049] The role of this transistor MN7 is to operate the overcurrent protection function only when the drain voltage of transistor MN6 is high due to a short circuit between the elements of resistor RL or the like. In the case of the first embodiment shown in FIG. 1, the gate-source voltage Vgns6 of transistor MN6 is always limited to a constant value shown in Equation (11). The ON resistance Ron6 of transistor MN6 is represented by the following Equation (14).

[0050] [Number]

[0051] As shown in Equation (14), the ON resistance Ron6 increases as the gate-source voltage Vgsn6 decreases. In the case of the first embodiment, when the resistance value of resistor RL is set small, it is conceivable that even when transistor MN6 is turned on, its drain voltage cannot be sufficiently lowered. The second embodiment shown in FIG. 2 is a circuit for improving such a point. If transistor MN6 is turned on and its drain voltage is lower than the threshold voltage Vthn of transistor MN7, transistor MN7 is turned off. As a result, the gate-source voltage Vgsn6 shown in Equation (11) supplied from the output drive unit 3 between the gate and source of transistor MN6 is cut off, and the gate voltage of transistor MN6 is pulled up to the power supply voltage VDD. Therefore, the ON resistance Ron6 represented by Equation (14) can be lowered. When the drain voltage does not decrease due to a short circuit of resistor RL or the like, transistor MN7 is turned on, and the drain current can be limited in the same manner as in the first embodiment.

[0052] Note that according to the second embodiment, the gate of transistor MN7 is connected to the drain of transistor MN6, and transistor MN7 was turned off when the drain voltage dropped below the threshold voltage Vthn. However, this is not the only case. A comparator to which the drain voltage of transistor MN6 is input may be provided, and transistor MN7 may be turned on and off by the output of the comparator.

[0053] (Third Embodiment) Next, the third embodiment will be described with reference to FIG. 3. In the figure, parts equivalent to the output circuit 1B shown in FIG. 2, which has already been described in the second embodiment above with respect to FIG. 2, are denoted by the same reference numerals, and detailed description thereof will be omitted.

[0054] A major difference between the second embodiment and the third embodiment is that the output circuit 1C controls a plurality (two in FIG. 3) of open-drain transistors MN6 and MN6B. Resistors RL and RLB are connected to the drains of the transistors MN6 and MN6B. That is, the output circuit 1C of the third embodiment includes a plurality of output driving units 3 and 3B.

[0055] In FIG. 3, transistors MP4 and MP4B that constitute a plurality of output driving units 3 and 3B are mirror-connected in parallel to the transistor MP3, and their drain currents Idp3 are supplied to resistors R2 and R2B, respectively. As a result, only one circuit is required for the current generation unit 2, and the circuit configuration becomes even simpler compared to the case where a plurality of output circuits are provided as in the conventional example.

[0056] Note that the present invention is not limited to the above-described embodiments, and can be appropriately modified, improved, etc. In addition, the material, shape, dimensions, number, arrangement location, etc. of each component in the above-described embodiments are arbitrary as long as the present invention can be achieved, and are not limited.

Description of Reference Numerals

[0057] 1A to 1C Output circuit 2 Current generation unit 3 Output driving unit 22 Differential input stage I1 Current source MP3 Transistor (fifth MOS transistor) MP4 Transistor (sixth MOS transistor) MN1 Transistor (third MOS transistor) MN2 Transistor (fourth MOS transistor) MN4 Transistor (second MOS transistor) MN5 transistor (seventh MOS transistor) MN6 transistor (first MOS transistor) MN7 transistor (eighth MOS transistor) R1 resistor (first resistor) R2 resistor (second resistor)

Claims

1. A first MOS transistor having a drain connected to an output terminal; A second MOS transistor having a drain and a source connected to a gate and a source of the first MOS transistor respectively, and a drive signal for turning on or off the first MOS transistor is input to the gate; A transconductance amplifier having a source connected to a current source, and gates of a third MOS transistor and a fourth MOS transistor having different gate aspect ratios as a differential input stage, a first resistor, and a fifth MOS transistor for supplying a current corresponding to an output of the transconductance amplifier to the first resistor. A current generation unit that causes a current determined by negative feedback by the transconductance amplifier to flow through the first resistor by connecting the first resistor between the gates of the third MOS transistor and the fourth MOS transistor; A sixth MOS transistor having a gate and a source commonly connected to the fifth MOS transistor, a second resistor supplied with a current equal to the current flowing through the fifth MOS transistor mirrored by the sixth MOS transistor, and a seventh MOS transistor having a drain-gate diode-connected, and an output drive unit that supplies a drive voltage corresponding to a voltage drop generated in the second resistor and a gate-source voltage of the seventh MOS transistor between the gate and the source of the first MOS transistor; Restricting the drain current of the first MOS transistor to a value corresponding to the ratio of the first resistor to the second resistor and the ratio of the transconductance coefficient of the first MOS transistor to the transconductance coefficient of the fourth MOS transistor; An output circuit.

2. In the output circuit according to Claim 1, Further provided with a switch for cutting off the drive voltage supplied between the gate and the source of the first MOS transistor from the output drive unit when the drain voltage of the first MOS transistor drops, and pulling up the gate voltage of the first MOS transistor; An output circuit.

3. In the output circuit according to Claim 2, The switch is composed of an eighth MOS transistor having a drain-source connected between the second resistor and the ground and a gate connected to the drain of the first MOS transistor; An output circuit.

4. In the output circuit according to any one of claims 1 to 3, a plurality of the first MOS transistors and the output driving units are provided, the sixth MOS transistors of the plurality of output driving units are current mirror-connected to one fifth MOS transistor, an output circuit.

Citation Information

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