Power circuit

Abstract

To provide a power supply circuit capable of detecting whether or not a load is in an overloaded state while having drooping characteristics of an output voltage.SOLUTION: An AC-DC converter 10 that is a power supply circuit, comprises: a transformer 22 including a primary coil L1, a secondary coil L2, and an auxiliary coil L3; a power transistor 30 for controlling an inductor current flowing in the primary coil; and a control block 26 including a feedback circuit (a control circuit 42 and a phototransistor 38) that has a first terminal VCC in which a power supply voltage based on a voltage of the auxiliary coil is applied and a second terminal FB to which a feedback voltage Vfb is applied, generates the feedback voltage having an output voltage Vout as a target level when a control IC 32 for switching a power transistor on the basis of the feedback voltage and a load current Iout flowing to a load are smaller than a predetermined value, and generates the feedback voltage for reducing the output voltage when the load current is larger than the predetermined value.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a power supply circuit.

Background Art

[0002] There is a power supply circuit that controls a transistor based on an inductor current and a feedback voltage corresponding to an output voltage to generate an output voltage from an input voltage (for example, Patent Document 1).

Prior Art Document

Patent Document

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In addition, some power supply circuits have a droop characteristic of reducing the output voltage when the load current flowing through the load exceeds a predetermined value and the load state of the power supply circuit becomes overloaded.

[0005] However, when the power supply circuit operates to reduce the output voltage according to the droop characteristic, generally, the inductor current flowing through the transistor decreases, and it becomes impossible to detect that the load state is overloaded based on the inductor current.

[0006] The present invention has been made in view of the above-described conventional problems, and an object thereof is to provide a power supply circuit that can detect whether or not the load state is overloaded while having a droop characteristic in the output voltage.

Means for Solving the Problems

[0007] A first aspect of a power supply circuit according to the present invention that solves the above-described problems is a power supply circuit that generates an output voltage at a target level from an input voltage for a load, including a transformer including a primary coil, a secondary coil, and an auxiliary coil, a transistor that controls an inductor current flowing through the primary coil, a first terminal to which a power supply voltage based on a voltage of the auxiliary coil is applied, and a second terminal to which a feedback voltage is applied, and an integrated circuit that switches the transistor based on the feedback voltage, and a feedback circuit that generates the feedback voltage that sets the output voltage to the target level when a load current flowing through the load is smaller than a predetermined value, and generates the feedback voltage that decreases the output voltage when the load current is larger than the predetermined value. The integrated circuit includes a determination circuit that determines whether to enter a first mode in which the transistor is switched or a second mode in which the switching of the transistor is stopped based on the feedback voltage, a first overload protection circuit that detects whether a state of the load is an overload based on a determination result indicating the first mode from the determination circuit and the power supply voltage, and a switching control circuit that controls the switching of the transistor based on the feedback voltage, a determination result of the determination circuit, and a detection result of the first overload protection circuit. When the first overload protection circuit detects that the state of the load is an overload, the switching control circuit stops the switching of the transistor.

Advantages of the Invention

[0008] According to the present invention, it is possible to provide a power supply circuit that can detect whether a state of a load is an overload while having a droop characteristic in an output voltage.

Brief Description of the Drawings

[0009]

Figure 1

Figure 2

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Figure 10

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Figure 15

Embodiments for Carrying Out the Invention

[0010] From the description in this specification and the accompanying drawings, at least the following matters become clear. =====This Embodiment===== FIG. 1 is a diagram showing an example of the configuration of AC-DC converter 10 according to an embodiment of the present invention. AC-DC converter 10 is a power supply circuit that generates output voltage Vout from the AC voltage Vac of a commercial power supply, and has a droop characteristic in output voltage Vout.

[0011] <<<Overview of AC-DC Converter 10>>> The AC-DC converter 10 is composed of a full-wave rectifier circuit 20, capacitors 21, 24, 41, a transformer 22, a resistor 23, diodes 25, 27, 28, 40, a control block 26, and a control circuit 42. The load 11 is connected to the AC-DC converter 10 and is a load (for example, a light-emitting diode) that is powered by the AC-DC converter 10, to which the output voltage Vout is applied. Note that the current flowing through the load 11 is defined as the load current Iout.

[0012] The full-wave rectifier circuit 20 full-wave rectifies a predetermined AC voltage Vac, which is the input voltage, and applies it as the voltage Vrec1 to the primary coil L1 of the transformer 22, the capacitors 21, 24, and the resistor 23. The capacitor 21 smoothes the voltage Vrec1. The AC voltage Vac is, for example, a voltage with an effective value of 100 to 240 V and a frequency of 50 to 60 Hz.

[0013] The transformer 22 has a primary coil L1 provided on the input side, a secondary coil L2 magnetically coupled to the primary coil L1, and an auxiliary coil L3 magnetically coupled to the secondary coil. Here, the secondary coil L2 and the auxiliary coil L3 are wound such that the polarities of the voltages generated in the secondary coil L2 and the auxiliary coil L3 are opposite to the voltage generated in the primary coil L1. Also, the primary coil L1 and the auxiliary coil L3 are provided on the input side (primary side), and the secondary coil L2 is provided on the output side (secondary side).

[0014] The resistor 23, the capacitor 24, and the diode 25 constitute a snubber circuit. The snubber circuit suppresses the surge voltage generated by the leakage inductance of the primary coil L1 when the power transistor 30 (described later) is turned off, and prevents the destruction of the power transistor 30. The snubber circuit is also connected in parallel with the primary coil L1. The anode of the diode 25 is connected to the high-potential side of the power transistor 30 described later, and the cathode is connected to the resistor 23. Further, the capacitor 24 is connected in parallel with the resistor 23.

[0015] The control block 26 controls the voltage generated in the secondary coil L2 of the transformer 22 by controlling the inductor current IL1 flowing through the primary coil L1 on the primary side of the transformer 22. As a result, an output voltage Vout is generated on the secondary side of the transformer 22.

[0016] The diodes 27 and 28 full-wave rectify the AC voltage Vac to generate a rectified voltage Vrec2. The rectified voltage Vrec2 is applied to the terminal VH of a control IC32 (described later) included in the control block 26.

[0017] The diode 40 rectifies the inductor current IL2 from the secondary coil L2 of the transformer 22 and supplies it to the capacitor 41. Since the capacitor 41 is charged by the current from the diode 40, an output voltage Vout is generated across the terminals of the capacitor 41.

[0018] The control circuit 42 has, for example, a light-emitting diode 53 (not shown in FIG. 1) described later, and generates a feedback voltage Vfb (described later) together with a phototransistor 38 (described later) based on the load current Iout and the output voltage Vout. The details of the control circuit 42 will be described later.

[0019] <<<Overview of Control Block 26>>> The control block 26 is a circuit block for controlling the AC-DC converter 10. The control block 26 includes a power transistor 30, resistors 31 and 34, a control IC32, capacitors 33, 35 and 37, a diode 36, and a phototransistor 38.

[0020] The power transistor 30 is an NMOS transistor for controlling the power supplied to the load 11, and controls the inductor current IL1 flowing through the primary coil. In this embodiment, the power transistor 30 is assumed to be a MOS (Metal Oxide Semiconductor) transistor, but it is not limited thereto. The power transistor 30 may be, for example, a bipolar transistor or the like as long as it is a transistor capable of controlling power.

[0021] Resistor 31 is a resistor for detecting the inductor current IL1 (i.e., the current flowing through the power transistor 30) flowing through the primary coil L1 when the power transistor 30 is on. One end of the resistor 31 is connected to the source electrode of the power transistor 30, and the other end is grounded.

[0022] The control IC 32 is an integrated circuit that switches the power transistor 30 to generate the output voltage Vout. Specifically, the control IC 32 switches the power transistor 30 based on the inductor current IL1 and the feedback voltage Vfb.

[0023] Although the details of the control IC 32 will be described later, the control IC 32 is provided with terminals CS, FB, OUT, VCC, and VH. Note that the gate electrode of the power transistor 30 is connected to the terminal OUT, and the power transistor 30 is switched by the drive voltage Vg. In addition, although the actual control IC 32 is provided with other terminals, they are omitted for convenience of explanation.

[0024] The capacitor 33 is provided between the terminal CS and the ground, and the voltage of the resistor 31 generated by the flow of the inductor current IL1 is applied via the resistor 34. Note that the capacitor 33 and the resistor 34 constitute a low-pass filter to stabilize the voltage Vcs at the terminal CS.

[0025] The capacitor 35 is provided between the terminal VCC and the ground. Also, the diode 36 has its anode connected to the auxiliary coil L3 and its cathode connected to the terminal VCC.

[0026] Also, the voltage Va generated in the auxiliary coil L3 is applied to the capacitor 35 via the diode 36. Note that a capacitor 35 to which a voltage based on the voltage Va of the auxiliary coil L3 is applied when the power transistor 30 is off is connected to the terminal VCC, and this voltage becomes the power supply voltage Vcc. That is, the power supply voltage Vcc is applied to the capacitor 35.

[0027] Also, when the output voltage Vout is maintained at the target level Vout_target, the level of the power supply voltage Vcc is maintained higher than a predetermined level Vclph described later. Note that the terminal VCC corresponds to the "first terminal", and the capacitor 35 corresponds to the "capacitor".

[0028] The capacitor 37 is provided between the terminal FB and the ground to stabilize the voltage Vfb of the terminal FB. Also, the voltage Vfb is a feedback voltage corresponding to the output voltage Vout and is applied to the terminal FB.

[0029] Note that although details will be described later, the control IC32 turns on the power transistor 30 at a frequency corresponding to the voltage Vfb. And when the voltage Vcs exceeds the voltage Vfb while the power transistor 30 is on, the control IC32 turns off the power transistor 30. Note that the terminal FB corresponds to the "second terminal", and the terminal CS corresponds to the "third terminal".

[0030] The photo transistor 38 is provided between the terminal FB and the ground and receives light from a light emitting diode 53 (described later). Also, when the intensity of the light emitted by the light emitting diode 53 becomes stronger, the photo transistor 38 allows a larger sink current Ia to flow to the terminal FB. As a result, although details will be described later, the feedback voltage Vfb decreases.

[0031] <<<Drop characteristics of the output voltage Vout output from the AC-DC converter 10>>> Although details will be described later, the AC-DC converter 10 of the present embodiment supplies power to a load 11 (for example, a light emitting diode). And when a large load current Iout flows through the load 11 (that is, the state of the load 11 becomes a heavy load), if the AC-DC converter 10 continues to output the output voltage Vout at the target level Vout_target, the load 11 may be damaged. In such a case, generally, the AC-DC converter 10 may give the output voltage Vout a droop characteristic.

[0032] As shown in FIG. 2, when the load current Iout is less than a predetermined value Iout_limit, the AC-DC converter 10 maintains the output voltage Vout at the target level Vout_target. In this case, the AC-DC converter 10 operates in the constant voltage (CV) mode.

[0033] On the other hand, when the load current Iout is greater than the predetermined value Iout_limit, the AC-DC converter 10 reduces the output voltage Vout. In this case, the AC-DC converter 10 operates in the constant current (CC) mode.

[0034] <<<Overview of Control Circuit 42>>> As shown in FIG. 3, the control circuit 42 is a circuit used to realize the droop characteristic as shown in FIG. 2. Therefore, the control circuit 42 includes a constant voltage monitoring circuit 50 that operates in the constant voltage mode and a constant current monitoring circuit 51 that operates in the constant current mode. The configuration and operation of each circuit will be described below.

[0035] <<<Configuration of Control Circuit 42>>> Hereinafter, with reference to FIG. 3, the specific configuration of the control circuit 42 will be described. The control circuit 42 controls a photocoupler composed of a light emitting diode 53 and a phototransistor 38 based on the output voltage Vout and the load current Iout.

[0036] Specifically, in the constant voltage mode, as the output voltage Vout increases, the control circuit 42 increases the light emitted by the light emitting diode 53. Also, in the constant current mode, when the load current Iout is greater than the predetermined value Iout_limit, the control circuit 42 increases the light emitted by the light emitting diode 53 so as to reduce the output voltage Vout.

[0037] The control circuit 42 is composed of a constant voltage monitoring circuit 50, a constant current monitoring circuit 51, a resistor 52, and a light emitting diode 53. Although details will be described later, when the AC-DC converter 10 operates in the constant voltage mode, the control circuit 42 controls the light emitted by the light emitting diode 53 based on the voltage Vx applied by the constant voltage monitoring circuit 50 to the cathode of the light emitting diode 53.

[0038] On the other hand, when the AC-DC converter 10 operates in the constant current mode, the control circuit 42 controls the light emitted by the light emitting diode 53 based on the voltage Vy applied by the constant current monitoring circuit 51 to the cathode of the light emitting diode 53. Also, here, when the voltage at the cathode of the light emitting diode 53 is defined as voltage Vz, the voltage Vz is determined according to the lower of the voltage Vx or the voltage Vy.

[0039] ==Constant Voltage Monitoring Circuit 50== When the AC-DC converter 10 operates in the constant voltage mode, the constant voltage monitoring circuit 50 controls the light emitted by the light emitting diode 53 so that the output voltage Vout becomes the target level Vout_target.

[0040] The constant voltage monitoring circuit 50 is composed of resistors 60, 61, 63, 64, an operational amplifier 62, and a diode 65. Resistors 60, 61 form a voltage dividing circuit and are connected in series between a line LN0 to which a voltage Vdd0 supplied from a power source (not shown) is applied and a line LN1 to which the voltage on the low potential side of the load 11 is applied. Also, the voltage generated at the connection point of resistors 60, 61 is applied to the non-inverting input terminal of the operational amplifier 62.

[0041] Also, resistors 63, 64 form a voltage dividing circuit and are connected in series between a line LN2 to which the output voltage Vout is applied and the line LN1. Also, the voltage generated at the connection point of resistors 63, 64 is applied to the inverting input terminal of the operational amplifier 62.

[0042] The cathode of the diode 65 is connected to the output of the operational amplifier 62, and the anode is connected to the cathode of the light emitting diode 53.

[0043] The operation of the constant voltage monitoring circuit 50 configured as described above will be briefly described. For example, when the state of the load 11 becomes a light load and the output voltage Vout increases, the voltage generated at the connection point of the resistors 63 and 64 increases and becomes higher than the voltage generated at the connection point of the resistors 60 and 61. As a result, the operational amplifier 62 outputs a negative voltage Vx.

[0044] Note that "the state of the load 11 is a light load" refers to a case where, for example, the current value of the load current Iout flowing through the load 11 is less than a predetermined value (for example, 1 A). Also, "the state of the load 11 is a heavy load" refers to a case where, for example, the current value of the load current Iout flowing through the load 11 is greater than a predetermined value (for example, 1 A). Note that the predetermined value (for example, 1 A) in this case is smaller than the predetermined value Iout_limit.

[0045] Also, "the state of the load 11 is a no-load" refers to a case where the current value of the load current Iout flowing through the load 11 is extremely small or 0 (zero) A. Also, although the current value of the load current Iout for determining whether the state of the load 11 is a heavy load or a light load has been described as, for example, 1 A, this current value can be set variously.

[0046] When the voltage Vx drops by the forward voltage of the diode 65 from the voltage Vz, the voltage Vz drops as the voltage Vx further drops.

[0047] On the other hand, for example, when the state of the load 11 becomes a heavy load and the output voltage Vout decreases, the voltage generated at the connection point of the resistors 63 and 64 decreases and becomes lower than the voltage generated at the connection point of the resistors 60 and 61. As a result, the operational amplifier 62 outputs a positive voltage Vx.

[0048] When the AC-DC converter 10 operates in the constant voltage mode, if the constant voltage monitoring circuit 50 operates as described above, the light from the light emitting diode 53 changes according to the output voltage Vout, and the feedback voltage Vfb also changes. And although details will be described later, when the feedback voltage Vfb changes according to the output voltage Vout, the AC-DC converter 10 can maintain the output voltage Vout at the target level Vout_target.

[0049] ==Constant Current Monitoring Circuit 51== When the AC-DC converter 10 operates in the constant current mode, when the load current Iout becomes larger than the predetermined value Iout_limit, the constant current monitoring circuit 51 strengthens the light emitted by the light emitting diode 53 so as to keep the load current Iout at the predetermined value Iout_limit and lower the output voltage Vout.

[0050] The constant current monitoring circuit 51 is composed of resistors 70, 72, 73, 75, capacitor 71, operational amplifier 74, and diode 76.

[0051] One end of the resistor 70 is connected to the line LN0, and the other end is connected to one end of the capacitor 71. Also, the other end of the capacitor 71 is connected to the line LN3 to which the ground voltage is applied.

[0052] The resistors 72, 73 form a voltage dividing circuit and are connected between the connection point of the resistor 70 and the capacitor 71 and the line LN3. The voltage generated at the connection point of the resistors 72, 73 is applied to the non-inverting input terminal of the operational amplifier 74. Also, the resistor 75 is connected between the line LN1 and the line LN3.

[0053] The inverting input terminal of the operational amplifier 74 is connected to the line LN1. The cathode of the diode 76 is connected to the output of the operational amplifier 74, and the anode is connected to the cathode of the light emitting diode 53.

[0054] The operation of the constant current monitoring circuit 51 configured as described above will be briefly described. When the load current Iout increases and the voltage generated across the resistor 75 increases, and the voltage at the inverting input terminal of the operational amplifier 74 becomes higher than the voltage at the connection point of the resistors 72 and 73, the operational amplifier 74 outputs a negative voltage Vy.

[0055] And when the voltage Vz is higher than the voltage obtained by adding the forward voltage of the diode 76 to the voltage Vy, as the voltage Vy further decreases, the voltage Vz decreases.

[0056] On the other hand, for example, when the load current Iout is smaller than a predetermined value Iout_limit, the output voltage Vout maintains the target level Vout_target. In this case, the voltage generated across the resistor 75 becomes low, and as a result, the voltage at the inverting input terminal of the operational amplifier 74 becomes lower than the voltage generated at the connection point of the resistors 72 and 73. Thereby, the operational amplifier 74 outputs a positive voltage Vy.

[0057] When the AC-DC converter 10 operates in the constant current mode, if the constant current monitoring circuit 51 operates as described above, the light from the light emitting diode 53 changes according to the load current Iout, and the feedback voltage Vfb also changes. And although details will be described later, when the feedback voltage Vfb changes according to the load current Iout, the AC-DC converter 10 can maintain the load current Iout so that the load current Iout does not become larger than the predetermined value Iout_limit.

[0058] ==Resistor 52, Light Emitting Diode 53== The resistor 52 is a resistor that limits the current flowing through the light emitting diode 53. One end is connected to the line LN0, and the other end is connected to the anode of the light emitting diode 53. The light emitting diode 53 is an element that emits light with an intensity corresponding to the voltage Vz, and together with the phototransistor 38, constitutes a photocoupler.

[0059] As described above, the light-emitting diode 53 emits stronger light as the voltage Vz is lower. Assuming that the forward voltages of the diodes 65 and 76 are the same, the voltage Vz is determined according to the lower of the voltage Vx or the voltage Vy.

[0060] In this embodiment, when the load current Iout is smaller than a predetermined value Iout_limit, the control circuit 42 is configured such that the voltage Vx is lower than the voltage Vy. Thereby, when the load current Iout is smaller than the predetermined value Iout_limit, the control circuit 42 controls the phototransistor 38 to generate the feedback voltage Vfb so that the output voltage Vout becomes the target level Vout_target.

[0061] Also, when the load current Iout is larger than a predetermined value Iout_limit, the control circuit 42 is configured such that the voltage Vy is lower than the voltage Vx. Therefore, when the load current Iout is larger than the predetermined value Iout_limit, the control circuit 42 controls the phototransistor 38 to generate the feedback voltage Vfb so as to lower the output voltage Vout.

[0062] As described above, the control circuit 42 controls the phototransistor 38 to generate the feedback voltage Vfb in the phototransistor 38, and the control IC 32 operates based on the feedback voltage Vfb, whereby the AC-DC converter 10 realizes the droop characteristic shown in FIG. 2. Details of the control method of the output voltage Vout will be described later. Also, the control circuit 42 and the phototransistor 38 correspond to a "feedback circuit".

[0063] <<<Configuration of Control IC32>>> FIG. 4 is a diagram showing an example of the configuration of the control IC 32. The control IC 32 switches the power transistor 30 to generate the output voltage Vout. Specifically, the control IC 32 switches the power transistor 30 based on the voltage Vcs corresponding to the inductor current IL1 and the feedback voltage Vfb.

[0064] The control IC 32 is composed of a startup circuit 80, a low-voltage protection circuit (UVLO) 81, a startup control circuit 82, a PMOS transistor 83, a resistor 84, a comparator 85, overload protection circuits (OLP) 86, 87, and a switching control circuit 88.

[0065] ==Startup Circuit 80== For example, when the low-voltage protection circuit 81 (described later) outputs a signal rst that resets the control IC 32 (a signal at a high level (hereinafter referred to as the "H" level)), the startup circuit 80 outputs a current to charge the capacitor 35 in FIG. 1 via the terminal VCC based on the voltage Vh applied to the terminal VH (i.e., the rectified voltage Vrec2).

[0066] Note that "resetting the control IC 32" means stopping the operation (here, switching) of the control IC based on the "H" level signal rst so that the control IC 32 does not malfunction when the level of the power supply voltage Vcc is lower than a predetermined level Voff.

[0067] Specifically, when the level of the voltage Vcc becomes lower than the predetermined level Voff (for example, at the startup of the control IC 32), although the details will be described later, the low-voltage protection circuit 81 outputs a reset signal rst at the "H" level. In this case, the startup circuit 80 outputs a current based on the "H" level reset signal rst. Also, the startup circuit 80 outputs a current based on the "H" level signal startup from the startup control circuit 82 (described later).

[0068] As shown in FIG. 5, the startup circuit 80 is composed of a J-FET 100, a resistor 101, a PMOS transistor 102, an operational amplifier 103, and an OR element 104.

[0069] For the J-FET 100, the gate electrode and the source electrode are connected to each other, it operates like a diode, and it conducts current according to the voltage Vh. Also, the resistor 101 limits the current from the J-FET 100.

[0070] The PMOS transistor 102 is provided between the resistor 101 and the terminal VCC, and changes its on-resistance according to the output voltage of the operational amplifier 103.

[0071] For the operational amplifier 103, the voltage at the connection point of the resistor 101 and the PMOS transistor 102 is applied to the inverting input terminal, and the reference voltage Vstartup is applied to the non-inverting input terminal. Also, when the signal from the OR element 104 is at the "H" level, the operational amplifier 103 is turned on, and when the signal from the OR element 104 is at the low level (hereinafter referred to as the "L" level), the operational amplifier 103 is turned off. Note that the OR element 104 outputs a signal based on the signal rst and the signal startup.

[0072] Also, when the operational amplifier 103 is turned on, the operational amplifier 103 changes the on-resistance of the PMOS transistor 102 in order to set the voltage at the connection point of the resistor 101 and the PMOS transistor 102 to the reference voltage Vstartup. In this case, the startup circuit 80 outputs a current for charging the capacitor 35 via the terminal VCC.

[0073] On the other hand, when the operational amplifier 103 is turned off, the PMOS transistor 102 is turned off. Therefore, when the operational amplifier 103 is turned off, the current from the J-FET 100 is not output from the startup circuit 80. Note that the startup circuit 80 corresponds to a "charging circuit".

[0074] ==Low-Voltage Protection Circuit (UVLO) 81== Returning to FIG. 4, the low-voltage protection circuit 81 will be described below. The low-voltage protection circuit 81 outputs the signal rst based on the power supply voltage Vcc. Specifically, when the level of the voltage Vcc becomes a predetermined level Voff, the low-voltage protection circuit 81 outputs an "H" level signal rst to stop the switching of the power transistor 30.

[0075] On the other hand, when the level of the voltage Vcc becomes a predetermined level Von higher than the predetermined level Voff during the operation of the startup circuit 80, the low-voltage protection circuit 81 outputs an "L" level signal rst to permit the switching of the power transistor 30.

[0076] Also, when a signal rst of "H" level is output, the switching control circuit 88 (described later) stops the switching of the power transistor 30. On the other hand, when a signal rst of "L" level that permits switching is output, the switching control circuit 88 controls the switching of the power transistor 30 based on the feedback voltage Vfb and a signal Stop (described later). Also, a predetermined level Voff is lower than a predetermined level Vbml (described later).

[0077] Note that the low voltage protection circuit 81 corresponds to the "protection circuit", the predetermined level Voff corresponds to the "third voltage", the predetermined level Von corresponds to the "fourth voltage", the signal rst of "H" level corresponds to the "stop signal", and the signal rst of "L" level corresponds to the "permission signal".

[0078] ==Startup control circuit 82== The startup control circuit 82 controls the startup circuit 80. Specifically, when the overload protection circuit 86 (described later) or the overload protection circuit 87 (described later) detects an overload and outputs a signal olp_o (described later) of "H" level indicating the overload, it outputs a signal startup based on the voltage Vcc.

[0079] In this case, when the voltage Vcc is between a predetermined level Vclph and a predetermined level Vclpl lower than the predetermined level Vclph, the startup control circuit 82 outputs a signal startup. Specifically, when the level of the power supply voltage Vcc reaches the predetermined level Vclpl, the startup control circuit 82 outputs a signal startup of "H" level to turn on the operational amplifier 103 in FIG. 5. As a result, since the capacitor 35 in FIG. 1 is charged by the startup circuit 80, the level of the power supply voltage Vcc rises from the predetermined level Vclpl.

[0080] On the other hand, when the level of the power supply voltage Vcc reaches a predetermined level Vclph, the startup control circuit 82 outputs a "L" level signal startup to turn off the operational amplifier 103. As a result, when the control IC32 operating with the power supply voltage Vcc consumes power, the level of the power supply voltage Vcc drops from the predetermined level Vclph. Note that how the predetermined levels Vclph and Vclpl are generated will be described later.

[0081] ==PMOS Transistor 83== When the SR flip-flop 95 (described later) outputs an "H" level signal оlp_о indicating an overload, the PMOS transistor 83 turns off and stops applying the voltage Vdd1 from an internal power supply (not shown) to the resistor 84.

[0082] Therefore, for the PMOS transistor 83, the voltage Vdd1 is applied to the source electrode, and the signal оlp_о is input to the gate electrode. Also, the drain electrode of the PMOS transistor 83 is connected to the resistor 84.

[0083] When an overload is detected, in order to stop the switching of the power transistor 30, it is no longer necessary for the oscillation circuit 90 (described later) to output the oscillation signal osc_out. In this embodiment, when an overload is detected, the PMOS transistor 83 turns off, so the feedback voltage Vfb becomes the ground voltage. As a result, although details will be described later, the oscillation circuit 90 reduces the frequency Fsw of the oscillation signal osc_out. Thereby, the power consumption of the control IC32 after an overload is detected is reduced.

[0084] ==Resistor 84== One end of the resistor 84 is connected to the drain electrode of the PMOS transistor 83, and the other end is connected to the terminal FB. Also, a sink current Ia flows through the resistor 84, and based on the voltage generated in the resistor 84, the feedback voltage Vfb is generated.

[0085] Specifically, when the intensity of the light from the light emitting diode 53 increases, the photo transistor 38 passes a large sink current Ia to the terminal FB. Therefore, the voltage generated across the resistor 84 increases, and the feedback voltage Vfb decreases.

[0086] ==Comparator 85== The comparator 85 determines whether it is in a first mode of switching the power transistor 30 based on the feedback voltage Vfb or a second mode of stopping the switching of the power transistor 30.

[0087] Specifically, when the level of the feedback voltage Vfb is lower than a predetermined level Vref_off, the comparator 85 outputs a "L" level signal Stop to stop the switching to the buffer 96 (described later). On the other hand, when the level of the feedback voltage Vfb is higher than the predetermined level Vref_off, the comparator 85 outputs a "H" level signal Stop to cause the buffer 96 to perform switching. Note that the comparator 85 corresponds to a "determination circuit", and the signal Stop corresponds to a "determination result".

[0088] ==Overload protection circuit (OLP) 86== The overload protection circuit 86 detects whether the load 11 is in an overload state when the AC-DC converter 10 operates in the constant voltage mode. Specifically, in the constant voltage mode, the overload protection circuit 86 detects the state of the load 11 based on the voltage Vcs and the power supply voltage Vcc. The details of the overload protection circuit 86 will be described later.

[0089] ==Overload protection circuit (OLP) 87== The overload protection circuit 87 detects whether the load 11 is in an overload state when the AC-DC converter 10 operates in the constant current mode. Specifically, in the constant current mode, the overload protection circuit 87 detects the state of the load 11 based on the power supply voltage Vcc.

[0090] When the state of the load 11 is an overload, the overload protection circuit 87 outputs a signal set13 at the "H" level indicating an overload. The details of the overload protection circuit 87 will be described later.

[0091] ==Switching control circuit 88== The switching control circuit 88 generates and amplifies a drive signal and outputs a drive voltage Vg. Specifically, the switching control circuit 88 outputs the drive voltage Vg based on the feedback voltage Vfb, the determination result of the comparator 85, and the signal оlp_о from the SR flip-flop 95 (described later). Then, the switching control circuit 88 Vq1 amplifies the drive signal and controls the switching of the power transistor 30 with the drive voltage Vg.

[0092] The switching control circuit 88 is configured to include an oscillation circuit 90, comparators 91, 92, an OR element 93, SR flip-flops 94, 95, and a buffer 96.

[0093] ===Oscillation circuit 90=== The oscillation circuit 90 generates the timing for turning on the power transistor 30. Specifically, the oscillation circuit 90 outputs an oscillation signal osc_out based on the feedback voltage Vfb. Also, the frequency Fsw of the oscillation signal оsc_оut is usually set to a predetermined frequency Fsw_norm (e.g., 100 kHz) as shown in FIG. 6, and is set such that the frequency Fsw decreases as the feedback voltage Vfb decreases.

[0094] ===Comparator 91=== Returning to FIG. 4, the comparator 91 generates the timing for turning off the power transistor 30. Specifically, when the power transistor 30 is on and the voltage Vcs becomes equal to the feedback voltage Vfb, the comparator 91 outputs a signal Vr at the "H" level for turning off the power transistor 30.

[0095] ===Comparator 92=== Comparator 92 limits the inductor current IL1 so that the inductor current IL1 flowing through the power transistor 30 does not become an overcurrent. Specifically, when the voltage Vcs corresponding to the inductor current IL1 is greater than a predetermined level Vref_ocp, that is, when the inductor current IL1 becomes an overcurrent, comparator 92 outputs a signal ocp_o of "H" level to turn off the power transistor 30. On the other hand, when the inductor current IL1 does not become an overcurrent, comparator 92 outputs a signal ocp_o of "L" level.

[0096] ===OR element 93=== When comparators 91 and 92 output a signal Vr of "H" level or a signal ocp_o of "H" level, OR element 93 outputs a signal to turn off the power transistor 30.

[0097] ===SR flip - flop 94=== SR flip - flop 94 outputs a drive signal Vq1. Specifically, when the oscillation circuit 90 outputs an oscillation signal osc_out of "H" level to turn on the power transistor 30, SR flip - flop 94 outputs a signal Vq1 of "H" level to turn on the power transistor 30. On the other hand, when OR element 93 outputs a signal of "H" level, SR flip - flop 94 outputs a signal Vq1 of "L" level to turn off the power transistor 30.

[0098] <<<Explanation of the operation of generating the drive signal Vq1>>> Figure 7 is a diagram for explaining the operation of generating the drive signal Vq1. Referring to Figure 7, when the feedback voltage Vfb is high and the frequency Fsw of the oscillation signal osc_out is a predetermined frequency Fsw_norm, the switching control circuit 88 explains the operation of generating the drive signal Vq1.

[0099] Note that the switching control circuit 88 generates the drive signal Vq1 to control the ratio of the on - period of the power transistor 30 with respect to the period determined by the frequency Fsw of the oscillation signal osc_out (that is, PWM control).

[0100] At time t0, when the oscillation circuit 90 outputs an oscillation signal osc_out at the "H" level, the SR flip-flop 94 outputs a drive signal Vq1 at the "H" level to turn on the power transistor 30.

[0101] When the power transistor 30 is turned on and the voltage Vcs reaches the feedback voltage Vfb at time t1, the comparator 91 outputs a signal Vr at the "H" level. As a result, the SR flip-flop 94 outputs a drive signal Vq1 at the "L" level to turn off the power transistor 30. Since the current flowing through the power transistor 30 becomes 0 according to this "L" level drive signal Vq1, the voltage Vcs also becomes the ground voltage.

[0102] At time t2 when a time corresponding to a period according to the predetermined frequency Fsw_norm has elapsed from time t0, the oscillation circuit 90 outputs an oscillation signal osc_out at the "H" level again. Thereafter, the same operation continues.

[0103] Returning to FIG. 4, the SR flip-flop 95 and the buffer 96 of the switching control circuit 88 will be described.

[0104] ===SR Flip-Flop 95=== The SR flip-flop 95 outputs a signal оlp_o based on signals from the overload protection circuits 86, 87. When the overload protection circuit 86 outputs a signal set2 at the "H" level indicating overload, or when the overload protection circuit 87 outputs a signal set13 at the "H" level, the SR flip-flop 95 outputs a signal оlp_о at the "H" level. On the other hand, when the overload protection circuit 86 outputs a signal rst2 at the "H" level to reset the signal оlp_о at the "H" level, the SR flip-flop 95 outputs a signal оlp_о at the "L" level.

[0105] ===Buffer 96=== When neither the signal rst at the "H" level nor the signal оlp_о at the "H" level is output, the buffer 96 amplifies the drive signal Vq1 and outputs a drive voltage Vg via the terminal OUT.

[0106] Specifically, when the signal rst at the "H" level is output, the buffer 96 outputs a drive voltage Vg of the ground voltage, and as a result, the switching of the power transistor 30 stops.

[0107] Also, when the signal оlp_о at the "H" level is output, the buffer 96 also stops the switching of the power transistor 30 in the same manner as in the case of the signal rst. On the other hand, when none of the above signals are output, the buffer 96 performs the switching of the power transistor 30 based on the drive signal Vq1 and the signal Stop.

[0108] <<<Regarding the factors affecting the change in the feedback voltage Vfb and the relationship with the output voltage Vout>>> From the above, as shown in FIG. 8, depending on whether the AC-DC converter 10 operates in either the constant voltage mode or the constant current mode, the relationship between the factors affecting the change in the feedback voltage Vfb and the output voltage Vout changes.

[0109] Specifically, when the AC-DC converter 10 operates in the constant voltage mode, the voltage Vx of the constant voltage monitoring circuit 50 in FIG. 3 becomes lower than the voltage Vy of the constant current monitoring circuit 51.

[0110] In this case, when the output voltage Vout rises above the target level Vout_target in response to fluctuations in the state of the load 11, the voltage Vx decreases. Along with this, since the voltage Vz decreases, the light from the light-emitting diode 53 becomes stronger, and the sink current Ia by the phototransistor 38 increases. As a result, as shown in FIG. 8, the feedback voltage Vfb decreases.

[0111] When the feedback voltage Vfb decreases, the oscillation circuit 90 in Fig. 4 outputs an oscillation signal osc_out having a frequency Fsw_light. In this case, the control IC32 decreases the switching frequency and switches the power transistor 30 as from time t10 to time t12 in Fig. 9.

[0112] As a result, the period during which the inductor current IL1 flows decreases with respect to the period during which the power transistor 30 is on. Therefore, the inductor current IL2 flowing through the secondary coil L2 also decreases, and the output voltage Vout decreases. In this case, the on-period of the power transistor 30 is shortened compared to the case where the voltage Vfb is high, as shown in Fig. 9.

[0113] Also, when the output voltage Vout drops below the target level Vout_target, the feedback voltage Vfb rises, and the control IC32 extends the on-period of the power transistor 30. As a result, since the inductor current IL1 increases, the inductor current IL2 flowing through the secondary coil L2 also increases.

[0114] As a result, the output voltage Vout rises. Thereby, when the AC-DC converter 10 operates in the constant voltage mode, the output voltage Vout is maintained at the target level Vout_target.

[0115] On the other hand, when the AC-DC converter 10 operates in the constant current mode, the voltage Vy of the constant current monitoring circuit 51 in Fig. 3 becomes lower than the voltage Vx.

[0116] In this case, when the load current Iout becomes larger than the predetermined value Iout_limit, the voltage Vy decreases. Along with this, since the voltage Vz decreases, the light from the light-emitting diode 53 becomes stronger, and as a result, as described above and as shown in Fig. 8, the feedback voltage Vfb decreases.

[0117] When the feedback voltage Vfb decreases, as described above, the output voltage Vout decreases. Then, as the output voltage Vout decreases, the load current Iout decreases. As a result, the AC-DC converter 10 has a droop characteristic as shown in FIG. 2.

[0118] Also, although details will be described after explaining the configuration and operation of the overload protection circuit 86, when the AC-DC converter 10 is operating in the constant current mode, the overload protection circuit 86 cannot detect that the state of the load 11 has become an overload. Therefore, the control IC 32 of the present embodiment is configured to include an overload protection circuit 87.

[0119] When the load current Iout decreases and falls below a predetermined value Iout_limit, the voltage Vx becomes lower than the voltage Vy, and the AC-DC converter 10 operates in the constant voltage mode.

[0120] <<<Regarding two overload protection circuits (OLP) 86 and 87>>> Hereinafter, with reference to FIGS. 10 and 11, the details of the configurations of the overload protection circuits 86 and 87 will be described.

[0121] ==Overload protection circuit (OLP) 86== As described above, when the AC-DC converter 10 is operating in the constant voltage mode, the overload protection circuit 86 detects whether the state of the load 11 has become an overload. Specifically, in the constant voltage mode, the overload protection circuit 86 detects the state of the load 11 based on the voltage Vcs and the power supply voltage Vcc.

[0122] The overload protection circuit 86 is configured to include detection circuits 110 and 111 as shown in FIG. 10.

[0123] ===Detection circuit 110=== The detection circuit 110 outputs a signal set2 indicating whether the state of the load 11 is an overload based on the voltage Vcs. Here, let the period during which the state of the load 11 is an overload, that is, the period during which the level of the voltage Vcs when turning off the power transistor 30 is higher than a predetermined level Vref_olp, be the period P0.

[0124] Specifically, when the period P0 continues for a predetermined period T1, the detection circuit 110 outputs a signal set2 at the "H" level. In this case, the switching control circuit 88 in FIG. 4 stops the switching of the power transistor 30 based on the signal set2 at the "H" level.

[0125] The detection circuit 110 includes a comparator 120, a D flip-flop 121, OR elements 122, 124, 125, and a timer 123.

[0126] ====Comparator 120==== The comparator 120 determines whether the state of the load 11 is an overload based on the level of the voltage Vcs. Specifically, the comparator 120 compares the level of the voltage Vcs with a predetermined level Vref_olp.

[0127] ====D Flip-Flop 121==== The D flip-flop 121 indicates the period P0 during which the state of the load 11 is an overload. Specifically, when the level of the voltage Vcs is higher than the predetermined level Vref_olp when the power transistor 30 is turned off, the D flip-flop 121 outputs a signal at the "H" level. In other words, the D flip-flop 121 outputs a signal at the "H" level during the period P0 when the state of the load 11 is an overload.

[0128] On the other hand, when the comparator 120 indicates that the level of the voltage Vcs is lower than the predetermined level Vref_olp when the power transistor 30 is turned off, the D flip-flop 121 outputs a signal at the "L" level. Note that when the low-voltage protection circuit 81 outputs a signal rst at the "H" level, the D flip-flop 121 is reset.

[0129] ====OR element 122==== The OR element 122 is an element that generates a signal rst0 for resetting the timer 123. Specifically, when the D flip - flop 121 outputs a signal at the "H" level, the OR element 122 outputs a signal rst0 at the "H" level to release the reset of the timer 123.

[0130] Also, when the SR flip - flop 95 outputs a signal оlp_о at the "H" level, the OR element 122 outputs a signal rst0 at the "H" level.

[0131] ====Timer 123==== When the reset of the timer 123 is released, it measures whether the period P0 reaches a predetermined period T1, and simultaneously measures the period T2. Specifically, when the OR element 122 outputs a signal rst0 at the "H" level, the timer 123 starts measuring the periods T1 and T2.

[0132] Also, when the period P0 reaches the predetermined period T1, the timer 123 outputs a signal set0 at the "H" level indicating overload.

[0133] On the other hand, if a signal rst0 at the "L" level for resetting the timer 123 is input before the period P0 reaches the predetermined period T1, the timer 123 outputs a signal set0 at the "L" level.

[0134] Also, when the timer 123 measures the predetermined period T2 after starting to measure the period P0, the timer 123 outputs a signal rst1 at the "H" level to reset the signal olp_о at the "H" level to the SR flip - flop 95. In this case, the switching control circuit 88 in FIG. 4 controls the switching of the power transistor 30 based on the feedback voltage Vfb and the signal Stop.

[0135] Note that the overload protection circuit 86 corresponds to the "second overload protection circuit", the timer 123 corresponds to the "second timing circuit" and the "third timing circuit", the predetermined period T1 corresponds to the "third period", and the predetermined period T2 corresponds to the "second period" and the "fourth period". Further, the detection circuit 110 corresponds to the "third detection circuit", and the signal set2 corresponds to the "third detection signal".

[0136] ====OR elements 124, 125==== When the timer 123 outputs a signal set0 at the "H" level or the detection circuit 111 (described later) outputs a signal set1 at the "H" level indicating an overload, the OR element 124 outputs a signal set2 at the "H" level.

[0137] When the timer 123 outputs a signal rst1 at the "H" level or the low voltage protection circuit 81 in FIG. 4 outputs a signal rst at the "H" level, the OR element 125 outputs a signal rst2 at the "H" level.

[0138] As a result, the signal set2 at the "H" level is output only when the state of the load 11 being in an overload state continues for the predetermined period T1, preventing frequent repetition of the stop or restart of the switching of the power transistor 30.

[0139] On the other hand, when the level of the voltage Vcs when turning off the power transistor 30 is lower than the predetermined level Vref_olp, the detection circuit 110 outputs a signal set2 at the "L" level.

[0140] Here, the reason why the detection circuit 110 can detect whether or not the state of the load 11 is in an overload state will be described. When the state of the load 11 becomes an overload, the output voltage Vout decreases. Therefore, the control IC32 extends the on-period of the power transistor 30. As a result, the inductor current IL1 increases (that is, the voltage Vcs increases), and the power supplied from the primary side to the secondary side of the transformer 22 increases.

[0141] As a result, the output voltage Vout increases, and the output voltage Vout is maintained at the target level Vout_target. In this way, in the case of the constant voltage mode, since the control IC32 operates to maintain the output voltage Vout at the target level Vout_target, the detection circuit 110 can detect whether the state of the load 11 is an overload by detecting the voltage Vcs.

[0142] Then, when the period P0 continues for a predetermined period T1 and a predetermined period T2 longer than the predetermined period T1 elapses from the start of the period P0, the detection circuit 110 outputs a signal rst2 at the "H" level.

[0143] That is, when the period P0 elapses for a predetermined period T1 and then a predetermined period T2 elapses, the detection circuit 110 causes the SR flip-flop 95 to reset the signal olp_o at the "H" level so that the switching of the power transistor 30 is restarted.

[0144] ===Detection Circuit 111=== Before the period P0 reaches the predetermined period T1, when the power supply voltage Vcc becomes lower than the predetermined level Vclp, the detection circuit 111 outputs a signal set1 at the "H" level in order to output a signal olp_o at the "H" level to the SR flip-flop 95. The detection circuit 111 includes a hysteresis comparator 130 and an AND element 131.

[0145] ====Hysteresis Comparator 130==== The hysteresis comparator 130 compares the level of the power supply voltage Vcc with the predetermined level Vclp. Specifically, the hysteresis comparator 130 generates a predetermined level Vclph and a predetermined level Vclpl lower than the predetermined level Vclph from the predetermined level Vclp.

[0146] When the level of the power supply voltage Vcc is lower than a predetermined level Vclpl, the hysteresis comparator 130 outputs a signal of "H" level indicating a decrease in the power supply voltage Vcc. On the other hand, when the level of the power supply voltage Vcc is higher than a predetermined level Vclph, the hysteresis comparator 130 outputs a signal of "L" level.

[0147] ====AND element 131==== When the D flip-flop 121 outputs a signal of "H" level indicating the start of the period P0 and the hysteresis comparator 130 outputs a signal of "H" level, the AND element 131 outputs a signal set1 of "H" level. In this case, the switching control circuit 88 in FIG. 4 stops the switching of the power transistor 30 based on the signal set1.

[0148] Here, the reason why the detection circuit 111 can detect whether the state of the load 11 is an overload will be described. When the AC-DC converter 10 operates in the constant voltage mode, it operates to maintain the output voltage Vout at the target level Vout_target. Therefore, as described above, the detection circuit 110 can detect whether the state of the load 11 is an overload based on the voltage Vcs.

[0149] On the other hand, although the voltage Vcs indicates that the state of the load 11 is an overload, there may be a case where the output voltage Vout cannot be increased by the switching of the power transistor 30. In such a case, the power supply voltage Vcc generated in response to the output voltage Vout also decreases.

[0150] Therefore, in this case, since the state of the load 11 is a more serious overload than when the detection circuit 110 detects that the state of the load 11 is an overload, the power supply voltage Vcc may have decreased. Therefore, unlike the detection circuit 110, before the period P0 elapses a predetermined period T1, based on the fact that the power supply voltage Vcc has decreased, the detection circuit 111 can detect that the state of the load 11 is an overload.

[0151] From the above, when the period P0 continues for a predetermined period T1, the overload protection circuit 86 outputs a signal set2 at the "H" level indicating an overload. Also, when a predetermined period T2 elapses after the load 11 becomes overloaded, the overload protection circuit 86 outputs a signal rst2 at the "H" level to reset the signal olp_o at the "H" level.

[0152] Also, before the period P0 continues for the predetermined period T1, when the power supply voltage Vcc becomes lower than a predetermined level Vclp, the overload protection circuit 86 outputs a signal set2 at the "H" level.

[0153] Note that the detection circuit 111 corresponds to the "fourth detection circuit", the predetermined level Vref_olp corresponds to the "fifth voltage", the predetermined level Vclpl corresponds to the "sixth voltage", and the signal set1 corresponds to the "fourth detection signal".

[0154] <<<Regarding the overload protection circuit 86 when the AC-DC converter 10 operates in the constant current mode>>> As described above, the overload protection circuit 86 has been explained. The overload protection circuit 86 can detect that the state of the load 11 is overloaded based on the voltage Vcs when the AC-DC converter 10 operates in the constant voltage mode.

[0155] However, when the AC-DC converter 10 operates in the constant current mode, the criterion for determining whether the state of the load 11 is overloaded is the load current Iout. Also, when the state of the load 11 becomes overloaded and the load current Iout becomes larger than a predetermined value Iout_limit, the control IC32 reduces the output voltage Vout by shortening the on-period of the power transistor 30 and decreasing the switching frequency.

[0156] Also, shortening the on-period of the power transistor 30 results in the level of the voltage Vcs, which increases at a predetermined slope during the on-period, not reaching the predetermined level Vref_olp.

[0157] Therefore, when the AC-DC converter 10 operates in the constant current mode, the overload protection circuit 86 cannot detect that the state of the load 11 is an overload.

[0158] Therefore, the control IC 32 of the present embodiment is configured to include an overload protection circuit 87. Note that the overload protection circuit 87 can detect whether the state of the load 11 is an overload based on the power supply voltage Vcc when the AC-DC converter 10 operates in the constant current mode.

[0159] ==Overload Protection Circuit (OLP) 87== The overload protection circuit 87 detects whether the state of the load 11 is an overload when the AC-DC converter 10 operates in the constant current mode. Specifically, in the constant current mode, the overload protection circuit 87 detects the state of the load 11 based on the power supply voltage Vcc.

[0160] As shown in FIG. 11, the overload protection circuit 87 includes detection circuits 140 and 142, and an output circuit 141.

[0161] ===Detection Circuit 140=== The detection circuit 140 detects an overload by detecting that the power supply voltage Vcc has dropped when switching the power transistor 30. Specifically, when the comparator 85 in FIG. 4 outputs a signal Stop at the "H" level, and when the period P1 during which the level of the power supply voltage Vcc is lower than the predetermined level Vbmh becomes the predetermined period Ta, the detection circuit 140 outputs a signal set10 at the "H" level indicating an overload.

[0162] Thereby, the signal set10 at the "H" level is not output until the state where the power supply voltage Vcc has dropped continues for the predetermined period Ta, and the operation of the detection circuit 140 when detecting that the state of the load 11 is an overload can be delayed.

[0163] When detecting a decrease in the power supply voltage Vcc when switching the power transistor 30, the reason why it is possible to detect whether the state of the load 11 is an overload is as follows.

[0164] When the AC-DC converter 10 in FIG. 1 operates in the constant current mode, when the state of the load 11 becomes an overload, that is, when the load current Iout increases, although the power transistor 30 is being switched, the voltage generated across the secondary coil L2 decreases.

[0165] Then, as the voltage of the secondary coil decreases, the voltage generated across the auxiliary coil L3 magnetically coupled to the secondary coil also decreases. When the voltage generated across the auxiliary coil L3 decreases, the power supply voltage Vcc also decreases. Therefore, when detecting a decrease in the power supply voltage Vcc when switching the power transistor 30, it is possible to detect whether the state of the load 11 is an overload.

[0166] The detection circuit 140 is configured to include a comparator 150, an inverter 151, an OR element 152, and a timer 153.

[0167] ====Comparator 150, Inverter 151, OR Element 152==== The comparator 150 compares the level of the power supply voltage Vcc with a predetermined level Vbmh. Specifically, when the level of the power supply voltage Vcc is higher than the predetermined level Vbmh, the comparator 150 causes the OR element 152 to output an “H” level signal rst10 that resets the timer 153. Also, when an “L” level signal Stop is input to the inverter 151, the OR element 152 outputs an “H” level signal rst10.

[0168] On the other hand, when an “H” level signal Stop is input to the inverter 151 and the level of the power supply voltage Vcc is lower than the predetermined level Vbmh, the OR element 152 outputs an “L” level signal rst10. Note that the comparator 150 corresponds to the “first comparison circuit”.

[0169] ====Timer 153==== When switching the power transistor 30, the timer 153 measures whether the period P1 during which the level of the power supply voltage Vcc is lower than the predetermined level Vbmh becomes the predetermined period Ta based on the comparison result of the comparator 150. Specifically, when a signal rst10 of "L" level is input, the timer 153 measures the predetermined period Ta. Then, when the predetermined period Ta elapses after the reset is released, the timer 153 outputs a signal set10 of "H" level to the output circuit 141.

[0170] On the other hand, when a signal rst10 of "H" level is input, the timer 153 stops measuring the predetermined period Ta and is reset. Note that the timer 153 corresponds to the "first timing circuit". Also, the detection circuit 140 corresponds to the "first detection circuit", the predetermined level Vbmh corresponds to the "first voltage", the predetermined period Ta corresponds to the "first period", and the signal set10 corresponds to the "first detection signal".

[0171] ===Output Circuit 141=== The output circuit 141 outputs a signal set13 of "H" level based on the signals from the detection circuits 140 and 142. Specifically, the output circuit 141 outputs a signal set13 of "H" level based on the signal rst10 from the OR element 152, the signal set10 from the timer 153, and the signal set11 from the detection circuit 142 (described later).

[0172] The output circuit 141 includes an OR element 160 and an SR flip-flop 161. The OR element 160 outputs a signal set12 of "H" level indicating overload based on the "H" level signal set10 from the detection circuit 140 and the "H" level signal set11 indicating overload from the detection circuit 142.

[0173] The SR flip-flop 161 outputs a signal set13 of "H" level based on the signal set12 of "H" level from the OR element 160. On the other hand, the SR flip-flop 161 resets the signal set13 of "H" level based on the signal rst10 of "H" level from the OR element 152.

[0174] ===Detection circuit 142=== When the power supply voltage Vcc further drops while the power transistor 30 is being switched, the detection circuit 142 outputs a signal set11 of "H" level indicating an overload. Specifically, when the level of the power supply voltage Vcc becomes a predetermined level Vbml lower than a predetermined level Vbmh while the power transistor 30 is being switched, the detection circuit 142 outputs a signal set11 of "H" level.

[0175] On the other hand, when the comparator 85 in FIG. 4 stops switching to the buffer 96 or when the level of the power supply voltage Vcc exceeds the predetermined level Vbml, the detection circuit 142 outputs a signal set11 of "L" level.

[0176] The detection circuit 142 is configured to include a comparator 170 and a NOR element 171. The comparator 170 compares the level of the power supply voltage Vcc with a predetermined level Vbml. Also, when the comparator 85 outputs a signal Stop of "H" level and the comparator 170 indicates that the level of the power supply voltage Vcc is lower than the predetermined level Vbml, the NOR element 171 outputs a signal set11 of "H" level.

[0177] On the other hand, the NOR element 171 outputs a signal set11 of "L" level when the comparator 85 outputs a signal Stop of "L" level or when the comparator 170 indicates that the level of the power supply voltage Vcc is higher than the predetermined level Vbml.

[0178] Note that the predetermined level Vbml is higher than the predetermined level Voff at which the low-voltage protection circuit 81 outputs a signal rst of "H" level. As a result, before the low-voltage protection circuit 81 outputs a signal rst of "H" level, the detection circuit 142 detects that the state of the load 11 is an overload. Therefore, the detection circuit 142 can prevent the state of the load 11 from becoming an overload, the power supply voltage Vcc from decreasing, and the low-voltage protection circuit 81 from operating.

[0179] Note that the overload protection circuit 87 corresponds to the "first overload protection circuit", the detection circuit 142 corresponds to the "second detection circuit", the predetermined level Vbml corresponds to the "second voltage", and the signal set11 corresponds to the "second detection signal".

[0180] <<<Operation of Overload Protection Circuit 87>>> First, with reference to FIG. 12, a case where the SR flip-flop 95 outputs a signal olp_o of "H" level when the timer 153 outputs a signal set10 of "H" level will be described. It is assumed that the AC-DC converter 10 is operating in the constant current mode, and the operation of the overload protection circuit 87 is described in FIG. 12.

[0181] Before time t20, it is assumed that the load current Iout increases and the feedback voltage Vfb decreases. As a result, the on-time of the power transistor 30 is shortened and the switching frequency of the power transistor 30 decreases. Therefore, as the output voltage Vout decreases, the voltage generated in the auxiliary coil L3 also decreases, and the power supply voltage Vcc also decreases.

[0182] At time t20 when the level of the power supply voltage Vcc falls below the predetermined level Vbmh, the OR element 152 outputs a signal rst10 of "L" level.

[0183] At time t21 when a predetermined period Ta has elapsed from time t20, the timer 153 outputs a signal set10 of "H" level. Then, the output circuit 141 outputs a signal set10 of "H" level. Therefore, the SR flip-flop 95 outputs a signal оlp_o of "H" level.

[0184] Thereafter, the startup control circuit 82 in FIG. 4 controls the startup circuit 80 based on the signal olp_o at the "H" level so as to maintain the level of the power supply voltage Vcc between the predetermined level Vclph and the predetermined level Vclpl. Also, since the SR flip-flop 95 outputs a signal olp_o at the "H" level, the PMOS transistor 83 is turned off, and the feedback voltage Vfb becomes the ground voltage.

[0185] Then, at time t22 when the level of the power supply voltage Vcc exceeds the predetermined level Vbmh, the OR element 152 outputs a signal rst10 at the "H" level. Thereby, the output circuit 141 resets the signal set13 at the "H" level.

[0186] Above, the case where the SR flip-flop 95 outputs a signal olp_o at the "H" level when the timer 153 outputs a signal set10 at the "H" level has been described. In this case, when the power transistor 30 is being switched, if the period during which the level of the power supply voltage Vcc is below the predetermined level Vbmh reaches the predetermined period Ta, the overload protection circuit 87 outputs a signal set13 at the "H" level.

[0187] By operating the overload protection circuit 87 in this way, the AC-DC converter 10 can extend the period of detecting an overload in the constant current mode, shifting to the constant voltage mode, then shifting back to the constant current mode to detect the overload, by the predetermined period Ta.

[0188] Thereby, the period from startup to detecting an overload through the constant voltage mode and the constant current mode becomes longer, and as a result, the average power input to the AC-DC converter 10 is suppressed.

[0189] Next, referring to FIG. 13, a case where the detection circuit 142 outputs a signal set11 indicating an overload, and the SR flip-flop 95 outputs a signal olp_o indicating an overload will be described. Note that, as in FIG. 12, it is assumed that the AC-DC converter 10 is operating in the constant current mode, and the operation of the overload protection circuit 87 in FIG. 13 will be described.

[0190] Also, before time t30, it is the same as before time t20 in FIG. 12. Therefore, the reason for the decrease in the power supply voltage Vcc before time t30 is the same as in the case of FIG. 12. On the other hand, it is assumed that the rate of decrease of the power supply voltage Vcc per unit time in FIG. 13 is larger than that in the case of FIG. 12.

[0191] At time t31 when the level of the power supply voltage Vcc falls below a predetermined level Vbml, the detection circuit 142 outputs a signal set11 of "H" level. Then, the output circuit 141 outputs a signal set13 of "H" level. Also, the SR flip-flop 95 outputs a signal olp_o of "H" level. Note that the operation after time t32 is the same as the operation after time t22 in FIG. 12.

[0192] As described above, a case where the detection circuit 142 outputs a signal set11 of "H" level and the SR flip-flop 95 outputs a signal olp_o of "H" level has been described. In this case, when the power transistor 30 is being switched, if the level of the power supply voltage Vcc falls below a predetermined level Vbml, the overload protection circuit 87 immediately outputs a signal set13 of "H" level.

[0193] By operating the overload protection circuit 87 in this way, when the power supply voltage Vcc is at a level higher than a predetermined level Voff, the overload protection circuit 87 can detect an overload. Note that the predetermined level Voff is the level of the power supply voltage Vcc at which the low voltage protection circuit 81 outputs a signal rst of "H" level.

[0194] Accordingly, when the AC-DC converter 10 is in the constant current mode, even if the state of the load 11 becomes an overload, the overload protection circuit 87 can detect the overload without being reset by the low voltage protection circuit 81.

[0195] ===Modification Example=== In the above-described embodiment, when the timer 123 in FIG. 10 measures the predetermined period T2, the SR flip-flop 95 resets (i.e., automatically returns) the signal оlp_о at the “H” level. However, after the SR flip-flop 95 outputs the signal оlp_о at the “H” level, the SR flip-flop 95 may reset the signal оlp_о at the “H” level by disconnecting the AC-DC converter 10 from the AC voltage Vac.

[0196] Specifically, as shown in FIG. 14, the SR flip-flop 95 may be reset by the signal rst at the “H” level from the low voltage protection circuit 81. In this case, when the AC voltage Vac is disconnected from the AC-DC converter 10, the power supply voltage Vcc decreases. Thereby, the low voltage protection circuit 81 outputs the signal rst at the “H” level.

[0197] Therefore, when the AC voltage Vac is disconnected from the AC-DC converter 10, the SR flip-flop 95 resets the signal оlp_о at the “H” level. In FIGS. 4 and 14, the same components are denoted by the same reference numerals.

[0198] In this case, since it does not automatically return, as shown in FIG. 15, the overload protection circuit 200, which is a modification example of the overload protection circuit 86, does not output the signal rst2. Also, since it is not necessary for the timer 123 to measure the predetermined period T2 based on the signal оlp_о, the signal оlp_о is not input to the overload protection circuit 200. In FIGS. 10 and 15, the same components are denoted by the same reference numerals.

[0199] ===Summary=== The AC-DC converter 10 of the present embodiment has been described above. The AC-DC converter 10 includes a transformer 22, a power transistor 30, a control IC 32, a control circuit 42, and a photo transistor 38. Further, the control IC 32 includes a comparator 85, an overload protection circuit 87, and a switching control circuit 88. Thereby, even when the output voltage Vout decreases due to the droop characteristic, the AC-DC converter 10 can detect that the state of the load 11 is an overload. In other words, it is possible to provide a power supply circuit that can detect whether the state of the load is an overload while having a droop characteristic in the output voltage.

[0200] Further, the overload protection circuit 87 includes a detection circuit 140. Thereby, the AC-DC converter 10 can lengthen the period of detecting an overload in the constant current mode, shifting to the constant voltage mode, and then shifting back to the constant current mode to detect an overload again by a predetermined period Ta.

[0201] Further, the detection circuit 140 includes a comparator 150 and a timer 153. Thereby, with a simple circuit, the period of detecting that the state of the load 11 is an overload can be made longer than a predetermined period Ta.

[0202] Further, the overload protection circuit 87 includes a detection circuit 142. Thereby, when the power supply voltage Vcc further decreases before the period P1 reaches the predetermined period Ta, the AC-DC converter 10 can immediately stop the switching of the power transistor 30.

[0203] Further, the overload protection circuit 87 includes a timer 123. Thereby, when a predetermined period T2 elapses after the state of the load 11 becomes an overload, the AC-DC converter 10 can automatically return from the state of detecting an overload.

[0204] Also, the control IC32 includes a low-voltage protection circuit 81. Thereby, the AC-DC converter 10 can detect that the state of the load 11 is an overload before the level of the power supply voltage Vcc reaches a predetermined level Voff, and can operate without resetting the control IC32 by the low-voltage protection circuit 81 even if an overload is detected. Also, it is possible to suppress an increase in the average power consumed by the AC-DC converter 10 due to repeated startups.

[0205] Also, the control IC32 includes a startup circuit 80. Thereby, the AC-DC converter 10 can continue to operate without operating the low-voltage protection circuit 81 even if it detects that the state of the load 11 is an overload.

[0206] Also, the control IC32 includes an overload protection circuit 86. Thereby, even when the AC-DC converter 10 is operating in the constant-voltage mode, the AC-DC converter 10 can detect whether or not the state of the load 11 is an overload.

[0207] Also, the overload protection circuit 86 includes a detection circuit 110. Thereby, even when the AC-DC converter 10 is operating in the constant-voltage mode, the AC-DC converter 10 can detect whether or not the state of the load 11 is an overload based on whether or not a period during which the inductor current flowing through the power transistor 30 is large continues for a predetermined period T1.

[0208] Also, the overload protection circuit 86 includes a detection circuit 142. Thereby, when the inductor current flowing through the power transistor 30 is large and the power supply voltage drops, the AC-DC converter 10 can detect that the state of the load 11 is an overload.

[0209] Also, the control IC32 includes a timer 123. Thereby, the AC-DC converter 10 can automatically return from the state in which an overload is detected when a predetermined period T2 elapses after the state of the load 11 becomes an overload.

[0210] The above embodiments are for facilitating the understanding of the present invention and are not for limiting and interpreting the present invention. Also, the present invention can be changed and improved without departing from its gist, and it goes without saying that the equivalents of the present invention are included therein.

Explanation of Reference Numerals

[0211] 10 AC-DC converter 11 Load 20 Full-wave rectifier circuit 21, 24, 33, 35, 37, 41, 71 Capacitor 22 Transformer 23, 31, 34, 52, 60, 61, 63, 64, 70, 72, 73, 75, 84, 101 Resistor 25, 27, 28, 36, 40, 65, 76 Diode 26 Control block 30 Power transistor 38 Phototransistor 42 Control circuit 50 Constant-voltage monitoring circuit 51 Constant-current monitoring circuit 53 Light-emitting diode 62, 74, 103 Operational amplifier 80 Starting circuit 81 Low-voltage protection circuit 82 Starting control circuit 83, 102 PMOS transistor 85, 91, 92, 120, 150, 170 Comparator 86, 87, 200 Overload protection circuit 88 Switching control circuit 90 Oscillating circuit 93, 104, 122, 124, 125, 152, 160 OR element 94, 95, 161 SR flip-flop 96 Buffer 110, 111, 140, 142 Detection circuit 121 D flip-flop 123, 153 Timer 130 Hysteresis Comparator 131 AND Element 141 Output Circuit 151 Inverter 171 NOR Element

Claims

1. A power supply circuit that generates an output voltage at a target level from an input voltage for a load, including a transformer including a primary coil, a secondary coil, and an auxiliary coil; a transistor that controls an inductor current flowing through the primary coil; an integrated circuit having a first terminal to which a power supply voltage based on a voltage of the auxiliary coil is applied and a second terminal to which a feedback voltage is applied, and switching the transistor based on the feedback voltage; a feedback circuit that generates a feedback voltage that sets the output voltage to the target level when a load current flowing through the load is less than a predetermined value, and generates a feedback voltage that reduces the output voltage when the load current is greater than the predetermined value; comprising: The integrated circuit includes a determination circuit that determines whether to enter a first mode in which the transistor is switched or a second mode in which the switching of the transistor is stopped based on the feedback voltage; a first overload protection circuit that detects whether the state of the load is overloaded based on the determination result indicating the first mode from the determination circuit and the power supply voltage; a switching control circuit that controls the switching of the transistor based on the feedback voltage, the determination result of the determination circuit, and the detection result of the first overload protection circuit; including The switching control circuit stops the switching of the transistor when the first overload protection circuit detects that the state of the load is overloaded. Power supply circuit.

2. The power supply circuit according to claim 1, wherein the first overload protection circuit includes a first detection circuit that outputs a first detection signal indicating that the state of the load is overloaded when a period during which the power supply voltage is lower than a first voltage becomes a first period during the first mode; Power supply circuit.

3. The power supply circuit according to claim 2, wherein the first detection circuit includes a first comparison circuit that compares the power supply voltage with the first voltage; and a first timing circuit that measures a period during which the power supply voltage is lower than the first voltage based on a comparison result of the first comparison circuit during the first mode. Power supply circuit.

4. The power supply circuit according to claim 2 or claim 3, wherein the first overload protection circuit includes a second detection circuit that outputs a second detection signal indicating that the state of the load is overloaded when the power supply voltage becomes a second voltage lower than the first voltage during the first mode; The switching control circuit Based on the second detection signal, stopping the switching of the transistor Power supply circuit **Claim 5** The power supply circuit according to claim 4, wherein the integrated circuit includes a second timing circuit that times a second period based on the first detection signal or the second detection signal, and the switching control circuit controls the switching of the transistor based on the feedback voltage and the determination result when the second timing circuit times the second period. Power supply circuit **Claim 6** The power supply circuit according to claim 4 or claim 5, wherein the integrated circuit includes a protection circuit that outputs a stop signal to stop the switching of the transistor when the power supply voltage becomes a third voltage lower than the second voltage, and outputs a permission signal to permit the switching of the transistor when the power supply voltage becomes a fourth voltage higher than the third voltage, and the switching control circuit stops the switching of the transistor when the stop signal is output, and controls the switching of the transistor based on the feedback voltage and the determination result when the permission signal is output. Power supply circuit **Claim 7** The power supply circuit according to claim 6, wherein a capacitor to which the power supply voltage is applied is connected to the first terminal, and the integrated circuit includes a charging circuit that charges the capacitor when the first detection signal or the second detection signal is output. Power supply circuit **Claim 8** The power supply circuit according to any one of claims 1 to 7, wherein the integrated circuit has a third terminal to which a voltage corresponding to the inductor current is applied, and a second overload protection circuit that detects whether the state of the load is an overload based on the voltage of the third terminal, and the switching control circuit stops the switching of the transistor based on a detection result indicating that the state of the load is an overload, which is output from the second overload protection circuit. Power supply circuit **Claim 9** The power supply circuit according to claim 8, wherein the second overload protection circuit includes a third detection circuit that outputs a third detection signal indicating whether the state of the load is an overload based on whether a period during which the voltage of the third terminal is higher than a fifth voltage continues for a third period. Power supply circuit **Claim 10** The power supply circuit according to claim 9, wherein the second overload protection circuit ​ When the transistor is turned off, if the voltage of the third terminal becomes higher than the fifth voltage and the power supply voltage becomes lower than the sixth voltage, a fourth detection circuit that outputs a fourth detection signal indicating that the state of the load is an overload is included. The switching control circuit stops the switching of the transistor based on the fourth detection signal. Power supply circuit.

11. The power supply circuit according to claim 10, The integrated circuit includes a third timing circuit that measures a fourth period based on the third detection signal or the fourth detection signal. The switching control circuit controls the switching of the transistor based on the feedback voltage and the determination result when the third timing circuit measures the fourth period. Power supply circuit.

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