printed wiring board
The printed wiring board design addresses stress concentration and bubble trapping issues by employing through holes with larger lower-end curvature, enhancing the reliability and durability of the connecting conductor layers through improved bubble escape and reduced stress.
Patent Information
- Application Number
- JP2025516210
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2024-12-12
- Publication Date
- 2025-08-07
- Estimated Expiration
- 2044-12-12
AI Technical Summary
The existing printed wiring boards face issues with stress concentration at the bottom end of through holes, leading to potential reliability concerns in the connecting conductor layers, especially when air bubbles are trapped during plating.
The printed wiring board design features through holes with a polygonal shape or protrusions between the upper and lower ends, where the radius of curvature is larger at the lower end, facilitating easier escape of air bubbles and reducing stress concentration, thereby enhancing the reliability of the connecting conductor layers.
The design improves the reliability of the connecting conductor layers by ensuring effective bubble escape and alleviating stress concentration, resulting in improved electrical connectivity and durability.
Smart Images

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Abstract
Description
[Technical Field]
[0001] The present disclosure relates to printed wiring boards. [Background technology]
[0002] WO 2019 / 039237 (Patent Document 1) describes a printed wiring board. The printed wiring board described in Patent Document 1 has a first conductor layer, an insulating layer disposed on the first conductor layer, a second conductor layer disposed on the insulating layer, and a connecting conductor layer.
[0003] A through hole is formed in the insulating layer. A connecting conductor layer is formed on the inner wall surface of the through hole and on the first conductor layer so as to electrically connect the first conductor layer and the second conductor layer. The opening edge of the through hole has an arc and multiple protrusions in a cross section perpendicular to the direction from the top to the bottom of the through hole. The protrusions are spaced apart along the circumferential direction and protrude in the opposite direction from the center of the arc. [Prior art documents] [Patent documents]
[0004] [Patent Document 1] International Publication No. 2019 / 039237 Summary of the Invention
[0005] The printed wiring board of the present disclosure includes a first conductor layer, an insulating layer disposed on the first conductor layer, a second conductor layer disposed on the insulating layer, and a connecting conductor layer. A through hole is formed in the insulating layer, penetrating the insulating layer to expose the first conductor layer. The opening edge of the through hole has a polygonal shape or a shape having at least one protrusion between the upper and lower ends in a cross-sectional view perpendicular to the direction from the upper end to the lower end of the through hole. The radius of curvature of the corners of the polygon or the tip of the protrusion is larger at the lower end than at the upper end. The connecting conductor layer is disposed on the inner wall surface of the through hole and on the first conductor layer exposed from the through hole so as to electrically connect the first conductor layer and the second conductor layer. [Brief explanation of the drawings]
[0006] [Figure 1] FIG. 1 is a cross-sectional view of a printed wiring board 100. [Figure 2] FIG. 2 is a cross-sectional view taken along line II-II in FIG. [Figure 3] FIG. 3 is a cross-sectional view taken along line III-III in FIG. [Figure 4] FIG. 4 is a manufacturing process diagram of the printed wiring board 100. [Figure 5] FIG. 5 is a cross-sectional view illustrating the base material attaching step S2. [Figure 6] FIG. 6 is a cross-sectional view illustrating the hole-making step S3. [Figure 7] FIG. 7 is a cross-sectional view illustrating the connecting conductor layer forming step S4. [Figure 8] FIG. 8 is a cross-sectional view illustrating the resist pattern forming step S5. [Figure 9] FIG. 9 is a cross-sectional view illustrating the conductor layer forming step S6. [Figure 10] FIG. 10 is a cross-sectional view illustrating the resist pattern removing step S7. [Figure 11] FIG. 11 is a cross-sectional view of printed wiring board 100 according to the first modified example. [Figure 12] FIG. 12 is a cross-sectional view of printed wiring board 100 according to the second modification. [Figure 13] FIG. 13 is a cross-sectional view of a printed wiring board 100 according to a third modification. [Figure 14A] FIG. 14A is a cross-sectional view of printed wiring board 100 according to a fourth modification. [Figure 14B] FIG. 14B is a cross-sectional view of printed wiring board 100 according to the fifth modification. [Figure 14C] FIG. 14C is a cross-sectional view of printed wiring board 100 according to a sixth modification. [Figure 14D] FIG. 14D is a cross-sectional view of printed wiring board 100 according to the seventh modification. DETAILED DESCRIPTION OF THE INVENTION
[0007] [Problem to be solved by this disclosure] In the printed wiring board described in Patent Document 1, air remaining in the through holes before plating begins (when the plating solution is poured in) is easily released. However, in the printed wiring board described in Patent Document 1, stress concentration is likely to occur at the bottom end of the through holes, leaving room for improvement in the reliability of the connecting conductor layers. The present disclosure provides a printed wiring board with improved reliability of the connecting conductor layers.
[0008] [Effects of this disclosure] According to the printed wiring board of the present disclosure, the reliability of the connecting conductor layer is improved.
[0009] [Description of the embodiments of the present disclosure] First, embodiments of the present disclosure will be listed and described.
[0010] (1) A printed wiring board according to an embodiment includes a first conductor layer, an insulating layer disposed on the first conductor layer, a second conductor layer disposed on the insulating layer, and a connecting conductor layer. The insulating layer has a through hole formed therein that penetrates the insulating layer and exposes the first conductor layer. The opening edge of the through hole has a polygonal shape or a shape having at least one protrusion between the upper and lower ends in a cross-sectional view perpendicular to the direction from the upper end to the lower end of the through hole. The radius of curvature of the corner of the polygon or the tip of the protrusion is larger at the lower end than at the upper end. The connecting conductor layer is disposed on the inner wall surface of the through hole and on the first conductor layer exposed from the through hole so as to electrically connect the first conductor layer and the second conductor layer. The printed wiring board according to (1) above improves the reliability of the connecting conductor layer.
[0011] (2) In the printed wiring board of (1) above, the number of corners may be 3 or more and 8 or less. (3) In the printed wiring board of (1) above, the number of protruding portions may be 1 or more and 8 or less.
[0012] (4) In the printed wiring board of (1) above, the length of the protrusion may be 10 μm or more and 150 μm or less.
[0013] (5) In the printed wiring board of (1) above, the width of the protruding portion may be 1 / 24 or more and 1 / 5 or less of the perimeter of the opening edge of the through hole.
[0014] (6) In the printed wiring boards of (1) to (5) above, the radius of curvature of the corner or tip at the upper end may be 2.5 μm or more and 35 μm or less.
[0015] (7) In the printed wiring boards of (1) to (6) above, the radius of curvature of the corner or tip at the bottom end may be 5 μm or more and 50 μm or less.
[0016] (8) In the printed wiring boards of (1) to (7) above, the aspect ratio of the through holes may be 0.5 or more and 3.0 or less.
[0017] (9) In the printed wiring boards of (1) to (8) above, the through holes may have a diameter of 20 μm or more and 300 μm or less.
[0018] (10) In the printed wiring boards of (1) to (9) above, the through holes may have a depth of 5 μm or more and 500 μm or less.
[0019] (11) In the printed wiring boards of (1) to (10) above, the insulating layer may include a plurality of layers.
[0020] (12) In the printed wiring boards of (1) to (11) above, the insulating layer may include at least one fluororesin layer.
[0021] (13) In the printed wiring boards of (1) to (12) above, the connecting conductor layer may be an electroless plated layer.
[0022] [Details of the embodiments of the present disclosure] The details of the embodiment of the present disclosure will be described with reference to the drawings. In the following drawings, the same or corresponding parts are designated by the same reference numerals, and redundant description will not be repeated. The printed wiring board according to the embodiment is referred to as printed wiring board 100.
[0023] (Configuration of printed wiring board 100) The configuration of the printed wiring board 100 will be described below.
[0024] Fig. 1 is a cross-sectional view of a printed wiring board 100. As shown in Fig. 1, the printed wiring board 100 has a substrate 10, an adhesive layer 20, a base material 21, an adhesive layer 22, a base material 23, a conductor layer 30, a conductor layer 31, and a connecting conductor layer 40.
[0025] The substrate 10 has a base material 11 and a plurality of conductor layers 12. The base material 11 has a main surface 11a and a main surface 11b. The main surface 11b is the surface opposite to the main surface 11a. The base material 11 is made of an electrically insulating material. The base material 11 is made of, for example, glass epoxy. That is, the substrate 10 is, for example, a rigid substrate.
[0026] In the example shown in FIG. 1 , the number of the plurality of conductor layers 12 is four. Of these, the conductor layer 12 arranged on the main surface 11a is referred to as conductor layer 12a, the conductor layer 12 arranged on the main surface 11b is referred to as conductor layer 12b, and the conductor layers 12 arranged within the base material 11 are referred to as conductor layer 12c and conductor layer 12d. Note that conductor layer 12c is located closer to conductor layer 12a within the base material 11 than conductor layer 12d. Each of the plurality of conductor layers 12 is formed of a conductor. Each of the plurality of conductor layers 12 is formed of, for example, copper or a copper alloy. Each of the plurality of conductor layers 12 is patterned to form wiring on the substrate 10.
[0027] The adhesive layer 20 is disposed on the main surface 11a so as to cover the conductor layer 12a. The adhesive layer 20 is formed of an adhesive. The base material 21 is disposed on the adhesive layer 20. From another perspective, the base material 21 is attached to the substrate 10 by the adhesive layer 20. The base material 21 is formed of, for example, a fluororesin.
[0028] The adhesive layer 22 is disposed on the main surface 11b so as to cover the conductor layer 12b. The adhesive layer 22 is formed of an adhesive. The base material 23 is disposed on the adhesive layer 22. From another perspective, the base material 23 is attached to the substrate 10 by the adhesive layer 22. The base material 23 is formed of, for example, a fluororesin.
[0029] A through hole 50 is formed in the substrate 11, the adhesive layer 20, the substrate 21, the adhesive layer 22, and the substrate 23. The through hole 50 penetrates the substrate 11, the adhesive layer 20, the substrate 21, the adhesive layer 22, and the substrate 23. The through hole 50 has an upper end 50a and a lower end 50b. The lower end 50b is the end opposite the upper end 50a. The back surface of the conductor layer 31 is exposed from the lower end 50b.
[0030] The conductor layer 30 is disposed on the substrate 21. The conductor layer 31 is disposed on the substrate 23. The conductor layer 30 and the conductor layer 31 are each formed of a conductor. The conductor layer 30 and the conductor layer 31 are each formed of, for example, copper or a copper alloy. Above the through hole 50, a through hole 30a penetrating the conductor layer 30 is formed in the conductor layer 30.
[0031] The connecting conductor layer 40 is disposed on the inner wall surface of the through hole 50 and on the back surface of the conductor layer 31 exposed from the through hole 50 (lower end 50b) so as to electrically connect the conductor layer 30 and the conductor layer 31. The connecting conductor layer 40 is formed of a conductor. The connecting conductor layer 40 is formed of, for example, copper or a copper alloy. The connecting conductor layer 40 is, for example, an electroless plated layer (a layer formed by electroless plating).
[0032] The connecting conductor layer 40 is also disposed on the surface of the conductor layer 30 and on the surface of the conductor layer 31. The connecting conductor layer 40 is also disposed on the inner wall surface of the through hole 30a. A conductor layer 41 is disposed on the connecting conductor layer 40. The conductor layer 41 is formed of a conductor. The conductor layer 41 is formed of, for example, copper or a copper alloy. The conductor layer 41 is, for example, an electrolytic plated layer (a layer formed by electrolytic plating). The conductor layer 30, the connecting conductor layer 40 disposed on the conductor layer 30, and the conductor layer 41 disposed thereon form wiring disposed on the substrate 21. The conductor layer 31, the connecting conductor layer 40 disposed on the conductor layer 31, and the conductor layer 41 disposed thereon form wiring disposed on the substrate 23.
[0033] FIG. 2 is a cross-sectional view taken along line II-II in FIG. 1. FIG. 3 is a cross-sectional view taken along line III-III in FIG. 1. FIGS. 2 and 3 show a cross section perpendicular to the direction from the upper end 50a to the lower end 50b. Also, the connecting conductor layer 40 and the conductor layer 41 are omitted from FIGS. 2 and 3. As shown in FIGS. 2 and 3, the through hole 50 is polygonal in cross-sectional view from the upper end 50a to the lower end 50b. In the example shown in FIGS. 2 and 3, the opening edge of the through hole 50 is quadrilateral (square). Here, even if the corners of the polygon are rounded, it is still considered to be a polygon.
[0034] The polygon has multiple corners 50c. In the example shown in FIG. 2, the polygon has four corners 50c. The radius of curvature of the corners 50c at the lower end 50b is larger than the radius of curvature of the corners 50c at the upper end 50a. The radius of curvature of the corners 50c at the upper end 50a is, for example, 2.5 μm or more and 35 μm or less. The radius of curvature of the corners 50c at the upper end 50a may be, for example, 2.5 μm or more and 15 μm or less. The radius of curvature of the corners 50c at the lower end 50b is, for example, 5 μm or more and 50 μm or less. The radius of curvature of the corners 50c at the lower end 50b may be, for example, 5 μm or more and 25 μm or less.
[0035] The number of angles 50c of the polygon may be 3, or may be 5 or more. The number of angles 50c of the polygon may be 3 or more and 8 or less, or may be 3 or more and 6 or less.
[0036] The diameter of the through-hole 50 is defined as a hole diameter D. The hole diameter D is the diameter of the outer circumferential circle of the opening edge of the through-hole 50. The hole diameter D is, for example, 20 μm or more and 300 μm or less. The hole diameter D may also be 100 μm or more and 200 μm or less.
[0037] The depth of the through hole 50 is defined as depth DT (see FIG. 1). Depth DT is the distance between the upper end 50a and the lower end 50b. Depth DT is, for example, 10 μm or more and 500 μm or less. Depth DT may be 100 μm or more and 300 μm or less. The aspect ratio of the through hole 50 is, for example, 0.5 or more and 3.0 or less. The aspect ratio of the through hole 50 may be 1 or more and 2 or less. The aspect ratio of the through hole 50 is the value obtained by dividing the depth DT by the hole diameter D.
[0038] (Method of manufacturing printed wiring board 100) A method for manufacturing the printed wiring board 100 will be described below.
[0039] Fig. 4 is a manufacturing process diagram of printed wiring board 100. As shown in Fig. 4, the manufacturing method of printed wiring board 100 includes a preparation step S1, a base material attachment step S2, a hole drilling step S3, a connection conductor layer formation step S4, a resist pattern formation step S5, a conductor layer formation step S6, a resist pattern removal step S7, and an etching step S8.
[0040] In the preparation step S1, a substrate 10 is prepared. After the preparation step S1, a base material attaching step S2 is performed.
[0041] 5 is a cross-sectional view illustrating the substrate attaching step S2. As shown in FIG. 5, in the substrate attaching step S2, the substrate 21 is attached to the main surface 11a by the adhesive layer 20, and the substrate 23 is attached to the main surface 11b by the adhesive layer 22. In the substrate attaching step S2, first, the substrates 21 and 23 are prepared. At this stage, the uncured adhesive layer 20 is disposed on one surface of the substrate 21, and the uncured adhesive layer 22 is disposed on one surface of the substrate 23. In addition, the conductor layer 30 is disposed on the other surface of the substrate 21, and the conductor layer 31 is disposed on the other surface of the substrate 23.
[0042] Second, the base material 21 is arranged so that the adhesive layer 20 covers the conductor layer 12a, and the base material 23 is arranged so that the adhesive layer 22 covers the conductor layer 12b. Third, the base material 21 and the base material 23 are heat-pressed against the substrate 10. This hardens the adhesive layer 20 and the adhesive layer 22, and the base material 21 and the base material 23 are attached to the substrate 10. After the base material attaching step S2, a hole-making step S3 is performed.
[0043] Fig. 6 is a cross-sectional view illustrating the hole drilling step S3. As shown in Fig. 6, in the hole drilling step S3, for example, laser processing is performed to form through holes 50 in the base material 11, adhesive layer 20, base material 21, adhesive layer 22, and base material 23, and to form through holes 30a in the conductor layer 30. Note that by adjusting the focal position and laser power in the laser processing, the radius of curvature of the corner 50c at the lower end 50b can be made larger than the radius of curvature of the corner 50c at the upper end 50a. After the hole drilling step S3, a connection conductor layer forming step S4 is performed.
[0044] Fig. 7 is a cross-sectional view illustrating the connection conductor layer forming step S4. As shown in Fig. 7, in the connection conductor layer forming step S4, for example, electroless plating is performed to form the connection conductor layer 40 on the inner wall surface of the through hole 50 and on the back surface of the conductor layer 31 exposed from the through hole 50. At this time, the connection conductor layer 40 is formed not only on the surface of the conductor layer 30 and the surface of the conductor layer 31 but also on the inner wall surface of the through hole 30a. After the connection conductor layer forming step S4, a resist pattern forming step S5 is performed.
[0045] 8 is a cross-sectional view illustrating the resist pattern forming step S5. As shown in FIG. 8, in the resist pattern forming step S5, a resist pattern 60 is formed on the connecting conductor layer 40. The resist pattern 60 is formed, for example, by applying a dry film resist and then exposing and developing the dry film resist. The resist pattern 60 has openings 61 penetrating the resist pattern 60. After the resist pattern forming step S5, a conductor layer forming step S6 is performed.
[0046] FIG. 9 is a cross-sectional view illustrating the conductor layer forming step S6. As shown in FIG. 9, in the conductor layer forming step S6, a conductor layer 41 is formed on the connecting conductor layer 40 exposed from the opening 61, for example, by electrolytic plating. After the conductor layer forming step S6, a resist pattern removing step S7 is performed. FIG. 10 is a cross-sectional view illustrating the resist pattern removing step S7. As shown in FIG. 10, in the resist pattern removing step S7, the resist pattern 60 is removed from the connecting conductor layer 40. After the resist pattern removing step S7, an etching step S8 is performed.
[0047] In the etching step S8, etching is performed to remove the connecting conductor layer 40 that was under the resist pattern 60, and also remove the conductor layer 30 or conductor layer 31 that was under that. In this way, the structure of the printed wiring board 100 shown in Figures 1 to 3 is formed.
[0048] (First and second modified examples) FIG. 11 is a cross-sectional view of a printed wiring board 100 according to a first modified example. FIG. 11 shows a cross section corresponding to FIG. 1. As shown in FIG. 11, a through hole 50 may be formed in the base material 11, the adhesive layer 20, and the base material 21. That is, a lower end 50b may be located within the base material 11. In this case, for example, the conductor layer 12c is exposed from the through hole 50. Although not shown, the conductor layer 12b or the conductor layer 12d may be exposed from the through hole 50.
[0049] FIG. 12 is a cross-sectional view of a printed wiring board 100 according to a second modified example. FIG. 12 shows a cross section corresponding to FIG. 1. As shown in FIG. 12, the through hole 50 may be formed in the adhesive layer 20 and the base material 21. In this case, the conductor layer 12a is exposed from the through hole 50. That is, in the printed wiring board 100, an insulating layer (note that in the example of FIG. 1, the base material 11, the adhesive layer 20, the base material 21, the adhesive layer 22, and the base material 23 correspond to the insulating layer; in the example of FIG. 11, the base material 11, the adhesive layer 20, and the base material 21 correspond to the insulating layer; and in the example of FIG. 12, the adhesive layer 20 and the base material 21 correspond to the insulating layer) is formed on one conductor layer, another conductor layer is formed on the insulating layer, and the through hole 50 is formed in the insulating layer.
[0050] (Third Modification) Fig. 13 is a cross-sectional view of a printed wiring board 100 according to a third modification. Fig. 13 shows a cross section corresponding to Fig. 2. The opening edge of the through hole 50 does not have to be a convex polygon in cross-sectional view. In other words, as shown in Fig. 13, the opening edge of the through hole 50 may be a concave polygon in cross-sectional view. In this case as well, the hole diameter D is the diameter of the circumscribing circle of the concave polygon.
[0051] (Fourth to seventh modified examples) Fig. 14A is a cross-sectional view of printed wiring board 100 according to a fourth modified example. Fig. 14B is a cross-sectional view of printed wiring board 100 according to a fifth modified example. Fig. 14C is a cross-sectional view of printed wiring board 100 according to a sixth modified example. Fig. 14D is a cross-sectional view of printed wiring board 100 according to a seventh modified example. Figs. 14A to 14D show cross sections corresponding to Fig. 2.
[0052] The opening edge of the through hole 50 does not have to be polygonal in cross-sectional view. That is, as shown in FIGS. 14A to 14D , the opening edge of the through hole 50 may have a circular arc 50d and protrusions 50e protruding from the circular arc 50d in cross-sectional view. The number of protrusions 50e may be one, or may be two or more. The number of protrusions 50e is, for example, one to eight. The number of protrusions 50e may be one to six. The protrusions 50e may protrude toward the center (center C) of the circular arc 50d, or may protrude away from the center C.
[0053] In these cases, the hole diameter D is regarded as the diameter of a circle that is centered at center C and overlaps with arc 50d. The width of protrusion 50e is referred to as width W. Width W is the width of protrusion 50e in the circumferential direction. Width W is measured at the base end of protrusion 50e. The length of protrusion 50e is referred to as length L. Length L is the distance between the tip of protrusion 50e and a circle that is centered at center C and overlaps with arc 50d. Width W is, for example, 1 / 5 to 1 / 24 times the perimeter of through hole 50. The perimeter of through hole 50 is regarded as the circumferential length of a circle that is centered at center C and overlaps with arc 50d. Length L is, for example, 10 μm to 150 μm.
[0054] The radius of curvature of the tip of the protrusion 50e at the lower end 50b is larger than the radius of curvature of the tip of the protrusion 50e at the upper end 50a. The radius of curvature of the tip of the protrusion 50e at the upper end 50a is, for example, 2.5 μm or more and 35 μm or less. The radius of curvature of the tip of the protrusion 50e at the upper end 50a may be 2.5 μm or more and 15 μm or less. The radius of curvature of the tip of the protrusion 50e at the lower end 50b is, for example, 5 μm or more and 50 μm or less. The radius of curvature of the tip of the protrusion 50e at the lower end 50b may be 5 μm or more and 25 μm or less.
[0055] (Effects of the printed wiring board 100) The effects of the printed wiring board 100 will be described below.
[0056] Hydrogen gas is generated during a reaction that occurs when the connecting conductor layer 40 is formed by electroless plating. If bubbles of the generated hydrogen gas remain on the inner wall surface of the through hole 50 or on the back surface of the conductor layer 31 exposed from the through hole 50, the connecting conductor layer 40 becomes thinner in the areas where the bubbles remain, and the thinner connecting conductor layer 40 reduces the reliability of the connecting conductor layer 40. In particular, when the fluororesin layer (substrate 21, substrate 23) forms part of the inner wall surface of the through hole 50, the surface roughness in that part is likely to increase, making it even more difficult for the bubbles to escape.
[0057] In the printed wiring board 100, the opening edge of the through hole 50 has a polygonal shape having corners 50c or protrusions 50e between the upper end 50a and the lower end 50b in a cross-sectional view, and air bubbles can easily escape along the corners 50c and protrusions 50e, making it difficult for the connecting conductor layer 40 to become thin in parts, thereby improving the reliability of the connecting conductor layer 40.
[0058] In a cross-sectional view passing through the lower end 50b, the corners 50c and the tips of the protrusions 50e are stress concentration points. However, in the printed wiring board 100, the radius of curvature of the corners 50c and the tips of the protrusions 50e is larger at the lower end 50b than at the upper end 50a. Therefore, the above-mentioned stress concentration is alleviated in the printed wiring board 100. From this perspective as well, the reliability of the connecting conductor layer 40 in the printed wiring board 100 is improved.
[0059] As the radius of curvature of corners 50c and protrusions 50e increases, stress concentration is alleviated but air bubbles become more difficult to remove. Therefore, by setting the radius of curvature of corners 50c and protrusions 50e at upper end 50a to between 2.5 μm and 35 μm, and the radius of curvature of corners 50c and protrusions 50e at lower end 50b to between 5 μm and 50 μm, it is possible to achieve both ease of air bubble removal and alleviation of stress concentration.
[0060] When the opening edge of the through hole 50 is polygonal in cross section, the more corners 50c there are, the more paths there are for the bubbles to escape. On the other hand, if there are too many corners 50c, the shape of the through hole 50 in cross section approaches a circle, making it easier for the bubbles to remain on the inner wall surface of the through hole 50. From this perspective, by setting the number of corners 50c to be between 3 and 8, it is possible to ensure that the bubbles can easily escape.
[0061] When the opening edge of the through hole 50 has an arc 50d and protrusions 50e in a cross-sectional view, the more protrusions 50e there are, the more paths there are for bubbles to escape. On the other hand, if there are too many protrusions 50e, the protrusions 50e will have sharp shapes, which may cause stress concentration. From this perspective, by setting the number of protrusions 50e to between 1 and 8, it is possible to achieve both ease of bubble escape and reduction of stress concentration.
[0062] The larger the aspect ratio of through hole 50, the more likely air bubbles will remain on the inner wall surface of through hole 50. On the other hand, the larger the aspect ratio of through hole 50, the more likely stress concentration will occur at lower end 50b. From this perspective, by setting the aspect ratio of through hole 50 to be 0.5 or more and 3.0 or less, it is possible to ensure that air bubbles can easily escape without excessive stress concentration.
[0063] (Example) Samples 1 to 22 were prepared to evaluate the reliability of the connecting conductor layer 40. In Samples 1 to 8 and Samples 17 to 22, the opening edge of the through hole 50 in a cross-sectional view had a polygonal shape (rectangle or octagon). In Samples 9 to 16, the opening edge of the through hole 50 in a cross-sectional view had a shape including a circular arc 50d and a protrusion 50e. "Outer protrusion" means a shape in which the protrusion 50e protrudes away from the center C (see Figures 14A and 14B), and "inner protrusion" means a shape in which the protrusion 50e protrudes toward the center C. Details of Samples 1 to 22 are shown in Tables 1 and 2.
[0064] [Table 1]
[0065] [Table 2]
[0066] The reliability of the connecting conductor layer 40 was evaluated by a heat cycle test. The heat cycle test involved increasing the temperature from room temperature to 130°C, then decreasing the temperature to -70°C, and then returning it to room temperature, and this temperature change cycle was repeated 1,000 times over one hour. Samples whose electrical resistance increased by 10 percent or more after 1,000 cycles were determined to be defective, and the reliability of the connecting conductor layer 40 was evaluated based on the number of defective samples divided by the total number of samples (defective rate). The results of the heat cycle test for Samples 1 to 22 are also shown in Table 1.
[0067] Samples 2 and 3 had lower defect rates than Sample 1, and Sample 6 had lower defect rates than Samples 4 and 5. Sample 8 had a lower defect rate than Sample 7. Sample 18 had a lower defect rate than Sample 17, and Sample 20 had a lower defect rate than Sample 19. Sample 22 had a lower defect rate than Sample 21. These comparisons revealed that the reliability of the connecting conductor layer 40 is improved by making the radius of curvature of the corner 50c at the lower end 50b larger than the radius of curvature of the corner 50c at the upper end 50a.
[0068] Sample 10 had a lower defect rate than Sample 9, and Sample 12 had a lower defect rate than Sample 11. Sample 14 had a lower defect rate than Sample 13, and Sample 16 had a lower defect rate than Sample 15. These comparisons reveal that the reliability of the connecting conductor layer 40 is improved by making the radius of curvature of the tip of the protrusion 50e at the lower end 50b larger than the radius of curvature of the tip of the protrusion 50e at the upper end 50a.
[0069] The embodiments disclosed herein are illustrative in all respects and should not be considered limiting. The scope of the present invention is defined by the claims, not by the above-described embodiments, and is intended to include all modifications within the meaning and scope of the claims. [Explanation of symbols]
[0070] 10 substrate, 11 base material, 11a, 11b main surfaces, 12, 12a, 12b, 12c, 12d conductor layers, 20 adhesive layer, 21 base material, 22 adhesive layer, 23 base material, 30 conductor layer, 30a through hole, 31 conductor layer, 40 connecting conductor layer, 41 conductor layer, 50 through hole, 50a upper end, 50b lower end, 50c corner, 50d arc, 50e protrusion, 60 resist pattern, 61 opening, 100 printed wiring board, C center, D hole diameter, DT depth, L length, S1 preparation process, S2 base material attachment process, S3 hole drilling process, S4 connecting conductor layer forming process, S5 resist pattern forming process, S6 conductor layer forming process, S7 resist pattern removal process, S8 etching process, W width.
Claims
1. a first conductor layer; an insulating layer disposed on the first conductor layer; a second conductor layer disposed on the insulating layer; a connecting conductor layer; a through hole is formed in the insulating layer to penetrate the insulating layer and expose the first conductor layer; an opening edge of the through hole has a polygonal shape or a shape having at least one protrusion between the upper end and the lower end in a cross-sectional view perpendicular to a direction from an upper end of the through hole toward a lower end of the through hole; a radius of curvature of a corner of the polygon or a tip of the protrusion is larger at the lower end than at the upper end, A printed wiring board, wherein the connecting conductor layer is arranged on the inner wall surface of the through hole and on the first conductor layer exposed from the through hole so as to electrically connect the first conductor layer and the second conductor layer.
2. The printed wiring board according to claim 1 , wherein the number of the corners is 3 or more and 8 or less.
3. The printed wiring board according to claim 1 , wherein the number of the protrusions is 1 or more and 8 or less.
4. The printed wiring board according to claim 1 , wherein the length of the protrusion is not less than 10 μm and not more than 150 μm.
5. The printed wiring board according to claim 1 , wherein the width of the protrusion is equal to or greater than 1 / 24 and equal to or less than 1 / 5 of the perimeter of the opening edge of the through hole.
6. The printed wiring board according to claim 1 , wherein the radius of curvature of the corner or the tip is 2.5 μm or more and 35 μm or less at the upper end.
7. The printed wiring board according to claim 1 , wherein the radius of curvature of the corner or the tip is 5 μm or more and 50 μm or less at the lower end.
8. The printed wiring board according to claim 1 , wherein the through hole has an aspect ratio of 0.5 or more and 3.0 or less.
9. The printed wiring board according to claim 1 , wherein the through-hole has a diameter of 20 μm or more and 300 μm or less.
10. The printed wiring board according to claim 1 , wherein the through hole has a depth of 5 μm or more and 500 μm or less.
11. The printed wiring board of claim 1 , wherein the insulating layer comprises multiple layers.
12. The printed wiring board according to claim 1 , wherein the insulating layer includes at least one fluororesin layer.
13. The printed wiring board according to claim 1 , wherein the connecting conductor layer is an electroless plated layer.
Citation Information
Patent Citations
Electronic component and method of manufacturing the same
JP2013175504A
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