Front-end systems, charge pumps and packaged modules

Abstract

To disclose a low noise charge pump.SOLUTION: A charge pump includes a charge pump output terminal that applies a charge pump voltage, one switched capacitor, and a plurality of switches. The switches charge the switched capacitor during a charging operation of the charge pump, and connect the switched capacitor to the charge pump output terminal during a discharging operation of the charge pump. The switches operate the charge pump with low noise by non-superimposing operation of a charging operation and a discharging operation.SELECTED DRAWING: Figure 5B

Description

[Technical Field]

[0001] Embodiments of the present invention relate to electronic systems, and more particularly to chargers for radio frequency electronic equipment. Regarding Zippump. [Background technology]

[0002] Radio frequency (RF) communication systems utilize DC-DC power conversion to improve operational performance. Often, voltages in excess of the battery voltage are needed or desired, while other In some situations, a voltage significantly lower than the battery voltage is used. A DC-DC power converter that receives a voltage and generates a higher or lower voltage based on the input voltage. For example, a charge pump uses a capacitor to convert an input voltage to a higher or lower voltage. It can be used as an energy storage element to convert a voltage to a higher voltage.

[0003] Examples of RF communication systems that have one or more charge pumps include mobile phones, tablets, Includes base stations, network access points, laptops, and wearable electronic devices. The power amplifier may be used in a range of frequencies from approximately 30 kHz to 300 GHz. , for example, about 410M for fifth-generation (5G) cellular communications in Frequency Range 1 (FR1). Provides amplification to RF signals that may have frequencies ranging from 100 Hz to approximately 7.125 GHz . Summary of the Invention

[0004] In certain embodiments, the present disclosure relates to a front end system. The system includes a radio frequency switch and a charge pump in a first state of a switch enable signal. a switch controller configured to bias the radio frequency switch with a bias voltage; and a charge pump output terminal configured to generate the charge pump voltage. The charge pump includes a switched capacitor and a To charge the switched capacitor during the charging operation of the charge pump, and The switched capacitor is connected to the charge pump output terminal during the discharge operation of the charge pump. and a plurality of switches configured to perform a charging operation and a discharging operation. It is configured to operate in a non-overlapping manner.

[0005] In various embodiments, the charge pump is powered by a power supply voltage and a ground voltage. The charge pump voltage is lower than the ground voltage.

[0006] In some embodiments, the charge pump supplies a voltage to a first end of the switched capacitor. According to some embodiments, the plurality of switches includes an inverter having an output electrically connected to the inverter. The switch comprises a pair of charging switches connected between the second end of the switched capacitor and a reference voltage. a second terminal of the switched capacitor connected between the second terminal of the switched capacitor and the charge pump output terminal; According to certain embodiments, the pair of charging switches includes a pair of discharging switches. A pair of discharge switches are closed during discharge operation and open during charging operation. According to various embodiments, during the transition from charging to discharging operation, the pair One of the charging switches is open, and the other of the charging switches is According to some embodiments, during a transition from a charging operation to a discharging operation, One of the pair of discharge switches is open, and one of the discharge switches The other discharge switch is closed. The first charging switch is controlled by a first clock phase signal, and the input of the inverter is connected to a first a second clock phase signal delayed from the clock phase signal; The second charging switch of the switches is set to the third clock signal phase delayed from the second clock phase signal. According to various embodiments, the first discharge switch of the pair of discharge switches is The pair of discharge switches are controlled by an inverted version of the first clock phase signal. A second discharge switch of the switch is controlled by an inverted version of the third clock phase signal. According to some embodiments, the inverter is powered by a power high supply voltage and a ground voltage. Receive a salary.

[0007] In some embodiments, the charge pump further comprises: and an oscillator configured to process the first plurality of clock signal phases to generate a second plurality of clock signal phases. and combinational logic configured to generate a clock signal phase, At least in part controlled by a second plurality of clock signal phases.

[0008] In various embodiments, the charge pump includes multiple stages, including a first stage and a second stage. The first stage includes the plurality of switches and the one switched capacitor. According to the embodiment, the plurality of switches are controlled in part by a clock signal from the second stage. .

[0009] In certain embodiments, the present disclosure relates to a method for generating a charge pump voltage. This method uses multiple switches to drive a switched capacitor during the charging operation of the charge pump. and transitioning the charge pump from the charging operation to the discharging operation in a non-overlapping manner. and connecting the switched capacitor to the charge pump output terminal during the discharging operation. This includes:

[0010] In various embodiments, the method further comprises: The charge pump output voltage is controlled to be lower than ground. and applying the voltage to the charge pump output terminal.

[0011] In some embodiments, the method further comprises: According to certain embodiments, the method further comprises controlling a first end of the capacitor. The second terminal of the switched capacitor is controlled using a switch. According to an embodiment, a plurality of switches are connected between the second end of the switched capacitor and a reference voltage. a pair of charging switches connected to the second end of the switched capacitor and the charge pump; and a pair of discharge switches connected between the power supply and the power supply output terminals. For example, the method further includes closing the pair of charging switches during the charging operation; and opening a pair of discharge switches during the discharging operation. and closing the pair of discharge switches during the discharge operation. According to an embodiment, the method further comprises opening one of the pair of charging switches. and during the transition from the charging operation to the discharging operation, the other of the pair of charging switches is turned on. and closing the electrical switch. According to some embodiments, the method further comprises: By opening one of the discharge switches and switching from charging to discharging, and closing the other discharge switch of the pair during the transition. According to some embodiments, the method further comprises: is controlled by a first clock phase signal, and a second clock phase signal delayed from the first clock phase signal is controlled by a second clock phase signal. applying a two-clock phase signal to the input of an inverter and The two charging switches are controlled by a third clock signal phase that is delayed from the second clock signal phase. According to certain embodiments, the method further includes: The first discharge switch is controlled by an inverted version of the first clock phase signal. , the second discharge switch of the pair of discharge switches is connected to the inverted bar of the third clock phase signal; and controlling the system by John.

[0012] In some embodiments, the method further comprises generating the first plurality of clock signals using an oscillator. generating a plurality of clock signal phases using combinational logic; and generating a second plurality of clock signal phases using combinational logic. processing a first plurality of clock signal phases to generate a second plurality of clock signal phases; and controlling at least a portion of the switch using the

[0013] In some embodiments, the charge pump includes multiple stages, including a first stage and a second stage. the first stage includes a plurality of switches and a switched capacitor, and the method further includes: , including controlling some of the plurality of switches by a clock signal from the second stage.

[0014] In certain embodiments, the present disclosure relates to a charge pump. a charge pump output terminal configured to provide a charge pump voltage; and a capacitor to charge the switched capacitor during the charging operation of the charge pump. and charging the switched capacitor to the charge pump during the discharging operation of the charge pump. and a plurality of switches configured to connect to the output terminals. The charge and discharge operations are configured to operate in a non-overlapping manner.

[0015] In various embodiments, the charge pump voltage is less than the ground voltage.

[0016] In some embodiments, the charge pump further comprises a first According to certain embodiments, the inverter includes an output electrically connected to the end of the inverter. The switch is connected between the second end of the switched capacitor and a reference voltage. a switch connected between the second end of the switched capacitor and the charge pump output terminal; According to various embodiments, the pair of charge switches are connected to the charge The pair of discharge switches are closed during charging operation and open during discharging operation. Open during charging operation. According to some embodiments, during transition from charging operation to discharging operation. One of the pair of charging switches is open, and the other of the charging switches is According to certain embodiments, the transition from charging operation to discharging operation is During the transfer, one of the pair of discharge switches is open, and the The other discharge switch is closed. The first charging switch is controlled by the first clock phase signal, and the input of the inverter is A second clock phase signal delayed from the first clock phase signal is received, and the pair of charging switches The second charging switch of the switches is connected to the third clock signal, which is delayed from the second clock phase signal. According to some embodiments, the first discharge switch of the pair is controlled by a phase. The pair of discharge switches are controlled by an inverted version of the first clock phase signal. The second of the switches, the discharge switch, is controlled by an inverted version of the third clock phase signal. According to certain embodiments, the inverter is powered by a power supply voltage and a ground voltage. Receive power supply.

[0017] In some embodiments, the charge pump further comprises: and an oscillator configured to process the first plurality of clock signal phases to generate a second plurality of clock signal phases. and combinational logic configured to generate a clock signal phase, At least in part controlled by a second plurality of clock signal phases.

[0018] In various embodiments, the charge pump includes multiple stages, including a first stage and a second stage. The first stage includes the plurality of switches and the one switched capacitor. According to the embodiment, the plurality of switches are controlled in part by a clock signal from the second stage. . [Brief explanation of the drawings]

[0019] [Figure 1] FIG. 1 is a schematic diagram of an example of a communication network. [Figure 2] FIG. 1 is a schematic diagram of one embodiment of an integrated circuit (IC). [Figure 3] FIG. 1 is a schematic diagram of an embodiment of a power amplifier system. [Figure 4A]FIG. 1 is a schematic diagram of one embodiment of a charge pump. [Figure 4B] 1 is an example of a timing diagram for a charge pump with overlap. [Figure 4C] FIG. 1 is an example of a timing diagram for a non-overlapping charge pump. [Figure 5A] FIG. 10 is a schematic diagram of another embodiment of a charge pump. [Figure 5B] FIG. 2 is a schematic diagram of one embodiment of a charge pump stage. [Figure 6A] FIG. 5C is a first schematic diagram illustrating the operation of the charge pump stage of FIG. 5B; [Figure 6B] FIG. 5C is a second schematic diagram illustrating the operation of the charge pump stage of FIG. 5B. [Figure 6C] FIG. 5C is a third schematic diagram illustrating the operation of the charge pump stage of FIG. 5B. [Figure 6D] FIG. 5C is a fourth schematic diagram illustrating the operation of the charge pump stage of FIG. 5B. [Figure 6E] FIG. 5C is a fifth schematic diagram illustrating the operation of the charge pump stage of FIG. 5B. [Figure 6F] FIG. 5C is a sixth schematic diagram illustrating the operation of the charge pump stage of FIG. 5B. [Figure 6G] FIG. 7 is a seventh schematic diagram illustrating the operation of the charge pump stage of FIG. 5B. [Figure 7] 1 is a flowchart of a method for generating a charge pump voltage according to an embodiment. [Figure 8] FIG. 1 is a schematic diagram of an embodiment of a mobile device. [Figure 9] FIG. 1 is a schematic diagram of a front-end system according to an embodiment. [Figure 10A] FIG. 1 is a schematic diagram of an embodiment of a packaged module. [Figure 10B] FIG. 10B is a schematic cross-sectional view of the packaged module taken along line 10B-10B in FIG. 10A. DETAILED DESCRIPTION OF THE INVENTION

[0020] Headings provided herein, if any, are for convenience only and are not necessarily The existence of any such disclosure does not affect the scope or meaning of the claimed invention.

[0021] The International Telecommunication Union (ITU) is the governing body for information and communications technologies, including the use of the international radio spectrum. It is a specialized agency of the United Nations (UN) responsible for global issues related to the

[0022] The 3rd Generation Partnership Project (3GPP (registered trademark)) is an association of radio industries ( ARIB), Telecommunications Technology Committee (TTC), China Communications Standards Association (CCSA), US Electric Association for Telecommunications Industry Solutions (ATIS), Telecommunications Technology Association (TTA), European Telecom Standards Institute (ETSI), Telecommunications Standards Institute of India (TSDSI) and other international organizations. It is a collaboration between a group of telecommunications standards organizations.

[0023] Working within the ITU, 3GPP is responsible for, for example, second generation (2G) technologies. (e.g., Global System for Mobile Communications (GSM) ) and Enhanced Data Rates for GSM Evolution (EDGE), Third generation (3G) technologies (e.g., Universal Mobile Telecommunications System (UMTS) and high-speed High-Speed Internet Access (HSPA), and fourth-generation (4G) technologies (e.g., Long-Term Evolution Technical expertise on various mobile communication technologies, including LTE (Long-Term Evolution) and LTE Advanced Develop and maintain technical specifications.

[0024] Technical specifications maintained by 3GPP may be extended and revised through specification releases. Specification releases can span multiple years and specify a wide range of new features and evolutions.

[0025] In one example, 3GPP has announced carrier aggregation for LTE in Release 10. Initially, two downlink carriers were introduced, but 3GPP P supports up to five downlink carriers and up to three uplink carriers in Release 14. Carrier aggregation has been extended to include carriers. Other examples of new features and advancements include License Assistant Access (LAA), Extended LAA (eLAA), Narrowband Internet of Things (NB-IOT), Vehicle Two including but not limited to V2X (Vehicle to Everyday), and High Power User Equipment (HPUE) do not have.

[0026] 3GPP has completed the deployment of Phase 1 of fifth-generation (5G) technology in Release 15, It plans to introduce Phase 2 of 5G technology in Release 16 (2019) (The goal is to achieve this.) Subsequent 3GPP releases will further evolve and expand 5G technology. 5G technology is also referred to herein as 5G New Radio (NR).

[0027] 5G NR will be able to operate over mmWave spectrum, with beamforming capabilities and high spectrum Efficient waveforms, low latency communications, multiple radio numerology, and / or non-orthogonal multiple access ( It supports or is planned to support various features such as NOMA. Although the RF capabilities provided by the network provide flexibility and increase user data rates, ,Supporting such functionality can pose a certain number of technical difficulties.

[0028] The teachings herein may be used with LTE Advanced, LTE Advanced Pro and / or 5G NR. This includes, but is not limited to, communication systems that use advanced cellular technologies such as It is applicable to a wide variety of communication systems.

[0029] FIG. 1 is a schematic diagram of an example of a communication network 10. The communication network 10 includes: A macrocell base station 1, a small cell base station 3, and a first mobile device 2a, wireless connection Car 2b, laptop 2c, stationary wireless device 2d, wirelessly connected train 2e, second mobile device The present invention includes various examples of user equipment (UE) including a third mobile device 2f, and a third mobile device 2g.

[0030] Although specific examples of base stations and user equipment are shown in FIG. 1, the communication network , may include a wide variety of types and / or numbers of base stations and user equipment.

[0031] For example, in the illustrated example, the communication network 10 includes a macrocell base station 1 and a smartphone base station 2. The small cell base station 3 is relatively large compared to the macro cell base station 1. It can operate with low power, short range and / or few simultaneous users. The base station 3 may also be called a femtocell, a picocell, or a microcell. Although communication network 10 is shown as including two base stations, 0 may be implemented to include more or fewer base stations and / or other types of base stations. That's fine.

[0032] Although various examples of user equipment are shown, the teachings herein are applicable to various types of user equipment, e.g., mobile phones, Tablets, laptops, IoT devices, wearable electronics, customer premises equipment (C PE), wirelessly connected vehicles, wireless relays, and / or a wide variety of other communication devices. It is applicable to various user equipments. Furthermore, the user equipments are The presently available communication devices that operate in conjunction with the present invention are not limited to those described and claimed herein. The invention also provides a number of other readily implementable and subsequently developed systems, processes, methods and devices. This also includes communication devices that emit

[0033] The example communication network 10 of FIG. 1 may be configured with various LTE and 5G NR technologies, including, for example, 4G LTE and 5G NR. In certain implementations, the communications network supports communications using cellular technologies. The Q10 also provides wireless local area networks (WLANs) such as WiFi. Although various examples of communication technologies are given, Network 10 can be adapted to support a wide variety of communication technologies.

[0034] Various communication links of a communication network 10 are depicted in FIG. For example, frequency division duplexing (FDD) and / or time division duplexing (TDD) FDD can be duplexed in a variety of ways, including: FDD is a type of radio frequency communication that uses different frequencies. FDD provides high data rates and It can provide a number of benefits, such as lower latency. In contrast, TDD , the same frequency is used for signal transmission and signal reception, and transmission and reception are switched over at regular intervals. TDD is a type of radio frequency communication. It is based on efficient use of spectrum and It can provide a number of benefits, such as variable allocation of throughput between the receiving and receiving directions.

[0035] In certain implementations, the user equipment may support 4G LTE technology, 5G NR technology, and Wi-Fi. In certain implementations, the mobile station may communicate with the base station using one or more of the following technologies: Enhanced Licensed Assisted Access (eLAA) is a technology that allows operators to access one or more licensed spectrum carriers. (e.g., licensed 4G LTE and / or 5G NR frequencies) One or more unlicensed carriers (e.g. unlicensed WiFi frequencies) It is used to aggregate with the number of

[0036] As shown in FIG. 1, the communication link is a communication link between a user equipment (UE) and a base station. This includes not only UE-to-UE communications but also UE-to-base station communications. The communication network 10 is configured to communicate with the mobile device 2g and the mobile device 2f. Can be implemented to support self-fronthaul and / or self-backhaul .

[0037] The communication link may operate over a wide variety of frequencies. and / or or supported using 5G NR technology across one or more frequency bands above 6 GHz. For example, a communication link may be configured with frequency range 1 (FR1), frequency range 2 (FR2), and ), or a combination thereof. One or more of the devices supports the HPUE power class specification.

[0038] In certain implementations, the base station and / or user equipment may use beamforming. For example, beamforming is associated with communication over high signal frequencies. It can be used to concentrate signal strength to overcome path losses such as high loss. In certain embodiments, one or more user equipment, such as a mobile phone, may be 30G Millimeter wave frequency bands ranging from Hz to 300 GHz, and / or from 6 GHz 30 GHz, more specifically the upper limit centimeter in the range from 24 GHz to 30 GHz It communicates using beamforming on wave frequencies.

[0039] Different users of the communication network 10 may use available resources, such as available frequency spectrum. Available network resources can be shared in a variety of ways.

[0040] In one example, frequency division multiple access (FDMA) divides a frequency band into multiple frequency carriers. Additionally, one or more carriers may be assigned to a particular user. Examples of FDMA are Single Carrier FDMA (SC-FDMA) and Orthogonal FDMA. OFDM is a technique that uses multiple signals to divide the available bandwidth. Multi-carrier technology is a technique that subdivides the signal into a number of mutually orthogonal narrowband subcarriers, which is different Can be assigned separately to users.

[0041] Another example of shared access is when a user has access to a specific time slot using a frequency resource. Time Division Multiple Access (TDMA), which assigns a unique code to each user Code division multiple access (CDMA) is a method in which frequency resources are shared among different users. ), spatial division where beamforming is used to provide shared access through spatial division Multiple access (SDMA) and non-orthogonal power domains are used for multiple access purposes. For example, NOMA allows multiple access over the same frequency band. Used to provide multiple users with different power levels, albeit in different numbers, times and / or codes. It is possible.

[0042] Enhanced Mobile Broadband (eMBB) is an increasing system of LTE networks Refers to technology for capacity. For example, eMBB provides at least 10 Gbps of data rate to each user. The user can refer to communication with a peak data rate of at least 100Mbps. Reliable Low Latency Communication (uRLLC) provides extremely low latency, e.g., less than 2 milliseconds. This refers to the technology that communicates. uRLLC is a promising technology for autonomous driving applications and / or remote surgery. It can be used for mission-critical communication applications. Machine-scale communication (mMTC) is a promising technology for Internet of Things (IoT) applications. associated with wireless connections to everyday objects, such as those associated with smartphones. It refers to low-cost, low-data-rate communications.

[0043] The communication network 10 of FIG. 1 includes eMBB, uRLLC, and / or mMTC. It can be used to support a wide variety of advanced communication functions, including but not limited to: Cut.

[0044] 2 is a schematic diagram of one embodiment of an integrated circuit (IC) 20. The exemplary IC 20 includes: A first pin 15a receives a power low supply voltage V1 (e.g., ground), and a power high supply voltage V 2. Additionally, the exemplary IC 20 further includes an RF switch 21, charge pump 22 and switch controller 23. Although not shown in FIG. 2, IC 20 typically includes additional pins and circuitry.

[0045] The charge pump 22 generates a charge pump having a voltage level lower than the power low supply voltage V1. The switch controller 23 controls the RF switch. The MOSFET receives a charge pump voltage, a portion of which may be used to control the MOSFET switch 21.

[0046] For example, the exemplary IC 20 may represent a front-end module (FEM). When in the off state, the switch 21 is biased to the voltage level of the charge pump voltage. The NMOS transistor may include an n-type metal oxide semiconductor (NMOS) switch transistor including a gate. The gate voltage of the OS switch transistor is set to a voltage lower than the power supply voltage in the off state. By controlling the voltage to a value higher than the OFF state impedance, This allows for improved isolation in multi-band applications. Cut.

[0047] When the NMOS switch transistor operates in the on state, the NMOS switch The transistor may be driven to any suitable voltage level, such as the voltage level of the high power supply voltage V2. In a given configuration, the power high supply voltage V2 can be biased on-chip or off-chip. The regulator can be used to generate a regulated voltage. Generating the high supply voltage V2 controls the NMOS switch transistor to turn it on. at a relatively constant voltage level over temperature, battery voltage level and / or current load. It can be an aid to operation.

[0048] In a given configuration, IC 20 is fabricated using a silicon-on-insulator (SOI) process. The RF switch 21 may be fabricated using SOI transistors. Other configurations are possible.

[0049] 3 is a schematic diagram of one embodiment of a power amplifier system 40. The system 40 includes an RF switching circuit 27. The RF switching circuit 27 is a series switch. The power amplifier includes a shunt switch transistor 25 and a shunt switch transistor 26. The detector system 40 further includes a charge pump 22, a switch controller 23, a directional coupling The exemplary transmitter includes a power amplifier bias circuit 30, a power amplifier 32, and a transmitter 33. The receiver 33 includes a baseband processor 34, an I / Q modulator 37, a mixer 38, and an analog - Includes an analog-to-digital converter (ADC) 39.

[0050] The baseband signal processor 34 generates a sine wave or sinusoidal signal of the desired amplitude, frequency and phase. It can be used to generate in-phase (I) and quadrature (Q) signals that can be used to represent For example, the I signal can be used to represent the in-phase component of a sine wave, and the Q signal can be used to represent the in-phase component of a sine wave. It is used to represent the orthogonal components of a wave. These can be equivalent representations of sine waves. In certain implementations, the I and Q signals are transmitted in digital format to an I / Q modulator 37. The baseband processor 34 is configured to process the baseband signal. It may be any suitable processor. For example, the baseband processor 34 may be a digital signal processor. processor, microprocessor, programmable core, or any combination thereof Additionally, in some implementations, the power amplifier system 40 may include two The above baseband processor 34 may be included.

[0051] The I / Q modulator 37 receives the I and Q signals from the baseband processor 34 and The I and Q signals can be configured to be processed to generate an RF signal. For example, The I / Q modulator 37 is configured to convert the I and Q signals to an analog format. a DAC for converting the I and Q signals to radio frequency; The inverted I and Q signals are combined to form a suitable R signal for amplification by power amplifier 32. In certain implementations, the I / Q modulator 37 may include a signal combiner to combine the I / Q signals into an F signal. one or more filters configured to filter the frequency content of the signal being processed; It may include.

[0052] The power amplifier bias circuit 30 outputs an enable signal ENABLE from the baseband processor 34. , and one or more enable signals for the power amplifier 32 using an enable signal ENABLE. The power amplifier 32 can generate a bias signal for the RF signal to the I / Q modulator 3. It can be received from 7.

[0053] The switch controller 23 controls the series switch transistor 25 and the shunt switch transistor The transistor 26 can be turned on and off in a compensating manner. The power amplifier 32 connects the roller 23 to the antenna 14 via the series switch transistor 25. The series switch transistor 25 is turned on to provide an amplified RF signal. This can be used to turn off the switch transistor 26. The roller 23 provides a high impedance path between the output of the power amplifier 32 and the antenna 14. and a series switch transistor 2 to provide a termination at the output of the power amplifier. 5 may be used to turn off shunt switch transistor 26 and turn on shunt switch transistor 26. To control the state of the RF switching circuit 27, the switch controller 23 A switch valid signal can be received.

[0054] The directional coupler 24 connects the output of the power amplifier 32 to the source of the series switch transistor 25. Since the series switch transistor 25 can be placed between the This allows measurement of the output power of the power amplifier 32. The input signal is applied to a mixer 38. The mixer 38 combines the sensed output signal with a controlled The sensed output signal can then be multiplied by a reference signal of the sensed frequency. The contents of the signal can be downshifted to generate a downshift signal. The signal is fed to the ADC 39, which then sends the downshifted signal to the baseband processor. The digital signal can be converted into a digital format suitable for processing by the processor 34.

[0055] Include a feedback path between the output of the power amplifier 32 and the baseband processor 34 This allows the baseband processor 34 to dynamically adjust the I and Q signals to achieve power amplification. The power amplifier system 40 may be configured to optimize its operation. By configuring the system 40 in this manner, the power added efficiency (PAE) and This can help control the speed and / or linearity.

[0056] In the illustrated configuration, the charge pump 22 comprises a series switch transistor 25 and a shunt The switch controller 23 is used to control the switch transistor 26. In a given configuration, the charge pump voltage is applied to the series switch When transistor 25 and / or shunt switch transistor 26 are turned off, Gate voltage of the column switch transistor 25 and / or the shunt switch transistor 26 For example, the charge pump 22 is used to bias the series switch transistor. negative charge to turn off transistor 25 and / or shunt switch transistor 26. A pump voltage can be generated.

[0057] A switch controller 23 generates switch control signals for the two transistors. Although shown as such, the switch controller 23 may be configured to operate in a more or less adapted to control a switch control transistor and / or other switch device. For example, the switch controller may receive multiple switch enable signals and may have different RF A number of switch control signals can be generated for controlling the switching circuitry.

[0058] 4A is a schematic diagram of one embodiment of a charge pump 50. The charge pump It includes a non-overlapping switch control generator 41 and a negative voltage generator (NVG) stage 42. Although shown as including stage 42, charge pump 50 may include additional stages. Furthermore, although presented in the context of negative voltage generation, Alternatively, charge pump 50 may be adapted to operate as a positive voltage generator (PVG). .

[0059] NVG stage 42 selectively charges and discharges flying capacitor 45 to generate a negative It includes a switch 44 that is used to generate the voltage NVG. The flying capacitor 45 The switch 44 is also referred to herein as a switched capacitor. For example, metal oxide semiconductor (MOS) transistors, which can be n-type, p-type, or a combination thereof. transistors), bipolar transistors, diodes, microelectromechanical (MEMs) devices, and / or other types of switches. It can be implemented in a way.

[0060] As shown in FIG. 4A, the non-overlapping switch control generator 41 is A clock (provided by, for example, an oscillator) is used to generate the switch control for opening and closing each of them. The NVG stage 42 includes combinatorial logic 43 for processing the lock signal phase. It operates in various phases associated with charging and discharging the line capacitor 45 .

[0061] The non-overlapping switch control generator 41 is configured to: For example, non-overlapping switch control signals to prevent current flow between ground and the negative voltage NVG. Generate.

[0062] Prevents shoot-through currents, thereby preventing ground noise spikes and / or negative voltage NVG leakage Leaks are reduced.

[0063] Figure 4B is an example of a timing diagram for a charge pump with overlap. A charge control signal controls the charging of the flying capacitor, and a charge control signal controls the discharging of the flying capacitor. As shown in Figure 4B, the charge pump switches from charging to discharging. At the time of the transition from the discharge state to the charge state and at the time of the transition from the discharge state to the charge state, the period of the overlap 47 is operated. 47 prevents shoot-through currents that increase noise and / or degrade the performance of the charge pump. be caused.

[0064] FIG. 4C is an example of a timing diagram for a non-overlapping charge pump. As shown, the combinational logic of the charge pump processes the clock signal phase to A charge control signal controls the charging of the flying capacitor, and a discharge control signal controls the discharging of the flying capacitor. Generates an electric control signal.

[0065] In contrast to the timing diagram of FIG. 4B, the timing diagram of FIG. 4C shows the transitions of the charge control waveforms and The discharge control waveform transition operates without overlapping. By providing non-overlapping in this manner, current is prevented, thereby reducing noise spikes and / or reducing negative voltage leakage. do.

[0066] 5A is a schematic diagram of another embodiment of the charge pump 60. includes an oscillator 51 and a group of charge pump stages 53. 53 is a first NVG stage 52 operating in combination to generate a negative voltage NVG; a, second NVG stage 52b, and third NVG stage 52c. An example implementation with three stages is shown. Nevertheless, charge pump 60 may be adapted to include more or fewer stages. It is possible.

[0067] As shown in FIG. 5A, oscillator 51 generates first clock signal phases, each of which has a different phase. phase P1, a second clock signal phase P2 and a third clock signal phase P3. , the second clock signal phase P2 is delayed relative to the first clock signal phase P1, and the third clock Signal phase P3 is delayed relative to second clock signal phase P2.

[0068] The first NVG stage 52a receives the first clock signal phase P1 and converts the first clock signal phase P1 into Operates to invert phase P1 to generate a first inverted clock signal phase P1b. In the example implementation, the first inverted clock signal phase P1b generated by the first NVG stage 52a is In addition to providing a logical inversion, the first clock signal phase P1 also provides a voltage shift. For example, by implementing the first NVG stage 52a in this manner, it is possible to provide a suitable This helps to generate the first inverted clock signal phase P1b with the appropriate voltage level.

[0069] Continuing to refer to FIG. 5A, the second NVG stage 52b receives the second clock signal phase P2. and inverts the second clock signal phase P2 to generate a second inverted clock signal phase P2b. Additionally, the third NVG stage 52c operates to generate a third clock signal phase P3. and inverts the third clock signal phase P3b. In certain implementations, the second NVG stage 52b and the third NVG stage 52c provides voltage level shifting in addition to logic inversion.

[0070] The first NVG stage 52a, the second NVG stage 52b, and the third NVG stage 52c also It also receives various clock signal phases that control the charging and discharging operations of the capacitors. clock signal phases provide non-overlapping charging and discharging in accordance with the teachings herein.

[0071] In certain embodiments, the first NVG stage 52a receives a third clock signal to control charging. and a second inverted clock signal P3 and a second clock signal P2 to control the discharge. Additionally, the second NVG stage 52 receives a third inverted clock signal P2b and a third inverted clock signal P3b. b receives the first clock signal phase P1 and the third clock signal phase P3 to control charging. and the third inverted clock signal phase P3b and the first inverted clock signal phase P4c to control the discharge. Additionally, the third NVG stage 52c receives the second clock P1b to control charging. A first inverting clock receives the first clock signal phase P2 and the first clock signal phase P1 to control the discharge. The first clock signal receives a first clock signal phase P1b and a second clock signal phase P2b.

[0072] 5B is a schematic diagram of one embodiment of a charge pump stage 80. 80 is a circuit diagram of the inverter 61, the flying capacitor 62, the first discharge switch 71, the second discharge switch The charging switch 72 includes a first charging switch 73 and a second charging switch 74 .

[0073] The charge pump stage 80 of FIG. 5B is connected to the clock signal phase corresponding to the second NVG stage 52b. 5A illustrates one embodiment of an NVG stage for the charge pump 60 of FIG. Although one embodiment of a charge pump stage is depicted, the teachings herein may be applied in a wide variety of ways. This is applicable to charge pump stages implemented in this manner.

[0074] As shown in FIG. 5B, inverter 61 is connected to the regulated power supply voltage V REG , and here The inverter 61 is powered by a ground voltage, also referred to as land or GND. an input for receiving the second clock signal phase P2 and connected to a first end of the flying capacitor 62; The flying capacitor 62 also includes an output connected to the second clock signal phase P2. A second inverted clock signal phase P2b is generated that is both logically inverted and level shifted relative to the first inverted clock signal phase P1b. It also includes a second end that forms the

[0075] Continuing to refer to FIG. 5B, the first charging switch 73 and the second charging switch 74 are The first charging switch is connected in series between the land and the second end of the flying capacitor 62. The first charging switch 73 is controlled by the first clock signal phase P1, while the second charging switch 74 is controlled by the second clock signal phase P2. 3 is controlled by clock signal phase P3. Additionally, first discharge switch 71 and second A discharge switch 72 is connected in series between the negative voltage NVG and the second end of the flying capacitor 62. The first discharge switch 71 is controlled by the first inverted clock signal phase P1b. , the second discharge switch 72 is controlled by the third inverted clock signal phase P3b.

[0076] Charge pump stage 80 of FIG. 5B controls the charging and discharging of flying capacitor 62. For example, the flying capacitor 62 is mounted so that the first charging switch The battery is charged when both the first charging switch 73 and the second charging switch 74 are on. When either or both of the first charging switch 73 and the second charging switch 74 are on, charging is not performed. For example, the flying capacitor 62 is connected to the first discharge switch 71 and the second discharge switch 7 When both the first discharge switch 71 and the second discharge switch 72 are on, the discharge is initiated. When either or both are on, no discharge occurs. , are timed to prevent non-overlap during transitions between charging and discharging operations. Providing such non-overlapping results in prevention of shoot-through currents and reduced noise.

[0077] 6A-6G are schematic diagrams illustrating phases of operation of charge pump stage 80 of FIG. 5B. be.

[0078] FIG. 6A illustrates the first phase of operation of charge pump stage 80. Here, the flying capacitor The first terminal of the bottom 62 is connected to the regulated voltage V REG The second flying capacitor 62 is controlled by As shown in FIG. 6A, the first charging switch 73 and The first and second charging switches 74 are both turned on while the first and second discharging switches 71 and 74 are turned on. Both power switches 72 are turned off.

[0079] 6B illustrates a second phase of operation of charge pump stage 80, where first charge switch 73 transitions from an ON state to an OFF state, and the first discharge switch 71 transitions from an OFF state to an ON state. As shown in FIG. 6B, the first end of flying capacitor 62 is connected to a regulated voltage V R EG The second end of the flying capacitor 62 remains connected to the first charging switch 63. Switch 73 is turned off and disconnected from ground. As shown in FIG. , only one charge switch and only one discharge switch are turned on.

[0080] 6C illustrates a third phase of operation of charge pump stage 80, where the second clock signal Phase P2 transitions from low (0V in this example) to high (2.5V in this example). Since the second end of the flying capacitor 62 is electrically floating, the first end of the flying capacitor 62 The second terminal changes the voltage level at the first terminal of the flying capacitor 62 from high to low. In response to the output of inverter 61 going negative, it transitions to a negative voltage (-2.5V in this example).

[0081] 6D illustrates a fourth phase of operation of charge pump stage 80, where second charge switch 74 transitions from an ON state to an OFF state, and the second discharge switch 72 transitions from an OFF state to an ON state. As shown in FIG. 6D, in the fourth phase, the first The two ends are connected to an output terminal that provides a negative voltage NVG. As shown in Figure 6D, both The discharge switch is turned on and both charge switches are turned off.

[0082] 6E illustrates a fifth phase of operation of charge pump stage 80, where first charge switch 73 transitions from an OFF state to an ON state, and the first discharge switch 71 transitions from an ON state to an OFF state. As shown in Figure 6E, there is only one charging switch and only one discharging switch. The switch is turned on.

[0083] 6F illustrates a sixth phase of operation of charge pump stage 80, where the second clock signal Phase P2 transitions from high (2.5V in this example) to low (0V in this example). The second end of the capacitor 62 is disconnected from ground during the sixth phase.

[0084] 6G depicts the operation of charge pump stage 80 returning to the first phase. Stage 80 transitions second charging switch 74 from an OFF state to an ON state and second discharging switch The transition from the ON state to the OFF state of 72 returns to the first phase.

[0085] FIG. 7 is a flow chart of a method 190 for generating a charge pump voltage according to one embodiment. The method 190 includes one or more charge pump stages implemented in accordance with the teachings herein. This can be done by a charge pump.

[0086] The method 190 begins at step 191, where the capacitance of the charge pump capacitor is The first terminal is connected to a first voltage (e.g., V REG ), and the second end of the capacitor is connected to a second voltage ( The method 190 further comprises connecting the second end of the capacitor to a second voltage. Continue to step 192 where it is released.

[0087] Continuing with reference to FIG. 7, method 190 includes connecting a first end of a capacitor to a second voltage. This is followed by step 193 where the second end of the capacitor 192 is connected to a second voltage. Since the second end of the capacitor 192 is disconnected from the voltage during step 193, Since the capacitor is floating at a voltage swings.

[0088] The method 190 includes step 1, where a second end of the capacitor is connected to an output of the charge pump. 94. By connecting the capacitor in this manner, the voltage stored in the capacitor The load can be discharged into a load driven by a charge pump.

[0089] Continuing with reference to FIG. 7, method 190 includes: connecting a second end of the capacitor to the output; The method 190 continues with step 195, where the first end of the capacitor is connected to a first voltage. The method 190 continues with step 196, where the second end of the capacitor is connected to a second voltage. The process returns to step 191 where the

[0090] 8 is a schematic diagram of one embodiment of a mobile device 800. The mobile device 800 , a baseband system 801, a transceiver 802, a front-end system 803, an antenna a power management system 805; a memory 806; a user interface 807; Includes a battery 808.

[0091] The mobile device 800 may be 2G, 3G, 4G (LTE, LTE Advanced, and LTE Advanced). Advanced Pro), 5G NR, WLAN (e.g., WiFi), WPAN (e.g., Bluetooth (registered trademark) and ZigBee (registered trademark), WMAN (e.g., WiM ax), and / or using a variety of communication technologies, including but not limited to GPS technology. It can be used to communicate with

[0092] The transceiver 802 generates RF signals for transmission and receives incoming signals from the antenna 804. It will be appreciated that the various aspects associated with transmitting and receiving RF signals may be The various functions are implemented by one or more components collectively represented in FIG. 8 as a transceiver 802. In one example, separate components are used to handle certain types of RF signals. The components (eg, separate circuits or dies) may be provided.

[0093] The front-end system 803 transmits to the antenna 804 and / or to the antenna 80 4. In the illustrated embodiment, The front-end system 803 includes a charge pump 810, a power amplifier (PA) 811, and a low-noise amplifier (LNA). a low noise amplifier (LNA) 812, a filter 813, a switch 814, and a signal splitting / combining circuit 815. However, other implementations are possible.

[0094] For example, the front-end system 803 may include signal amplification for transmission, amplification of received signals, Filtering signals, switching between different bands, switching between different power modes switching between transmit and receive modes, duplexing signals, multiplying signals Dualplexing (e.g., diplexing or triplexing), or any of these A number of functions can be provided, including but not limited to any combination thereof.

[0095] In certain implementations, the mobile device 800 supports carrier aggregation. This allows for flexibility to increase peak data rates. is a combination of frequency division duplexing (FDD) and time division duplexing (TDD). It can be used for both single and multiple carriers or channels. Carrier aggregation is the aggregation of adjacent carriers within the same operating frequency band. Carrier aggregation may also be discontinuous, within a common band or Frequencies in different bands may include separated carriers.

[0096] Antenna 804 may include antennas used for a wide variety of types of communications. For example, the antenna array 804 may receive signals associated with a wide variety of frequencies and communication standards. The signal may include an antenna for transmitting and / or receiving.

[0097] In certain implementations, antennas 804 may be used for MIMO communications and / or switched diversity communications. For example, MIMO communication uses a single radio frequency channel. MIMO communication uses multiple antennas to transmit multiple data streams via a single antenna. may be used to achieve high signal-to-noise ratios, improved coding, and / or spatial multiplexing in wireless environments. The benefits of switched diversity are a reduction in signal interference due to signal timing differences. Refers to communications where a particular antenna is selected to operate at a particular time. based on various factors such as bit error rate and / or signal strength indicators. A switch can be used to select a particular antenna from the group of antennas.

[0098] The mobile device 800, in certain implementations, operates with beamforming. For example, the front-end system 803 may include a front-end for transmitting signals using an antenna 804 and a front-end for transmitting signals using an antenna 804. and / or controllable receivers to provide beam formation and directionality for reception purposes. and a phase shifter with a controllable phase. In this pulse, the amplitude and phase of the transmit signal applied to antenna 804 are The signals emitted from the antenna combine using constructive and destructive interference and propagate in a given direction. The signal strength is controlled to generate an aggregate transmit signal indicative of the beam quality of the received signal. In the context of signal transmission, amplitude and phase indicate whether a signal is arriving at antenna 804 from a particular direction. In certain implementations, the signal energy is controlled to be received when the The antenna 804 may include one or more antenna elements for improved beamforming. Contains an array.

[0099] The baseband system 801 provides various user inputs and outputs (I / O) such as voice and data. / O). The dem 801 is a digital representation of the transmit signal from which the transceiver 802 generates an RF signal for transmission. The baseband system 801 also provides a It processes a digital representation of the received signal as it is applied. As shown in Figure 8, System 801 is coupled to memory 806 to facilitate operation of mobile device 800 .

[0100] The memory 806 may be used to facilitate operation of the mobile device 800 and / or to store user information. for a wide variety of purposes, such as storing data and / or instructions to provide storage of can be used for

[0101] The power management system 805 provides a number of power management functions for the mobile device 800. In a specific implementation, the power management system 805 is a PA supply control system that controls the supply voltage of 811. For example, the power management system 805 may include control circuits for efficiency such as power added efficiency (PAE). to vary the supply voltage applied to one or more of the power amplifiers to improve efficiency. It can be configured. As shown in FIG. 8, the power management system 805 receives the battery voltage from the battery 808. The battery 808 may be any suitable battery for use in the portable device 800. , including lithium-ion batteries.

[0102] Figure 9 is a schematic diagram of a front-end system 900 according to one embodiment. The front-end system 900 includes a charge pump 22, a first RF switch 901a, a second RF switch 901b, a switch 901b, a third RF switch 901c and a switch controller 903. Although front-end system 900 is illustrated as including three RF switches, However, the front-end system 900 may include more or fewer RF switches. It may be adapted as follows.

[0103] The charge pump 22 receives a system enable signal EN and, when enabled, Pump voltage V CP The charge pump 22 generates a first state of the system enable signal EN. and is disabled in the second state of the system enable signal EN. The first state may represent a normal operating mode of the front-end system 900, and the second state may represent a may indicate a standby mode of the front-end system 900.

[0104] In the illustrated embodiment, the switch controller 903 controls the system enable signal EN, 1 Switch enable signal SW EN1 , second switch enable signal SW EN2 and the third switch is enabled Signal SW EN3 Additionally, the switch controller 903 receives the first RF switch The first switch control signal SW that controls the switch 901a CTL1 , the second RF switch 901b The second switch control signal SW CTL2 , and controls the third RF switch 901c. Third switch control signal SW CTL3 Generate.

[0105] As shown in FIG. 9, the switch controller 903 includes a first level shifter 951a, The second level shifter 951b, the third level shifter 951c, and the level shifters 951a to 951c Bias voltage V for 51c BIAS The level shifter control circuit 952 generates: The level shifters 951a to 951c are connected to the power supply voltage V2 and the charge pump voltage V CP The example switch controller includes three level shifters. Nevertheless, the switch controller may contain more or fewer level shifters. good.

[0106] The level shifters 951a to 951c receive the first switch control signal SW CTL1 , second switch Control signal SW CTL2 and the third switch control signal SW CTL3 The voltage level of the first switch Switch enable signal SW EN1 , second switch enable signal SW EN2 and the third switch enable signal SW EN3 For example, the first level shifter 951a controls the The power high supply voltage V2 is EN1 and Charge pump voltage V CP is the first switch enable signal SW EN1 As in the second state of First switch control signal SW CTL1 can be controlled.

[0107] Additional details of the front-end system 900 are similar to those described earlier. That's fine.

[0108] FIG. 10A is a schematic diagram of one embodiment of a packaged module 1000. 10B is a cross-sectional view of the packaged module 1000 taken along line 10B-10B in FIG. 10A. FIG.

[0109] The packaged module 1000 includes an IC or semiconductor die 1001, surface mount components, and components 1003, wire bonds 1008, package substrate 1020 and encapsulation structure 104 The package substrate 1020 includes pads 10 formed from conductors disposed thereon. Additionally, die 1001 includes pads 1004 and wire bonds 1008. , electrically connecting pad 1004 of die 1001 to pad 1006 of package substrate 1001. It is used to connect.

[0110] As shown in FIGS. 10A and 10B, die 1001 is similar to that described earlier. The RF switch 21, charge pump 22, and switch controller 23 may be any of various configurations. Charge pump 22 may be implemented according to any of the embodiments herein.

[0111] The package substrate 1020 supports the die 1001 and, for example, surface mount capacitors and / or or multiple components such as surface mount component 1003, which may include an inductor. The device may be configured to accept a

[0112] As shown in FIG. 10B, the packaged module 1000 The die 1001 is attached to the side of the mold 1000 opposite to the side used to attach the die 1001. The packaged module 100 is shown to include a plurality of contact pads 1032. By configuring the packaged module 1000 in this manner, the packaged module 1000 can be used as a wireless device. The contact pads 1032 are used to connect the device to a circuit board such as a telephone board. Examples include RF signals, bias signals, power low voltages and / or power high voltages applied to the die 1001 and and / or may be configured to provide a surface mount component 1003. Thus, the electrical connection between the contact pads 1032 and the die 1001 is made through the package substrate 1 This can be facilitated by a connection 1033 through the multi-layer laminate package. through the package substrate 1020, such as connections associated with vias and conductors in the package substrate. This may represent an electrical path formed in this way.

[0113] In some embodiments, the packaged module 1000 may also be, for example, a package. One or more packages that provide protection and / or ease of handling for the cage-like module 1000. Such a package structure may include a package substrate 1020 and a semiconductor device disposed thereon. An overmold or encapsulation structure formed over the mounted component and die. It may include item 1040.

[0114] It will be understood that the packaged module 1000 may be configured with electrical connections based on wire bonds. Although described in the following context, one or more features of the present disclosure may also be used in, for example, flip chips. The present invention may also be implemented in other package configurations, including a chip configuration.

[0115] application

[0116] Some of the embodiments described above provide examples relating to wireless devices or mobile phones. However, the principles and advantages of those embodiments do not require a low noise charge pump. It can be used in any other system or device where required.

[0117] Such a charge pump can be implemented in a variety of electronic devices. Examples may include consumer electronic products, components for such consumer electronic products, electronic test equipment, etc. Examples of electronic devices also include, but are not limited to, memory chips, memory modules, optical It may also include circuitry for a network or other communications network, and disk driver circuitry. Consumer electronic products include, but are not limited to, mobile phones, telephones, televisions, computers, Computer monitors, computers, handheld computers, personal digital assistants Stunts (PDAs), microwave ovens, refrigerators, cars, stereo systems, cassette records DVD players, CD players, VCRs, MP3 players, radios, video cameras, cameras, digital cameras, portable memory chips, washing machines, dryers, washing / drying machines Dryers, copiers, fax machines, scanners, multi-function peripheral devices, wristwatches, clocks, etc. Additionally, electronic devices may include unfinished products.

[0118] summary

[0119] Throughout this specification and claims, unless the context clearly indicates otherwise, The terms "include" and "includes" are used in an inclusive sense as opposed to an exclusive or exhaustive sense, i.e., " The term "including but not limited to" should be interpreted as meaning "including but not limited to" as generally used herein. The term "coupled" means either directly connected or connected through one or more intermediate elements. Similarly, the word "connected" as used generally herein refers to two or more elements that can be connected. 2 that can be either directly connected or connected via one or more intermediate elements In addition, the words "here," "above," "below," and words of similar import When used in this application, refers to the application as a whole and to any specific portion of this application. Where the context permits, the singular or plural may be used in the above detailed description. Each term may also include the plural or the singular. The term "or" referring to a list of two or more items With respect to "is" and "or," the term covers all of the following interpretations: , any item in the list, all items in the list, and any of the items in the list It's a combination.

[0120] Furthermore, the following are among others: "can," "might," "may," "might," "even Conditional language such as "if," "like," etc., used herein generally refers to situations where the Unless stated or understood otherwise by the context of use, a given embodiment that one embodiment includes certain features, elements and / or conditions while other embodiments do not. That is, such conditional language is intended to convey the characteristics, elements, and / or states The embodiment may be in any aspect necessary for one or more embodiments, or one or more embodiments may be necessary. These characteristics, elements and / or or determining whether a state is included in or performed in any specific embodiment. It is not generally intended to imply that the specification contains any logic that

[0121] The above detailed description of embodiments of the present invention is not intended to be exhaustive, i.e., to limit the invention to the above disclosure. It is not intended to be limited to the precise form, and specific embodiments of the invention and examples thereof are illustrative. While the above description is for illustrative purposes, those skilled in the art will recognize that various equivalents are within the scope of the present invention. Modifications are possible. For example, although processes or blocks are presented in a given order, alternative implementations may be used. Embodiments may involve performing routines having steps in a different order or systems having blocks. The system can be used, and some processes or blocks can be deleted, moved, added, or subdivided. Each of these processes or blocks may be The processes or blocks may be implemented in various different ways. Although these processes or blocks may be shown as They can be done in parallel or at different times.

[0122] The teachings of the present invention provided herein are not necessarily limited to the systems described above, but may also be used in other The various embodiment elements and acts described above may also be applied to systems They can be combined to give embodiments.

[0123] While several embodiments of the present invention have been described, these embodiments are presented by way of example only. and are not intended to limit the scope of the present disclosure. The novel methods and systems disclosed herein may be embodied in a variety of other forms. Various omissions, substitutions and changes in the form of the methods and systems described herein are within the scope of this disclosure. The appended claims and their equivalents are intended to encompass within the scope of this disclosure. It is intended to cover such forms or modifications as come within the scope and spirit of the present invention.

Claims

1. A front-end system, a radio frequency switch; a switch controller configured to bias the radio frequency switch with a charge pump voltage in a first state of a switch enable signal; a charge pump configured to generate the charge pump voltage at a charge pump output terminal; Including, The charge pump a switched capacitor; an inverter having an output electrically connected to a first end of the switched capacitor; a pair of discharge switches connected in series between the second end of the switched capacitor and the charge pump output terminal; a pair of charging switches connected in series between the second end of the switched capacitor and a reference voltage; Including, During a transition from a charging operation to a discharging operation, one charging switch of the pair of charging switches is open and the other charging switch of the pair of charging switches is closed.

2. A front-end system of claim 1, wherein during the transition, one of the pair of discharge switches is open and the other of the pair of discharge switches is closed.

3. A front-end system as claimed in claim 1, wherein the pair of charging switches are closed during the charging operation and open during the discharging operation.

4. A front-end system as claimed in claim 1, wherein the pair of discharge switches are closed during the discharge operation and open during the charge operation.

5. 2. The front-end system of claim 1, wherein the charge pump is powered by a power high supply voltage and the reference voltage, the charge pump voltage being lower than the reference voltage.

6. a first charging switch of the pair of charging switches controlled by a first clock signal phase; an input of the inverter receiving a second clock signal phase that is delayed relative to the first clock signal phase; 2. The front-end system of claim 1, wherein a second charging switch of the pair of charging switches is controlled by a third clock signal phase that is delayed relative to the second clock signal phase.

7. a first discharge switch of the pair of discharge switches is controlled by an inverted version of the first clock signal phase; 7. The front end system of claim 6, wherein a second discharge switch of said pair of discharge switches is controlled by an inverted version of said third clock signal phase.

8. The charge pump further comprises: an oscillator configured to generate a first plurality of clock signal phases; combinational logic configured to process the first plurality of clock signal phases to generate a second plurality of clock signal phases; Including, 2. The front end system of claim 1, wherein at least a portion of said pair of discharge switches are controlled by said second plurality of clock signal phases.

9. the charge pump includes a plurality of stages, including a first stage and a second stage; 2. The front-end system of claim 1, wherein the first stage includes the switched capacitor, the inverter, the pair of charge switches, and the pair of discharge switches.

10. 10. The front end system of claim 9, wherein a first discharge switch of the pair of discharge switches is controlled by a clock signal from the second stage.

11. 1. A charge pump comprising: a charge pump output terminal configured to provide a charge pump voltage; a switched capacitor; an inverter having an output electrically connected to a first end of the switched capacitor; a pair of discharge switches connected in series between the second end of the switched capacitor and the charge pump output terminal; a pair of charging switches connected in series between the second end of the switched capacitor and a reference voltage; Including, During a transition from a charging operation to a discharging operation, one charge switch of the pair of charge switches is open and the other charge switch of the pair of charge switches is closed.

12. The charge pump of claim 11, wherein during the transition, one of the pair of discharge switches is open and the other of the pair of discharge switches is closed.

13. The charge pump of claim 11, wherein the pair of charging switches are closed during the charging operation and open during the discharging operation.

14. The charge pump of claim 11, wherein the pair of discharge switches are closed during the discharge operation and open during the charge operation.

15. a first charging switch of the pair of charging switches controlled by a first clock signal phase; an input of the inverter receiving a second clock signal phase that is delayed relative to the first clock signal phase; 12. The charge pump of claim 11, wherein a second charge switch of the pair of charge switches is controlled by a third clock signal phase that is delayed relative to the second clock signal phase.

16. a first discharge switch of the pair of discharge switches is controlled by an inverted version of the first clock signal phase; 16. The charge pump of claim 15, wherein a second discharge switch of the pair of discharge switches is controlled by an inverted version of the third clock signal phase.

17. The charge pump further comprises: an oscillator configured to generate a first plurality of clock signal phases; combinational logic configured to process the first plurality of clock signal phases to generate a second plurality of clock signal phases; Including, 12. The charge pump of claim 11, wherein at least a portion of said pair of discharge switches are controlled by said second plurality of clock signal phases.

18. A packaged module, A package substrate; a semiconductor die attached to the package substrate; Including, The semiconductor die includes: a radio frequency switch; a switch controller configured to bias the radio frequency switch with a charge pump voltage in a first state of a switch enable signal; a charge pump configured to generate the charge pump voltage at a charge pump output terminal; Including, The charge pump a switched capacitor; an inverter having an output electrically connected to a first end of the switched capacitor; a pair of discharge switches connected in series between the second end of the switched capacitor and the charge pump output terminal; a pair of charging switches connected in series between the second end of the switched capacitor and a reference voltage; Including, During a transition from a charging operation to a discharging operation, one charging switch of the pair of charging switches is open and the other charging switch of the pair of charging switches is closed.

19. a first charging switch of the pair of charging switches controlled by a first clock signal phase; an input of the inverter receiving a second clock signal phase that is delayed relative to the first clock signal phase; 20. The packaged module of claim 18, wherein a second charge switch of the pair of charge switches is controlled by a third clock signal phase that is delayed relative to the second clock signal phase.

20. a first discharge switch of the pair of discharge switches is controlled by an inverted version of the first clock signal phase; 20. The packaged module of claim 19, wherein a second discharge switch of the pair of discharge switches is controlled by an inverted version of the third clock signal phase.

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