Base plate, semiconductor device, base plate manufacturing method and semiconductor device manufacturing method
A ceramic substrate base plate with controlled concave and convex patterns on the upper and lower surfaces addresses localized warping issues, ensuring stable heat dissipation and extended device lifespan.
Patent Information
- Application Number
- JP2022139058
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2022-09-01
- Publication Date
- 2025-08-22
- Estimated Expiration
- 2042-09-01
AI Technical Summary
In semiconductor devices using a ceramic substrate with metal patterns as a base plate, localized warping occurs on the underside due to differential shrinkage during soldering, leading to localized depressions that hinder thermal grease spread and destabilize heat dissipation performance.
A ceramic substrate base plate with a front metal pattern on the upper surface and a back metal pattern on the lower surface, featuring locally formed concave portions on the upper surface and corresponding convex portions on the lower surface, controlled to a height of 200 μm or less, to prevent warping and ensure stable heat dissipation.
Stabilizes heat dissipation performance by preventing localized concave shapes on the underside, enhancing the lifespan of the semiconductor device.
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Abstract
Description
[Technical Field]
[0001] The present disclosure relates to a base plate made of a ceramic substrate having metal patterns on its upper and lower surfaces, and a semiconductor device using the base plate. [Background technology]
[0002] A known structure of a semiconductor device for power control is one in which a ceramic substrate having metal patterns on the top and bottom surfaces (hereinafter also referred to as a "ceramic substrate with a metal pattern") is placed on a base plate that serves as a heat sink, and a semiconductor element is mounted on the metal pattern on the top surface of the ceramic substrate. Patent Document 1 listed below proposes a technology for reducing warpage of a base plate having this structure after assembly of the semiconductor device by pre-warping the base plate on which the ceramic substrate with a metal pattern is mounted. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2016-167548 Summary of the Invention [Problem to be solved by the invention]
[0004] Another practical semiconductor device structure is one in which a ceramic substrate with a metal pattern itself is used as a base plate, with a semiconductor element mounted on the metal pattern on the upper surface of the ceramic substrate. In a semiconductor device using a ceramic substrate with a metal pattern as a base plate, when the semiconductor element is soldered to the metal pattern on the upper surface of the ceramic substrate and then cooled, the shrinkage of the upper metal pattern is restrained by the solder, so that the shrinkage of the metal pattern on the upper surface of the ceramic substrate is smaller than the shrinkage of the metal pattern on the lower surface. As a result, localized warping occurs in the metal pattern on the lower surface of the ceramic substrate, which is located behind the location where the semiconductor element is soldered, and a localized depression is formed on the lower surface of the metal pattern-equipped ceramic substrate.
[0005] The underside of the ceramic substrate with a metal pattern, which serves as the base plate, serves as the heat dissipation surface of the semiconductor device, and is fastened to a cooling member such as a heat sink via thermal grease during actual use. If a localized depression is formed on the underside of the ceramic substrate with a metal pattern, it becomes difficult for the thermal grease to spread, making the heat dissipation performance of the semiconductor device unstable and shortening the product lifespan.
[0006] It should be noted that Patent Document 1 does not mention a semiconductor device having a structure in which a ceramic substrate with a metal pattern is used as a base plate. However, since the technology of Patent Document 1 warps the entire base plate, it is considered difficult to prevent the formation of the localized concave shape described above.
[0007] The present disclosure has been made to solve the above-mentioned problems, and aims to prevent the formation of localized concave shapes on the underside of a base plate in a semiconductor device that uses a ceramic substrate with a metal pattern as a base plate. [Means for solving the problem]
[0008] The base plate according to the present disclosure is a base plate made of a ceramic substrate having a front metal pattern on its upper surface and a back metal pattern on its lower surface, and is provided with a concave portion locally formed on the upper surface of the front metal pattern, and a convex portion having a height of 200 μm or less locally formed on the lower surface of the back metal pattern at a position corresponding to the concave portion of the front metal pattern. [Effects of the Invention]
[0009] According to the present disclosure, in a semiconductor device using a ceramic substrate with a metal pattern as a base plate, the formation of a localized concave shape on the underside of the base plate is suppressed, thereby stabilizing the heat dissipation performance of the semiconductor device and contributing to extending the product life. [Brief explanation of the drawings]
[0010] [Figure 1] 2 is a diagram showing a configuration of a base plate of the semiconductor device according to the first embodiment. FIG. [Figure 2] 5A to 5C are diagrams for explaining a method for manufacturing a base plate of the semiconductor device according to the first embodiment. [Figure 3] 1 is a diagram showing a configuration of a semiconductor device according to a first embodiment. [Figure 4] FIG. 10 is a diagram showing a configuration of a semiconductor device according to a second embodiment. [Figure 5] 10A to 10C are diagrams illustrating a method for manufacturing a base plate of a semiconductor device according to a second embodiment. [Figure 6] FIG. 10 is a diagram showing a configuration of a semiconductor device according to a second embodiment. DETAILED DESCRIPTION OF THE INVENTION
[0011] <First Embodiment> Fig. 1 is a diagram showing the configuration of a base plate of a semiconductor device according to embodiment 1. As shown in Fig. 1, the base plate is a ceramic substrate with a metal pattern, which is made up of a ceramic substrate 2 having a front metal pattern 1 on its upper surface and a back metal pattern 3 on its lower surface.
[0012] Concave portions 14 are locally formed on the upper surface of the front metal pattern 1. Convex portions 15 are locally formed on the lower surface of the back metal pattern 3 at positions corresponding to the concave portions 14 of the front metal pattern 1. The height of the convex portions 15, i.e., the size of the step 16 between the flat portion of the lower surface of the back metal pattern 3 and the convex portions 15, is 200 μm or less.
[0013] Examples of materials for the front metal pattern 1 and the back metal pattern 3 include copper, aluminum, nickel-plated copper, and nickel-plated aluminum. Examples of materials for the ceramic substrate 2 include aluminum oxide, silicon nitride, and aluminum nitride. The materials for the front metal pattern 1, ceramic substrate 2, and back metal pattern 3 are selected depending on the thermal conductivity required for the semiconductor device in which the base plate is used.
[0014] The manufacturing method of the base plate will be described below. First, a ceramic substrate 2 is prepared, which has a front metal pattern 1 on its upper surface and a rear metal pattern 3 on its lower surface. Then, as shown in Figure 2, a deformation assist frame 13 is placed below the ceramic substrate 2, and a load-applying block 12 is placed on the front metal pattern 1. The deformation assist frame 13 has an opening below where the load-applying block 12 will be placed.
[0015] Next, a load of less than half the bending strength of the ceramic substrate 2 is applied locally from above the front metal pattern 1 using the load-applying block 12. This causes the front metal pattern 1 to bend locally, forming a localized concave portion 14 on the upper surface of the front metal pattern 1. At the same time, the ceramic substrate 2 and rear metal pattern 3 below the load-applying block 12 also bend locally, forming a localized convex portion 15 on the lower surface of the rear metal pattern 3. The height of the convex portion 15 can be freely controlled by selecting the thickness of the deformation assisting frame 13.
[0016] By deforming the front metal pattern 1, ceramic substrate 2 and back metal pattern 3 with a load of less than half the flexural strength of the ceramic substrate 2, a convex portion 15 can be formed on the underside of the back metal pattern 3 while preventing the ceramic substrate 2 from cracking and its insulation from being impaired.
[0017] 3 is a diagram showing an example of the configuration of the semiconductor device according to embodiment 1. The base plate of the semiconductor device is the base plate shown in FIG.
[0018] A semiconductor element 4 is bonded onto the surface metal pattern 1 of the base plate using solder 5. At this time, the semiconductor element 4 is placed on the recessed portion 14. A case 8 that houses the semiconductor element 4 and has main terminals 6 and control terminals 7 is fixed using adhesive 9 to the outer periphery of the upper surface of the ceramic substrate 2 of the base plate. The semiconductor element 4 is connected to the main terminals 6 and control terminals 7 using metal wires 10. A sealing material 11 is filled inside the case 8, and the semiconductor element 4 and metal wires 10 mounted on the base plate are sealed with the sealing material 11. A lid that covers the sealing material 11 may be provided on the case 8.
[0019] The semiconductor element 4 may be a power semiconductor element such as an insulated gate bipolar transistor (IGBT) or a metal oxide semiconductor field effect transistor (MOSFET). Examples of materials for the semiconductor element 4 include silicon, silicon carbide, gallium nitride, and gallium oxide. Lead-free solder is generally used for the solder 5. Examples of materials for the main terminal 6 and the control terminal 7 include copper and nickel-plated copper. The case 8 may be a single-molded or mixed-molded plastic such as polyethylene terephthalate (PET), polybutylene terephthalate (PBT), or polyphenylene sulfide (PPS). Examples of adhesives 9 include silicone adhesives, epoxy adhesives, and acrylic adhesives. Examples of materials for the metal wire 10 include aluminum, copper, silver, and gold. Examples of the sealing material 11 include silicone gel and epoxy resin.
[0020] In the semiconductor device according to this embodiment, a convex portion 15 is formed in advance in the rear metal pattern 3, which forms the underside of the base plate, at a position corresponding to the joint between the front metal pattern 1 and the semiconductor element 4. Therefore, even if local warping occurs in the rear metal pattern 3 at a position corresponding to the soldered location of the semiconductor element 4 during assembly of the semiconductor device, the formation of a local concave portion in the rear metal pattern 3 is prevented. Therefore, when the semiconductor device is fastened to a cooling member such as a heat sink via thermal grease, the thermal grease spreads well. This stabilizes the heat dissipation performance of the semiconductor device, contributing to a longer product life.
[0021] If the height of the convex portion 15 of the back metal pattern 3 (the size of the step 16) increases, and the step between the bottom surface of the case 8 and the top of the convex portion 15 increases, there is a concern that cracks may occur in the case 8 when the semiconductor device is fastened to the cooling member. Therefore, the step between the bottom surface of the case 8 and the top of the convex portion 15 of the assembled semiconductor device is preferably 200 μm or less, and more preferably less than 100 μm.
[0022] <Embodiment 2> 4 is a diagram showing the configuration of a base plate of a semiconductor device according to embodiment 2. In the base plate of the semiconductor device according to embodiment 2, protrusions 21 are formed in recessed portions 14 of the surface metal pattern 1. The other configurations are the same as those shown in FIG. 1 of embodiment 1.
[0023] The method for manufacturing the base plate will now be described. First, a ceramic substrate 2 is prepared, which has a front metal pattern 1 on its upper surface and a back metal pattern 3 on its lower surface. Then, as shown in FIG. 5, a deformation auxiliary base 20 with a recessed portion 19 is placed below the ceramic substrate 2, and a horn 17 for irradiating ultrasonic waves is placed on the front metal pattern 1. The deformation auxiliary base 20 has a recessed portion 19 formed below the position where the horn 17 will be placed. Furthermore, a dimple 18 is formed on the surface of the horn 17 (specifically, the surface that comes into contact with the front metal pattern 1).
[0024] Next, ultrasonic waves are applied locally from above the front metal pattern 1 using a horn 17, with a load of less than half the flexural strength of the ceramic substrate 2. This causes the front metal pattern 1 to locally bend, forming a localized concave portion 14 on the upper surface of the front metal pattern 1. At the same time, the ceramic substrate 2 and rear metal pattern 3 below the control terminal 7 also locally bend, forming a localized convex portion 15 on the lower surface of the rear metal pattern 3. At this time, protrusions 21, to which the shape of the dimples 18 on the surface of the horn 17 has been transferred, are formed within the concave portion 14 of the front metal pattern 1. The height of the convex portion 15 can be freely controlled by selecting the depth of the recessed portion 19 of the deformation assisting base 20.
[0025] By deforming the front metal pattern 1, ceramic substrate 2 and rear metal pattern 3 by applying not only a load but also ultrasonic waves, the front metal pattern 1, ceramic substrate 2 and rear metal pattern 3 can be deformed with a lower load and in a shorter time than when only a load is applied, and a convex portion 15 can be formed on the underside of the rear metal pattern 3.
[0026] Furthermore, dimples 18 are formed in horn 17, and ultrasonic waves are irradiated so that front metal pattern 1 bites into dimples 18, so that the ultrasonic wave irradiation energy from dimples 18 is efficiently transmitted to front metal pattern 1, ceramic substrate 2, and rear metal pattern 3. This enables deformation processing with lower energy (lower power).
[0027] If the height of the convex portions 15 formed on the back metal pattern 3 is sufficient to be less than 50 μm, a flat deformation support base 20 without recessed portions 19 may be used. Even in this case, the convex portions 15 can be formed with a low height depending on the degree of flatness of the deformation support base 20.
[0028] Furthermore, in the second embodiment, since not only a load but also ultrasonic waves is applied to the ceramic substrate 2 having the front metal pattern 1 and the back metal pattern 3, the ceramic substrate 2 must be firmly fixed to the deformation auxiliary pedestal 20 so that the ultrasonic irradiation energy can contribute to deformation. The deformation auxiliary frame 13 used in the first embodiment can also be used instead of the deformation auxiliary pedestal 20, but in that case, the ceramic substrate 2 and the deformation auxiliary frame 13 must be firmly fixed together to a separate pedestal, and therefore it is easier to fix the ceramic substrate 2 using the deformation auxiliary pedestal 20 having the recessed portion 19.
[0029] Fig. 6 is a diagram showing an example of the configuration of a semiconductor device according to embodiment 2. The base plate of the semiconductor device is the base plate shown in Fig. 4. The other configurations are the same as those shown in Fig. 3 of embodiment 1.
[0030] In the semiconductor device according to the second embodiment, convex portions 15 are formed in advance in the back metal pattern 3, which forms the underside of the base plate, at positions corresponding to the joints between the front metal pattern 1 and the semiconductor element 4, and therefore the same effects as in the semiconductor device according to the first embodiment can be obtained. Furthermore, in the semiconductor device according to the second embodiment, the step between the bottom surface of the case 8 of the assembled semiconductor device and the top of the convex portions 15 is preferably 200 μm or less, and more preferably less than 100 μm.
[0031] It is possible to freely combine the embodiments, and to modify or omit the embodiments as appropriate.
[0032] Various aspects of the present disclosure are summarized below as appendices.
[0033] (Appendix 1) A base plate made of a ceramic substrate having a front metal pattern on its upper surface and a back metal pattern on its lower surface, a recessed portion locally formed on the upper surface of the surface metal pattern; a convex portion having a height of 200 μm or less that is locally formed on the lower surface of the back metal pattern at a position corresponding to the concave portion of the front metal pattern; A base plate comprising:
[0034] (Appendix 2) a protrusion is formed in the recessed portion of the surface metal pattern; 1. A base plate as described in Appendix 1.
[0035] (Appendix 3) A base plate according to Appendix 1 or Appendix 2; a semiconductor element bonded via solder onto the recessed portion of the surface metal pattern of the base plate; A semiconductor device comprising:
[0036] (Appendix 4) a case fixed to the base plate and accommodating the semiconductor element; the step between the bottom surface of the case and the top of the convex portion of the back metal pattern is 200 μm or less; 4. The semiconductor device according to claim 3.
[0037] (Appendix 5) providing a ceramic substrate having a front metal pattern on its upper surface and a back metal pattern on its lower surface; a step of locally applying a load of not more than half the bending strength of the ceramic substrate from above the front metal pattern to form a local concave portion on the upper surface of the front metal pattern and a local convex portion having a height of not more than 200 μm on the lower surface of the back metal pattern; A method for manufacturing a base plate comprising:
[0038] (Appendix 6) the step of forming the concave portion and the convex portion is performed by locally applying ultrasonic waves together with the load from above the surface metal pattern. A method for manufacturing the base plate described in Appendix 5.
[0039] (Appendix 7) The load and the ultrasonic waves are applied by a horn having dimples on its surface. A method for manufacturing a base plate according to claim 6.
[0040] (Appendix 8) forming a base plate by the manufacturing method according to any one of Supplementary Note 5 to Supplementary Note 7; a step of joining a semiconductor element onto the concave portion of the surface metal pattern of the base plate via solder; A method for manufacturing a semiconductor device comprising: [Explanation of symbols]
[0041] 1 front metal pattern, 2 ceramic substrate, 3 back metal pattern, 4 semiconductor element, 5 solder, 6 main terminal, 7 control terminal, 8 case, 9 adhesive, 10 metal wire, 11 sealing material, 12 load application block, 13 deformation support frame, 14 concave portion, 15 convex portion, 16 step, 17 horn, 18 dimple, 19 recessed portion, 20 deformation support base, 21 protrusion.
Claims
1. A base plate made of a ceramic substrate having a front metal pattern on its upper surface and a back metal pattern on its lower surface, a recessed portion locally formed on the upper surface of the surface metal pattern; a convex portion having a height of 200 μm or less that is locally formed on the lower surface of the back metal pattern at a position corresponding to the concave portion of the front metal pattern; A base plate comprising:
2. a protrusion is formed in the recessed portion of the surface metal pattern; The base plate according to claim 1 .
3. The base plate according to claim 1 or 2; a semiconductor element bonded via solder onto the recessed portion of the surface metal pattern of the base plate; A semiconductor device comprising:
4. a case fixed to the base plate and accommodating the semiconductor element; a step between the bottom surface of the case and the top of the convex portion of the back metal pattern is 200 μm or less; The semiconductor device according to claim 3 .
5. providing a ceramic substrate having a front metal pattern on its upper surface and a back metal pattern on its lower surface; a step of locally applying a load of not more than half the bending strength of the ceramic substrate from above the front metal pattern to form a local concave portion on the upper surface of the front metal pattern and a local convex portion having a height of not more than 200 μm on the lower surface of the back metal pattern; A method for manufacturing a base plate comprising:
6. the step of forming the concave portion and the convex portion is performed by locally applying ultrasonic waves together with the load from above the surface metal pattern. The method for manufacturing the base plate according to claim 5 .
7. The load and the ultrasonic waves are applied by a horn having dimples on its surface. The method for manufacturing the base plate according to claim 6 .
8. forming a base plate by the manufacturing method according to any one of claims 5 to 7; a step of joining a semiconductor element onto the concave portion of the surface metal pattern of the base plate via solder; A method for manufacturing a semiconductor device comprising:
Citation Information
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