Capacitor Array

Abstract

A capacitor array 1 comprises a capacitor layer 10 including a plurality of capacitor elements 30 planarly arranged in a plane direction perpendicular to the thickness direction Z by being divided by a plurality of through grooves 15. Each capacitor element 30 includes a first electrode layer (for example, an anode plate 31), a second electrode layer (for example, a cathode layer 36), and a dielectric layer 35, the first electrode layer and the second electrode layer facing each other in the thickness direction Z with the dielectric layer 35 interposed therebetween. The through grooves 15 include a first through groove 15A along the first direction X, and a second through groove 15B along the second direction Y that intersects the first direction X. When an intersection area I between the first through groove 15A and the second through groove 15B is viewed from the thickness direction Z, an intersection of a first virtual groove 115A obtained by extending the first through groove 15A to the intersection area I and a second virtual groove 115B obtained by extending the second through groove 15B to the intersection area I is located inside the intersection area I.

Description

[Technical Field]

[0001] The present invention relates to a capacitor array. [Background technology]

[0002] In recent years, the use of a capacitor array in which a plurality of capacitor elements are arranged in a plane has been considered as a substrate for mounting electronic components.

[0003] Patent Document 1 discloses a method for manufacturing a capacitor array, which involves forming separation grooves on one side of the aluminum chemical foil using dry machining such as a laser or mold before forming solid electrolytic capacitors on an aluminum chemical foil sheet, and then forming a protective insulating material on the same surface to also serve as a reinforcing material for the sheet, after which the solid electrolytic capacitors are formed, and then scraping the aluminum chemical foil from the back surface until the bottom of the groove is exposed, thereby electrically separating and independent the solid electrolytic capacitors and the wiring pattern and forming them on the aluminum chemical foil sheet. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2010-171304 Summary of the Invention [Problem to be solved by the invention]

[0005] In the method described in Patent Document 1, separation grooves and a protective insulating material are formed on one side of an aluminum foil. As a result, the resulting component-embedded substrate has an asymmetric structure on the front and back sides, which makes it prone to warping. Furthermore, when separation grooves are formed so that they intersect with each other, stress tends to concentrate at the intersections of the grooves due to the warping, which makes it prone to delamination between materials.

[0006] Therefore, the present inventors conceived the idea of ​​manufacturing a capacitor array having a symmetrical structure on both sides.

[0007] However, for example, when a first through groove and a second through groove are formed to intersect with each other in order to divide a single capacitor sheet into multiple capacitor elements, if metal chips (e.g., aluminum chips) generated by dividing the capacitor sheet adhere across the intersection area between the first through groove and the second through groove, there is a risk of a short circuit occurring between adjacent capacitor elements.

[0008] The present invention aims to provide a capacitor array in which a plurality of capacitor elements are separated by intersecting through grooves, and which is capable of reducing short-circuit defects that occur between adjacent capacitor elements. [Means for solving the problem]

[0009] The capacitor array of the present invention includes a capacitor layer including a plurality of capacitor elements partitioned by a plurality of through grooves and arranged in a plane in a surface direction perpendicular to the thickness direction. Each of the capacitor elements includes a first electrode layer, a second electrode layer, and a dielectric layer, with the first electrode layer and the second electrode layer opposing each other in the thickness direction via the dielectric layer. The through grooves include a first through groove extending in a first direction and a second through groove extending in a second direction intersecting the first direction. When an intersection region between the first through groove and the second through groove is viewed from the thickness direction, an intersection point between a first imaginary groove extending from the first through groove to the intersection region and a second imaginary groove extending from the second through groove to the intersection region is located inside the intersection region. [Effects of the Invention]

[0010] According to the present invention, it is possible to provide a capacitor array in which a plurality of capacitor elements are separated by intersecting through grooves, and which is capable of reducing short-circuit defects that occur between adjacent capacitor elements. [Brief explanation of the drawings]

[0011] [Figure 1] FIG. 1 is a perspective schematic view showing an example of a capacitor array of the present invention. [Figure 2] FIG. 2 is a schematic cross-sectional view showing an example of a cross section of the capacitor array including a cross section taken along line a1-a2 in FIG. [Figure 3] FIG. 3 is a schematic cross-sectional view showing an example of a cross section of the capacitor array including a cross section taken along line b1-b2 in FIG. [Figure 4] FIG. 4 is a schematic cross-sectional view showing an example of a step of preparing the anode plate 31. As shown in FIG. [Figure 5] FIG. 5 is a cross-sectional view illustrating an example of a step of forming a dielectric layer. [Figure 6] FIG. 6 is a cross-sectional view illustrating an example of a step of forming an insulating layer. [Figure 7] FIG. 7 is a cross-sectional view illustrating an example of a process for forming a solid electrolyte layer. [Figure 8] FIG. 8 is a cross-sectional view illustrating an example of a step of forming a conductive layer. [Figure 9] FIG. 9 is a schematic plan view showing an example of a capacitor sheet. [Figure 10] FIG. 10 is a cross-sectional view schematically illustrating an example of a step of forming a first through groove, performed on a cross section taken along line a1-a2 in FIG. [Figure 11] FIG. 11 is a schematic cross-sectional view showing an example of a step of forming a first sealing layer performed on the cross section shown in FIG. [Figure 12] FIG. 12 is a cross-sectional view schematically illustrating an example of the step of forming a second through groove, taken along line b1-b2 in FIG. [Figure 13] FIG. 13 is a cross-sectional view schematically illustrating an example of a step of forming a second sealing layer performed on the cross section shown in FIG. [Figure 14] 14A, 14B, and 14C are schematic plan views showing an example of a cutting process for a capacitor sheet according to a comparative example outside the scope of the present invention. [Figure 15]FIG. 15 is a schematic plan view showing an example of a capacitor array according to a comparative example. [Figure 16] 16A, 16B, and 16C are plan views schematically illustrating an example of a cutting process for a capacitor sheet according to Example 1 within the scope of the present invention. [Figure 17] FIG. 17 is a schematic plan view illustrating an example of the capacitor array according to the first embodiment. [Figure 18] 18A, 18B, 18C, and 18D are schematic plan views showing an example of a cutting process for a capacitor sheet according to Example 2 within the scope of the present invention. [Figure 19] FIG. 19 is a schematic plan view illustrating an example of a capacitor array according to the second embodiment. [Figure 20] FIG. 20 is a schematic plan view illustrating an example of an intersection region in the capacitor array according to the first embodiment. [Figure 21] FIG. 21 is a schematic plan view of the capacitor array shown in FIG. 20 with the first sealing layer and second sealing layer removed. [Figure 22] FIG. 22 is a schematic plan view showing a first modified example of the intersection region in the capacitor array in accordance with the first embodiment. [Figure 23] FIG. 23 is a schematic plan view of the capacitor array shown in FIG. 22 with the first sealing layer and second sealing layer removed. [Figure 24] FIG. 24 is a schematic plan view showing a second modified example of the intersection region in the capacitor array in accordance with the first embodiment. [Figure 25] FIG. 25 is a schematic plan view showing a third modified example of the intersection region in the capacitor array in accordance with the first embodiment. [Figure 26] FIG. 26 is a schematic plan view illustrating an example of an intersection region in the capacitor array according to the second embodiment. [Figure 27] FIG. 27 is a schematic plan view showing a first modified example of the intersection region in the capacitor array in accordance with the second embodiment. [Figure 28] FIG. 28 is a schematic plan view showing a second modified example of the intersection region in the capacitor array in accordance with the second embodiment. [Figure 29]FIG. 29 is a schematic plan view showing a third modified example of the intersection region in the capacitor array in accordance with the second embodiment. [Figure 30] FIG. 30 is a schematic plan view illustrating a fourth modified example of the intersection region in the capacitor array in accordance with the second embodiment. [Figure 31] FIG. 31 is a schematic cross-sectional view showing an example of a cross section of the capacitor array including a cross section taken along line A1-A2 in FIG. [Figure 32] FIG. 32 is a schematic cross-sectional view showing an example of a cross section of the capacitor array including a cross section taken along line B1-B2 in FIG. DETAILED DESCRIPTION OF THE INVENTION

[0012] The capacitor array of the present invention will be described below. Note that the present invention is not limited to the following configuration, and may be modified as appropriate within the scope of the present invention. Furthermore, a combination of multiple individual preferred configurations described below also constitutes the present invention.

[0013] In this specification, terms indicating the relationship between elements (e.g., "perpendicular," "parallel," "orthogonal," etc.) and terms indicating the shape of elements are not expressions that only express a strict meaning, but are expressions that also include a range of substantial equivalence, for example, a difference of a few percent.

[0014] The drawings shown below are schematic diagrams, and the dimensions, aspect ratio, scale, etc. may differ from those of the actual product.

[0015] FIG. 1 is a perspective schematic view showing an example of a capacitor array of the present invention.

[0016] The capacitor array 1 shown in Fig. 1 includes a capacitor layer 10. As shown in Fig. 1, the capacitor array 1 may further include a sealing layer 25 that seals the capacitor layer 10.

[0017] The capacitor layer 10 includes a plurality of capacitor elements 30 .

[0018] In the capacitor layer 10, the plurality of capacitor elements 30 are separated by the plurality of through grooves 15 and are arranged in a plane in a plane direction perpendicular to the thickness direction Z.

[0019] The number of capacitor elements 30 included in capacitor layer 10 is not particularly limited as long as it is two or more.

[0020] In the capacitor layer 10, the plurality of capacitor elements 30 may be arranged linearly, i.e., along one direction (e.g., the first direction X or the second direction Y), or may be arranged planarly, i.e., along multiple directions (e.g., the first direction X and the second direction Y). The plurality of capacitor elements 30 may also be arranged regularly or irregularly. The sizes and planar shapes of the plurality of capacitor elements 30 may all be the same, or some or all of them may be different.

[0021] The capacitor layer 10 may include two or more types of capacitor elements 30 with different areas.

[0022] The capacitor layer 10 may include capacitor elements 30 whose planar shape is not rectangular. In this specification, "rectangle" means a square or a rectangle. Therefore, the capacitor layer 10 may include capacitor elements 30 whose planar shape is, for example, a quadrangle other than a rectangle, a polygon such as a triangle, a pentagon, or a hexagon, a shape including curved portions, a circle, an ellipse, or the like. In this case, the capacitor layer 10 may include two or more types of capacitor elements 30 whose planar shape is different. Furthermore, the capacitor layer 10 may or may not include capacitor elements 30 whose planar shape is rectangular in addition to the capacitor elements 30 whose planar shape is not rectangular.

[0023] In the capacitor layer 10, adjacent capacitor elements 30 are separated by a through groove 15. Adjacent capacitor elements 30 only need to be physically separated. Therefore, adjacent capacitor elements 30 may be electrically separated or electrically connected. For example, a combination of electrically separated capacitor elements 30 and electrically connected capacitor elements 30 may exist.

[0024] When the capacitor array 1 includes a sealing layer 25, the through grooves 15 are preferably filled with an insulating material such as the sealing layer 25.

[0025] Each of the capacitor elements 30 includes a first electrode layer, a second electrode layer, and a dielectric layer, and the first electrode layer and the second electrode layer face each other in the thickness direction Z with the dielectric layer interposed therebetween.

[0026] Fig. 2 is a schematic cross-sectional view showing an example of a cross section of a capacitor array including a cross section taken along line a1-a2 in Fig. 1. Note that line a1-a2 in Fig. 2 corresponds to line a1-a2 in Fig. 1.

[0027] Fig. 3 is a cross-sectional schematic diagram showing an example of a cross section of a capacitor array including a cross section taken along line b1-b2 in Fig. 1. Note that line b1-b2 in Fig. 3 corresponds to line b1-b2 in Fig. 1.

[0028] 2 and 3, the capacitor element 30 includes an anode plate 31, a cathode layer 36, and a dielectric layer 35, and the anode plate 31 and the cathode layer 36 face each other in the thickness direction Z with the dielectric layer 35 interposed therebetween. That is, the first electrode layer is the anode plate 31, and the second electrode layer is the cathode layer 36. As a result, the capacitor element 30 constitutes an electrolytic capacitor.

[0029] The anode plate 31 has, for example, a core 32 made of metal and a porous portion 34 provided on at least one main surface of the core 32. A dielectric layer 35 is provided on the surface of the porous portion 34, and a cathode layer 36 is provided on the surface of the dielectric layer 35.

[0030] The cathode layer 36 includes, for example, a solid electrolyte layer 36A provided on the surface of the dielectric layer 35. The cathode layer 36 preferably further includes a conductor layer 36B provided on the surface of the solid electrolyte layer 36A. When the cathode layer 36 includes the solid electrolyte layer 36A, the capacitor element 30 constitutes a solid electrolytic capacitor.

[0031] The core 32 is preferably made of a valve metal that exhibits a so-called valve action.

[0032] Examples of valve metals include simple metals such as aluminum, tantalum, niobium, titanium, and zirconium, and alloys containing at least one of these metals. Among these, aluminum or aluminum alloys are preferred.

[0033] The porous portion 34 is provided on at least one main surface of the core portion 32. That is, the porous portion 34 may be provided on only one main surface of the core portion 32, or may be provided on both main surfaces of the core portion 32 as shown in Figures 2 and 3. In this way, the anode plate 31 has the porous portion 34 on at least one main surface of the core portion 32.

[0034] The porous portion 34 is preferably a porous layer formed on the surface of the core portion 32, and more preferably an etched layer.

[0035] The shape of the anode plate 31 is preferably a flat plate, and more preferably a foil. Thus, in this specification, the term "plate-like" includes "foil-like".

[0036] The thickness of the anode plate 31 before etching is preferably 60 μm or more and 200 μm or less. The thickness of the unetched core portion 32 after etching is preferably 15 μm or more and 70 μm or less. The thickness of the porous portion 34 is designed according to the required withstand voltage and capacitance, but the combined thickness of the porous portions 34 on both sides of the core portion 32 is preferably 10 μm or more and 180 μm or less.

[0037] The pore diameter of the porous portion 34 is preferably 10 nm or more and 600 nm or less. The pore diameter of the porous portion 34 means the median diameter D50 measured with a mercury porosimeter. The pore diameter of the porous portion 34 can be controlled by adjusting various etching conditions, for example.

[0038] The dielectric layer 35 is provided on the surface of the porous portion 34. The dielectric layer 35 is porous, reflecting the surface state of the porous portion 34, and has a finely uneven surface shape.

[0039] The dielectric layer 35 is preferably made of an oxide film of the valve metal described above. For example, when the anode plate 31 is an aluminum foil, the oxide film that becomes the dielectric layer 35 is formed by anodizing the anode plate 31 in an aqueous solution containing ammonium adipate or the like (also called chemical conversion treatment). Since the dielectric layer 35 is formed along the surface of the porous portion 34, the dielectric layer 35 has pores (recesses).

[0040] The thickness of the dielectric layer 35 is designed according to the required withstand voltage and capacitance, but is preferably 10 nm or more and 100 nm or less.

[0041] The cathode layer 36 is provided on the surface of the dielectric layer 35 .

[0042] When the cathode layer 36 includes a solid electrolyte layer 36A, examples of materials constituting the solid electrolyte layer 36A include conductive polymers such as polypyrroles, polythiophenes, and polyanilines. Among these, polythiophenes are preferred, and poly(3,4-ethylenedioxythiophene), also known as PEDOT, is particularly preferred. The conductive polymer may also contain a dopant such as polystyrene sulfonate (PSS).

[0043] The solid electrolyte layer 36A preferably includes an inner layer that fills the pores (recesses) of the dielectric layer 35, and an outer layer that covers the surface of the dielectric layer 35.

[0044] The thickness of the solid electrolyte layer 36A from the surface of the porous portion 34 is preferably 2 μm or more and 20 μm or less.

[0045] The solid electrolyte layer 36A is formed, for example, by a method of forming a polymer film of poly(3,4-ethylenedioxythiophene) or the like on the surface of the dielectric layer 35 using a treatment liquid containing a monomer such as 3,4-ethylenedioxythiophene, or by a method of applying a dispersion of a polymer such as poly(3,4-ethylenedioxythiophene) to the surface of the dielectric layer 35 and drying it.

[0046] The solid electrolyte layer 36A is formed in a predetermined region by applying the treatment liquid or dispersion liquid to the surface of the dielectric layer 35 by a method such as sponge transfer, screen printing, dispenser application, or inkjet printing.

[0047] When the cathode layer 36 includes a conductive layer 36B, the conductive layer 36B preferably includes at least one of a conductive resin layer and a metal layer. That is, the conductive layer 36B may include only a conductive resin layer, only a metal layer, or both a conductive resin layer and a metal layer.

[0048] The conductive resin layer may be, for example, a conductive adhesive layer containing at least one conductive filler selected from the group consisting of silver filler, copper filler, nickel filler, and carbon filler.

[0049] Examples of the metal layer include a metal plating film, a metal foil, etc. The metal layer is preferably made of at least one metal selected from the group consisting of nickel, copper, silver, and an alloy containing at least one of these metals as a main component.

[0050] In this specification, the term "major component" means the element component that occupies the largest weight ratio.

[0051] The conductor layer 36B includes, for example, a carbon layer provided on the surface of the solid electrolyte layer 36A and a copper layer provided on the surface of the carbon layer.

[0052] The carbon layer is provided to electrically and mechanically connect the solid electrolyte layer 36A and the copper layer.

[0053] The carbon layer is formed in a predetermined area by applying a carbon paste to the surface of the solid electrolyte layer 36A by a method such as sponge transfer, screen printing, dispenser application, or inkjet printing. The carbon layer is preferably laminated with a copper layer in the next step while the carbon layer is still viscous before drying. The thickness of the carbon layer is preferably 2 μm or more and 20 μm or less.

[0054] The copper layer is formed in a predetermined region by applying a copper paste to the surface of the carbon layer by sponge transfer, screen printing, spray coating, dispenser coating, inkjet printing, etc. The thickness of the copper layer is preferably 2 μm or more and 20 μm or less.

[0055] The capacitor element 30 shown in FIGS. 2 and 3 has a first main surface 30a and a second main surface 30b that face each other in the thickness direction Z.

[0056] As shown in FIG. 1, the plurality of through grooves 15 include a first through groove 15A extending in a first direction X and a second through groove 15B extending in a second direction Y.

[0057] The first direction X is perpendicular to the thickness direction Z.

[0058] The second direction Y is perpendicular to the thickness direction Z and intersects with the first direction X.

[0059] The first direction X and the second direction Y may be perpendicular to each other as shown in FIG. 1, etc., or may intersect at an angle other than 90°.

[0060] In the example shown in Figure 2, when viewed in a cross section along the thickness direction Z, more specifically, when viewed in a cross section along the thickness direction Z and the second direction Y, the width W1 (here, the dimension in the second direction Y) of the first through groove 15A is constant in the thickness direction Z.

[0061] Although not shown in Figure 2, when viewed in a cross section along the thickness direction Z, more specifically, when viewed in a cross section along the thickness direction Z and the second direction Y, the first through groove 15A may have a taper in which the width W1 decreases from one of the first main surface 30a and the second main surface 30b of the capacitor element 30 to the other.

[0062] For example, the width W1 of the first through groove 15A may decrease from the first main surface 30a to the second main surface 30b of the capacitor element 30, or the width W1 of the first through groove 15A may decrease from the second main surface 30b to the first main surface 30a of the capacitor element 30.

[0063] When the first through groove 15A has a taper, the cross-sectional shape of the first through groove 15A along the thickness direction Z may be symmetrical or asymmetrical.

[0064] In the example shown in FIG. 3, when viewed in a cross section along the thickness direction Z, more specifically, when viewed in a cross section along the thickness direction Z and the first direction X, the width W2 of the second through groove 15B (here, the dimension in the first direction X) is constant in the thickness direction Z.

[0065] Although not shown in Figure 3, when viewed in a cross section along the thickness direction Z, more specifically, when viewed in a cross section along the thickness direction Z and the first direction X, the second through groove 15B may have a taper in which the width W2 decreases from one of the first main surface 30a and the second main surface 30b of the capacitor element 30 to the other.

[0066] For example, the width W2 of the second through groove 15B may become smaller from the first main surface 30a to the second main surface 30b of the capacitor element 30, or the width W2 of the second through groove 15B may become smaller from the second main surface 30b to the first main surface 30a of the capacitor element 30.

[0067] When the second through groove 15B has a taper, the cross-sectional shape of the second through groove 15B along the thickness direction Z may be symmetrical or asymmetrical.

[0068] When both the first through groove 15A and the second through groove 15B are tapered, it is preferable that the width W1 of the first through groove 15A decreases from the first main surface 30a to the second main surface 30b of the capacitor element 30, and that the width W2 of the second through groove 15B decreases from the first main surface 30a to the second main surface 30b of the capacitor element 30.

[0069] When both the first through groove 15A and the second through groove 15B are tapered, it is preferable that the taper angle of the first through groove 15A and the taper angle of the second through groove 15B are different from each other.

[0070] In this specification, the taper angle of a through groove refers to the angle formed by two opposing sides that form the outline of the through groove when viewed in a cross section along the thickness direction.

[0071] When the width W1 of the first through groove 15A decreases from the first main surface 30a toward the second main surface 30b of the capacitor element 30 and the width W2 of the second through groove 15B decreases from the first main surface 30a toward the second main surface 30b of the capacitor element 30, the taper angle of the second through groove 15B is preferably smaller than the taper angle of the first through groove 15A. In this case, the inclination angle of the end face of the capacitor element 30 on the side of the second through groove 15B with respect to the thickness direction Z decreases, and therefore the effective area of ​​the capacitor element 30 can be increased on the side of the second through groove 15B.

[0072] When the widths of both first through groove 15A and second through groove 15B decrease from first main surface 30a to second main surface 30b of capacitor element 30, it is preferable that the maximum value of width W2 of second through groove 15B is smaller than the maximum value of width W1 of first through groove 15A in the same plane as first main surface 30a of capacitor element 30. In this case, the region in capacitor layer 10 where capacitor element 30 does not exist, i.e., the region where at least second through groove 15B exists among the regions where first through groove 15A and second through groove 15B exist, can be made smaller, and therefore the region in capacitor layer 10 where capacitor element 30 exists can be secured large.

[0073] The tapered shape, taper angle, and width of the first through groove and the second through groove can be confirmed by observing a cross section along the thickness direction as shown in Figures 2 and 3 with a scanning electron microscope (SEM).

[0074] 2 and 3, the capacitor layer 10 preferably further includes an insulating layer 24 provided on the surface of the dielectric layer 35 on which the cathode layer 36 is not provided, on at least one of the first main surface 30a and the second main surface 30b of the capacitor element 30. In this case, insulation between the anode plate 31 and the cathode layer 36 is ensured, and a short circuit between them is prevented.

[0075] The insulating layer 24 may be provided on the surface of the dielectric layer 35 on the first main surface 30a side of the capacitor element 30, or on the surface of the dielectric layer 35 on the second main surface 30b side of the capacitor element 30, or on the surface of the dielectric layer 35 on both the first main surface 30a and the second main surface 30b side of the capacitor element 30 as shown in Figures 2 and 3.

[0076] The insulating layer 24 is made of an insulating material, and in this case, the insulating layer 24 is preferably made of an insulating resin.

[0077] Examples of insulating resins that can be used to form the insulating layer 24 include polyphenylsulfone resin, polyethersulfone resin, cyanate ester resin, fluororesin (tetrafluoroethylene, tetrafluoroethylene-perfluoroalkyl vinyl ether copolymer, etc.), polyimide resin, polyamideimide resin, epoxy resin, and derivatives or precursors thereof.

[0078] Insulating layer 24 may be made of the same resin as sealing layer 25. Unlike sealing layer 25, if insulating layer 24 contains an inorganic filler, it may have an adverse effect on the effective capacitance portion of capacitor element 30, so insulating layer 24 is preferably made of a resin alone.

[0079] The insulating layer 24 is formed in a predetermined area by applying a mask material, such as a composition containing an insulating resin, to the surface of the porous portion 34 by a method such as sponge transfer, screen printing, dispenser application, or inkjet printing.

[0080] The insulating layer 24 may be formed on the porous portion 34 either before or after the dielectric layer 35 is formed.

[0081] As shown in FIGS. 2 and 3, the sealing layer 25 is provided on both principal surfaces of the capacitor element 30 that face each other in the thickness direction Z, that is, on the first principal surface 30a and the second principal surface 30b of the capacitor element 30.

[0082] As shown in Figures 2 and 3, it is preferable that the sealing layer 25 includes a first sealing layer 25A provided on both main surfaces of the capacitor element 30 that face each other in the thickness direction Z, i.e., on the first main surface 30a and the second main surface 30b of the capacitor element 30.

[0083] As shown in FIG. 2, first sealing layer 25A preferably extends into first through groove 15A.

[0084] As shown in FIG. 3, first sealing layer 25A preferably does not extend into second through groove 15B.

[0085] As shown in FIGS. 2 and 3, sealing layer 25 preferably further includes second sealing layer 25B provided on the surface of first sealing layer 25A.

[0086] As shown in FIG. 2, second sealing layer 25B preferably does not extend into first through groove 15A.

[0087] As shown in FIG. 3, the second sealing layer 25B preferably extends into the second through groove 15B.

[0088] For the above reasons, it is preferable that first sealing layer 25A extends into first through groove 15A, but second sealing layer 25B does not extend into first through groove 15A, as shown in FIG.

[0089] Furthermore, it is preferable that first sealing layer 25A does not extend into second through groove 15B, but that second sealing layer 25B does extend into second through groove 15B, as shown in Fig. 3. That is, it is preferable that first sealing layer 25A is separated by second sealing layer 25B at a position where first sealing layer 25A overlaps with second through groove 15B in thickness direction Z, as shown in Fig. 3.

[0090] The sealing layers 25, such as the first sealing layer 25A and the second sealing layer 25B, are made of an insulating material. In this case, the sealing layers 25 are preferably made of an insulating resin.

[0091] Examples of insulating resins that form the sealing layer 25 include epoxy resins and phenolic resins.

[0092] Preferably, the sealing layer 25 further contains a filler.

[0093] Examples of the filler contained in sealing layer 25 include inorganic fillers such as silica particles and alumina particles.

[0094] The constituent materials of first sealing layer 25A and second sealing layer 25B may be the same as or different from each other.

[0095] The sealing layers 25, such as the first sealing layer 25A and the second sealing layer 25B, are formed to seal the capacitor layer 10, for example, by a method of thermocompressing an insulating resin sheet, or by applying an insulating resin paste and then thermally curing it.

[0096] Between the capacitor layer 10 and the sealing layer 25, for example, a stress relaxation layer, a moisture-proof film, or the like may be provided.

[0097] The capacitor array 1 having the cross section shown in FIGS. 2 and 3 is manufactured, for example, by the following method.

[0098] FIG. 4 is a schematic cross-sectional view showing an example of a step of preparing the anode plate 31. As shown in FIG.

[0099] As shown in FIG. 4, an anode plate 31 having a porous portion 34 on at least one main surface of a core portion 32 is prepared.

[0100] FIG. 5 is a cross-sectional view illustrating an example of a step of forming a dielectric layer.

[0101] For example, the anode plate 31 is subjected to an anodizing process to form a dielectric layer 35 on the surface of the porous portion 34 as shown in FIG.

[0102] Alternatively, a chemically formed foil may be prepared as the anode plate 31 having the dielectric layer 35 provided on the surface of the porous portion 34.

[0103] FIG. 6 is a cross-sectional view illustrating an example of a step of forming an insulating layer.

[0104] In order to divide the effective area of ​​the capacitor element 30 (see Figure 1, etc.), for example, an insulating resin is applied to the surface of the dielectric layer 35 by a method such as screen printing or dispenser application, thereby forming an insulating layer 24 in a predetermined area as shown in Figure 6.

[0105] FIG. 7 is a cross-sectional view illustrating an example of a process for forming a solid electrolyte layer.

[0106] 7, solid electrolyte layer 36A is formed on the surface of dielectric layer 35 in an area where insulating layer 24 is not provided. For example, solid electrolyte layer 36A is formed by a method of forming a polymer film of poly(3,4-ethylenedioxythiophene) or the like on the surface of dielectric layer 35 using a treatment liquid containing a monomer such as 3,4-ethylenedioxythiophene, or by a method of applying a dispersion of a polymer such as poly(3,4-ethylenedioxythiophene) to the surface of dielectric layer 35 and then drying it. Note that, as solid electrolyte layer 36A, it is preferable to form an inner layer that fills the pores (recesses) of dielectric layer 35, and then form an outer layer that covers the surface of dielectric layer 35.

[0107] FIG. 8 is a cross-sectional view illustrating an example of a step of forming a conductive layer.

[0108] As shown in FIG. 8, the conductor layer 36B is formed on the surface of the solid electrolyte layer 36A. For example, a carbon layer and a copper layer are formed as the conductor layer 36B in this order from the solid electrolyte layer 36A side. In this case, for example, a carbon paste is applied to the surface of the solid electrolyte layer 36A by a method such as sponge transfer, screen printing, dispenser application, or inkjet printing, thereby forming the carbon layer in a predetermined region. Then, a copper paste is applied to the surface of the carbon layer by a method such as sponge transfer, screen printing, spray application, dispenser application, or inkjet printing, thereby forming the copper layer in a predetermined region.

[0109] In this manner, the cathode layer 36 including the solid electrolyte layer 36A and the conductor layer 36B is formed on the surface of the dielectric layer 35.

[0110] FIG. 9 is a schematic plan view showing an example of a capacitor sheet.

[0111] As a result of the above, a capacitor sheet 130 is produced, which includes an anode plate 31, a dielectric layer 35 provided on the surface of the porous portion 34 of the anode plate 31, and an insulating layer 24 and a cathode layer 36 provided on the surface of the dielectric layer 35, as shown in Figures 8 and 9.

[0112] As shown in FIGS. 8 and 9, the capacitor sheet 130 has a first main surface 130a and a second main surface 130b that face each other in the thickness direction Z.

[0113] FIG. 10 is a cross-sectional view schematically illustrating an example of a step of forming a first through groove, performed on a cross section taken along line a1-a2 in FIG.

[0114] 9 is formed, is laser processed from the first main surface 130a side. As a result, as shown in FIG. 10, a first through groove 15A penetrating the capacitor sheet 130 in the thickness direction Z is formed along the first direction X at a position that does not overlap with the cathode layer 36 in the thickness direction Z.

[0115] Note that the first through grooves 15A may be formed by performing laser processing from the second main surface 130b side on the portion of the capacitor sheet 130 where the cross section taken along the line a1-a2 in FIG. 9 is formed.

[0116] The processing method for forming the first through grooves 15A is not limited to laser processing, and may be, for example, dicing processing, router processing, or other methods.

[0117] As described above, by forming first through grooves 15A along first direction X in capacitor sheet 130, capacitor sheet 130 is cut along first direction X. In this case, it is preferable to form first through grooves 15A along first direction X so that capacitor sheet 130 is not cut continuously from one end to the other along first direction X. This prevents capacitor sheet 130 from being completely separated into multiple independent parts, improving handleability in subsequent processes.

[0118] The step of forming first through grooves 15A is not performed on the portion of capacitor sheet 130 where the cross section taken along line b1-b2 in FIG. 9 is formed.

[0119] FIG. 11 is a schematic cross-sectional view showing an example of a step of forming a first sealing layer performed on the cross section shown in FIG.

[0120] For example, an insulating resin sheet is thermocompression bonded to capacitor sheet 130 having the cross section shown in Fig. 10. As a result, first sealing layer 25A is formed on first main surface 130a and second main surface 130b of capacitor sheet 130, and fills first through grooves 15A, as shown in Fig. 11. As a result, capacitor sheet 130 is fixed by first sealing layer 25A in a state where it is partially separated by first through grooves 15A.

[0121] The first sealing layer 25A thus formed is provided on the first main surface 130a and the second main surface 130b of the capacitor sheet 130, as shown in FIG. 11, and extends into the first through groove 15A.

[0122] When forming first sealing layer 25A, as described above, if capacitor sheet 130 has first through grooves 15A but is not completely separated into multiple independent sections, this prevents the sections of capacitor sheet 130 separated by first through grooves 15A from moving and coming into contact with each other due to the flow of the material (e.g., resin material) that makes up first sealing layer 25A. This prevents short circuits from occurring between capacitor elements in the capacitor array that will be obtained later.

[0123] Furthermore, when first sealing layer 25A is formed by press processing that thermocompresses an insulating resin sheet, the above-mentioned problems can be prevented even if the press processing is performed at high pressure. Therefore, a large processing margin can be secured when forming first sealing layer 25A, improving processability. Forming first sealing layer 25A by high-pressure press processing improves adhesion between first sealing layer 25A and capacitor sheet 130 and reduces voids in first sealing layer 25A, leading to improved reliability of the resulting capacitor array.

[0124] FIG. 12 is a cross-sectional view schematically illustrating an example of the step of forming a second through groove, taken along line b1-b2 in FIG.

[0125] 9 is formed, is laser processed from the first main surface 130a side. As a result, as shown in FIG. 12, second through grooves 15B that penetrate capacitor sheet 130 and first sealing layer 25A in thickness direction Z are formed along second direction Y at positions that do not overlap with cathode layer 36 in thickness direction Z.

[0126] In addition, the second through groove 15B may be formed by performing laser processing from the second main surface 130b side on the portion of the capacitor sheet 130 on which the first sealing layer 25A is provided, where a cross section along the line b1-b2 in Figure 9 is formed.

[0127] The processing method for forming second through grooves 15B is not limited to laser processing, and may be, for example, dicing processing, router processing, etc. The processing method for forming second through grooves 15B may be the same as or different from the processing method for forming first through grooves 15A.

[0128] As described above, by forming second through grooves 15B along second direction Y in capacitor sheet 130 provided with first sealing layer 25A, capacitor sheet 130 and first sealing layer 25A are cut together in second direction Y. At this time, it is preferable to form second through grooves 15B along second direction Y so that capacitor sheet 130 provided with first sealing layer 25A is not cut continuously from one end to the other along second direction Y. This prevents capacitor sheet 130 provided with first sealing layer 25A from being completely separated into multiple independent parts, thereby improving handleability in subsequent processes.

[0129] The step of forming second through grooves 15B is not performed on the portion of capacitor sheet 130 where the cross section taken along line a1-a2 in FIG. 9 is formed.

[0130] FIG. 13 is a cross-sectional view schematically illustrating an example of a step of forming a second sealing layer performed on the cross section shown in FIG.

[0131] For example, by thermocompressing an insulating resin sheet to a capacitor sheet 130 having the cross section shown in FIG. 12, a second sealing layer 25B is formed on the surface of the first sealing layer 25A and filled into the second through groove 15B, as shown in FIG. 13.

[0132] Second sealing layer 25B thus formed is provided on the surface of first sealing layer 25A, as shown in FIG. 13, and extends into second through groove 15B.

[0133] As a result of the above, capacitor layer 10 is produced in a planar arrangement by being divided into a plurality of capacitor elements 30 by first through grooves 15A and second through grooves 15B, and the plurality of capacitor elements 30 are integrated by first sealing layer 25A and second sealing layer 25B. As a result, capacitor array 1 having the cross section shown in Figures 2 and 3 is manufactured.

[0134] In the manufacturing method of the capacitor array 1 described above, the cutting process for dividing the capacitor sheet 130 into a plurality of capacitor elements 30 is divided into a process for forming the first through grooves 15A and a process for forming the second through grooves 15B, and further, a process for forming the first sealing layer 25A is performed between these processes. This prevents the capacitor sheet 130 from completely separating into multiple independent parts during manufacturing, improving handleability. Furthermore, in the process of forming the first sealing layer 25A, pressing can be performed at high pressure, improving processability and also leading to improved reliability of the capacitor array 1.

[0135] 14A, 14B, and 14C are plan views schematically illustrating an example of a cutting process for a capacitor sheet according to a comparative example outside the scope of the present invention, and Fig. 15 is a plan view schematically illustrating an example of a capacitor array according to a comparative example.

[0136] As described above, after first through grooves 15A are formed in capacitor sheet 130 as shown in Fig. 14A, first sealing layer 25A is filled into first through grooves 15A as shown in Fig. 14B. When second through grooves 15B are formed so as to intersect with first through grooves 15A as shown in Fig. 14C, if metal chips (e.g., aluminum chips) generated by cutting capacitor sheet 130 adhere to the intersection area between first through groove 15A and second through groove 15B, a short circuit may occur between adjacent capacitor elements 30 (see Fig. 15) in the finished product. In Fig. 14C, the location where a short circuit may occur is indicated by a dashed line.

[0137] Furthermore, as shown in FIG. 15, if stress concentrates at the corners in the intersecting regions of the first through grooves 15A and the second through grooves 15B, these may become the starting points for cracks or delamination.

[0138] 16A, 16B, and 16C are plan views schematically illustrating an example of a cutting process for a capacitor sheet according to Example 1 within the scope of the present invention. Fig. 17 is a plan view schematically illustrating an example of a capacitor array according to Example 1.

[0139] As shown in Fig. 16A, when first through groove 15A is formed, it is formed so that the area of ​​the portion intersecting with second through groove 15B is large. The planar shape at this time is not limited to a circle. As a result, even if metal chips (e.g., aluminum chips) are generated when forming second through groove 15B after first sealing layer 25A is filled in first through groove 15A as shown in Fig. 16B, as shown in Fig. 16C, the width of first through groove 15A is wide in the intersection region between first through groove 15A and second through groove 15B, it is possible to reduce the risk of short-circuit defects occurring between adjacent capacitor elements 30 (see Fig. 17) in the finished product.

[0140] Furthermore, by widening the width of the first through groove 15A in the intersection region between the first through groove 15A and the second through groove 15B, a larger effective area of ​​the capacitor element 30 can be secured compared to when the entire width of the first through groove 15A is widened.

[0141] 17, by increasing the area of ​​the intersection region between the first through groove 15A and the second through groove 15B, the area of ​​the portion that functions as a support connecting the front and back sealing layers increases, thereby increasing the adhesive strength between the front and back, and as a result, delamination can be suppressed.

[0142] 17. The cross section of the capacitor array including the cross section taken along line a1-a2 in FIG. 17 corresponds to FIG. 2, and the cross section of the capacitor array including the cross section taken along line b1-b2 in FIG. 17 corresponds to FIG.

[0143] 18A, 18B, 18C, and 18D are plan views showing an example of a cutting process for a capacitor sheet according to Example 2 within the scope of the present invention. Fig. 19 is a plan view showing an example of a capacitor array according to Example 2.

[0144] Even if first through groove 15A is formed so that the area of ​​the portion that intersects with second through groove 15B is large as shown in Fig. 18A, after first sealing layer 25A is filled into first through groove 15A as shown in Fig. 18B, when second through groove 15B is formed as shown in Fig. 18C, there is a risk of a short circuit occurring between adjacent capacitor elements 30 (see Fig. 19) in the finished product. In Fig. 18C, the location where a short circuit may occur is indicated by a dashed line.

[0145] Therefore, as shown in FIG. 18D, the short-circuited portion in the intersection region between the first through groove 15A and the second through groove 15B may be cut again using a method such as laser processing. The planar shape when cutting is not limited to a linear shape. Furthermore, the cutting direction is not limited to the first direction X. By cutting as shown in FIG. 18D, the risk of short-circuit defects occurring between adjacent capacitor elements 30 (see FIG. 19) in the finished product can be further reduced. As shown in FIG. 18D, as long as at least the short-circuited portion is cut, other portions may also be cut.

[0146] When cutting the shorted portion again, since the area of ​​the intersection region between first through groove 15A and second through groove 15B is large, even if the cutting portion is slightly misaligned, it is possible to prevent cutting of capacitor element 30. Note that, in order to prevent the occurrence of a new short circuit, it is preferable that the processing area for cutting the shorted portion again be smaller than the area of ​​first through groove 15A in the intersection region between first through groove 15A and second through groove 15B.

[0147] Fig. 20 is a schematic plan view showing an example of an intersection region in the capacitor array in accordance with Example 1. Fig. 21 is a schematic plan view of the capacitor array shown in Fig. 20 with the first sealing layer and second sealing layer removed.

[0148] In the example shown in FIG. 20, the first through groove 15A and the second through groove 15B are perpendicular to each other.

[0149] As shown in Figure 21, when the intersection region I between the first through groove 15A and the second through groove 15B is viewed from the thickness direction Z, the intersection points (four points in Figure 21) between the first imaginary groove 115A extending the first through groove 15A to the intersection region I and the second imaginary groove 115B extending the second through groove 15B to the intersection region I are located inside the intersection region I (circle in Figure 21).

[0150] In other words, when the intersection region I is viewed from the thickness direction Z, the area of ​​the intersection region I (circle in Figure 21) is larger than the area of ​​the portion where the first imaginary groove 115A and the second imaginary groove 115B overlap (a rectangle surrounded by four points in Figure 21).

[0151] In Example 1, as described above, the width of first through groove 15A in intersection region I is large, so that the risk of short circuit defects occurring between adjacent capacitor elements 30 can be reduced.

[0152] Furthermore, since the area of ​​the intersection region I is large, the area of ​​the portion that functions as a support connecting the front and back sealing layers is large, and the adhesive strength between the front and back is increased, which makes it possible to suppress delamination.

[0153] As shown in Figure 20, when the first sealing layer 25A and the second sealing layer 25B extend into the intersection region I, when the intersection region I is viewed from the thickness direction Z, the second sealing layer 25B is located more inward than the first sealing layer 25A within the intersection region I, and the area of ​​the second sealing layer 25B within the intersection region I is the same as the area of ​​the second imaginary groove 115B (see Figure 21) within the intersection region I.

[0154] 20, it is preferable that at least one of the corners between the first through groove 15A and the intersection region I has a curved surface (a so-called R-surface) or an obtuse-angled surface. In this case, stress concentrated at the corner in the intersection region I is alleviated, thereby suppressing cracks and delamination.

[0155] From the viewpoint of suppressing cracks and delamination, it is more preferable that all of the corners between the first through groove 15A and the intersection region I have curved or obtuse-angled surfaces. When two or more corners have curved or obtuse-angled surfaces, only corners with curved surfaces may be present, only corners with obtuse-angled surfaces may be present, or corners with curved surfaces and corners with obtuse-angled surfaces may be mixed.

[0156] Similarly, it is preferable that at least one of the corners between second through groove 15B and intersection region I has a curved surface or an obtuse-angled surface, and it is more preferable that all of the corners between second through groove 15B and intersection region I have a curved surface or an obtuse-angled surface. When two or more corners have curved surfaces or obtuse-angled surfaces, only corners with curved surfaces may be present, only corners with obtuse-angled surfaces may be present, or corners with curved surfaces and corners with obtuse-angled surfaces may be mixed.

[0157] In particular, it is preferable that at least one of the corners between the first through groove 15A and the intersection region I has a curved surface or an obtuse-angled surface, and at least one of the corners between the second through groove 15B and the intersection region I has a curved surface or an obtuse-angled surface, and it is even more preferable that all of the corners between the first through groove 15A and the intersection region I have a curved surface or an obtuse-angled surface, and all of the corners between the second through groove 15B and the intersection region I have a curved surface or an obtuse-angled surface.

[0158] Fig. 22 is a schematic plan view showing a first modified example of the intersection region in the capacitor array in accordance with Example 1. Fig. 23 is a schematic plan view of the capacitor array shown in Fig. 22 from which the first sealing layer and second sealing layer are removed.

[0159] As shown in the example of FIG. 22, the first through groove 15A and the second through groove 15B may not be perpendicular to each other, but may intersect at an angle other than 90°.

[0160] As shown in Figure 23, when the intersection region I between the first through groove 15A and the second through groove 15B is viewed from the thickness direction Z, the intersection points (four points in Figure 23) between the first imaginary groove 115A extending the first through groove 15A to the intersection region I and the second imaginary groove 115B extending the second through groove 15B to the intersection region I are located inside the intersection region I (circle in Figure 23).

[0161] FIG. 24 is a schematic plan view showing a second modified example of the intersection region in the capacitor array in accordance with the first embodiment.

[0162] As shown in the example of FIG. 24, the planar shape of the intersection region I when viewed from the thickness direction Z may be a polygon such as a rectangle.

[0163] The planar shape of the intersection region I when viewed from the thickness direction Z is not particularly limited, and examples include a rectangle (square or oblong), a quadrangle other than a rectangle, a polygon such as a triangle, a pentagon, or a hexagon, a circle, an ellipse, or a shape combining these.

[0164] FIG. 25 is a schematic plan view showing a third modified example of the intersection region in the capacitor array in accordance with the first embodiment.

[0165] 25, the corner between the first through groove 15A and the intersection region I does not have to have a curved surface or an obtuse-angled surface. Similarly, the corner between the second through groove 15B and the intersection region I does not have to have a curved surface or an obtuse-angled surface.

[0166] FIG. 26 is a schematic plan view illustrating an example of an intersection region in the capacitor array according to the second embodiment.

[0167] 26, when first sealing layer 25A and second sealing layer 25B extend into intersection region I, when intersection region I is viewed from thickness direction Z, second sealing layer 25B is located inside first sealing layer 25A in intersection region I, and the area of ​​second sealing layer 25B in intersection region I is larger than the area of ​​second imaginary groove 115B (see FIG. 21) in intersection region I. Other configurations are the same as those in Example 1.

[0168] 26, second sealing layer 25B has a linear portion along first through groove 15A in intersection region I. The linear portion of second sealing layer 25B may exist in both the positive and negative directions of first direction X, or may exist in only one of them.

[0169] In the second embodiment, as described above, the risk of short circuit defects occurring between adjacent capacitor elements 30 can be further reduced.

[0170] Furthermore, since the contact area between first sealing layer 25A and second sealing layer 25B is larger than in Example 1, delamination between first sealing layer 25A and second sealing layer 25B can be suppressed.

[0171] 26, it is preferable that at least one of the corners between first through groove 15A and intersection region I has a curved surface or an obtuse-angled surface, and it is more preferable that all of the corners between first through groove 15A and intersection region I have a curved surface or an obtuse-angled surface. When two or more corners have curved surfaces or obtuse-angled surfaces, only corners with curved surfaces may be present, only corners with obtuse-angled surfaces may be present, or corners with curved surfaces and corners with obtuse-angled surfaces may be mixed.

[0172] Similarly, it is preferable that at least one of the corners between second through groove 15B and intersection region I has a curved surface or an obtuse-angled surface, and it is more preferable that all of the corners between second through groove 15B and intersection region I have a curved surface or an obtuse-angled surface. When two or more corners have curved surfaces or obtuse-angled surfaces, only corners with curved surfaces may be present, only corners with obtuse-angled surfaces may be present, or corners with curved surfaces and corners with obtuse-angled surfaces may be mixed.

[0173] In particular, it is preferable that at least one of the corners between the first through groove 15A and the intersection region I has a curved surface or an obtuse-angled surface, and at least one of the corners between the second through groove 15B and the intersection region I has a curved surface or an obtuse-angled surface, and it is even more preferable that all of the corners between the first through groove 15A and the intersection region I have a curved surface or an obtuse-angled surface, and all of the corners between the second through groove 15B and the intersection region I have a curved surface or an obtuse-angled surface.

[0174] In the example shown in Figure 26, the first through groove 15A and the second through groove 15B are perpendicular to each other, but the first through groove 15A and the second through groove 15B may not be perpendicular to each other and may intersect at an angle other than 90°.

[0175] FIG. 27 is a schematic plan view showing a first modified example of the intersection region in the capacitor array in accordance with the second embodiment.

[0176] As shown in the example of FIG. 27, second sealing layer 25B may have a circular or elliptical portion within intersection region I.

[0177] FIG. 28 is a schematic plan view showing a second modified example of the intersection region in the capacitor array in accordance with the second embodiment.

[0178] As shown in the example of FIG. 28, the planar shape of the intersection region I when viewed from the thickness direction Z may be a polygon such as a rectangle.

[0179] In the example shown in FIG. 28, second sealing layer 25B has a polygonal portion such as a square in intersection region I, but may also have a linear portion, a circular portion, or an elliptical portion.

[0180] FIG. 29 is a schematic plan view showing a third modified example of the intersection region in the capacitor array in accordance with the second embodiment.

[0181] 29, the corner between the first through groove 15A and the intersection region I does not have to have a curved surface or an obtuse-angled surface. Similarly, the corner between the second through groove 15B and the intersection region I does not have to have a curved surface or an obtuse-angled surface.

[0182] In the example shown in FIG. 29, second sealing layer 25B has a linear portion in intersection region I, but may also have a polygonal portion such as a square, or a circular or elliptical portion.

[0183] FIG. 30 is a schematic plan view illustrating a fourth modified example of the intersection region in the capacitor array in accordance with the second embodiment.

[0184] As in the example shown in FIG. 30, the width of the linear portion of second sealing layer 25B may be wider than the width of first through groove 15A.

[0185] An example of the lead-out structure of each of the first electrode layer and the second electrode layer of the capacitor element in the capacitor array of the present invention will be described below.

[0186] The capacitor array 1 shown in FIG. 1 preferably further includes through-hole conductors 60.

[0187] It is preferable that the through-hole conductor 60 includes at least one of a first through-hole conductor 62 electrically connected to a first electrode layer (e.g., an anode plate 31) of the capacitor element 30 and a second through-hole conductor 64 electrically connected to a second electrode layer (e.g., a cathode layer 36) of the capacitor element 30.

[0188] The through-hole conductors 60, more specifically the first through-hole conductors 62 and the second through-hole conductors 64, are preferably provided so as to penetrate the capacitor element 30 in the thickness direction Z of the capacitor layer .

[0189] The anode plate 31 and cathode layer 36 of the capacitor element 30 are led out using a first through-hole conductor 62 and a second through-hole conductor 64, respectively.

[0190] First, an example of the lead-out structure of the anode plate 31 of the capacitor element 30 will be described below.

[0191] Fig. 31 is a cross-sectional schematic diagram showing an example of a cross section of a capacitor array including a cross section taken along line A1-A2 in Fig. 1. Note that line A1-A2 in Fig. 31 corresponds to line A1-A2 in Fig. 1.

[0192] 31 , the first through-hole conductor 62 is preferably provided so as to penetrate the capacitor element 30 in the thickness direction Z of the capacitor layer 10. More specifically, the first through-hole conductor 62 is preferably provided on at least the inner wall surface of a first through hole 63 that penetrates the capacitor element 30 in the thickness direction Z.

[0193] The first through-hole conductor 62 is preferably electrically connected to the end face of the anode plate 31 that faces the inner wall surface of the first through hole 63 in a plane direction perpendicular to the thickness direction Z.

[0194] The plane direction is a direction including a first direction X and a second direction Y that are perpendicular to the thickness direction Z.

[0195] It is preferable that the core 32 and the porous portion 34 are exposed on the end surface of the anode plate 31 that is electrically connected to the first through-hole conductor 62. In this case, the porous portion 34 as well as the core 32 are electrically connected to the first through-hole conductor 62.

[0196] The first through-hole conductor 62 is formed, for example, as follows. First, a first through hole 63 is formed by drilling, laser processing, or the like in a portion where the first through-hole conductor 62 is to be formed. Then, the inner wall surface of the first through hole 63 is metallized with a low-resistance metal such as copper, gold, or silver, thereby forming the first through-hole conductor 62. When forming the first through-hole conductor 62, for example, metallizing the inner wall surface of the first through hole 63 with an electroless copper plating process, an electrolytic copper plating process, or the like makes processing easier. Note that, as a method for forming the first through-hole conductor 62, in addition to a method of metallizing the inner wall surface of the first through hole 63, a method of filling the first through hole 63 with a metal, a composite material of metal and resin, or the like may also be used.

[0197] 31, the capacitor array 1 preferably further includes an anode connection layer 68 provided between the first through-hole conductors 62 and the end surface of the anode plate 31. In the example shown in FIG. 31, the anode connection layer 68 contacts both the first through-hole conductors 62 and the end surface of the anode plate 31.

[0198] The anode connection layer 68 is provided between the first through-hole conductor 62 and the end face of the anode plate 31, and therefore functions as a barrier layer for the anode plate 31, more specifically, as a barrier layer for the core portion 32 and the porous portion 34. The use of such an anode connection layer 68 suppresses dissolution of the anode plate 31 during chemical treatment to form the conductive portion 20, etc., which will be described later, and thus suppresses penetration of the chemical solution into the capacitor element 30, which tends to improve the reliability of the capacitor array 1.

[0199] As shown in FIG. 31, the first through-hole conductor 62 and the end face of the anode plate 31 are preferably electrically connected via an anode connecting layer 68.

[0200] As shown in FIG. 31, the anode connecting layer 68 may include, in order from the end face side of the anode plate 31, a first anode connecting layer 68A and a second anode connecting layer 68B.

[0201] In the anode connecting layer 68, for example, the first anode connecting layer 68A may be a layer containing zinc as a main component, and the second anode connecting layer 68B may be a layer containing nickel or copper as a main component. In this case, the first anode connecting layer 68A is formed on the end surface of the anode plate 31 by, for example, zincate treatment to cause displacement deposition of zinc, and then the second anode connecting layer 68B is formed on the surface of the first anode connecting layer 68A by, for example, electroless nickel plating or electroless copper plating. Note that the first anode connecting layer 68A may disappear when the second anode connecting layer 68B is formed. In this case, the anode connecting layer 68 may consist only of the second anode connecting layer 68B.

[0202] The anode connecting layer 68 preferably includes a layer containing nickel as a main component. In this case, damage to the metal (e.g., aluminum) constituting the anode plate 31 is reduced, and the barrier properties of the anode connecting layer 68 against the anode plate 31 are likely to be improved.

[0203] 31 , the dimension of the anode connecting layer 68 in the thickness direction Z is preferably larger than the dimension of the anode plate 31. In this case, the entire end face of the anode plate 31 is covered with the anode connecting layer 68, which tends to improve the barrier property of the anode connecting layer 68 against the anode plate 31.

[0204] In the thickness direction Z, the dimension of the anode connecting layer 68 is preferably greater than 100% and less than or equal to 200% of the dimension of the anode plate 31 .

[0205] In the thickness direction Z, the dimensions of the anode connection layer 68 may be the same as or smaller than the dimensions of the anode plate 31 .

[0206] The anode connecting layer 68 does not necessarily have to be provided between the first through-hole conductor 62 and the end surface of the anode plate 31. In this case, the first through-hole conductor 62 may be directly connected to the end surface of the anode plate 31.

[0207] As shown in FIGS. 1 and 31 , when viewed in the thickness direction Z, the first through-hole conductor 62 is preferably electrically connected to the end face of the anode plate 31 along the entire periphery of the first through hole 63. As shown in FIG. 31 , when an anode connection layer 68 is provided between the first through-hole conductor 62 and the end face of the anode plate 31, the first through-hole conductor 62 is preferably connected to the anode connection layer 68 along the entire periphery of the first through-hole 63 when viewed in the thickness direction Z. In this case, the contact area between the first through-hole conductor 62 and the anode connection layer 68 is increased, which tends to reduce the connection resistance between the first through-hole conductor 62 and the anode connection layer 68. As a result, the connection resistance between the first through-hole conductor 62 and the anode plate 31 is easily reduced, which tends to reduce the equivalent series resistance (ESR) of the capacitor element 30. Furthermore, the adhesion between the first through-hole conductor 62 and the anode connection layer 68 is easily improved, which tends to reduce problems such as peeling between the first through-hole conductor 62 and the anode connection layer 68 due to thermal stress.

[0208] As shown in Fig. 31, the capacitor array 1 preferably further includes conductive portions 20 electrically connected to the first through-hole conductors 62. In the example shown in Fig. 31, the conductive portions 20 are provided on the surfaces of the first through-hole conductors 62. The conductive portions 20 can function as connection terminals of the capacitor array 1 (capacitor elements 30).

[0209] Examples of materials that can be used to form the conductive portions 20 include low-resistance metals such as silver, gold, copper, etc. In this case, the conductive portions 20 are formed by plating the surfaces of the first through-hole conductors 62, for example.

[0210] In order to improve the adhesion between the conductive portion 20 and other components, in this case, the adhesion between the conductive portion 20 and the first through-hole conductor 62, a mixed material of at least one conductive filler selected from the group consisting of silver filler, copper filler, nickel filler, and carbon filler and resin may be used as the constituent material of the conductive portion 20.

[0211] 1 and 31, the capacitor array 1 preferably further includes a first resin filling portion 29A formed by filling a resin material in the first through hole 63. In the example shown in FIGS. 1 and 31, the first resin filling portion 29A is provided in a space surrounded by the first through-hole conductors 62 on the inner wall surface of the first through hole 63. When the space within the first through hole 63 is eliminated by providing the first resin filling portion 29A, the occurrence of delamination of the first through-hole conductors 62 is suppressed.

[0212] The thermal expansion coefficient of first resin filling portion 29A is preferably greater than that of first through-hole conductor 62. More specifically, the thermal expansion coefficient of the resin material filled in first through hole 63 is preferably greater than that of the material (e.g., copper) constituting first through-hole conductor 62. In this case, first resin filling portion 29A, more specifically, the resin material filled in first through hole 63, expands in a high-temperature environment, thereby pressing first through-hole conductor 62 against the inner wall surface of first through hole 63 from the inside to the outside of first through hole 63, thereby sufficiently suppressing delamination of first through-hole conductor 62.

[0213] The thermal expansion coefficient of first resin filling portion 29A may be the same as or smaller than the thermal expansion coefficient of first through-hole conductor 62. More specifically, the thermal expansion coefficient of the resin material filled in first through hole 63 may be the same as or smaller than the thermal expansion coefficient of the material constituting first through-hole conductor 62.

[0214] The capacitor array 1 does not necessarily have to include the first resin filling portion 29A. In this case, the first through-hole conductors 62 are preferably provided not only on the inner wall surfaces of the first through holes 63 but also throughout the interiors of the first through holes 63.

[0215] Next, an example of the lead-out structure of the cathode layer 36 of the capacitor element 30 will be described below.

[0216] Fig. 32 is a cross-sectional schematic diagram showing an example of a cross section of a capacitor array including a cross section taken along line B1-B2 in Fig. 1. Note that line B1-B2 in Fig. 32 corresponds to line B1-B2 in Fig. 1.

[0217] 32, the second through-hole conductor 64 is preferably provided so as to penetrate the capacitor element 30 in the thickness direction Z of the capacitor layer 10. More specifically, the second through-hole conductor 64 is preferably provided on at least the inner wall surface of a second through hole 65 that penetrates the capacitor element 30 in the thickness direction Z, in which the first through-hole conductor 62 shown in FIG.

[0218] As shown in Fig. 32, the second through-hole conductors 64 are preferably electrically connected to the cathode layer 36. Here, in the example shown in Fig. 32, conductive portions 40 are provided on the surfaces of the second through-hole conductors 64 and can function as connection terminals of the capacitor array 1 (capacitor elements 30). Also, in the example shown in Fig. 32, via conductors 42 are provided so as to penetrate the sealing layer 25 in the thickness direction Z and connect to the conductive portions 40 and the cathode layer 36. Therefore, in the example shown in Fig. 32, the second through-hole conductors 64 are electrically connected to the cathode layer 36 via the conductive portions 40 and the via conductors 42. In this case, the capacitor array 1 can be made smaller.

[0219] The second through-hole conductor 64 is formed, for example, as follows. First, a through hole is formed by drilling, laser processing, or the like in the portion where the second through-hole conductor 64 is to be formed. Next, an insulating layer is formed by filling the formed through hole with a constituent material of the second sealing layer 25B (e.g., a resin material). Then, the formed insulating layer is formed by drilling, laser processing, or the like. At this time, the diameter of the second through hole 65 is made smaller than the diameter of the insulating layer, so that the constituent material of the second sealing layer 25B is present between the previously formed through hole and the second through hole 65. Thereafter, the inner wall surface of the second through hole 65 is metallized with a low-resistance metal such as copper, gold, or silver, thereby forming the second through-hole conductor 64. When forming the second through-hole conductor 64, for example, metallizing the inner wall surface of the second through hole 65 by electroless copper plating, electrolytic copper plating, or the like can facilitate processing. As for the method of forming the second through-hole conductor 64, in addition to the method of metallizing the inner wall surface of the second through hole 65, a method of filling the second through hole 65 with metal, a composite material of metal and resin, etc. may also be used.

[0220] Examples of materials that can be used to form the conductive portions 40 include low-resistance metals such as silver, gold, copper, etc. In this case, the conductive portions 40 are formed by plating the surfaces of the second through-hole conductors 64, for example.

[0221] In order to improve the adhesion between the conductive portion 40 and other components, in this case, the adhesion between the conductive portion 40 and the second through-hole conductor 64, a mixed material of at least one conductive filler selected from the group consisting of silver filler, copper filler, nickel filler, and carbon filler and resin may be used as the constituent material of the conductive portion 40.

[0222] Examples of materials that can be used to form the via conductors 42 include materials similar to those that can be used to form the conductive portions 40 .

[0223] The via conductor 42 is formed, for example, by plating the inner wall surface of a through hole that is provided to penetrate the sealing layer 25 in the thickness direction Z, or by filling it with a conductive paste and then performing a heat treatment.

[0224] 1 and 32, the capacitor array 1 preferably further includes a second resin filling portion 29B formed by filling the second through hole 65 with a resin material. In the example shown in FIGS. 1 and 32, the second resin filling portion 29B is provided in a space surrounded by the second through-hole conductor 64 on the inner wall surface of the second through hole 65. When the space within the second through hole 65 is eliminated by providing the second resin filling portion 29B, the occurrence of delamination of the second through-hole conductor 64 is suppressed.

[0225] The thermal expansion coefficient of second resin filling portion 29B is preferably greater than that of second through-hole conductor 64. More specifically, the thermal expansion coefficient of the resin material filled in second through hole 65 is preferably greater than that of the material (e.g., copper) constituting second through-hole conductor 64. In this case, second resin filling portion 29B, more specifically, the resin material filled in second through hole 65, expands in a high-temperature environment, thereby pressing second through-hole conductor 64 against the inner wall surface of second through hole 65 from the inside to the outside of second through hole 65, thereby sufficiently suppressing delamination of second through-hole conductor 64.

[0226] The thermal expansion coefficient of the second resin filling portion 29B may be the same as or smaller than the thermal expansion coefficient of the second through-hole conductor 64. More specifically, the thermal expansion coefficient of the resin material filled in the second through hole 65 may be the same as or smaller than the thermal expansion coefficient of the material constituting the second through-hole conductor 64.

[0227] The capacitor array 1 does not necessarily have to include the second resin filling portion 29B. In this case, the second through-hole conductors 64 are preferably provided not only on the inner wall surfaces of the second through holes 65 but also throughout the entire interior of the second through holes 65.

[0228] 32, second sealing layer 25B preferably extends between anode plate 31 and second through-hole conductor 64. In the example shown in Fig. 32, second sealing layer 25B is in contact with both anode plate 31 and second through-hole conductor 64. By having second sealing layer 25B extend between anode plate 31 and second through-hole conductor 64, insulation between anode plate 31 and second through-hole conductor 64, and therefore insulation between anode plate 31 and cathode layer 36, is ensured, and short-circuiting between them is prevented.

[0229] When second sealing layer 25B extends between anode plate 31 and second through-hole conductor 64, core portion 32 and porous portion 34 are preferably exposed at the end face of anode plate 31 that contacts second sealing layer 25B, as shown in Fig. 32. In this case, the contact area between second sealing layer 25B and porous portion 34 is increased, improving adhesion between them, and therefore, problems such as peeling between second sealing layer 25B and porous portion 34 are less likely to occur.

[0230] When the core 32 and the porous portion 34 are exposed on the end surface of the anode plate 31 that contacts the second sealing layer 25B, it is preferable that the insulating layer 24, in which the constituent material of the insulating layer 24 penetrates into the pores of the porous portion 34 and spreads inside the porous portion 34, be provided around the second through-hole conductor 64. In this case, sufficient insulation is ensured between the anode plate 31 and the second through-hole conductor 64, and therefore sufficient insulation is ensured between the anode plate 31 and the cathode layer 36, sufficiently preventing short circuits between them.

[0231] When core portion 32 and porous portion 34 are exposed on the end surface of anode plate 31 that contacts second sealing layer 25B, the constituent material of second sealing layer 25B preferably penetrates into the pores of porous portion 34. In this case, the mechanical strength of porous portion 34 is improved, and delamination due to the pores in porous portion 34 is suppressed.

[0232] The thermal expansion coefficient of second sealing layer 25B is preferably greater than that of second through-hole conductors 64. More specifically, the thermal expansion coefficient of the material of second sealing layer 25B is preferably greater than that of the material (e.g., copper) of second through-hole conductors 64. In this case, second sealing layer 25B, more specifically, the material of second sealing layer 25B, expands in a high-temperature environment, thereby pressing down porous portion 34 and second through-hole conductors 64, thereby sufficiently suppressing the occurrence of delamination.

[0233] The thermal expansion coefficient of second sealing layer 25B may be the same as or smaller than the thermal expansion coefficient of second through-hole conductor 64. More specifically, the thermal expansion coefficient of the constituent material of second sealing layer 25B may be the same as or smaller than the thermal expansion coefficient of the constituent material of second through-hole conductor 64.

[0234] Although not shown in Figure 1 etc., the through-hole conductor 60 may include a third through-hole conductor that is not electrically connected to the first electrode layer (e.g., anode plate 31) and the second electrode layer (e.g., cathode layer 36) of the capacitor element 30.

[0235] The capacitor array of the present invention is not limited to the above embodiment, as long as the intersection point between the first imaginary groove, which extends the first through groove to the intersection region, and the second imaginary groove, which extends the second through groove to the intersection region, is located inside the intersection region when viewed from the thickness direction of the intersection region of the first through groove and the second through groove. Therefore, various applications and modifications can be made within the scope of the present invention regarding the configuration, manufacturing conditions, etc. of the capacitor array.

[0236] In the capacitor array of the present invention, the capacitor elements are not limited to electrolytic capacitors such as solid electrolytic capacitors, etc. In the capacitor array of the present invention, the capacitor elements may be, for example, ceramic capacitors using barium titanate, thin-film capacitors using silicon nitride (SiN), silicon dioxide (SiO2), hydrogen fluoride (HF), etc., or trench capacitors having a metal-insulator-metal (MIM) structure.

[0237] In the capacitor array of the present invention, from the viewpoint of reducing the thickness and increasing the area of ​​the capacitor layer, and improving the mechanical properties such as rigidity and flexibility of the capacitor layer, it is preferable that the capacitor elements constitute a capacitor having a base material of a metal such as aluminum, and it is more preferable that the capacitor elements constitute an electrolytic capacitor having a base material of a metal such as aluminum.

[0238] The capacitor array of the present invention is used, for example, in a composite electronic component. Such a composite electronic component includes, for example, the capacitor array of the present invention and an electronic component electrically connected to the external electrode layer of the capacitor array of the present invention.

[0239] In a composite electronic component, the electronic component electrically connected to the external electrode layer may be a passive element, an active element, both a passive element and an active element, or a composite of a passive element and an active element.

[0240] An example of a passive element is an inductor.

[0241] Examples of active elements include a memory, a GPU (Graphical Processing Unit), a CPU (Central Processing Unit), an MPU (Micro Processing Unit), and a PMIC (Power Management IC).

[0242] When the capacitor array of the present invention is used in a composite electronic component, it is treated as, for example, a substrate for mounting electronic components. Therefore, by forming the capacitor array as a whole in a sheet shape and further forming the electronic components to be mounted on the capacitor array in a sheet shape, it is possible to electrically connect the capacitor array of the present invention to the electronic components in the thickness direction via through-hole conductors that penetrate the electronic components in the thickness direction. As a result, it is possible to configure the passive elements and active elements of the electronic components as a single module.

[0243] For example, a switching regulator can be formed by electrically connecting the capacitor array of the present invention between a voltage regulator including a semiconductor active element and a load to which the converted DC voltage is supplied.

[0244] In a composite electronic component, a circuit layer may be formed on one main surface of a capacitor matrix sheet on which a plurality of capacitor arrays of the present invention are laid out, and the circuit layer may then be electrically connected to passive or active elements serving as the electronic component.

[0245] Alternatively, the capacitor array of the present invention may be placed in a cavity pre-formed in a substrate, embedded in resin, and then a circuit layer may be formed on the resin.Another cavity of the same substrate may be equipped with a passive or active element as another electronic component.

[0246] Alternatively, the capacitor array of the present invention may be mounted on a smooth carrier such as a wafer or glass, an outer layer made of resin may be formed, a circuit layer may be formed, and the circuit layer may then be electrically connected to passive or active elements as electronic components.

[0247] The present specification discloses the following:

[0248] <1> a capacitor layer including a plurality of capacitor elements arranged in a plane in a surface direction perpendicular to the thickness direction by being divided by a plurality of through grooves; each of the capacitor elements includes a first electrode layer, a second electrode layer, and a dielectric layer, the first electrode layer and the second electrode layer facing each other in the thickness direction via the dielectric layer; the through grooves include a first through groove extending along a first direction and a second through groove extending along a second direction intersecting the first direction; A capacitor array in which, when the intersection region between the first through groove and the second through groove is viewed from the thickness direction, the intersection point between a first imaginary groove extending the first through groove to the intersection region and a second imaginary groove extending the second through groove to the intersection region is located inside the intersection region.

[0249] <2> Further comprising a sealing layer that seals the capacitor layer. <1> The capacitor array according to claim 1.

[0250] <3> the sealing layer includes a first sealing layer provided on both main surfaces of the capacitor layer that face each other in the thickness direction; the first sealing layer extends into the first through groove and does not extend into the second through groove; <2> The capacitor array according to claim 1.

[0251] <4> the sealing layer further includes a second sealing layer provided on a surface of the first sealing layer; the second sealing layer does not extend into the first through groove, and extends into the second through groove; <3> The capacitor array according to claim 1.

[0252] <5> the first sealing layer and the second sealing layer also extend into the intersection region; When the intersection region is viewed from the thickness direction, the second sealing layer is located more inward than the first sealing layer in the intersection region, and the area of ​​the second sealing layer in the intersection region is larger than the area of ​​the second imaginary groove in the intersection region. <4> The capacitor array according to claim 1.

[0253] <6> At least one of the corners between the first through groove and the intersection region has a curved surface or an obtuse angle surface. <1> ~ <5> 10. The capacitor array according to claim 9, wherein:

[0254] <7> All corners between the first through groove and the intersection region have curved or obtuse angles. <1> ~ <5> 10. The capacitor array according to claim 9, wherein:

[0255] <8> At least one of the corners between the second through groove and the intersection region has a curved surface or an obtuse angle surface. <1> ~ <5> 10. The capacitor array according to claim 9, wherein:

[0256] <9> all corners between the second through groove and the intersection region have curved or obtuse angles; <1> ~ <5> 10. The capacitor array according to claim 9, wherein:

[0257] <10> At least one of the corners between the first through groove and the intersection region has a curved surface or an obtuse-angled surface, and at least one of the corners between the second through groove and the intersection region has a curved surface or an obtuse-angled surface. <1> ~ <5> 10. The capacitor array according to claim 9, wherein:

[0258] <11> All corners between the first through groove and the intersection region have curved or obtuse-angled surfaces, and all corners between the second through groove and the intersection region have curved or obtuse-angled surfaces. <1> ~ <5> 10. The capacitor array according to claim 9, wherein:

[0259] <12> the first electrode layer is an anode plate having a core made of metal and a porous portion provided on at least one main surface of the core; the dielectric layer is provided on a surface of the porous portion, The second electrode layer is a cathode layer provided on the surface of the dielectric layer. <1> ~ <11> 10. The capacitor array according to claim 9, wherein:

[0260] <13> the cathode layer includes a solid electrolyte layer provided on a surface of the dielectric layer; <12> The capacitor array according to claim 1. [Explanation of symbols]

[0261] 1 Capacitor Array 10 Capacitor Layer 15 Through groove 15A 1st through groove 15B 2nd through groove 20 Conductive part 24 insulating layer 25 Sealing layer 25A 1st sealing layer 25B 2nd sealing layer 29A 1st resin filling section 29B 2nd resin filling section 30 Capacitor element 30a: First main surface of capacitor element 30b: second main surface of the capacitor element 31 Anode plate 32 Core 34 Porous part 35 Dielectric Layer 36 Cathode layer 36A solid electrolyte layer 36B Conductor layer 40 Conductive part 42 via conductor 60 through-hole conductor 62 First through-hole conductor 63 First through hole 64 Second through-hole conductor 65 Second through hole 68 Anode connection layer 68A First anode connection layer 68B Second anode connection layer 115A First Virtual Groove 115B Second virtual groove 130 Capacitor sheet 130a: First main surface of capacitor sheet 130b: second main surface of capacitor sheet I. Intersection area between the first through groove and the second through groove W1 Width of the first through groove W2 Width of the second through groove X 1st direction Y Second direction Z thickness direction

Claims

1. a capacitor layer including a plurality of capacitor elements arranged in a plane in a surface direction perpendicular to the thickness direction by being divided by a plurality of through grooves; a sealing layer that seals the capacitor layer, each of the capacitor elements includes a first electrode layer, a second electrode layer, and a dielectric layer, the first electrode layer and the second electrode layer facing each other in the thickness direction via the dielectric layer; The through grooves include a first through groove extending along a first direction and a second through groove extending along a second direction intersecting the first direction, A capacitor array in which, in the capacitor layer covered with the sealing layer, when an intersection region between the first through groove and the second through groove is viewed from the thickness direction, an intersection point between a first virtual groove extending the first through groove to the intersection region and a second virtual groove extending the second through groove to the intersection region is located inside the intersection region.

2. 2. The capacitor array of claim 1, wherein, in the capacitor layer covered by the sealing layer, when an intersection region between the first through groove and the second through groove is viewed from the thickness direction, an intersection point between a first imaginary groove extending the first through groove to the intersection region and a second imaginary groove extending the second through groove to the intersection region is located inside the intersection region throughout the entire thickness direction.

3. the sealing layer includes a first sealing layer provided on both main surfaces of the capacitor layer that face each other in the thickness direction; 3. The capacitor array according to claim 1, wherein the first sealing layer extends into the first through groove and does not extend into the second through groove.

4. the sealing layer further includes a second sealing layer provided on a surface of the first sealing layer, The capacitor array of claim 3 , wherein the second sealing layer does not extend into the first through groove and extends into the second through groove.

5. the first sealing layer and the second sealing layer also extend into the intersection region; 5. The capacitor array of claim 4, wherein, when the intersection region is viewed from the thickness direction, the second sealing layer is located more inward than the first sealing layer within the intersection region, and the area of ​​the second sealing layer within the intersection region is larger than the area of ​​the second imaginary groove within the intersection region.

6. The capacitor array according to claim 1 or 2, wherein at least one corner between the first through groove and the intersection region has a curved surface or an obtuse angled surface.

7. The capacitor array according to claim 1 or 2, wherein all corners between the first through groove and the intersection region have curved or obtuse angles.

8. The capacitor array according to claim 1 or 2, wherein at least one corner between the second through groove and the intersection region has a curved surface or an obtuse angled surface.

9. The capacitor array according to claim 1 or 2, wherein all corners between the second through groove and the intersection region have curved or obtuse angles.

10. 3. The capacitor array of claim 1, wherein at least one of the corners between the first through groove and the intersection region has a curved surface or an obtuse-angled surface, and at least one of the corners between the second through groove and the intersection region has a curved surface or an obtuse-angled surface.

11. 3. The capacitor array of claim 1, wherein all corners between the first through groove and the intersection region have curved or obtuse-angled surfaces, and all corners between the second through groove and the intersection region have curved or obtuse-angled surfaces.

12. the first electrode layer is an anode plate having a core made of metal and a porous portion provided on at least one main surface of the core, the dielectric layer is provided on a surface of the porous portion, 3. The capacitor array according to claim 1, wherein the second electrode layer is a cathode layer provided on the surface of the dielectric layer.

13. The capacitor array of claim 12 , wherein the cathode layer includes a solid electrolyte layer disposed on a surface of the dielectric layer.

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