electronic equipment

Abstract

To provide an electronic apparatus capable of suppressing a radiation emission from an opening and improving the degree of freedom of design of the electronic apparatus.SOLUTION: An electronic apparatus 100 comprises: a substrate 1; and a metal housing 2. The metal housing 2 is provided with: an internal space; and an opening 5. In the internal space, the substrate 1 is housed. The opening 5 is communicated with the internal space. The metal housing 2 contains: a first separation part 21; and a second separation part 22. The first separation part 21 separates the opening 5. The second separation part 22 is a separate body from the first separation part 21. The second separation part 22 separates the opening 5. The second separation part 22 is overlapped with the first separation part 21 when the opening 5, the first separation part 21, and the second separation part 22 are viewed from the outer side of the internal space IS of the housing 2. The second separation part 22 is opposite to the first separation part 21 with an interval from the first separation part 21.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present disclosure relates to electronic devices. [Background technology]

[0002] As electronic devices become more sophisticated and smaller, signal speeds become faster, which increases the likelihood of unwanted electromagnetic waves (noise) being generated by the operating signals on the electronic device's circuit board. For example, as the performance of integrated circuits on circuit boards improves, it has become possible to transmit large amounts of digital data by increasing the frequency of the digital data transmitted by the integrated circuits. On the other hand, the higher the frequency of digital data, the faster the rise and fall of the clock and data become, making noise such as overshoot and undershoot more likely to occur. When noise is emitted from the circuit board, it becomes radiated emissions. Radiated emissions can cause malfunctions in elements inside the electronic device or in devices external to the electronic device.

[0003] Therefore, there is a need to suppress radiated emissions by using metal housings for electronic devices and electromagnetically shielding the circuit boards. For example, if a metal housing is completely closed so that no gaps are created in the metal housing, radiated emissions can be suppressed.

[0004] However, when the metal housing is completely closed, the heat generated inside the metal housing is prevented from dissipating to the outside of the metal housing. For this reason, in the electronic device described in JP 2019-29486 A (Patent Document 1), a plurality of small openings (openings) are provided in the cover (metal housing). As a result, the heat generated inside the cover can be dissipated through the plurality of small openings. A partition is disposed between two adjacent small openings among the plurality of small openings. As a result, radiated emissions are suppressed more than when there is no partition between the two adjacent small openings and the two small openings are connected to each other. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Publication No. 2019-29486 Summary of the Invention [Problem to be solved by the invention]

[0006] In the electronic device described in the above document, the partition is integrally built into the cover (metal housing), which limits the degree of freedom in designing the electronic device.

[0007] The present disclosure has been made in consideration of the above-mentioned problems, and its purpose is to provide an electronic device that can suppress radiated emissions from openings and improve the design freedom of the electronic device. [Means for solving the problem]

[0008] The electronic device of the present disclosure includes a substrate and a metal housing. The metal housing has an internal space and an opening. The internal space houses a substrate. The opening is in communication with the internal space. The metal housing includes a first partition and a second partition. The first partition separates the opening. The second partition is separate from the first partition. The second partition separates the opening. When the opening, the first partition, and the second partition are viewed from outside the internal space of the metal housing, the second partition overlaps the first partition. The second partition is Between the first partition and the internal space of the metal housing The second partition section faces the first partition section with a gap therebetween. The distance between the first partition section and the second partition section is such that the first partition section and the second partition section can form a parallel plate capacitor. The electronic device of the present disclosure includes a substrate and a metal casing. The metal casing has an internal space and an opening. The internal space houses a substrate. The opening is in communication with the internal space. The metal casing includes a first partition and a second partition. The first partition separates the opening. The second partition is separate from the first partition. The second partition separates the opening. When the opening, the first partition, and the second partition are viewed from outside the internal space of the metal casing, the second partition overlaps the first partition. The second partition faces the first partition at a distance from the first partition. The first partition includes an outer partition facing the second partition outside the internal space relative to the second partition, and the second partition is exposed from the first partition on the opposite side of the second partition from the outer partition. The electronic device of the present disclosure includes a substrate and a metal casing. The metal casing has an internal space and an opening. The internal space houses a substrate. The opening is in communication with the internal space. The metal casing includes a first partition and a second partition. The first partition separates the opening. The second partition is separate from the first partition. The second partition separates the opening. When the opening, the first partition, and the second partition are viewed from outside the internal space of the metal casing, the second partition overlaps the first partition. The second partition faces the first partition at a distance from the first partition. The first partition includes an inner partition facing the second partition inside the internal space relative to the second partition, and the second partition is exposed from the first partition on the opposite side of the second partition from the inner partition. The electronic device of the present disclosure includes a substrate and a metal casing. The metal casing has an internal space and an opening. The internal space houses a substrate. The opening is in communication with the internal space. The metal casing includes a first partition and a second partition. The first partition separates the opening. The second partition is separate from the first partition. The second partition separates the opening. When the opening, the first partition, and the second partition are viewed from outside the internal space of the metal casing, the second partition overlaps the first partition. The second partition faces the first partition at a distance from the first partition. The second partition includes a first portion, and the first portion faces the first partition around the entire periphery of the first portion. The electronic device of the present disclosure includes a substrate, a metal casing, and a spacer that is an insulator. The metal casing has an internal space and an opening. The internal space houses a substrate. The opening is in communication with the internal space. The metal casing includes a first partition and a second partition. The first partition separates the opening. The second partition is separate from the first partition. The second partition separates the opening. When the opening, first partition, and second partition are viewed from outside the internal space of the metal casing, the second partition overlaps the first partition. The second partition faces the first partition with a gap between them. The spacer is sandwiched between the first partition and the second partition. [Effects of the Invention]

[0009] According to the electronic device of the present disclosure, the second partition section faces the first partition section at a distance from the first partition section. This reduces radiation emissions from the opening. The second partition section is separate from the first partition section. This improves the design freedom of the electronic device. [Brief explanation of the drawings]

[0010] [Figure 1] 1 is an exploded perspective view showing a schematic configuration of an electronic device according to a first embodiment. [Figure 2] 1 is a perspective view schematically illustrating a configuration of an electronic device according to a first embodiment. [Figure 3] FIG. 3 is a cross-sectional view taken along line III-III in FIG. 2. [Figure 4] 2 is a block diagram schematically illustrating a configuration of a substrate of the electronic device according to the first embodiment. FIG. [Figure 5] FIG. 1 is a perspective view schematically illustrating a configuration of an electronic device according to a first comparative example. [Figure 6] FIG. 6 is a cross-sectional view taken along line VI-VI in FIG. 5. [Figure 7] FIG. 10 is a perspective view schematically illustrating the configuration of an electronic device according to Comparative Example 2. [Figure 8] FIG. 8 is a cross-sectional view taken along line VIII-VIII in FIG. 7. [Figure 9] FIG. 11 is a perspective view schematically illustrating the configuration of an electronic device according to Comparative Example 3. [Figure 10] FIG. 10 is a cross-sectional view taken along line XX in FIG. 9. [Figure 11] FIG. 10 is a perspective view schematically illustrating a configuration of an electronic device according to a second embodiment. [Figure 12] FIG. 12 is a cross-sectional view taken along line XII-XII in FIG. [Figure 13] FIG. 10 is a perspective view schematically illustrating a configuration of an electronic device according to a modified example of the second embodiment. [Figure 14] FIG. 14 is a cross-sectional view taken along line XIV-XIV in FIG. [Figure 15] FIG. 11 is a perspective view schematically illustrating a configuration of an electronic device according to a third embodiment. [Figure 16] FIG. 16 is a cross-sectional view taken along line XVI-XVI in FIG. [Figure 17] FIG. 10 is a perspective view schematically illustrating a configuration of an electronic device according to a fourth embodiment. [Figure 18] FIG. 18 is a cross-sectional view taken along line XVIII-XVIII in FIG. 17. [Figure 19] 10 is a graph showing the relationship between the field intensity of noise and the frequency of noise in the first to third examples and the first to third comparative examples. [Figure 20] 10 is a graph showing the relationship between the electric field strength of noise and the area where the first partition section and the second partition section face each other. DETAILED DESCRIPTION OF THE INVENTION

[0011] Hereinafter, embodiments will be described with reference to the drawings. In the following, the same or corresponding parts will be denoted by the same reference numerals, and overlapping descriptions will not be repeated.

[0012] Embodiment 1 The configuration of electronic device 100 according to the first embodiment will be described with reference to FIGS.

[0013] 1, electronic device 100 includes a substrate 1 and a metal housing 2. Electronic device 100 according to this embodiment further includes a plurality of first fixing portions 31, a plurality of second fixing portions 32, and a plurality of connectors 4. Metal housing 2 has an internal space IS and an opening 5.

[0014] The substrate 1 includes a first surface 1a, a second surface 1b, and a ground layer (not shown). The second surface 1b faces the first surface 1a. A plurality of connectors 4 and an integrated circuit (IC) 11 are mounted on the substrate 1. Signal lines 12 are wired on the substrate 1. The integrated circuits 11 and the signal lines 12 are mounted on the first surface 1a of the substrate 1. The integrated circuits 11 are electrically connected to the plurality of connectors 4 by the signal lines 12. Although not shown, the ground layer of the substrate 1 may be grounded, for example, via the metal housing 2. Although not shown, each connection portion (pin) of the plurality of connectors 4 is electrically connected to the substrate 1 in the internal space IS of the metal housing 2. The number of connection portions (pins) of each of the plurality of connectors 4 may be four or less, or may be four or more. If the number of connection portions is four or more, the connector 4 is a multi-pin connector. Each of the plurality of connectors 4 is a connector for transmitting signals. The interfaces for signals input and output by each of the multiple connectors 4 include, for example, Ethernet, SerDes (SERializer / DESerializer), and LVDS SerDes (Low Voltage Differential Signaling SERializer / DESerializer).

[0015] The metal housing 2 includes a first partition 21, a second partition 22, a top surface 23, a bottom surface 24, and a side surface 25. The top surface 23 faces the bottom surface 24, away from the bottom surface 24. A substrate 1 is disposed between the top surface 23 and the bottom surface 24. The side surface 25 rises from the top surface 23 toward the bottom surface 24. The side surface 25 is connected to the entire periphery of the top surface 23. The first partition 21 is connected to the side surface 25. Note that in FIG. 1 , the boundary between the first partition 21 and the side surface 25 is indicated by a dashed line. The first partition 21 extends from the side surface 25 toward the bottom surface 24. The first partition 21 may be integrally formed with the side surface 25. The first partition 21, the top surface 23, and the side surface 25 may be integrally formed. In this case, the first bottom portion, together with the top surface 23 and the side surface 25, constitutes the case of the metal housing 2. The first partition 21 and the second partition 22 of the metal casing 2 are made of metal. The first partition 21 and the second partition 22 may be made of the same material or different materials.

[0016] The second partition portion 22 rises from the bottom surface 24 toward the top surface 23. The second partition portion 22 may be configured integrally with the bottom surface 24. In this case, the second partition portion 22 and the bottom surface 24 form the bottom of the metal casing 2. In FIG. 1, the shape of the second partition portion 22 in a front view is rectangular, but the shape of the second partition portion 22 in a front view may be semicircular, polygonal, or the like. The second partition portion 22 is separate from the first partition portion 21. In other words, the second partition portion 22 is configured to be separable from the first partition portion 21.

[0017] Although not shown, first partition 21 and second partition 22 may have through holes. The size of the through holes is equal to or less than one-tenth the wavelength of the electromagnetic waves generated from substrate 1. The shape of the through holes may be, for example, circular, triangular, rectangular, or the like.

[0018] The metal casing 2 may be provided with a plurality of first partitions 21 and a plurality of second partitions 22. In this case, each of the plurality of second partitions 22 faces each of the plurality of first partitions 21.

[0019] The internal space IS accommodates a substrate 1. In the internal space IS, the substrate 1 is fixed to the metal housing 2 by a plurality of first fixing portions 31. A plurality of second fixing portions 32 fix the side surface 25 of the metal housing 2 to the bottom surface 24. The second fixing portions 32 are, for example, screws. In FIG. 1, the number of the plurality of first fixing portions 31 and the plurality of second fixing portions 32 is four, but the number of the plurality of first fixing portions 31 and the plurality of second fixing portions 32 is not limited to this. Each of the plurality of connectors 4 is at least partially disposed inside the internal space IS. Each of the plurality of connectors 4 may also be partially disposed outside the internal space IS.

[0020] The opening 5 communicates with the internal space IS. The first partition 21 separates the opening 5. The second partition 22 separates the opening 5. The opening 5 is divided into multiple regions 51 by the first partition 21 and the second partition 22. Two adjacent regions 51 among the multiple regions 51 sandwich the first partition 21 and the second partition 22 between them. The first partition 21 and the second partition 22 are adjacent to the two regions 51. As shown in FIG. 2 , when the opening 5, the first partition 21, and the second partition 22 are viewed from outside the internal space IS of the metal casing 2, the second partition 22 overlaps the first partition 21. The second partition 22 has a back surface facing the internal space IS and a front surface opposite the back surface. At least one of the back surface and the front surface has a portion overlapping the first partition 21.

[0021] Because the first partition portion 21 and the second partition portion 22 separate the opening 5, the resonance frequency of the metal housing 2 is shifted to a higher frequency range than when the opening 5 is not separated. When a plurality of first partition portions 21 and second partition portions 22 are provided, the resonance frequency of the metal housing 2 is shifted to a higher frequency range than when only one first partition portion 21 and one second partition portion 22 is provided. By shifting the resonance frequency of the metal housing 2 to a higher frequency range, radiation noise due to resonance of the metal housing 2 can be suppressed.

[0022] Each of the plurality of connectors 4 is exposed from each of the plurality of regions 51 of the opening 5. The plurality of connectors 4 includes, for example, a first connector, a second connector, and a third connector.

[0023] As shown in FIG. 3 , the second partition 22 faces the first partition 21 at a distance from the first partition 21. The second partition 22 has a portion facing the first partition 21 at a distance from the first partition 21. The second partition 22 is configured to form a parallel plate capacitor together with the first partition 21. The first partition 21 and the second partition 22 are coupled by capacitive coupling. In this embodiment, the first partition 21 and the second partition 22 face each other in parallel. If the first partition 21 and the second partition 22 form a parallel plate capacitor, they do not need to face each other in parallel. The distance between the first partition 21 and the second partition 22 is a distance that allows the first partition 21 and the second partition 22 to form a parallel plate capacitor. The capacitance of the parallel plate capacitor formed by the first partition portion 21 and the second partition portion 22 is determined according to the area where the first partition portion 21 and the second partition portion 22 face each other.

[0024] The area where the first partition 21 and the second partition 22 face each other is, for example, 95 mm 2 The dimensions (lengths) of the first partition 21 and the second partition 22 are, for example, 10 mm or more. The area where the first partition 21 and the second partition 22 face each other is 95 mm 2 If this is the case or if the dimensions of the first partition 21 and the second partition 22 are 10 mm or more, the above capacitance is equivalent to that when the first partition 21 and the second partition 22 are connected and integrally configured.

[0025] The first partition 21 includes an outer partition 211 and an inner partition 212. The outer partition 211 is disposed on the opposite side of the second partition 22 from the substrate 1. The outer partition 211 faces the second partition 22 on the outside of the internal space IS relative to the second partition 22. The outer partition 211 faces the second partition 22 at a distance from the second partition 22. The outer partition 211 is configured to form a parallel plate capacitor together with the second partition 22. The distance between the outer partition 211 and the second partition 22 is a distance that allows the outer partition 211 and the second partition 22 to form a parallel plate capacitor.

[0026] The inner partition 212 is arranged on the opposite side of the second partition 22 from the outer partition 211. The inner partition 212 faces the second partition 22 on the inside of the internal space IS relative to the second partition 22. The inner partition 212 and the outer partition 211 sandwich the second partition 22. The inner partition 212 faces the second partition 22 at a distance from the second partition 22. The inner partition 212 is configured to form a parallel plate capacitor together with the second partition 22. The distance between the inner partition 212 and the second partition 22 is a distance that allows the inner partition 212 and the second partition 22 to form a parallel plate capacitor.

[0027] Both surfaces of the second partition portion 22 form a parallel plate capacitor together with the outer partition portion 211 and the inner partition portion 212. The second partition portion 22 is not electrically connected to either the outer partition portion 211 or the inner partition portion 212. The second partition portion 22 is not in contact with either the outer partition portion 211 or the inner partition portion 212. The second partition portion 22 is not in contact with the side surface 25. The outer partition portion 211, the inner partition portion 212, and the second partition portion 22 form a labyrinth structure.

[0028] In FIG. 3 , the outer partition 211 is integrally formed with the side surface 25, and the inner partition 212 is integrally formed with the side surface 25. The outer partition 211 and the inner partition 212 may be separate from the side surface 25. For example, the inner partition 212 may be attached to the side surface 25 later. The inner partition 212 may be electrically connected to the side surface 25 by, for example, a screw.

[0029] As shown in FIG. 4, the substrate 1 includes an integrated circuit 11, an SoC (System on a Chip) 13, a microcomputer 14, a DRAM (Dynamic Random Access Memory) 15, an external interface connector 16, and a power supply circuit 17. The integrated circuit 11 is configured to convert differential signals input from each of the multiple connectors 4 into serial signals. The integrated circuit 11 is configured to transmit the differential signals or serial signals to the SoC 13. The SoC 13 is configured to receive the differential signals or serial signals from the integrated circuit 11. The SoC 13 is configured to process the received differential signals and serial signals and transmit them to each element.

[0030] The microcomputer 14 and the DRAM 15 are configured to receive signals on which information processing has been performed from the SoC 13. The external interface connector 16 is configured to transmit signals on which information processing has been performed in the SoC 13 and the microcomputer 14 to an external device 200 connected to the external interface connector 16. The interface for signals transmitted from the integrated circuit 11 to the SoC 13 is, for example, a reduced gigabit media-independent interface (RGMII) or a serial gigabit media-independent interface (SGMII).

[0031] The power supply circuit 17 is configured to supply power to the SoC 13, the microcomputer 14, the DRAM 15, and the integrated circuit 11. The power supply circuit 17 is configured, for example, by a DC-DC converter, an LDO (Low Drop Out), a PMIC (Power Management Integrated Circuit), etc. The input power supply 18 is included in the external device 200. The input power supply 18 is connected to the power supply circuit 17 via the external interface connector 16. Although not shown, components such as an inductor and a capacitor are mounted on the substrate 1. The connector 4, the integrated circuit 11, the SoC 13, the external interface connector 16, the microcomputer 14, and the DRAM 15 are mounted on the first surface 1a (see FIG. 1) or the second surface 1b (see FIG. 1) of the substrate 1.

[0032] Next, differential mode noise and common mode noise, which are noises generated in electronic device 100 according to this embodiment, will be described.

[0033] 4, differential mode noise occurs between a Hi (High) signal terminal and a Lo (Low) signal terminal of the substrate 1 and the external device 200. In this embodiment, the differential mode noise occurs, for example, in the integrated circuit 11 of the substrate 1. The differential mode noise is added to the signal in series.

[0034] Common mode noise occurs between the signal terminals of the substrate 1 and the ground. Common mode noise changes the potential of the Hi signal terminal and the Lo signal terminal relative to the ground. The amplitude and phase of the common mode noise of the Hi signal terminal relative to the ground are the same as the amplitude and phase of the common mode noise of each of the Lo signal terminals relative to the ground. Common mode noise is also called in-phase noise, ground-induced noise, unbalanced noise, or asymmetric noise. In this embodiment, common mode noise is an unwanted electromagnetic wave. Common mode noise is a cause of radiated emissions.

[0035] Next, the effects of electronic device 100 according to the present embodiment will be described in comparison with comparative examples 1 to 3.

[0036] 5 and 6, in electronic device 101 according to Comparative Example 1, metal housing 2 includes partition 26. Partition 26 is connected to bottom surface 24 and side surface 25 and is configured integrally with bottom surface 24 and side surface 25. Therefore, partition 26 has the effect of suppressing radiated emissions, but partition 26 reduces the degree of freedom in designing metal housing 2.

[0037] In contrast to this, in electronic device 100 according to the present embodiment, as shown in Fig. 3, second partition section 22 is separate from first partition section 21. This allows for greater freedom in designing metal casing 2.

[0038] As shown in FIGS. 7 and 8, the electronic device 102 according to Comparative Example 2 includes a non-contact partition 27. The non-contact partition 27 rises from the bottom surface 24 toward the top surface 23. The non-contact partition 27 is not in contact with the side surface 25. That is, a gap is provided between the non-contact partition 27 and the side surface 25. The gap is exposed from the metal housing 2. Therefore, unwanted electromagnetic waves pass through the gap and are radiated outside the electronic device 100. Therefore, the effect of suppressing radiated emissions is low.

[0039] 9 and 10, the electronic device 103 according to the third comparative example does not include a partition portion. Therefore, unwanted electromagnetic waves are radiated to the outside of the electronic device 100 through the opening. Therefore, there is no effect of suppressing radiated emissions.

[0040] In contrast, in the electronic device 100 according to the present embodiment, as shown in FIG. 3, when the opening 5 (see FIG. 1), the first partition 21, and the second partition 22 are viewed from outside the internal space IS of the metal casing 2, the second partition 22 overlaps the first partition 21, and the second partition 22 faces the first partition 21 at a distance from the first partition 21. This allows the first partition 21 and the second partition 22 to form a parallel plate capacitor. Therefore, the impedance of the metal casing 2 can be reduced by the capacitive coupling between the first partition 21 and the second partition 22, thereby suppressing the radiation of unwanted electromagnetic waves outside the electronic device 100. This reduces radiated emissions from the opening 5 (see FIG. 1). Furthermore, the reduction in the impedance of the metal casing 2 prevents electromagnetic waves from entering the internal space IS of the electronic device 100 from outside the electronic device 100. This reduces radiation immunity. In other words, sufficient measures can be taken to prevent electromagnetic interference (EMI).

[0041] Embodiment 2 Next, the configuration of electronic device 100 according to embodiment 2 will be described with reference to Figures 11 and 12. Unless otherwise specified, embodiment 2 has the same configuration and effects as embodiment 1. Therefore, the same components as embodiment 1 above are denoted by the same reference numerals, and description thereof will not be repeated.

[0042] As shown in FIG. 11, in electronic device 100 according to this embodiment, first partition 21 includes outer partition 211. First partition 21 does not include inner partition 212 (see FIG. 3). As shown in FIG. 12, first partition 21 faces only one surface of second partition 22. Second partition 22 is exposed from first partition 21 on the side opposite to outer partition 211 with respect to second partition 22. Note that in this embodiment, the dimension (length) of outer partition 211 needs to be larger than when first partition 21 includes both outer partition 211 and inner partition.

[0043] Next, the configuration of electronic device 100 according to a modification of the second embodiment will be described with reference to FIGS.

[0044] As shown in Fig. 13, in electronic device 100 according to the modification of embodiment 2, first partition 21 includes inner partition 212. First partition 21 does not include outer partition 211 (see Fig. 3). As shown in Fig. 14, second partition 22 is exposed from first partition 21 on the opposite side of second partition 22 from inner partition 212. Note that in this embodiment, the dimension (length) of inner partition 212 needs to be larger than when first partition 21 includes both the outer partition and inner partition 212.

[0045] Next, the effects of this embodiment will be described. 12 , in electronic device 100 according to the present embodiment, second partition 22 is exposed from first partition 21 on the side opposite outer partition 211 with respect to second partition 22. This makes it possible for first partition 21 to not include an inner partition. This allows the shape of first partition 21 to be simpler than when first partition 21 includes an inner partition, thereby reducing the manufacturing cost of electronic device 100.

[0046] 14 , in electronic device 100 according to the modification of embodiment 2, second partition 22 is exposed from first partition 21 on the side opposite to inner partition 212 with respect to second partition 22. This makes it possible for first partition 21 to not include an outer partition. This allows the shape of first partition 21 to be simpler than when first partition 21 includes an outer partition, thereby reducing the manufacturing cost of electronic device 100.

[0047] Embodiment 3 Next, the configuration of electronic device 100 according to embodiment 3 will be described with reference to Figures 15 and 16. Unless otherwise specified, embodiment 3 has the same configuration and effects as embodiment 1. Therefore, the same components as embodiment 1 above are denoted by the same reference numerals, and description thereof will not be repeated.

[0048] As shown in FIG. 15 , in the electronic device 100 according to the present embodiment, the second partition 22 includes a first portion 221 and a second portion 222. The first portion 221 is located at the tip of the second partition 22. The first portion 221 faces the first partition 21 along the entire periphery of the first portion 221. The first portion 221 faces the first partition 21 along the entire periphery with a gap therebetween. The first partition 21 faces the front, back, and side surfaces of the first portion 221. The first portion 221 is not in contact with the first partition 21. The first portion 221 is not electrically connected to the first partition 21. The first portion 221 is connected to the second portion 222. In FIG. 15 , the shape of the first partition 21 is cylindrical, but is not limited thereto. The shape of the first partition 21 may be, for example, a rectangular tube.

[0049] 16 , a hollow space 223 is provided in the first partition 21. The first portion 221 is inserted into the hollow space 223. In the hollow space 223, the first portion 221 faces the first partition 21. The second portion 222 is not inserted into the hollow space 223. The second portion 222 is connected to the bottom surface 24.

[0050] Next, the effects of this embodiment will be described. According to electronic device 100 of this embodiment, as shown in FIG. 15 , first section 221 faces first partition section 21 over the entire periphery of first section 221. Therefore, the capacitance component of capacitive coupling can be made larger than when first section 221 does not face first partition section 21 over the entire periphery of first section 221. This further reduces radiated emissions. Also, the dimension (length) of first partition section 21 can be made smaller. Note that, although first partition section 21 and first section 221 are not electrically connected, the closer they are to each other, the larger the capacitance component becomes, thereby reducing radiated emissions.

[0051] Embodiment 4 Next, the configuration of electronic device 100 according to embodiment 4 will be described with reference to Figures 17 and 18. Unless otherwise specified, embodiment 4 has the same configuration and effects as embodiment 1. Therefore, the same components as embodiment 1 above are denoted by the same reference numerals, and description thereof will not be repeated.

[0052] As shown in FIG. 17 , the electronic device 100 according to this embodiment further includes a spacer 6. The spacer 6 is an insulator. The material of the spacer 6 may be determined appropriately as long as it is an insulator. The spacer 6 has a dielectric constant greater than that of air. That is, the spacer 6 has a relative dielectric constant greater than 1. As shown in FIG. 18 , the spacer 6 is sandwiched between the first partition 21 and the second partition 22. The spacer 6 is in contact with the first partition 21 and the second partition 22. The spacer 6 is disposed between the outer partition 211 and the second partition 22. The spacer 6 may be disposed between the inner partition 212 and the second partition 22. The spacer 6 may be disposed between the outer partition 211 and the second partition 22 and between the inner partition 212 and the second partition 22.

[0053] The spacer 6 may have the same size as the area where the first partition 21 and the second partition 22 face each other. The spacer 6 may have an area larger than the area where the first partition 21 and the second partition 22 face each other. The shape of the spacer 6 is, for example, rectangular, circular, triangular, star-shaped, or the like.

[0054] Next, the effects of this embodiment will be described. According to the electronic device 100 of this embodiment, as shown in FIG. 18 , the spacer 6 is sandwiched between the first partition 21 and the second partition 22. This improves the capacitance between the first partition 21 and the second partition 22. This reduces the impedance between the first partition 21 and the second partition 22, particularly at frequencies in the GHz (gigahertz) band. This further reduces radiated emissions and radiated immunity. In particular, the higher the relative dielectric constant of the spacer 6, the greater the capacitance and the more effectively radiated emissions and radiated immunity can be reduced. [Example]

[0055] Next, an electronic device 100 according to first to third examples and electronic devices according to first to third comparative examples will be described with reference to FIG.

[0056] Referring to FIG. 3, the electronic devices 100 according to the first to third examples correspond to the electronic device 100 according to the first example. The electronic devices 100 according to the first to third examples have different first partitioning sections 21 with different dimensions (length), the same first partitioning section 21 with the same dimensions (width), and the same second partitioning sections 22 with the same dimensions (length and width). The first partitioning sections 21 (outer partitioning section 211 and inner partitioning section 212) of the electronic devices 100 according to the first to third examples have dimensions (length) of 3 mm, 5 mm, and 10 mm, respectively. The first partitioning section 21 of the electronic devices 100 according to the first to third examples has a dimension (width) of 5 mm. The second partitioning section 22 of the electronic devices 100 according to the first to third examples has a dimension (length) of 9.5 mm. The second partitioning section 22 of the electronic devices 100 according to the first to third examples has a dimension (width) of 5 mm. The second partition section 22 of the electronic device 100 according to the first to third embodiments has a dimension (depth) of 1.5 mm.

[0057] Referring to Fig. 6, the electronic device according to the first comparative example includes a partition 26 that is integral with the bottom surface 24 and the side surface 25. Referring to Fig. 8, the electronic device according to the second comparative example includes a non-contact partition 27. Referring to Fig. 10, the electronic device according to the third comparative example does not include a first partition or a second partition.

[0058] In the electronic devices 100 according to the first to third examples and the electronic devices according to the first to third comparative examples, the inside of the metal housing 2 has a width of 116 mm, a depth of 116 mm, and a length of 26 mm. The width of the opening 5 is 55 mm. The two first partitions 21 and the second partition 22 are arranged at an interval of 15 mm.

[0059] f is the frequency (GHz). m, n, and p are the resonance modes. X is the width dimension (mm) of the metal housing 2, Y is the depth dimension (mm) of the metal housing 2, and Z is the length dimension (mm) of the metal housing 2. In this case, the resonance frequency of the metal housing 2 is (f / 300) 2 =(m / 2X) 2 +(n / 2Y) 2+(p / Z) 2 The resonance frequency of the metal housing 2 of the first example and the first to third comparative examples is 1.83 GHz.

[0060] 19 shows the electric field strength of noise at a position 50 mm away from electronic device 100 when noise is radiated from integrated circuit 11 arranged on first surface 1a of the housing inside metal housing 2. The vertical axis represents the electric field strength of the noise (dBμV / m), and the horizontal axis represents the frequency of the noise (GHz).

[0061] The electronic device 100 according to this embodiment and this comparative example complies with the radiated emissions standard specified in CISPR25 ("Recommended Limits and Methods of Measurement of Disturbances for the Protection of Vehicle Receivers" among the "Standards of the International Special Committee on Radio Interference"). CISPR25 specifies a test for evaluating the electric field strength of noise radiated to the outside from the electronic device 100 mounted on an automobile. CISPR25 is specified to prevent electromagnetic interference radiated from one electronic device from interfering with or malfunctioning other electronic devices. GPS (Global Positioning System), GLONASS (Global Navigation Satellite System), etc. are used in frequencies between 1.5 GHz and 2 GHz. Since GPS, etc. are used in devices equipped with the electronic device 100, it is important to reduce the electric field strength of these frequencies.

[0062] Therefore, in the first to third examples and the first to third comparative examples, radiated emissions were compared in the range of 1.5 GHz to 2 GHz, which is also the resonant frequency of the metal housing 2.

[0063] As shown in Fig. 19, the first to third examples had reduced noise field strength compared to the second and third comparative examples. In the second comparative example and the third comparative example, the difference in noise field strength was small in the range of 1.5 GHz to 2 GHz. The electronic device according to the first comparative example had the greatest effect in reducing noise field strength. Specifically, in the electronic device according to the first comparative example, the noise field strength was reduced by 24 dB compared to the second comparative example in the range of 1.5 GHz to 2 GHz.

[0064] In the range of 1.5 GHz or more and 2 GHz or less, the noise field strength of the first example was 11 dB lower than that of the second comparative example. In the range of 1.5 GHz or more and 2 GHz or less, the noise field strength of the second example was 17 dB lower than that of the second comparative example. In the range of 1.5 GHz or more and 2 GHz or less, the noise field strength of the third example was 24 dB lower than that of the second comparative example.

[0065] As described above, in the first to third examples in which the metal housing 2 includes the first partition portion 21 and the second partition portion 22, it was possible to reduce the electric field strength of noise more than in the second to third comparative examples. Therefore, in the first to third examples in which the metal housing 2 includes the first partition portion 21 and the second partition portion 22, it was possible to reduce radiated emissions more than in the second to third comparative examples. Furthermore, in the first to third examples, the first partition portion 21 and the second partition portion 22 are separate bodies, which means that there is a higher degree of freedom in design than in the first comparative example. [Example]

[0066] Next, electronic devices according to fourth to seventh examples and a fourth comparative example will be described with reference to FIG.

[0067] The vertical axis of the graph in FIG. 20 represents the noise field strength (dBμV / m). The above field strength is the maximum field strength in the frequency range of 1.5 GHz or more and 2 GHz or less. The horizontal axis of the graph in FIG. 20 represents the area (mm 2 ) is shown.

[0068] 3, the electronic devices 100 according to the fourth to seventh examples correspond to the electronic device 100 according to the first embodiment. The dimensions (length) of the first partition section 21 of the electronic devices 100 according to the fourth to seventh examples are 1 mm, 3 mm, 7 mm, and 10 mm, respectively. The dimension (width) of the first partition section 21 of the electronic devices 100 according to the fourth to seventh examples is 5 mm. The dimension (length) of the second partition section 22 of the electronic devices 100 according to the fourth to seventh examples is 14.5 mm. The dimension (width) of the second partition section 22 of the electronic devices 100 according to the fourth to seventh examples is 5 mm. In the electronic devices 100 according to the fourth to seventh examples, the distance between the first partition section 21 and the second partition section 22 is 0.5 mm. In the electronic devices 100 according to the fourth to seventh examples, the second partition section 22 is spaced 0.5 mm from the side surface 25 in the longitudinal direction.

[0069] The area S (mm 2 ) is expressed by the following formula, where the dimension (width) of the second partitioning portion 22 is W (mm) and the dimension (length) of the first partitioning portion 21 is L (mm).

[0070] S=W×(L-0.5)×2 The 0.5 on the right side indicates the distance in the longitudinal direction from the side surface 25 of the second partitioning portion 22. The areas where the first partitioning portion 21 and the second partitioning portion 22 face each other in the electronic devices 100 according to the fourth to seventh examples are 5 mm 2 , 25mm 2 , 45mm 2 , 65mm 2 , 95mm 2 is.

[0071] 8, the electronic device according to the fourth comparative example corresponds to the electronic device according to the second embodiment. The electronic device according to the fourth comparative example includes a non-contact partition 27, but does not include a first partition or a second partition. Therefore, the area where the first partition and the second partition of the electronic device according to the fourth comparative example face each other is 0 mm 2 It was.

[0072] In the electronic device 100 according to the fourth example, the electric field strength was 161 dB at a position 50 mm away from the metal housing 2. In the electronic device according to the seventh example, the electric field strength was 142 dB at a position 50 mm away from the metal housing 2.

[0073] The area where the first partition 21 and the second partition 22 face each other is 95 mm 2 In the seventh embodiment, the electric field strength was equivalent to that of the first comparative example. Therefore, even when the first partition 21 and the second partition 22 were separate bodies, it was possible to obtain the same radiated emission suppression effect as when the opening was partitioned by a partition. In addition, when the area where the first partition 21 and the second partition 22 faced each other was 95 mm 2 It is considered that the effect of reducing the electric field strength is saturated at this point.

[0074] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. The scope of the present disclosure is defined by the claims, not by the above description, and is intended to include all modifications within the meaning and scope of the claims. [Explanation of symbols]

[0075] 1 Circuit board, 2 Metal housing, 5 Opening, 21 First partition, 22 Second partition, 100 Electronic device, 211 Outer partition, 212 Inner partition, 221 First part, IS Internal space.

Claims

1. A substrate; a metal housing having an internal space in which the substrate is accommodated and an opening communicating with the internal space, the metal housing including a first partition section that separates the opening, and a second partition section that is separate from the first partition section and separates the opening; when the opening, the first partition portion, and the second partition portion are viewed from outside the internal space of the metal casing, the second partition portion overlaps the first partition portion, the second partition portion faces the first partition portion at a distance between the first partition portion and the internal space of the metal housing, the distance between the first partition portion and the second partition portion is a distance that allows the first partition portion and the second partition portion to form a parallel plate capacitor.

2. A substrate, a metal housing having an internal space in which the substrate is accommodated and an opening communicating with the internal space, the metal housing including a first partition section that separates the opening, and a second partition section that is separate from the first partition section and separates the opening; when the opening, the first partition portion, and the second partition portion are viewed from outside the internal space of the metal casing, the second partition portion overlaps the first partition portion, the second partition portion faces the first partition portion at a distance from the first partition portion, the first partition portion includes an outer partition portion facing the second partition portion on the outside of the internal space with respect to the second partition portion, The electronic device, wherein the second partition portion is exposed from the first partition portion on a side opposite to the outer partition portion with respect to the second partition portion.

3. A substrate, a metal housing having an internal space in which the substrate is accommodated and an opening communicating with the internal space, the metal housing including a first partition section that separates the opening, and a second partition section that is separate from the first partition section and separates the opening; when the opening, the first partition portion, and the second partition portion are viewed from outside the internal space of the metal casing, the second partition portion overlaps the first partition portion, the second partition portion faces the first partition portion at a distance from the first partition portion, the first partition portion includes an inner partition portion facing the second partition portion on the inside of the internal space with respect to the second partition portion, The electronic device, wherein the second partition portion is exposed from the first partition portion on a side opposite to the inner partition portion with respect to the second partition portion.

4. A substrate, a metal housing having an internal space in which the substrate is accommodated and an opening communicating with the internal space, the metal housing including a first partition section that separates the opening, and a second partition section that is separate from the first partition section and separates the opening; when the opening, the first partition portion, and the second partition portion are viewed from outside the internal space of the metal casing, the second partition portion overlaps the first partition portion, the second partition portion faces the first partition portion at a distance from the first partition portion, the second partition portion includes a first portion, The electronic device according to claim 1 , wherein the first portion faces the first partition portion along the entire periphery of the first portion.

5. A substrate, a metal housing having an internal space in which the substrate is accommodated and an opening communicating with the internal space, the metal housing including a first partition section that separates the opening, and a second partition section that is separate from the first partition section and separates the opening; when the opening, the first partition portion, and the second partition portion are viewed from outside the internal space of the metal casing, the second partition portion overlaps the first partition portion, the second partition portion faces the first partition portion at a distance from the first partition portion, Further provided with a spacer that is an insulator, The spacer is sandwiched between the first partition and the second partition.

6. the first partition portion includes an outer partition portion facing the second partition portion on the outside of the internal space relative to the second partition portion, and an inner partition portion facing the second partition portion on the inside of the internal space relative to the second partition portion, The electronic device according to claim 1 , wherein the second partition is sandwiched between the inner partition and the outer partition.

7. the second partition portion includes a first portion, The electronic device according to claim 2 , wherein the first portion faces the first partition portion along the entire periphery of the first portion.

8. Further provided with a spacer that is an insulator, 5. The electronic device according to claim 1, wherein the spacer is sandwiched between the first partition and the second partition.

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