Electronic modules and electronic equipment

Abstract

To reduce interference noise.SOLUTION: An electronic module includes a first wiring board, a second wiring board disposed on the first wiring board, a first semiconductor component disposed on the second wiring board and having a first power source terminal and a first ground terminal, and a first capacitor element disposed between the first wiring board and the second wiring board and having a first electrode and a second electrode. The first wiring board includes a first power source line and a first ground line. The second wiring board includes a second power source line and a second ground line. The first power source terminal is electrically connected to the first power source line through the second power source line. The first ground terminal is electrically connected to the first ground line through the second ground line. The first electrode is not coupled to the first power source line and is coupled with the second power source line. The second electrode is coupled to both the first ground line and the second ground line.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to a noise suppression technique. [Background technology]

[0002] An electronic module installed in an electronic device has a printed wiring board and a semiconductor device mounted on the printed wiring board. A semiconductor package is an example of a semiconductor device. The semiconductor package has a semiconductor component and a package substrate on which the semiconductor component is mounted. When the semiconductor component operates, a current caused by the operation of the semiconductor component flows through the power supply path of the package substrate and the printed wiring board. The impedance of the power supply path is called the source impedance. Potential fluctuations occur as a result of the product of the current flowing through the power supply path and the source impedance. Patent Document 1 discloses placing a capacitor in the power supply path as one method for reducing such potential fluctuations. Potential fluctuations caused by the operation of the semiconductor component can be reduced by supplying charge from the capacitor. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 5-13909 Summary of the Invention [Problem to be solved by the invention]

[0004] However, as the operation speed of semiconductor components increases, minute noise generated in the power supply path has become a problem. This noise propagates along the power supply path to other semiconductor components or other circuits within the semiconductor components, affecting the operation of those other semiconductor components or circuits. Noise generated by the operation of semiconductor components and propagating to other semiconductor components or other circuits is called interference noise.

[0005] The present invention aims to reduce interference noise. [Means for solving the problem]

[0006] An electronic module of the present invention comprises a first wiring board, a second wiring board arranged on the first wiring board, a first semiconductor component arranged on the second wiring board, the first semiconductor component having a first power supply terminal and a first ground terminal, and a first capacitive element arranged between the first wiring board and the second wiring board, the first capacitor element having a first electrode and a second electrode, wherein the first wiring board has a first power supply line and a first ground line, the second wiring board has a second power supply line and a second ground line, the first power supply terminal is electrically connected to the first power supply line via the second power supply line, the first ground terminal is electrically connected to the first ground line via the second ground line, the first electrode is not connected to the first power supply line but is connected to the second power supply line, and the second electrode is connected to both the first ground line and the second ground line.

[0007] an electronic module according to the present invention comprising: a first wiring board; a second wiring board arranged on the first wiring board; a first semiconductor component arranged on the second wiring board, the first semiconductor component having a first power supply terminal and a first ground terminal; and a first capacitive element arranged between the first wiring board and the second wiring board, the first capacitor element having a first electrode and a second electrode, wherein the first wiring board has a first power supply line and a first ground line; the second wiring board has a second power supply line and a second ground line; the first power supply terminal is electrically connected to the first power supply line via the second power supply line; the first ground terminal is electrically connected to the first ground line via the second ground line; the first electrode is joined to both the first power supply line and the second power supply line; and the second electrode is not joined to the first ground line but is joined to the second ground line. [Effects of the Invention]

[0008] According to the present invention, it is possible to reduce interference noise. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 1 is an explanatory diagram of a digital camera, which is an imaging device as an example of an electronic device according to a first embodiment. [Figure 2] 1 is a schematic cross-sectional view of a main part of an image processing module, which is an example of an electronic module according to a first embodiment. [Figure 3] 1A is an enlarged view of the periphery of a first capacitive element in the image processing module according to the first embodiment, and FIG. 1B is an enlarged view of the periphery of a second capacitive element in the image processing module according to the first embodiment. [Figure 4] 10 is a schematic cross-sectional view of a main part of an image processing module, which is an example of an electronic module according to a second embodiment. FIG. [Figure 5] 10(a) is an enlarged view of the periphery of a first capacitive element in the image processing module according to the second embodiment, and (b) is an enlarged view of the periphery of a second capacitive element in the image processing module according to the second embodiment. [Figure 6] FIG. 11 is a cross-sectional view illustrating a main part of an image processing module, which is an example of an electronic module according to a third embodiment. [Figure 7] 10A is an enlarged view of the periphery of a first capacitive element in the image processing module according to the third embodiment, and FIG. 10B is an enlarged view of the periphery of a second capacitive element in the image processing module according to the third embodiment. [Figure 8] FIG. 10 is a schematic cross-sectional view of a main part of an image processing module, which is an example of an electronic module according to a fourth embodiment. [Figure 9] FIG. 11 is a schematic cross-sectional view of a main part of an image processing module, which is an example of an electronic module according to a fifth embodiment. [Figure 10] 10(a) is an enlarged view of the periphery of a first capacitive element in the image processing module according to the fifth embodiment, and (b) is an enlarged view of the periphery of a second capacitive element in the image processing module according to the fifth embodiment. [Figure 11]FIG. 13 is a cross-sectional view schematically illustrating a main part of an image processing module, which is an example of an electronic module according to a sixth embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0010] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

[0011] [First embodiment] 1 is an explanatory diagram of a digital camera 600, which is an imaging device as an example of an electronic device according to the first embodiment. The digital camera 600, which is an imaging device, is a lens-interchangeable digital camera and includes a camera body 651. A lens unit (lens barrel) 602 including a lens is detachably attached to the camera body 651. The camera body 651 includes a housing 660, and a sensor module 900 and an image processing module 1000 arranged inside the housing 660.

[0012] The sensor module 900 and the image processing module 1000 are electrically connected by a flexible printed wiring board 800. A power supply (not shown) is provided inside the housing 660. The power supply is, for example, a DC power supply. The DC power supply is, for example, a battery.

[0013] The sensor module 900 includes an image sensor 901 and a printed wiring board 902. The image sensor 901 is mounted on the printed wiring board 902. The image sensor 901 is, for example, a CMOS (Complementary Metal Oxide Semiconductor) image sensor or a CCD (Charge Coupled Device) image sensor. The image sensor 901 has a function of converting light incident via the lens unit 652 into an electrical signal.

[0014] The image processing module 1000 is an example of an electronic module and is configured with a printed circuit board. The image processing module 1000 includes a printed wiring board 101, and a power supply device 700 and a semiconductor device 150 mounted on the printed wiring board 101. The printed wiring board 101 is an example of a first wiring board and is a rigid printed wiring board.

[0015] The power supply device 700 is a device that supplies power to the semiconductor device 150 from a battery (not shown). The power supply device 700 is an IC having a power supply element. The power supply device 700 applies an operating voltage, for example, a DC voltage, to the semiconductor device 150 via the printed wiring board 101, and supplies the power, i.e., current, required for operation of the semiconductor device 150 to the semiconductor device 150. A part of a power supply path that supplies power, i.e., current, from the power supply device 700 to the semiconductor device 150 is formed on the printed wiring board 101.

[0016] 2 is a schematic cross-sectional view of a main part of an image processing module 1000, which is an example of an electronic module according to the first embodiment. The semiconductor device 150 has a printed wiring board 102, which is an example of a second wiring board, a semiconductor component 151, which is an example of a first semiconductor component, and a semiconductor component 152, which is an example of a second semiconductor component. The printed wiring board 102 is a rigid printed wiring board. The printed wiring board 102 is disposed on the printed wiring board 101. The semiconductor components 151 and 152 are disposed on the printed wiring board 102. That is, the printed wiring board 102 is mounted on the printed wiring board 101, and the semiconductor components 151 and 152 are mounted on the printed wiring board 102.

[0017] Each of the semiconductor components 151 and 152 is a semiconductor chip. Each of the semiconductor components 151 and 152 has a die (not shown) sealed with resin. The semiconductor component 151 is an element capable of image processing, i.e., a digital signal processor. The semiconductor component 151 has the function of acquiring a digital signal, which is an electrical signal, from the image sensor 901 and generating image data based on the acquired digital signal. The semiconductor component 152 is connected to the semiconductor component 151 so as to be able to communicate data with it, and is a memory element capable of storing image data generated by the semiconductor component 151.

[0018] The printed wiring board 101 is, for example, a motherboard. The printed wiring board 101 includes a flat insulating substrate 11 made of an insulating material, and a power line 110V and a ground line 110G supported by the insulating substrate 11. The insulating material of the insulating substrate 11 is, for example, glass epoxy resin. The power line 110V is an example of a first power line, and the ground line 110G is an example of a first ground line. In the printed wiring board 101, the power line 110V and the ground line 110G are not in contact with each other, i.e., are independent of each other. These lines 110V and 110G are made of a conductive material, for example, copper. Note that the printed wiring board 101 may also include a signal line (not shown) that serves as a signal transmission path in addition to the lines 110V and 110G.

[0019] The direction perpendicular to the main surface of printed wiring board 101, i.e., main surface 1011 of insulating substrate 11, is defined as the Z direction. Two directions that intersect (are perpendicular to) the Z direction and that intersect (are perpendicular to) each other are defined as the X direction and the Y direction.

[0020] A plurality of pads 104 are arranged in an array on the main surface 1011 of the insulating substrate 11. The pads 104 are arranged at intervals in the X and Y directions. An insulating layer such as a solder resist layer (not shown) may be formed on the main surface 1011.

[0021] The printed wiring board 102 is, for example, a package substrate, i.e., an interposer. The printed wiring board 102 includes a flat insulating substrate 12 made of an insulating material, and power supply lines 120V and 130V and ground lines 120G and 130G supported by the insulating substrate 12. The insulating material of the insulating substrate 12 is, for example, glass epoxy resin. The power supply line 120V is an example of a second power supply line. The power supply line 130V is an example of a third power supply line. The ground line 120G is an example of a second ground line. The ground line 130G is an example of a third ground line. In the printed wiring board 102, the power supply line 120V, the power supply line 130V, the ground line 120G, and the ground line 130G are not in contact with each other, i.e., are independent of each other. These lines 120V, 120G, 130V, and 130G are formed of a conductive material, for example, copper. In addition to these lines 120V, 120G, 130V, and 130G, printed wiring board 102 may have a signal line (not shown) that serves as a signal transmission path. Semiconductor component 151 and semiconductor component 152 can communicate data with each other via this signal line.

[0022] The main surface 1021 of the insulating substrate 12 faces the main surface 1011 with a gap therebetween. A plurality of pads 105 are arranged in an array on the main surface 1021. The pads 105 are arranged with gaps between them in the X and Y directions. In the first embodiment, the number of the pads 105 is the same as the number of the pads 104, and each pad 105 faces a corresponding pad 104. An insulating layer (not shown), such as a solder resist layer, may be formed on the main surface 1021.

[0023] A portion of the plurality of pads 104 and a portion of the plurality of pads 105 are joined to each other by conductive joints 160. In the first embodiment, each joint 160 is made of a conductive material. The conductive material that makes up each joint 160 is, for example, solder.

[0024] Semiconductor components 151 and 152 are arranged at intervals on a main surface 1022 of the insulating substrate 12 opposite to the main surface 1021. The semiconductor component 151 has a plurality of terminals 153 arranged in an array at intervals in the X and Y directions. Each of the plurality of terminals 153 includes a solder bump and a pad. The semiconductor component 152 has a plurality of terminals 154 arranged in an array at intervals in the X and Y directions. Each of the plurality of terminals 154 includes a solder bump and a pad. Each of the plurality of terminals 153 of the semiconductor component 151 is mechanically and electrically connected to a pad (not shown) on the main surface 1022. Furthermore, each of the plurality of terminals 154 of the semiconductor component 152 is mechanically and electrically connected to a pad (not shown) on the main surface 1022. Note that an insulating layer (not shown), such as a solder resist layer, may be formed on the main surface 1022.

[0025] The multiple terminals 153 include a power terminal 153V and a ground terminal 153G. The power terminal 153V is an example of a first power terminal, and the ground terminal 153G is an example of a first ground terminal. The multiple terminals 154 include a power terminal 154V and a ground terminal 154G. The power terminal 154V is an example of a second power terminal, and the ground terminal 154G is an example of a second ground terminal.

[0026] Semiconductor component 151 becomes operable when an operating voltage, i.e., a DC voltage, is applied between power supply terminal 153V and ground terminal 153G. Semiconductor component 152 becomes operable when an operating voltage, i.e., a DC voltage, is applied between power supply terminal 154V and ground terminal 154G. In the first embodiment, the rated voltage required for operation of semiconductor component 151 is the same as the rated voltage required for operation of semiconductor component 152. Therefore, an operating voltage is applied to each of semiconductor components 151 and 152 from power supply device 700 shown in FIG. 1 via common lines 110V and 110G.

[0027] A power supply terminal 153V of the semiconductor component 151 is electrically connected to the power supply line 120V by being bonded to a pad of the power supply line 120V. A ground terminal 153G of the semiconductor component 151 is electrically connected to the ground line 120G by being bonded to a pad of the ground line 120G. A power supply terminal 154V of the semiconductor component 152 is electrically connected to the power supply line 130V by being bonded to a pad of the power supply line 130V. A ground terminal 154G of the semiconductor component 152 is electrically connected to the ground line 130G by being bonded to a pad of the ground line 130G.

[0028] The power supply line 110V and the ground line 110G are electrically connected to the power supply device 700 shown in Fig. 1. The power supply line 110V is joined to the power supply line 120V at a junction 161V among the plurality of junctions 160. The ground line 110G is joined to the ground line 120G at a junction 161G among the plurality of junctions 160. The power supply line 110V is joined to the power supply line 130V at a junction 162V among the plurality of junctions 160. The ground line 110G is joined to the ground line 130G at a junction 162G among the plurality of junctions 160.

[0029] Therefore, power supply terminal 153V of semiconductor component 151 is electrically connected to power supply line 110V via power supply line 120V. Ground terminal 153G of semiconductor component 151 is electrically connected to ground line 110G via ground line 120G. Furthermore, power supply terminal 154V of semiconductor component 152 is electrically connected to power supply line 110V via power supply line 130V. Ground terminal 154G of semiconductor component 152 is electrically connected to ground line 110G via ground line 130G.

[0030] A DC voltage, which is an operating voltage, is applied between the power supply line 110V and the ground line 110G by the power supply device 700. Therefore, the DC voltage, which is an operating voltage, is applied between the power supply terminal 153V and the ground terminal 153G of the semiconductor component 151 via the power supply lines 110V and 120V and the ground lines 110G and 120G. Furthermore, the DC voltage, which is an operating voltage, is applied between the power supply terminal 154V and the ground terminal 154G of the semiconductor component 152 via the power supply lines 110V and 130V and the ground lines 110G and 130G. In this way, the operating voltage is applied to the semiconductor component 151 by the power supply device 700 via the power supply line 110V and the ground line 110G of the printed wiring board 101 and the power supply line 120V and the ground line 120G of the printed wiring board 102. An operating voltage is applied to the semiconductor component 152 by the power supply device 700 via the power supply line 110V and the ground line 110G of the printed wiring board 101 and the power supply line 130V and the ground line 130G of the printed wiring board .

[0031] The power supply line 110V has at least one power supply pattern 117V arranged on a conductor layer of the printed wiring board 101 and a plurality of power supply vias 118V extending in the Z direction. The power supply pattern 117V is a flat conductor pattern extending in the X direction and the Y direction. Each power supply via 118V is a via conductor. The ground line 110G has at least one ground pattern 117G arranged on a conductor layer of the printed wiring board 101 and a plurality of ground vias 118G extending in the Z direction. The ground pattern 117G is a flat conductor pattern extending in the X direction and the Y direction. Each ground via 118G is a via conductor.

[0032] The power supply line 120V has at least one power supply pattern 127V arranged on a conductor layer of the printed wiring board 102 and a plurality of power supply vias 128V extending in the Z direction. The power supply pattern 127V is a flat conductor pattern extending in the X direction and the Y direction. Each power supply via 128V is a via conductor. The ground line 120G has at least one ground pattern 127G arranged on a conductor layer of the printed wiring board 102 and a plurality of ground vias 128G extending in the Z direction. The ground pattern 127G is a flat conductor pattern extending in the X direction and the Y direction. Each ground via 128G is a via conductor.

[0033] The power supply line 130V has at least one power supply pattern 137V arranged on a conductor layer of the printed wiring board 102 and a plurality of power supply vias 138V extending in the Z direction. The power supply pattern 137V is a flat conductor pattern extending in the X direction and the Y direction. Each power supply via 138V is a via conductor. The ground line 130G has at least one ground pattern 137G arranged on a conductor layer of the printed wiring board 102 and a plurality of ground vias 138G extending in the Z direction. The ground pattern 137G is a flat conductor pattern extending in the X direction and the Y direction. Each ground via 138G is a via conductor.

[0034] The above configuration forms a power supply path P1 extending from the power supply device 700 to the semiconductor component 151. The power supply path P1 includes a power supply path P1V and a ground path P1G. The power supply path P1V includes a power supply line 110V, a junction 161V, and a power supply line 120V. The ground path P1G includes a ground line 110G, a junction 161G, and a ground line 120G.

[0035] Also, a power supply path P2 is formed from the power supply device 700 to the semiconductor component 152. The power supply path P2 includes a power supply path P2V and a ground path P2G. The power supply path P2V includes a power supply line 110V, a junction 162V, and a power supply line 130V. The ground path P2G includes a ground line 110G, a junction 162G, and a ground line 130G.

[0036] When the semiconductor component 151 operates, a current flows through the semiconductor component 151 via the power supply path P1V. A return current also flows through the ground path P1G. In the first embodiment, in order to suppress potential fluctuations in the power supply path P1 due to the operation of the semiconductor component 151, i.e., potential fluctuations at the power supply terminal 153V and the ground terminal 153G, the image processing module 1000 includes a capacitor 171, which is an example of a first capacitance element. The capacitor 171 is a chip capacitor. The capacitor 171 has an electrode 1711, which is an example of a first electrode, and an electrode 1712, which is an example of a second electrode.

[0037] The electrode 1711 is joined to the power supply line 120V with a conductive member, and the electrode 1712 is joined to the ground line 120G with a conductive member, so that the electrode 1711 is electrically connected to the power supply line 120V, and the electrode 1712 is electrically connected to the ground line 120G.

[0038] When the semiconductor component 151 is operating, the charge stored in the capacitor 171 is supplied to the power supply line 120V, thereby suppressing potential fluctuations in the power supply path P1, i.e., potential fluctuations at the power supply terminal 153V and the ground terminal 153G. Furthermore, when the semiconductor component 151 is not operating, the capacitor 171 is charged via the power supply path P1.

[0039] Capacitor 171 is preferably disposed near power supply terminal 153V and ground terminal 153G to effectively suppress potential fluctuations in power supply path P1, i.e., potential fluctuations at power supply terminal 153V and ground terminal 153G. Therefore, in the first embodiment, capacitor 171 is disposed between printed wiring board 101 and printed wiring board 102. This shortens the path from semiconductor component 151 to capacitor 171, and effectively suppresses potential fluctuations in power supply path P1, i.e., potential fluctuations at power supply terminal 153V and ground terminal 153G.

[0040] Furthermore, in order to effectively suppress potential fluctuations in the power supply path P1 due to the operation of the semiconductor component 151, i.e., potential fluctuations at the power supply terminal 153V and the ground terminal 153G, the capacitor 171 is disposed at a position overlapping the semiconductor component 151 when viewed in the Z direction. This makes it possible to shorten the path from the semiconductor component 151 to the capacitor 171, and to effectively suppress potential fluctuations in the power supply path P1, i.e., potential fluctuations at the power supply terminal 153V and the ground terminal 153G.

[0041] Here, as the processing speed of semiconductor component 151 increases, noise is observed when capacitor 171 is charged or discharged. This noise propagates to power supply line 110V, and then propagates to power supply terminal 154V of semiconductor component 152 via power supply line 130V. In this way, noise observed at capacitor 171 due to the operation of semiconductor component 151, and that propagates to other semiconductor components 152, is called interference noise.

[0042] In the first embodiment, electrode 1711 is connected to power supply line 120V by a conductive member, but is not connected to power supply line 110V. Electrode 1712 is connected to both ground lines 110G and 120G by a conductive member. This causes interference noise observed at electrode 1711 of capacitor 171 to not propagate directly to power supply line 110V, but to propagate via power supply line 120V to power supply line 110V. Therefore, the path from electrode 1711 of capacitor 171 to power supply terminal 154V of semiconductor component 152 is longer, and the impedance of this path reduces interference noise.

[0043] FIG. 3(a) is an enlarged view of the periphery of the capacitor 171 in the image processing module 1000 according to the first embodiment.

[0044] The power supply line 110V has a power supply pad 111V. The power supply pad 111V is an example of a first power supply pad. The power supply pad 111V is included in the plurality of pads 104. The power supply line 120V has power supply pads 121V and 122V. The power supply pad 121V is an example of a second power supply pad. The power supply pad 122V is an example of a third power supply pad. The power supply pads 121V and 122V are included in the plurality of pads 105.

[0045] The power supply pad 111V and the power supply pad 121V are joined to each other at a joint 161V. The joint 161V is an example of a first joint. The power supply pad 122V and the electrode 1711 of the capacitor 171 are joined to each other at a conductive joint S1, which is an example of a second joint. The joint S1 is made of a conductive material, for example, solder.

[0046] The ground line 110G has ground pads 111G and 112G. The ground pad 111G is an example of a first ground pad. The ground pad 112G is an example of a second ground pad. The ground pads 111G and 112G are included in the plurality of pads 104. The ground line 120G has ground pads 121G and 122G. The ground pad 121G is an example of a third ground pad. The ground pad 122G is an example of a fourth ground pad. The ground pads 121G and 122G are included in the plurality of pads 105.

[0047] The ground pad 111G and the ground pad 121G are joined to each other at a joint 161G. The joint 161G is an example of a third joint. The ground pad 112G and the electrode 1712 of the capacitor 171 are joined to each other at a conductive joint S3, which is an example of a fourth joint. The ground pad 122G and the electrode 1712 of the capacitor 171 are joined to each other at a conductive joint S4, which is an example of a fifth joint. The joints S3 and S4 are made of a conductive material, for example, solder.

[0048] With the above configuration, interference noise observed at the capacitor 171 propagates along a path PN indicated by a dashed arrow in FIG. 3. The path PN includes a power supply pad 122V, a power supply via 128V1, a power supply pattern 127V, a power supply via 128V2, a power supply pad 121V, and a junction 161V. Each of the power supply vias 128V1 and 128V2 is one of a plurality of power supply vias 128. The power supply via 128V1 contacts the power supply pad 122V and the power supply pattern 127V, and the power supply via 128V2 contacts the power supply pad 121V and the power supply pattern 127V. The path PN also includes a power supply pad 111V, a power supply via 118V1, and a power supply pattern 117V of the power supply line 110V. The power supply via 118V1 is one of a plurality of power supply vias 118V. Power supply via 118V1 is in contact with power supply pad 111V and power supply pattern 117V. As described above, the interference noise observed at capacitor 171 propagates to semiconductor component 152 via power supply line 120V of printed wiring board 102, and then through power supply lines 110V and 130V. As a result, path PN is longer than the path in which the interference noise observed at capacitor 171 propagates directly to power supply line 110V, since the interference noise detours around power supply line 120V. Therefore, the impedance of path PN, including the detour path, reduces the interference noise propagating from capacitor 171 to semiconductor component 152.

[0049] In addition, in the first embodiment, an inductor such as a ferrite bead can be omitted as a noise filter. By omitting the inductor, it is possible to prevent the wiring area from increasing, thereby realizing a smaller size and higher density mounting of the image processing module 1000. Furthermore, it is possible to reduce costs by reducing the number of parts.

[0050] Furthermore, in order to reduce the impedance of the ground path P1G, it is preferable to connect the ground line 110G of the printed wiring board 101 and the ground line 120G of the printed wiring board 102 in parallel at multiple points rather than just one point. In the first embodiment, ground pads 112G and 122G to which electrodes 1712 of the capacitor 171 are joined at joints S3 and S4 are used to connect the ground lines 110G and 120G in parallel. This makes it possible to achieve a reduction in the size of the printed wiring board 102 and a high density of signal lines while ensuring the number of ground pads of each of the ground lines 110G and 120G required to connect the ground lines 110G and 120G in parallel.

[0051] In the first embodiment, power supply line 120V and power supply line 130V are not in contact with each other, i.e., are independent, on printed wiring board 102. Power supply line 120V and power supply line 130V are electrically connected via power supply line 110V of printed wiring board 101. Ground line 120G and ground line 130G are not in contact with each other, i.e., are independent, on printed wiring board 102. Ground line 120G and ground line 130G are electrically connected via ground line 110G of printed wiring board 101.

[0052] That is, the power supply terminal 153V of the semiconductor component 151 is electrically connected to the power supply terminal 154V of the semiconductor component 152 via the power supply line 120V, the power supply line 110V, and the power supply line 130V. The ground terminal 153G of the semiconductor component 151 is electrically connected to the ground terminal 154G of the semiconductor component 152 via the ground line 120G, the ground line 110G, and the ground line 130G. In this manner, the power supply line 120V and the power supply line 130V are electrically connected to each other on the printed wiring board 102, bypassing the power supply line 110V. Therefore, the path length between the power supply terminals 153V and 154V is longer than in the case of a direct connection. Furthermore, the ground line 120G and the ground line 130G are electrically connected to each other on the printed wiring board 102, bypassing the ground line 110G. Therefore, the path length between the ground terminals 153G and 154G is longer than in the case of a direct connection. These configurations can reduce interference noise.

[0053] In the first embodiment, when the semiconductor component 152 shown in FIG. 2 operates, a current flows through the semiconductor component 152 via the power supply path P2V. A return current flows through the ground path P2G. In order to suppress potential fluctuations in the power supply path P2 due to the operation of the semiconductor component 152, i.e., potential fluctuations at the power supply terminal 154V and the ground terminal 154G, the image processing module 1000 includes a capacitor 172, which is an example of a second capacitive element. The capacitor 172 is a chip capacitor. The capacitor 172 has an electrode 1721, which is an example of a third electrode, and an electrode 1722, which is an example of a fourth electrode.

[0054] The electrode 1721 is joined to the power supply line 130V with a conductive member, and the electrode 1722 is joined to the ground line 130G with a conductive member, so that the electrode 1721 is electrically connected to the power supply line 130V, and the electrode 1722 is electrically connected to the ground line 130G.

[0055] When the semiconductor component 152 is operating, the charge stored in the capacitor 172 is supplied to the power supply line 130V, thereby suppressing potential fluctuations in the power supply path P2, i.e., potential fluctuations at the power supply terminal 154V and the ground terminal 154G. Furthermore, when the semiconductor component 152 is not operating, the capacitor 172 is charged via the power supply path P2.

[0056] Capacitor 172 is preferably disposed near power supply terminal 154V and ground terminal 154G to effectively suppress potential fluctuations in power supply path P2, i.e., potential fluctuations at power supply terminal 154V and ground terminal 154G. Therefore, in the first embodiment, capacitor 172 is disposed between printed wiring board 101 and printed wiring board 102. This shortens the path from semiconductor component 152 to capacitor 172, and effectively suppresses potential fluctuations in power supply path P2, i.e., potential fluctuations at power supply terminal 154V and ground terminal 154G.

[0057] Furthermore, in order to effectively suppress potential fluctuations in the power supply path P2 due to the operation of the semiconductor component 152, i.e., potential fluctuations at the power supply terminal 154V and the ground terminal 154G, the capacitor 172 is disposed at a position overlapping the semiconductor component 152 when viewed in the Z direction. This makes it possible to shorten the path from the semiconductor component 152 to the capacitor 172, and to effectively suppress potential fluctuations in the power supply path P2, i.e., potential fluctuations at the power supply terminal 154V and the ground terminal 154G.

[0058] In the first embodiment, electrode 1721 is connected to power supply line 130V with a conductive member, but is not connected to power supply line 110V. Furthermore, electrode 1722 is connected to both ground lines 110G and 130G with a conductive member. As a result, interference noise observed at electrode 1721 of capacitor 172 does not propagate directly to power supply line 110V, but propagates via power supply line 130V to power supply line 110V. Therefore, the path from electrode 1721 of capacitor 172 to power supply terminal 153V of semiconductor component 151 is longer, and the impedance of this path reduces interference noise.

[0059] FIG. 3(b) is an enlarged view of the periphery of the capacitor 172 in the image processing module 1000 according to the first embodiment.

[0060] The power supply line 110V has a power supply pad 113V. The power supply pad 113V is included in the plurality of pads 104. The power supply line 130V has power supply pads 131V and 132V. The power supply pads 131V and 132V are included in the plurality of pads 105.

[0061] The power supply pad 113V and the power supply pad 131V are joined to each other at a joint 162V. The power supply pad 132V and the electrode 1721 of the capacitor 172 are joined to each other at a conductive joint S5. The joint S5 is made of a conductive material, for example, solder.

[0062] The ground line 110G has ground pads 113G and 114G. The ground pads 113G and 114G are included in the plurality of pads 104. The ground line 130G has ground pads 131G and 132G. The ground pads 131G and 132G are included in the plurality of pads 105.

[0063] The ground pad 113G and the ground pad 131G are joined to each other at a joint 162G. The ground pad 114G and the electrode 1722 of the capacitor 172 are joined to each other at a conductive joint S7. The ground pad 132G and the electrode 1722 of the capacitor 172 are joined to each other at a conductive joint S8. The joints S7 and S8 are made of a conductive material, for example, solder.

[0064] With the above configuration, the interference noise observed at capacitor 172 propagates through power supply line 130V of printed wiring board 102 and then through power supply lines 110V and 120V to semiconductor component 151. As a result, the interference noise propagating from capacitor 172 to semiconductor component 151 is reduced.

[0065] Furthermore, in order to reduce the impedance of the ground path P2G, it is preferable to connect the ground line 110G of the printed wiring board 101 and the ground line 130G of the printed wiring board 102 in parallel at multiple points rather than just one point. In the first embodiment, ground pads 114G and 132G to which electrodes 1722 of the capacitor 172 are joined at joints S7 and S8 are used to connect the ground lines 110G and 130G in parallel. This makes it possible to achieve a reduction in the size of the printed wiring board 102 and a high density of signal lines while ensuring the number of ground pads of each of the ground lines 110G and 130G required to connect the ground lines 110G and 130G in parallel.

[0066] The image processing module 1000 also includes a capacitor 173, which is an example of a third capacitance element, arranged on the printed wiring board 101. The capacitor 173 is a chip capacitor. The capacitor 173 is larger in size than the capacitor 171. The capacitor 173 has an electrode 1731, which is an example of a fifth electrode, and an electrode 1732, which is an example of a sixth electrode. The capacitor 173 is arranged on a main surface 1012 opposite to the main surface 1011 of the insulating substrate 11. An insulating layer (not shown), such as a solder resist layer, may be formed on the main surface 1012. The electrode 1731 of the capacitor 173 is joined to a pad 115V of the power supply line 110V, and the electrode 1732 of the capacitor 173 is joined to a pad 115G of the ground line 110G. This makes it possible to reduce potential fluctuations in the power supply line 110V and ground line 110G due to the operation of the semiconductor component 151, that is, potential fluctuations in the power supply terminal 153V and ground terminal 153G of the semiconductor component 151.

[0067] Furthermore, when viewed in the Z direction, the capacitor 173 is disposed at a position overlapping the semiconductor component 151. This shortens the path from the semiconductor component 151 to the capacitor 173, and effectively suppresses potential fluctuations in the power supply path P1, i.e., potential fluctuations at the power supply terminal 153V and the ground terminal 153G of the semiconductor component 151.

[0068] In the first embodiment, the capacitance C3 of the capacitor 173 is larger than the capacitance C1 of the capacitor 171. The power supply path P1 of the semiconductor component 151 includes multiple charge supply sources, such as the power supply device 700, the capacitors 171 and 173, the on-die capacitor included in the semiconductor component 151, and the on-die capacitor included in the semiconductor component 152. These multiple charge supply sources are branched and connected to the power supply path P1. When the semiconductor component 151 operates at a predetermined frequency, noise is observed at the capacitor 171. The noise observed at the capacitor 171 is more likely to propagate along the paths that are connected to the charge supply sources connected to the power supply path P1 by branch paths, as the impedance of the paths is relatively low. The greater the impedance of the paths from the capacitor 171 to the on-die capacitor included in the semiconductor component 152 is relative to the impedance of the paths from the capacitor 171 to the other charge supply sources, the more the noise propagating from the capacitor 171 to the semiconductor component 152 is reduced. By mounting capacitor 173 on printed wiring board 101, the path from capacitor 171 to capacitor 173 has a relatively lower impedance than the path from capacitor 171 to the on-die capacitor included in semiconductor component 152. In other words, noise observed at capacitor 171 during operation of semiconductor component 151 is more likely to propagate to capacitor 173 than to semiconductor component 152. Therefore, interference noise propagating from capacitor 171 to semiconductor component 152 can be further suppressed.

[0069] The image processing module 1000 also includes a capacitor 174, which is an example of a fourth capacitance element, arranged on the printed wiring board 101. The capacitor 174 is a chip capacitor. The capacitor 174 is larger in size than the capacitor 172. The capacitor 174 has an electrode 1741, which is an example of a seventh electrode, and an electrode 1742, which is an example of an eighth electrode. The capacitor 174 is arranged on the principal surface 1012 opposite to the principal surface 1011 of the insulating substrate 11. The electrode 1741 of the capacitor 174 is joined to the pad 116V of the power supply line 110V, and the electrode 1742 of the capacitor 174 is joined to the pad 116G of the ground line 110G. This makes it possible to reduce potential fluctuations of the power supply line 110V and the ground line 110G due to operation of the semiconductor component 152, i.e., potential fluctuations of the power supply terminal 154V and the ground terminal 154G of the semiconductor component 152.

[0070] Furthermore, when viewed in the Z direction, the capacitor 174 is disposed at a position overlapping the semiconductor component 152. This shortens the path from the semiconductor component 152 to the capacitor 174, and effectively suppresses potential fluctuations in the power supply path P2, i.e., potential fluctuations at the power supply terminal 154V and the ground terminal 154G of the semiconductor component 152.

[0071] In the first embodiment, the capacitance C4 of the capacitor 174 is larger than the capacitance C2 of the capacitor 172. The power supply path P2 of the semiconductor component 152 includes multiple charge supply sources, such as the power supply device 700, the capacitors 172 and 174, the on-die capacitor included in the semiconductor component 151, and the on-die capacitor included in the semiconductor component 152. Mounting the capacitor 174 on the printed wiring board 101 makes the path from the capacitor 172 to the capacitor 174 have a relatively lower impedance than the path from the capacitor 172 to the on-die capacitor included in the semiconductor component 151. In other words, when the semiconductor component 152 is operating, noise observed at the capacitor 172 is more likely to propagate to the capacitor 174 than to the semiconductor component 151. This makes it possible to further suppress interference noise propagating from the capacitor 172 to the semiconductor component 151.

[0072] Furthermore, in the first embodiment, as shown in FIG. 3(a), the pads 104 include a dummy pad 112D disposed at a position facing the electrode 1711 of the capacitor 171. The dummy pad 112D is not in contact with the power supply line 110V and the ground line 110G on the printed wiring board 101, i.e., is independent. The electrode 1711 of the capacitor 171 and the dummy pad 112D are joined to each other by a conductive joint S2, which is an example of a sixth joint. The joint S2 is made of a conductive material, for example, solder. The dummy pad 112D is electrically connected to the power supply line 120V via the electrode 1711 and the joints S1 and S2.

[0073] When printed wiring board 102 is mounted on printed wiring board 101, solder placed between printed wiring boards 101 and 102 is melted by a heating process. At this time, printed wiring board 102 sinks relative to printed wiring board 101. When printed wiring board 102 sinks, electrode 1711 of capacitor 171 abuts against dummy pad 112D. This prevents capacitor 171 from losing balance and tilting. This prevents open circuit failures from occurring between electrode 1711 and power supply pad 122V, allowing capacitor 171 to be stably mounted between printed wiring boards 101 and 102. While dummy pad 112D is preferably present, it may be omitted.

[0074] Furthermore, in the first embodiment, as shown in FIG. 3(b), the multiple pads 104 include a dummy pad 114D disposed at a position facing the electrode 1721 of the capacitor 172. The dummy pad 114D is not in contact with the power supply line 110V and the ground line 110G on the printed wiring board 101, i.e., is independent. The electrode 1721 of the capacitor 172 and the dummy pad 114D are joined to each other by a conductive joint S6. The joint S6 is made of a conductive material, for example, solder. The dummy pad 114D is electrically connected to the power supply line 130V via the electrode 1721 and the joints S5 and S6.

[0075] When printed wiring board 102 is mounted on printed wiring board 101, electrode 1721 of capacitor 172 abuts against dummy pad 114D. This prevents capacitor 172 from losing balance and tilting. This prevents open circuit defects from occurring between electrode 1721 and power supply pad 132V, allowing capacitor 172 to be stably mounted between printed wiring boards 101 and 102. Note that although dummy pad 114D is preferably present, it may be omitted.

[0076] In the above description, the case where there is one each of the capacitors 171 to 174 has been described, but this is not limiting, and there may be a plurality of each of the capacitors 171 to 174. Furthermore, since the semiconductor component 151 is configured to perform image processing, it operates more frequently than the semiconductor component 152. Therefore, of the capacitors 171 and 172, the capacitor 172 may be omitted as necessary. Furthermore, although it is preferable that the capacitors 173 and 174 are also present, the capacitors 173 and / or 174 may be omitted as necessary.

[0077] [Second embodiment] Next, an electronic module according to a second embodiment will be described. Fig. 4 is a cross-sectional schematic diagram of a main part of an image processing module 2000, which is an example of an electronic module according to the second embodiment. In the second embodiment, the image processing module 1000 in the digital camera 600, which is an image capturing device and an example of an electronic device described in the first embodiment, is replaced with an image processing module 2000. In the second embodiment, the same components as those in the first embodiment are designated by the same reference numerals, and detailed description thereof will be omitted.

[0078] Image processing module 2000 includes printed wiring board 201, which is an example of a first wiring board, and semiconductor device 250 arranged on printed wiring board 201. Semiconductor device 250 includes printed wiring board 202, which is an example of a second wiring board, and printed wiring board 203, which is an example of a third wiring board. Semiconductor device 250 also includes semiconductor component 151, which is an example of a first semiconductor component, and semiconductor component 152, which is an example of a second semiconductor component.

[0079] Each of the printed wiring boards 201, 202, and 203 is a rigid printed wiring board. The printed wiring board 202 is disposed on the printed wiring board 201. The printed wiring board 203 is disposed on the printed wiring board 202. The semiconductor component 151 is disposed on the printed wiring board 202, and the semiconductor component 152 is disposed on the printed wiring board 203. The semiconductor component 151 is disposed between the printed wiring boards 202 and 203. That is, the printed wiring board 202 is mounted on the printed wiring board 201. The semiconductor component 151 and the printed wiring board 203 are mounted on the printed wiring board 202. The semiconductor component 152 is mounted on the printed wiring board 203.

[0080] The printed wiring board 201 is, for example, a motherboard. The printed wiring board 201 includes a flat insulating substrate 21 made of an insulating material, and a power supply line 210V and a ground line 210G supported by the insulating substrate 21. The insulating material of the insulating substrate 21 is, for example, glass epoxy resin. The power supply line 210V is an example of a first power supply line, and the ground line 210G is an example of a first ground line. In the printed wiring board 201, the power supply line 210V and the ground line 210G are not in contact with each other, i.e., are independent of each other. These lines 210V and 210G are made of a conductive material, for example, copper. In addition to these lines 210V and 210G, the printed wiring board 201 may also include a signal line (not shown) that serves as a signal transmission path.

[0081] The direction perpendicular to the main surface of printed wiring board 201, i.e., main surface 2011 of insulating substrate 21, is defined as the Z direction. Two directions that intersect (are perpendicular to) the Z direction and that intersect (are perpendicular to) each other are defined as the X direction and the Y direction.

[0082] A plurality of pads 204 are arranged in an array on a main surface 2011 of the insulating substrate 21. The pads 204 are arranged at intervals in the X and Y directions. An insulating layer such as a solder resist layer (not shown) may be formed on the main surface 2011.

[0083] The printed wiring board 202 is, for example, a package substrate, i.e., an interposer. The printed wiring board 202 includes a flat insulating substrate 22 made of an insulating material, and power lines 220V, 230V and ground lines 220G, 230G supported by the insulating substrate 22. The insulating material of the insulating substrate 22 is, for example, glass epoxy resin. The power line 220V is an example of a second power line. The power line 230V is an example of a third power line. The ground line 220G is an example of a second ground line. The ground line 230G is an example of a third ground line. In the printed wiring board 202, the power line 220V, the power line 230V, the ground line 220G, and the ground line 230G are not in contact with each other, i.e., are independent of each other. These lines 220V, 220G, 230V, and 230G are formed of a conductive material, for example, copper. In addition to these lines 220V, 220G, 230V, and 230G, printed wiring board 202 may have signal lines (not shown) that serve as signal transmission paths.

[0084] The main surface 2021 of the insulating substrate 22 faces the main surface 2011 with a gap therebetween. A plurality of pads 205 are arranged in an array on the main surface 2021. The pads 205 are arranged with gaps between them in the X and Y directions. In the second embodiment, the number of pads 205 is the same as the number of pads 204, and each pad 205 faces a corresponding pad 204. An insulating layer (not shown), such as a solder resist layer, may be formed on the main surface 2021.

[0085] A portion of the plurality of pads 204 and a portion of the plurality of pads 205 are joined to each other by conductive joints 260. In the second embodiment, each joint 260 is made of a conductive material. The conductive material that makes up each joint 260 is, for example, solder.

[0086] A semiconductor component 151 is disposed on a main surface 2022 opposite to the main surface 2021 of the insulating substrate 22. The semiconductor component 151 has a plurality of terminals 153 arranged in an array at intervals in the X and Y directions. Each of the plurality of terminals 153 includes a solder bump and a pad. Each of the plurality of terminals 153 of the semiconductor component 151 is mechanically and electrically connected to a pad (not shown) on the main surface 2022. The plurality of terminals 153 includes a power supply terminal 153V which is an example of a first power supply terminal, and a ground terminal 153G which is an example of a first ground terminal.

[0087] Furthermore, a plurality of pads 206 are arranged in an array on the main surface 2022 of the insulating substrate 22. The pads 206 are arranged at intervals in the X and Y directions. An insulating layer (not shown), such as a solder resist layer, may be formed on the main surface 2022.

[0088] The printed wiring board 203 is, for example, a package substrate, i.e., an interposer. The printed wiring board 203 includes a flat insulating substrate 23 made of an insulating material, and a power supply line 240V and a ground line 240G supported by the insulating substrate 23. The insulating material of the insulating substrate 23 is, for example, glass epoxy resin. The power supply line 240V is an example of a fourth power supply line. The ground line 240G is an example of a fourth ground line. In the printed wiring board 203, the power supply line 240V and the ground line 240G are not in contact with each other, i.e., are independent of each other. These lines 240V and 240G are made of a conductive material, for example, copper. Note that the printed wiring board 203 may include a signal line (not shown) that serves as a signal transmission path in addition to the lines 240V and 240G.

[0089] The main surface 2031 of the insulating substrate 23 faces the main surface 2022 with a gap therebetween. A plurality of pads 207 are arranged in an array on the main surface 2031. The pads 207 are arranged with gaps between them in the X and Y directions. In the second embodiment, the number of the pads 207 is the same as the number of the pads 206, and each pad 207 faces a corresponding pad 206. An insulating layer (not shown), such as a solder resist layer, may be formed on the main surface 2031.

[0090] A portion of the plurality of pads 206 and a portion of the plurality of pads 207 are respectively joined to each other by conductive joints 270. In the second embodiment, each joint 270 is made of a conductive material. The conductive material that makes up each joint 270 is, for example, solder.

[0091] A semiconductor component 152 is disposed on a main surface 2032 of the insulating substrate 23 opposite the main surface 2031. The semiconductor component 152 has a plurality of terminals 154 arranged in an array at intervals in the X and Y directions. Each of the plurality of terminals 154 includes a solder bump and a pad. Each of the plurality of terminals 154 of the semiconductor component 152 is mechanically and electrically connected to a pad (not shown) on the main surface 2032. The plurality of terminals 154 includes a power supply terminal 154V, which is an example of a second power supply terminal, and a ground terminal 154G, which is an example of a second ground terminal. Note that an insulating layer (not shown), such as a solder resist layer, may be formed on the main surface 2032.

[0092] Semiconductor component 151 becomes operable when an operating voltage, i.e., a DC voltage, is applied between power supply terminal 153V and ground terminal 153G. Semiconductor component 152 becomes operable when an operating voltage, i.e., a DC voltage, is applied between power supply terminal 154V and ground terminal 154G. In the second embodiment, the rated voltage of semiconductor component 151 required for operation is the same as the rated voltage of semiconductor component 152 required for operation. Therefore, an operating voltage is applied to each of semiconductor components 151 and 152 from power supply device 700 shown in FIG. 1 via common lines 210V and 210G.

[0093] A power supply terminal 153V of the semiconductor component 151 is electrically connected to the power supply line 220V by being bonded to a pad of the power supply line 220V. A ground terminal 153G of the semiconductor component 151 is electrically connected to the ground line 220G by being bonded to a pad of the ground line 220G. A power supply terminal 154V of the semiconductor component 152 is electrically connected to the power supply line 240V by being bonded to a pad of the power supply line 240V. A ground terminal 154G of the semiconductor component 152 is electrically connected to the ground line 240G by being bonded to a pad of the ground line 240G.

[0094] The power supply line 210V and the ground line 210G are electrically connected to the power supply device 700 shown in Fig. 1. The power supply line 210V is joined to the power supply line 220V at a junction 261V among the multiple junctions 260. The ground line 210G is joined to the ground line 220G at a junction 261G among the multiple junctions 260.

[0095] Furthermore, the power supply line 210V is joined to the power supply line 230V at a junction 262V among the plurality of junctions 260. The ground line 210G is joined to the ground line 230G at a junction 262G among the plurality of junctions 260. Furthermore, the power supply line 230V is joined to the power supply line 240V at a junction 272V among the plurality of junctions 270. The ground line 230G is joined to the ground line 240G at a junction 272G among the plurality of junctions 270.

[0096] Therefore, the power supply terminal 153V of the semiconductor component 151 is electrically connected to the power supply line 210V via the power supply line 220V. The ground terminal 153G of the semiconductor component 151 is electrically connected to the ground line 210G via the ground line 220G. Furthermore, the power supply terminal 154V of the semiconductor component 152 is electrically connected to the power supply line 210V via the power supply lines 240V and 230V. The ground terminal 154G of the semiconductor component 152 is electrically connected to the ground line 210G via the ground lines 240G and 230G.

[0097] A DC voltage, which is an operating voltage, is applied between the power supply line 210V and the ground line 210G by the power supply device 700. Therefore, the DC voltage, which is an operating voltage, is applied between the power supply terminal 153V and the ground terminal 153G of the semiconductor component 151 via the power supply lines 210V, 220V and the ground lines 210G, 220G. Also, the DC voltage, which is an operating voltage, is applied between the power supply terminal 154V and the ground terminal 154G of the semiconductor component 152 via the power supply lines 210V, 230V, 240V and the ground lines 210G, 230G, 240G.

[0098] The power supply line 210V has at least one power supply pattern 217V arranged on a conductor layer of the printed wiring board 201 and a plurality of power supply vias 218V extending in the Z direction. The power supply pattern 217V is a flat conductor pattern extending in the X direction and the Y direction. Each power supply via 218V is a via conductor. The ground line 210G has at least one ground pattern 217G arranged on a conductor layer of the printed wiring board 201 and a plurality of ground vias 218G extending in the Z direction. The ground pattern 217G is a flat conductor pattern extending in the X direction and the Y direction. Each ground via 218G is a via conductor.

[0099] The power supply line 220V has at least one power supply pattern 227V arranged on a conductor layer of the printed wiring board 202 and a plurality of power supply vias 228V extending in the Z direction. The power supply pattern 227V is a flat conductor pattern extending in the X direction and the Y direction. Each power supply via 228V is a via conductor. The ground line 220G has at least one ground pattern 227G arranged on a conductor layer of the printed wiring board 202 and a plurality of ground vias 228G extending in the Z direction. The ground pattern 227G is a flat conductor pattern extending in the X direction and the Y direction. Each ground via 228G is a via conductor.

[0100] The power supply line 230V has at least one power supply via 238V extending in the Z direction. The power supply via 238V is a via conductor. The ground line 230G has a plurality of ground vias 238G extending in the Z direction. Each ground via 238G is a via conductor.

[0101] The power supply line 240V has at least one power supply pattern 247V arranged on a conductor layer of the printed wiring board 203 and a plurality of power supply vias 248V extending in the Z direction. The power supply pattern 247V is a flat conductor pattern extending in the X direction and the Y direction. Each power supply via 248V is a via conductor. The ground line 240G has at least one ground pattern 247G arranged on a conductor layer of the printed wiring board 203 and a plurality of ground vias 248G extending in the Z direction. The ground pattern 247G is a flat conductor pattern extending in the X direction and the Y direction. Each ground via 248G is a via conductor.

[0102] In the second embodiment, the image processing module 2000 includes a capacitor 171, which is an example of a first capacitance element, to suppress potential fluctuations at the power supply terminal 153V and the ground terminal 153G due to the operation of the semiconductor component 151. The capacitor 171 has an electrode 1711, which is an example of a first electrode, and an electrode 1712, which is an example of a second electrode.

[0103] The electrode 1711 is joined to the power supply line 220V with a conductive member, and the electrode 1712 is joined to the ground line 220G with a conductive member, so that the electrode 1711 is electrically connected to the power supply line 220V, and the electrode 1712 is electrically connected to the ground line 220G.

[0104] When the semiconductor component 151 is operating, the charge stored in the capacitor 171 is supplied to the power supply line 220V, thereby suppressing fluctuations in the potential of the power supply terminal 153V and the ground terminal 153G. When the semiconductor component 151 is not operating, the capacitor 171 is charged via the power supply path.

[0105] Capacitor 171 is preferably disposed near power supply terminal 153V and ground terminal 153G to effectively suppress potential fluctuations at power supply terminal 153V and ground terminal 153G. Therefore, in the second embodiment, capacitor 171 is disposed between printed wiring board 201 and printed wiring board 202. This shortens the path from semiconductor component 151 to capacitor 171, thereby effectively suppressing potential fluctuations at power supply terminal 153V and ground terminal 153G.

[0106] Furthermore, in order to effectively suppress potential fluctuations at the power supply terminal 153V and the ground terminal 153G due to the operation of the semiconductor component 151, the capacitor 171 is disposed at a position overlapping the semiconductor component 151 when viewed in the Z direction. This makes it possible to shorten the path from the semiconductor component 151 to the capacitor 171, and to effectively suppress potential fluctuations at the power supply terminal 153V and the ground terminal 153G.

[0107] Here, as the processing speed of the semiconductor component 151 increases, interference noise is observed when the capacitor 171 is charged or discharged.

[0108] In the second embodiment, electrode 1711 is joined to power supply line 220V with a conductive member, but is not joined to power supply line 210V. Furthermore, electrode 1712 is joined to both ground lines 210G and 220G with a conductive member. As a result, interference noise observed at electrode 1711 of capacitor 171 does not propagate directly to power supply line 210V, but propagates via power supply line 220V to power supply line 210V. Therefore, the path from electrode 1711 of capacitor 171 to power supply terminal 154V of semiconductor component 152 is longer, and the impedance of this path reduces interference noise.

[0109] FIG. 5(a) is an enlarged view of the periphery of a capacitor 171 in an image processing module 2000 according to the second embodiment.

[0110] The power supply line 210V has a power supply pad 211V. The power supply pad 211V is an example of a first power supply pad. The power supply pad 211V is included in the plurality of pads 204. The power supply line 220V has power supply pads 221V and 222V. The power supply pad 221V is an example of a second power supply pad. The power supply pad 222V is an example of a third power supply pad. The power supply pads 221V and 222V are included in the plurality of pads 205.

[0111] The power supply pad 211V and the power supply pad 221V are joined to each other at a joint 261V. The joint 261V is an example of a first joint. The power supply pad 222V and the electrode 1711 of the capacitor 171 are joined to each other at a conductive joint S21, which is an example of a second joint. The joint S21 is made of a conductive material, for example, solder.

[0112] The ground line 210G has ground pads 211G and 212G. The ground pad 211G is an example of a first ground pad. The ground pad 212G is an example of a second ground pad. The ground pads 211G and 212G are included in the plurality of pads 204. The ground line 220G has ground pads 221G and 222G. The ground pad 221G is an example of a third ground pad. The ground pad 222G is an example of a fourth ground pad. The ground pads 221G and 222G are included in the plurality of pads 205.

[0113] The ground pad 211G and the ground pad 221G are joined to each other at a joint 261G. The joint 261G is an example of a third joint. The ground pad 212G and the electrode 1712 of the capacitor 171 are joined to each other at a conductive joint S23, which is an example of a fourth joint. The ground pad 222G and the electrode 1712 of the capacitor 171 are joined to each other at a conductive joint S24, which is an example of a fifth joint. The joints S23 and S24 are made of a conductive material, for example, solder.

[0114] With the above configuration, interference noise observed at the capacitor 171 propagates to the semiconductor component 152 via the power supply line 220V of the printed wiring board 202 and the power supply lines 210V, 230V, and 240V. As a result, the path from the electrode 1711 of the capacitor 171 to the power supply terminal 154V of the semiconductor component 152 passes through the power supply line 220V of the printed wiring board 202, and is therefore longer than when the power supply line 220V is not passed through. This reduces the interference noise propagating from the capacitor 171 to the semiconductor component 152. In addition, the path from the electrode 1711 of the capacitor 171 to the power supply terminal 154V of the semiconductor component 152 passes through the power supply line 230V of the printed wiring board 202, and is therefore longer than in the first embodiment. This effectively reduces the interference noise propagating from the capacitor 171 to the semiconductor component 152.

[0115] In the second embodiment, an inductor such as a ferrite bead can be omitted as a noise filter. By omitting the inductor, it is possible to prevent the wiring area from increasing, thereby realizing a smaller and more highly densely mounted image processing module 2000. Furthermore, it is possible to reduce costs by reducing the number of components.

[0116] Furthermore, in the second embodiment, the ground pads 212G and 222G to which the electrode 1712 of the capacitor 171 is joined at the joints S23 and S24 are used to connect the ground lines 210G and 220G in parallel. This makes it possible to achieve a reduction in the size of the printed wiring board 202 and a high density of signal lines while ensuring the number of ground pads of each of the ground lines 210G and 220G required to connect the ground lines 210G and 220G in parallel.

[0117] In the second embodiment, power supply line 220V and power supply line 230V are not in contact with each other, i.e., are independent, in printed wiring board 202. Power supply line 220V and power supply line 240V are electrically connected via power supply line 210V of printed wiring board 201 and power supply line 230V of printed wiring board 202. Ground line 220G and ground line 230G are not in contact with each other, i.e., are independent, in printed wiring board 202. Ground line 220G and ground line 240G are electrically connected via ground line 210G of printed wiring board 201 and ground line 230G of printed wiring board 202.

[0118] That is, the power supply terminal 153V of the semiconductor component 151 is electrically connected to the power supply terminal 154V of the semiconductor component 152 via the power supply line 220V, the power supply line 210V, the power supply line 230V, and the power supply line 240V. The ground terminal 153G of the semiconductor component 151 is electrically connected to the ground terminal 154G of the semiconductor component 152 via the ground line 220G, the ground line 210G, the ground line 230G, and the ground line 240G. Since the power supply line 220V and the power supply line 240V are electrically connected by bypassing the power supply lines 210V and 230V, the path length between the power supply terminals 153V and 154V is longer than in the case of a direct connection. Furthermore, since the ground line 220G and the ground line 240G on the printed wiring board 202 are electrically connected by bypassing the ground lines 210G and 230G, the path length between the ground terminals 153G and 154G is longer than in the case of a direct connection. These configurations can reduce interference noise.

[0119] In the second embodiment, in order to suppress potential fluctuations at the power supply terminal 154V and the ground terminal 154G, the image processing module 2000 includes a capacitor 172, which is an example of a second capacitance element. The capacitor 172 has an electrode 1721, which is an example of a third electrode, and an electrode 1722, which is an example of a fourth electrode.

[0120] The electrode 1721 is joined to the power supply line 240V with a conductive member, and the electrode 1722 is joined to the ground line 240G with a conductive member, so that the electrode 1721 is electrically connected to the power supply line 240V, and the electrode 1722 is electrically connected to the ground line 240G.

[0121] When the semiconductor component 152 is operating, the charge stored in the capacitor 172 is supplied to the power supply line 240V, thereby suppressing fluctuations in the potential of the power supply terminal 154V and the ground terminal 154G. When the semiconductor component 152 is not operating, the capacitor 172 is charged via the power supply path.

[0122] In order to effectively suppress potential fluctuations at power supply terminal 154V and ground terminal 154G, capacitor 172 is preferably disposed near power supply terminal 154V and ground terminal 154G. Therefore, in the second embodiment, capacitor 172 is disposed between printed wiring board 202 and printed wiring board 203. This shortens the path from semiconductor component 152 to capacitor 172, thereby effectively suppressing potential fluctuations at power supply terminal 154V and ground terminal 154G.

[0123] As shown in FIG. 4, the capacitor 172 is disposed at a position where it does not overlap the semiconductor component 152 when viewed in the Z direction, but it may be disposed at a position where it overlaps the semiconductor component 152.

[0124] In the second embodiment, electrode 1721 is connected to power supply line 240V with a conductive member, but is not connected to power supply line 230V. Furthermore, electrode 1722 is connected to both ground lines 230G and 240G with a conductive member. This prevents interference noise observed at electrode 1721 of capacitor 172 from propagating directly to power supply line 230V, but instead propagates via power supply line 240V to power supply line 230V. Therefore, the path from electrode 1721 of capacitor 172 to power supply terminal 153V of semiconductor component 151 is longer, and the impedance of this path reduces interference noise.

[0125] FIG. 5(b) is an enlarged view of the periphery of the capacitor 172 in the image processing module 2000 according to the second embodiment.

[0126] The power supply line 230V has a power supply pad 233V. The power supply pad 233V is included in the plurality of pads 206. The power supply line 240V has power supply pads 241V and 242V. The power supply pads 241V and 242V are included in the plurality of pads 207.

[0127] The power supply pad 233V and the power supply pad 241V are joined to each other at a joint 272V. The power supply pad 242V and the electrode 1721 of the capacitor 172 are joined to each other at a conductive joint S25. The joint S25 is made of a conductive material, for example, solder.

[0128] The ground line 230G has ground pads 233G and 234G. The ground pads 233G and 234G are included in the plurality of pads 206. The ground line 240G has ground pads 241G and 242G. The ground pads 241G and 242G are included in the plurality of pads 207.

[0129] The ground pad 233G and the ground pad 241G are joined to each other at a joint 272G. The ground pad 234G and the electrode 1722 of the capacitor 172 are joined to each other at a conductive joint S27. The ground pad 242G and the electrode 1722 of the capacitor 172 are joined to each other at a conductive joint S28. The joints S27 and S28 are made of a conductive material, for example, solder.

[0130] With the above configuration, the interference noise observed at capacitor 172 is propagated to semiconductor component 151 via power supply line 240V of printed wiring board 203, and then via power supply lines 230V, 210V, and 220V. Therefore, the interference noise propagating from capacitor 172 to semiconductor component 151 is reduced.

[0131] Furthermore, in the second embodiment, the ground pads 234G and 242G to which the electrode 1722 of the capacitor 172 is joined at the joints S27 and S28 are used to connect the ground lines 230G and 240G in parallel. This makes it possible to achieve a reduction in the size of the printed wiring board 202 and a high density of signal lines while ensuring the number of ground pads of each of the ground lines 230G and 240G required to connect the ground lines 230G and 240G in parallel.

[0132] The image processing module 2000 also includes a capacitor 173, an example of a third capacitance element, arranged on the printed wiring board 201. The capacitor 173 has an electrode 1731, an example of a fifth electrode, and an electrode 1732, an example of a sixth electrode. The capacitor 173 is arranged on a main surface 2012 opposite to the main surface 2011 of the insulating substrate 21. Note that an insulating layer (not shown), such as a solder resist layer, may be formed on the main surface 2012. The electrode 1731 of the capacitor 173 is bonded to a pad 215V of the power supply line 210V, and the electrode 1732 of the capacitor 173 is bonded to a pad 215G of the ground line 210G. This reduces potential fluctuations of the power supply line 210V and the ground line 210G due to operation of the semiconductor component 151, i.e., potential fluctuations of the power supply terminal 153V and the ground terminal 153G of the semiconductor component 151.

[0133] Furthermore, when viewed in the Z direction, the capacitor 173 is disposed at a position overlapping the semiconductor component 151. This shortens the path from the semiconductor component 151 to the capacitor 173, and effectively suppresses potential fluctuations at the power supply terminal 153V and the ground terminal 153G of the semiconductor component 151.

[0134] In the second embodiment, the capacitance C3 of the capacitor 173 is larger than the capacitance C1 of the capacitor 171. Since the capacitor 173 is mounted on the printed wiring board 201, the path from the capacitor 171 to the capacitor 173 has a relatively lower impedance than the path from the capacitor 171 to the on-die capacitor included in the semiconductor component 152. In other words, noise observed in the capacitor 171 is more likely to propagate to the capacitor 173 than to the semiconductor component 152. This makes it possible to further suppress the interference noise propagating from the capacitor 171 to the semiconductor component 152.

[0135] The image processing module 2000 also includes a capacitor 174, which is an example of a fourth capacitance element, arranged on the printed wiring board 201. The capacitor 174 has an electrode 1741, which is an example of a seventh electrode, and an electrode 1742, which is an example of an eighth electrode. The capacitor 174 is arranged on a main surface 2012 opposite to the main surface 2011 of the insulating substrate 21. The electrode 1741 of the capacitor 174 is joined to a pad 216V of the power supply line 210V, and the electrode 1742 of the capacitor 174 is joined to a pad 216G of the ground line 210G. This makes it possible to reduce potential fluctuations of the power supply line 210V and the ground line 210G due to operation of the semiconductor component 152, i.e., potential fluctuations of the power supply terminal 154V and the ground terminal 154G of the semiconductor component 152.

[0136] The capacitor 174 may be disposed at a position overlapping the semiconductor component 152 when viewed in the Z direction.

[0137] In the second embodiment, the capacitance C4 of the capacitor 174 is larger than the capacitance C2 of the capacitor 172. By mounting the capacitor 174 on the printed wiring board 201, the path from the capacitor 172 to the capacitor 174 has a relatively lower impedance than the path from the capacitor 172 to the on-die capacitor included in the semiconductor component 151. In other words, noise observed in the capacitor 172 is more likely to propagate to the capacitor 174 than to the semiconductor component 151. This makes it possible to further suppress the interference noise propagating from the capacitor 172 to the semiconductor component 151.

[0138] Furthermore, in the second embodiment, as shown in FIG. 5(a), the multiple pads 204 include a dummy pad 212D disposed at a position facing the electrode 1711 of the capacitor 171. The dummy pad 212D is not in contact with the power supply line 210V and the ground line 210G on the printed wiring board 201, i.e., is independent. The electrode 1711 of the capacitor 171 and the dummy pad 212D are joined to each other by a conductive joint S22, which is an example of a sixth joint. The joint S22 is made of a conductive material, for example, solder. The dummy pad 212D is electrically connected to the power supply line 220V via the electrode 1711 and the joints S21 and S22.

[0139] Because electrode 1711 of capacitor 171 is joined to dummy pad 212D, it is possible to prevent capacitor 171 from losing balance and tilting when printed wiring board 202 is mounted on printed wiring board 201. This makes it possible to prevent open circuit defects from occurring between electrode 1711 and power supply pad 222V, and capacitor 171 can be stably mounted between printed wiring boards 201 and 202. Note that although it is preferable to have dummy pad 212D, it may be omitted.

[0140] Furthermore, in the second embodiment, as shown in FIG. 5(b), the multiple pads 206 include a dummy pad 234D disposed at a position facing the electrode 1721 of the capacitor 172. The dummy pad 234D is not in contact with the power supply lines 220V and 230V and the ground lines 220G and 230G on the printed wiring board 202, i.e., is independent. The electrode 1721 of the capacitor 172 and the dummy pad 234D are joined to each other by a conductive joint S26. The joint S26 is made of a conductive material, for example, solder. The dummy pad 234D is electrically connected to the power supply line 240V via the electrode 1721 and the joints S25 and S26.

[0141] Because electrode 1712 of capacitor 172 is joined to dummy pad 234D, it is possible to prevent capacitor 172 from losing balance and tilting when printed wiring board 203 is mounted on printed wiring board 202. This makes it possible to prevent open circuit defects from occurring between electrode 1721 and power supply pad 242V, and to stably mount capacitor 172 between printed wiring boards 202 and 203. Note that although it is preferable to have dummy pad 234D, it may be omitted.

[0142] Moreover, in the second embodiment, the semiconductor component 152 is arranged to overlap the semiconductor component 151 when viewed in the Z direction. This makes it possible to reduce the wiring area of ​​the power supply lines 230V and 240V, which serve as power supply paths to the semiconductor component 152, and the signal line (not shown) on the printed wiring boards 202 and 203. This makes it possible to reduce the size of the printed wiring boards 202 and 203. Furthermore, the wiring area of ​​the power supply line 210V on the printed wiring board 201 can also be reduced.

[0143] In the above description, the number of each of the capacitors 171 to 174 has been described as one, but the present invention is not limited to this, and there may be a plurality of each of the capacitors 171 to 174. Furthermore, since the semiconductor component 151 is configured to perform image processing, it operates more frequently than the semiconductor component 152. Therefore, of the capacitors 171 and 172, the capacitor 172 may be omitted as necessary. Furthermore, although it is preferable that the capacitors 173 and 174 are also present, the capacitors 173 and / or 174 may be omitted as necessary. Furthermore, the present invention is not limited to this, but the capacitor 172 may be disposed between the printed wiring board 202 and the printed wiring board 203. For example, the capacitor 172 may be disposed between the printed wiring board 201 and the printed wiring board 202.

[0144] [Third embodiment] Next, an electronic module according to a third embodiment will be described. Fig. 6 is a cross-sectional schematic diagram of a main part of an image processing module 3000, which is an example of an electronic module according to the third embodiment. In the third embodiment, the image processing module 1000 in the digital camera 600, which is an image capturing device and an example of an electronic device described in the first embodiment, is replaced with an image processing module 3000. In the third embodiment, the same components as those in the first embodiment are designated by the same reference numerals, and detailed description thereof will be omitted.

[0145] The image processing module 3000 includes a printed wiring board 301, which is an example of a first wiring board, and a semiconductor device 350 arranged on the printed wiring board 301. The semiconductor device 350 includes a semiconductor component 151, which is an example of a first semiconductor component, and a semiconductor component 152, which is an example of a second semiconductor component.

[0146] In the first embodiment, the semiconductor components 151 and 152 are both mounted on the same printed wiring board 102. In the third embodiment, the semiconductor components 151 and 152 are mounted on separate printed wiring boards.

[0147] Specifically, the semiconductor device 350 has a printed wiring board 302, which is an example of a second wiring board, and a printed wiring board 303, which is an example of a third wiring board. Each of the printed wiring boards 301, 302, and 303 is a rigid printed wiring board. The printed wiring boards 302 and 303 are arranged on the printed wiring board 301. The semiconductor component 151 is arranged on the printed wiring board 302, and the semiconductor component 152 is arranged on the printed wiring board 303. In other words, the printed wiring boards 302 and 303 are mounted on the printed wiring board 301. The semiconductor component 151 is mounted on the printed wiring board 302, and the semiconductor component 152 is mounted on the printed wiring board 303.

[0148] The printed wiring board 301 is, for example, a motherboard. The printed wiring board 301 has an insulating substrate 11, and a power supply line 110V and a ground line 110G supported by the insulating substrate 11. The power supply line 110V is an example of a first power supply line, and the ground line 110G is an example of a first ground line.

[0149] A plurality of pads 304 and a plurality of pads 306 are arranged in an array on the main surface 1011 of the insulating substrate 11. The plurality of pads 304 are arranged at intervals from one another in the X direction and the Y direction. The plurality of pads 306 are arranged at intervals from one another in the X direction and the Y direction. An insulating layer such as a solder resist layer (not shown) may be formed on the main surface 1011.

[0150] The printed wiring board 302 is, for example, a package substrate, that is, an interposer. The printed wiring board 302 has a flat insulating substrate 32 made of an insulating material, and a power supply line 120V and a ground line 120G supported by the insulating substrate 32. The insulating material of the insulating substrate 32 is, for example, glass epoxy resin. The power supply line 120V is an example of a second power supply line. The ground line 120G is an example of a second ground line.

[0151] The main surface 3021 of the insulating substrate 32 faces the main surface 1011 with a gap therebetween. A plurality of pads 305 are arranged in an array on the main surface 3021. The pads 305 are arranged with gaps between them in the X and Y directions. In the third embodiment, the number of pads 305 is the same as the number of pads 304, and each pad 305 faces a corresponding pad 304. An insulating layer (not shown), such as a solder resist layer, may be formed on the main surface 3021.

[0152] A portion of the plurality of pads 304 and a portion of the plurality of pads 305 are joined to each other by conductive joints 360. In the third embodiment, each joint 360 is made of a conductive material. The conductive material that makes up each joint 360 is, for example, solder.

[0153] A semiconductor component 151 is disposed on a main surface 3022 of the insulating substrate 32 opposite to the main surface 3021. The semiconductor component 151 has a plurality of terminals 153. Each of the plurality of terminals 153 of the semiconductor component 151 is mechanically and electrically connected to a pad (not shown) on the main surface 3022. Note that an insulating layer (not shown), such as a solder resist layer, may be formed on the main surface 3022.

[0154] The plurality of terminals 153 include a power supply terminal 153V and a ground terminal 153G. The power supply terminal 153V is an example of a first power supply terminal, and the ground terminal 153G is an example of a first ground terminal.

[0155] The printed wiring board 303 is, for example, a package substrate, that is, an interposer. The printed wiring board 303 has a flat insulating substrate 33 made of an insulating material, and a power supply line 130V and a ground line 130G supported by the insulating substrate 33. The insulating material of the insulating substrate 33 is, for example, glass epoxy resin. The power supply line 130V is an example of a third power supply line. The ground line 130G is an example of a third ground line.

[0156] The main surface 3031 of the insulating substrate 33 faces the main surface 1011 with a gap therebetween. A plurality of pads 307 are arranged in an array on the main surface 3031. The pads 307 are arranged with gaps between them in the X and Y directions. In the third embodiment, the number of pads 307 is the same as the number of pads 306, and each pad 307 faces a corresponding pad 306. An insulating layer (not shown), such as a solder resist layer, may be formed on the main surface 3031.

[0157] A portion of the plurality of pads 306 and a portion of the plurality of pads 307 are respectively joined to each other by conductive joints 370. In the third embodiment, each joint 370 is made of a conductive material. The conductive material that makes up each joint 370 is, for example, solder.

[0158] A semiconductor component 152 is disposed on a main surface 3032 opposite to the main surface 3031 of the insulating substrate 33. The semiconductor component 152 has a plurality of terminals 154. Each of the plurality of terminals 154 of the semiconductor component 152 is mechanically and electrically connected to a pad (not shown) on the main surface 3032. Note that an insulating layer (not shown), such as a solder resist layer, may be formed on the main surface 3032.

[0159] The plurality of terminals 154 include a power terminal 154V and a ground terminal 154G. The power terminal 154V is an example of a second power terminal, and the ground terminal 154G is an example of a second ground terminal.

[0160] The power supply line 110V is joined to the power supply line 120V at a junction 161V among the plurality of junctions 360. The ground line 110G is joined to the ground line 120G at a junction 161G among the plurality of junctions 360. The power supply line 110V is joined to the power supply line 130V at a junction 162V among the plurality of junctions 370. The ground line 110G is joined to the ground line 130G at a junction 162G among the plurality of junctions 370.

[0161] Therefore, power supply terminal 153V of semiconductor component 151 is electrically connected to power supply line 110V via power supply line 120V. Ground terminal 153G of semiconductor component 151 is electrically connected to ground line 110G via ground line 120G. Furthermore, power supply terminal 154V of semiconductor component 152 is electrically connected to power supply line 110V via power supply line 130V. Ground terminal 154G of semiconductor component 152 is electrically connected to ground line 110G via ground line 130G.

[0162] In the third embodiment, the image processing module 3000 includes a capacitor 171, which is an example of a first capacitance element, similarly to the first embodiment, in order to suppress potential fluctuations at the power supply terminal 153V and the ground terminal 153G due to the operation of the semiconductor component 151. The capacitor 171 has an electrode 1711, which is an example of a first electrode, and an electrode 1712, which is an example of a second electrode.

[0163] Electrode 1711 is joined to power supply line 120V with a conductive member, and electrode 1712 is joined to ground line 120G with a conductive member. Capacitor 171 is disposed between printed wiring board 301 and printed wiring board 302. This shortens the path from semiconductor component 151 to capacitor 171, and effectively suppresses potential fluctuations at power supply terminal 153V and ground terminal 153G.

[0164] Furthermore, when viewed in the Z direction, the capacitor 171 is disposed at a position overlapping the semiconductor component 151. This shortens the path from the semiconductor component 151 to the capacitor 171, and effectively suppresses potential fluctuations at the power supply terminal 153V and the ground terminal 153G.

[0165] As in the first embodiment, electrode 1711 is joined to power supply line 120V by a conductive member, but is not joined to power supply line 110V. Electrode 1712 is joined to both ground lines 110G and 120G by conductive members. This lengthens the path from electrode 1711 of capacitor 171 to power supply terminal 154V of semiconductor component 152, and the impedance of this path reduces interference noise.

[0166] FIG. 7(a) is an enlarged view of the periphery of a capacitor 171 in an image processing module 3000 according to the third embodiment.

[0167] The power supply line 110V has a power supply pad 111V. The power supply pad 111V is an example of a first power supply pad. The power supply pad 111V is included in the plurality of pads 304. The power supply line 120V has power supply pads 121V and 122V. The power supply pad 121V is an example of a second power supply pad. The power supply pad 122V is an example of a third power supply pad. The power supply pads 121V and 122V are included in the plurality of pads 305.

[0168] The power supply pad 111V and the power supply pad 121V are joined to each other at a joint 161V, which is an example of a first joint. The power supply pad 122V and the electrode 1711 of the capacitor 171 are joined to each other at a conductive joint S1, which is an example of a second joint.

[0169] The ground line 110G has ground pads 111G and 112G. The ground pad 111G is an example of a first ground pad. The ground pad 112G is an example of a second ground pad. The ground pads 111G and 112G are included in the plurality of pads 304. The ground line 120G has ground pads 121G and 122G. The ground pad 121G is an example of a third ground pad. The ground pad 122G is an example of a fourth ground pad. The ground pads 121G and 122G are included in the plurality of pads 305.

[0170] The ground pad 111G and the ground pad 121G are joined to each other at a joint 161G. The joint 161G is an example of a third joint. The ground pad 112G and the electrode 1712 of the capacitor 171 are joined to each other at a conductive joint S3, which is an example of a fourth joint. The ground pad 122G and the electrode 1712 of the capacitor 171 are joined to each other at a conductive joint S4, which is an example of a fifth joint.

[0171] With the above configuration, the interference noise observed at capacitor 171 propagates to semiconductor component 152 via power supply line 120V of printed wiring board 302, and then through power supply lines 110V and 130V. This reduces the interference noise propagating from capacitor 171 to semiconductor component 152.

[0172] In addition, in the third embodiment, an inductor such as a ferrite bead can be omitted as a noise filter. By omitting the inductor, it is possible to prevent the wiring area from increasing, thereby realizing a smaller size and higher density mounting of the image processing module 3000. Furthermore, it is possible to reduce costs by reducing the number of parts.

[0173] Furthermore, in the third embodiment, ground pads 112G and 122G to which electrodes 1712 of capacitor 171 are joined at joints S3 and S4 are used to connect ground lines 110G and 120G in parallel. This makes it possible to achieve a reduction in the size of printed wiring board 302 and a high density of signal lines while ensuring the number of ground pads of each of ground lines 110G and 120G required to connect ground lines 110G and 120G in parallel.

[0174] Furthermore, power supply terminal 153V of semiconductor component 151 is electrically connected to power supply terminal 154V of semiconductor component 152 via power supply line 120V, power supply line 110V, and power supply line 130V. Furthermore, ground terminal 153G of semiconductor component 151 is electrically connected to ground terminal 154G of semiconductor component 152 via ground line 120G, ground line 110G, and ground line 130G. In this manner, power supply line 120V and power supply line 130V are electrically connected to each other on printed wiring board 302, bypassing power supply line 110V. Therefore, the path length between power supply terminals 153V and 154V is longer than in the case of a direct connection. Furthermore, ground line 120G and ground line 130G are electrically connected to each other on printed wiring board 302, bypassing ground line 110G. Therefore, the path length between ground terminals 153G and 154G is longer than in the case of a direct connection. These configurations enable interference noise to be reduced.

[0175] Furthermore, in the third embodiment, the image processing module 3000 includes, as in the first embodiment, a capacitor 172 which is an example of a second capacitance element, in order to suppress potential fluctuations at the power supply terminal 154V and the ground terminal 154G due to the operation of the semiconductor component 152. The capacitor 172 has an electrode 1721 which is an example of a third electrode and an electrode 1722 which is an example of a fourth electrode.

[0176] Electrode 1721 is joined to power supply line 130V with a conductive member, and electrode 1722 is joined to ground line 130G with a conductive member. Capacitor 172 is disposed between printed wiring board 301 and printed wiring board 303. This shortens the path from semiconductor component 152 to capacitor 172, and effectively suppresses potential fluctuations at power supply terminal 154V and ground terminal 154G.

[0177] Furthermore, when viewed in the Z direction, the capacitor 172 is disposed at a position overlapping the semiconductor component 152. This shortens the path from the semiconductor component 152 to the capacitor 172, and effectively suppresses potential fluctuations at the power supply terminal 154V and the ground terminal 154G.

[0178] As in the first embodiment, electrode 1721 is joined to power supply line 130V with a conductive member, but is not joined to power supply line 110V. Electrode 1722 is joined to both ground lines 110G and 130G with a conductive member. This lengthens the path from electrode 1721 of capacitor 172 to power supply terminal 153V of semiconductor component 151, and the impedance of this path reduces interference noise.

[0179] FIG. 7B is an enlarged view of the periphery of the capacitor 172 in the image processing module 3000 according to the third embodiment.

[0180] The power supply line 110V has a power supply pad 113V. The power supply pad 113V is included in a plurality of pads 306. The power supply line 130V has power supply pads 131V and 132V. The power supply pads 131V and 132V are included in a plurality of pads 307.

[0181] The power supply pad 113V and the power supply pad 131V are joined to each other at a joint 162V. The power supply pad 132V and the electrode 1721 of the capacitor 172 are joined to each other at a conductive joint S5.

[0182] The ground line 110G has ground pads 113G and 114G. The ground pads 113G and 114G are included in a plurality of pads 306. The ground line 130G has ground pads 131G and 132G. The ground pads 131G and 132G are included in a plurality of pads 307.

[0183] Ground pad 113G and ground pad 131G are joined to each other at joint 162G. Ground pad 114G and electrode 1722 of capacitor 172 are joined to each other at conductive joint S7. Ground pad 132G and electrode 1722 of capacitor 172 are joined to each other at conductive joint S8.

[0184] With the above configuration, the interference noise observed at capacitor 172 propagates to semiconductor component 151 via power supply line 130V of printed wiring board 303 and power supply lines 110V and 120V. Therefore, the interference noise propagating from capacitor 172 to semiconductor component 151 is reduced.

[0185] Furthermore, in the third embodiment, the ground pads 114G and 132G to which the electrodes 1722 of the capacitor 172 are joined at joints S7 and S8 are used to connect the ground lines 110G and 130G in parallel. This makes it possible to ensure the number of ground pads of each of the ground lines 110G and 130G required to connect the ground lines 110G and 130G in parallel, while also achieving a reduction in the size of the printed wiring board 303 and a higher density of signal lines.

[0186] Similarly to the first embodiment, the image processing module 3000 also includes a capacitor 173, which is an example of a third capacitance element, arranged on the printed wiring board 301. The capacitor 173 has an electrode 1731, which is an example of a fifth electrode, and an electrode 1732, which is an example of a sixth electrode. The capacitance, arrangement, and connection structure of the capacitor 173 are the same as those in the first embodiment. Therefore, similar to the first embodiment, it is possible to further suppress interference noise propagating from the capacitor 171 to the semiconductor component 152.

[0187] Similarly to the first embodiment, the image processing module 3000 also includes a capacitor 174, which is an example of a fourth capacitance element, arranged on the printed wiring board 301. The capacitor 174 has an electrode 1741, which is an example of a seventh electrode, and an electrode 1742, which is an example of an eighth electrode. The capacitance, arrangement, and wiring structure of the capacitor 174 are the same as those in the first embodiment. Therefore, similar to the first embodiment, it is possible to further suppress interference noise propagating from the capacitor 172 to the semiconductor component 151.

[0188] 7(a), in the third embodiment, the pads 304 include a dummy pad 112D disposed at a position facing the electrode 1711 of the capacitor 171. The electrode 1711 of the capacitor 171 and the dummy pad 112D are joined to each other by a conductive joint S2, which is an example of a sixth joint.

[0189] Because electrode 1711 of capacitor 171 is joined to dummy pad 112D, it is possible to prevent capacitor 171 from losing balance and tilting when printed wiring board 302 is mounted on printed wiring board 301. This makes it possible to prevent open circuit defects from occurring between electrode 1711 and power supply pad 122V, and capacitor 171 can be stably mounted between printed wiring boards 301 and 302. Note that although it is preferable to have dummy pad 112D, it may be omitted.

[0190] 7(b), the pads 306 further include a dummy pad 114D disposed at a position facing the electrode 1721 of the capacitor 172. The electrode 1721 of the capacitor 172 and the dummy pad 114D are joined to each other at a conductive joint S6.

[0191] Because electrode 1712 of capacitor 172 is joined to dummy pad 114D, it is possible to prevent capacitor 172 from losing balance and tilting when printed wiring board 303 is mounted on printed wiring board 301. This makes it possible to prevent open circuit defects from occurring between electrode 1721 and power supply pad 132V, and capacitor 172 can be stably mounted between printed wiring boards 301 and 303. Note that although it is preferable to have dummy pad 114D, it may be omitted.

[0192] In the above description, the case where there is one each of the capacitors 171 to 174 has been described, but this is not limiting, and there may be a plurality of each of the capacitors 171 to 174. Furthermore, since the semiconductor component 151 is configured to perform image processing, it operates more frequently than the semiconductor component 152. Therefore, of the capacitors 171 and 172, the capacitor 172 may be omitted as necessary. Furthermore, although it is preferable that the capacitors 173 and 174 are also present, the capacitors 173 and / or 174 may be omitted as necessary.

[0193] [Fourth embodiment] Next, an electronic module according to a fourth embodiment will be described. Fig. 8 is a cross-sectional schematic diagram of a main part of an image processing module 4000, which is an example of an electronic module according to the fourth embodiment. In the fourth embodiment, the image processing module 1000 in the digital camera 600, which is an image capturing device and an example of an electronic device described in the first embodiment, is replaced with an image processing module 4000. In the fourth embodiment, the same components as those in the first embodiment are designated by the same reference numerals, and detailed description thereof will be omitted.

[0194] As in the first embodiment, the image processing module 4000 includes a printed wiring board 101 and capacitors 171 to 174. The image processing module 4000 also includes a semiconductor device 450 arranged on the printed wiring board 101. As in the first embodiment, the semiconductor device 450 includes a printed wiring board 102.

[0195] In the first embodiment, the case where the same operating voltage is applied to the two semiconductor components 151 and 152 is described. In the third embodiment, the case where one semiconductor component has two circuit units and the same operating voltage is applied to the two circuit units is described.

[0196] Specifically, the semiconductor device 450 has a semiconductor component 451, which is an example of a first semiconductor component. The semiconductor component 451 includes a circuit unit 4511, which is an example of a first circuit unit, and a circuit unit 4512, which is an example of a second circuit unit. The circuit unit 4511 is, for example, a digital signal processor, and the circuit unit 4512 is, for example, a memory unit. Inside the semiconductor component 451, the circuit units 4511 and 4512 are connected by a signal line to enable data communication with each other, but have independent power supply lines. In the fourth embodiment, the rated voltage of the circuit unit 4511 required for operation of the circuit unit 4511 is the same as the rated voltage of the circuit unit 4512 required for operation of the circuit unit 4512.

[0197] The semiconductor component 451 is mounted on the printed wiring board 102. The semiconductor component 451 is disposed on the main surface 1022 of the insulating substrate 12. The semiconductor component 451 has a plurality of terminals 453 arranged in an array at intervals in the X and Y directions. Each of the plurality of terminals 453 includes a solder bump and a pad, and is mechanically and electrically connected to a pad (not shown) on the main surface 1022.

[0198] The multiple terminals 453 include a power terminal 153V, a ground terminal 153G, a power terminal 154V, and a ground terminal 154G. The power terminal 153V is an example of a first power terminal, and the ground terminal 153G is an example of a first ground terminal. The power terminal 154V is an example of a second power terminal, and the ground terminal 154G is an example of a second ground terminal.

[0199] The circuit unit 4511 is operable when an operating voltage, i.e., a DC voltage, is applied between the power supply terminal 153V and the ground terminal 153G. The circuit unit 4512 is operable when an operating voltage, i.e., a DC voltage, is applied between the power supply terminal 154V and the ground terminal 154G.

[0200] As in the first embodiment, the power supply terminal 153V is electrically connected to the power supply line 120V by being bonded to a pad of the power supply line 120V. Also, as in the first embodiment, the ground terminal 153G is electrically connected to the ground line 120G by being bonded to a pad of the ground line 120G. Also, as in the first embodiment, the power supply terminal 154V is electrically connected to the power supply line 130V by being bonded to a pad of the power supply line 130V. Also, as in the first embodiment, the ground terminal 154G is electrically connected to the ground line 130G by being bonded to a pad of the ground line 130G.

[0201] The capacitance, arrangement, and connection structure of each of the capacitors 171 to 174 are the same as those in the first embodiment. Therefore, in the fourth embodiment, as in the first embodiment, potential fluctuations can be suppressed and interference noise can be reduced.

[0202] Also, similar to the first embodiment, the power supply terminal 153V of the semiconductor component 151 is electrically connected to the power supply terminal 154V of the semiconductor component 152 via the power supply line 120V, the power supply line 110V, and the power supply line 130V. Also, the ground terminal 153G of the semiconductor component 151 is electrically connected to the ground terminal 154G of the semiconductor component 152 via the ground line 120G, the ground line 110G, and the ground line 130G. With this configuration, the path length between the semiconductor components 151 and 152 is increased, thereby reducing interference noise.

[0203] In the fourth embodiment, the number of each of the capacitors 171 to 174 is not limited to one, and there may be a plurality of each of the capacitors 171 to 174. Furthermore, the capacitor 172 may be omitted as needed. Furthermore, the capacitors 173 and / or 174 may also be omitted as needed.

[0204] Furthermore, the printed wiring board 102 may be replaced with the two printed wiring boards 302 and 303 described in the third embodiment, and the semiconductor component 451 may be arranged across the two printed wiring boards 302 and 303.

[0205] [Fifth embodiment] Next, an electronic module according to a fifth embodiment will be described. Fig. 9 is a cross-sectional schematic diagram of a main part of an image processing module 5000, which is an example of an electronic module according to the fifth embodiment. In the fifth embodiment, the image processing module 1000 in the digital camera 600, which is an image capturing device and an example of an electronic device, described in the fifth embodiment, is replaced with the image processing module 5000. In the fifth embodiment, the same components as those in the first embodiment are designated by the same reference numerals, and detailed description thereof will be omitted.

[0206] As in the first embodiment, the image processing module 5000 includes a printed wiring board 101, a semiconductor device 150, and capacitors 171 to 174. In the fifth embodiment, the joining structure of the capacitors 171 and 172 differs from that in the first embodiment.

[0207] In the fifth embodiment, a plurality of pads 104 of printed wiring board 101 and a plurality of pads 105 of printed wiring board 102 are joined by a plurality of joints 560. Each joint 560 is made of a conductive material, for example, solder.

[0208] Fig. 10(a) is an enlarged view of the periphery of a capacitor 171 in an image processing module 5000 according to the fifth embodiment. Fig. 10(b) is an enlarged view of the periphery of a capacitor 172 in an image processing module 5000 according to the fifth embodiment.

[0209] As shown in FIG. 10(a), a power supply pad 111V of a power supply line 110V and a power supply pad 121V of a power supply line 120V are joined to each other at a joint 161V. The power supply pad 111V is an example of a first power supply pad. The power supply pad 121V is an example of a second power supply pad. The joint 161V is an example of a first joint. The joint 161V is included in a plurality of joints 560.

[0210] Furthermore, the power supply pad 122V of the power supply line 120V, the dummy pad 112D, and the electrode 1711 of the capacitor 171 are joined to one another at a joint 561V. The power supply pad 122V is an example of a third power supply pad. The joint 561V is an example of a second joint. The joint 561V is included in the plurality of joints 560.

[0211] Furthermore, the ground pad 111G of the ground line 110G and the ground pad 121G of the ground line 120G are joined to each other at a joint 161G. The ground pad 111G is an example of a first ground pad. The ground pad 121G is an example of a third ground pad. The joint 161G is an example of a third joint. The joint 161G is included in the plurality of joints 560.

[0212] Furthermore, the ground pad 112G of the ground line 110G, the ground pad 122G of the ground line 120G, and the electrode 1712 of the capacitor 171 are joined to one another at a joint 561G. The ground pad 112G is an example of a second ground pad. The ground pad 122G is an example of a fourth ground pad. The joint 561G is an example of a fourth joint. The joint 561G is included in the multiple joints 560.

[0213] 10(b), a power supply pad 113V of the power supply line 110V and a power supply pad 131V of the power supply line 130V are joined to each other at a joint 162V. The joint 162V is included in the plurality of joints 560.

[0214] Furthermore, the power supply pad 132V of the power supply line 130V, the dummy pad 114D, and the electrode 1721 of the capacitor 172 are joined to one another at a joint 562V. The joint 562V is included in the plurality of joints 560.

[0215] Furthermore, the ground pad 113G of the ground line 110G and the ground pad 131G of the ground line 130G are joined to each other at a joint 162G.

[0216] Furthermore, the ground pad 114G of the ground line 110G, the ground pad 132G of the ground line 130G, and the electrode 1722 of the capacitor 172 are joined to one another at a joint 562G.

[0217] As described above, the junction structure of the fifth embodiment can also suppress potential fluctuations and reduce interference noise, similar to the first embodiment.

[0218] In the fifth embodiment, the number of each of the capacitors 171 to 174 is not limited to one, and there may be a plurality of each of the capacitors 171 to 174. Furthermore, the capacitor 172 may be omitted as needed. Furthermore, the capacitors 173 and / or 174 may also be omitted as needed.

[0219] [Sixth embodiment] Next, an electronic module according to a sixth embodiment will be described. Fig. 11 is a cross-sectional schematic diagram of a main part of an image processing module 6000, which is an example of an electronic module according to the sixth embodiment. In the sixth embodiment, the image processing module 1000 in the digital camera 600, which is an image capturing device and an example of an electronic device, described in the sixth embodiment, is replaced with an image processing module 6000. In the sixth embodiment, the same components as those in the first embodiment are designated by the same reference numerals, and detailed description thereof will be omitted.

[0220] In the first to fifth embodiments, the configuration has been described in which the interference noise observed in the first capacitance element is diverted through the second power supply line. In the sixth embodiment, the interference noise observed in the first capacitance element is diverted through the second ground line.

[0221] The image processing module 6000 includes a printed wiring board 601, which is an example of a first printed wiring board and has a different configuration from the printed wiring board 101. The image processing module 6000 also includes a semiconductor device 150 and capacitors 171 to 174, which have the same configuration as in the first embodiment. The printed wiring board 601 and the printed wiring board 102 are joined by a plurality of joints 160. The capacitors 171 and 172 are disposed between the printed wiring board 601 and the printed wiring board 102. The semiconductor device 150 includes the printed wiring board 102 and semiconductor components 151 and 152, as described in the first embodiment.

[0222] The printed wiring board 601 has an insulating substrate 11, and a power supply line 610V and a ground line 610G supported by the insulating substrate 11. The power supply line 610V is an example of a first power supply line, and the ground line 610G is an example of a first ground line.

[0223] The power supply line 610V includes a power supply pattern 117V, a plurality of power supply vias 118V, and power supply pads 111V to 116V. The ground line 610G includes a ground pattern 117G and a plurality of ground vias 118G. The ground line 610G also includes ground pads 111G, 113G, 115G, and 116G.

[0224] A power supply terminal 153V of the semiconductor component 151 is electrically connected to a power supply line 610V via a power supply line 120V. A ground terminal 153G of the semiconductor component 151 is electrically connected to a ground line 610G via a ground line 120G.

[0225] A power supply terminal 154V of the semiconductor component 152 is electrically connected to a power supply line 610V via a power supply line 130V. A ground terminal 154G of the semiconductor component 152 is electrically connected to a ground line 610G via a ground line 130G.

[0226] In the sixth embodiment, an electrode 1711 of a capacitor 171 is connected to both the power supply lines 610V and 120V via a conductive member. An electrode 1712 of the capacitor 171 is connected to a ground line 120G via a conductive member but is not connected to the ground line 610G. As a result, interference noise observed at the electrode 1712 of the capacitor 171 does not propagate directly to the ground line 610G, but propagates via the ground line 120G to the ground line 610G. Therefore, the path from the electrode 1712 of the capacitor 171 to the ground terminal 154G of the semiconductor component 152 is longer, and the impedance of this path reduces interference noise.

[0227] The junction structure of the capacitor 171 will be described in detail. The power supply pad 111V and the power supply pad 121V are joined to each other at a junction 161V. The power supply pad 112V and the electrode 1711 of the capacitor 171 are joined to each other at a conductive junction. The power supply pad 122V and the electrode 1711 of the capacitor 171 are joined to each other at a conductive junction. The ground pad 111G and the ground pad 121G are joined to each other at a junction 161G. The junctions 161V and 161G are included in the plurality of junctions 160. The ground pad 122G and the electrode 1712 of the capacitor 171 are joined to each other at a conductive junction. The conductive member constituting each junction is, for example, solder.

[0228] With the above configuration, the interference noise observed at the capacitor 171 passes through the ground line 120G and propagates through the ground lines 610G and 130G to the semiconductor component 152. Therefore, the interference noise propagating from the capacitor 171 to the semiconductor component 152 is reduced.

[0229] In the sixth embodiment, power supply pads 112V and 122V to which electrode 1711 of capacitor 171 is joined are used to connect power supply lines 610V and 120V in parallel. This ensures the number of power supply pads for each of power supply lines 610V and 120V required to connect power supply lines 610V and 120V in parallel, while also achieving miniaturization of printed wiring board 102 and high density of signal lines.

[0230] The junction structure of the capacitor 172 is similar to that of the capacitor 171. The power supply pad 113V and the power supply pad 131V are joined to each other at a junction 162V. The power supply pad 114V and an electrode 1721 of the capacitor 172 are joined to each other at a conductive junction. The power supply pad 132V and an electrode 1721 of the capacitor 172 are joined to each other at a conductive junction. The ground pad 113G and the ground pad 131G are joined to each other at a junction 162G. The ground pad 132G and an electrode 1722 of the capacitor 172 are joined to each other at a conductive junction. The conductive member constituting each junction is, for example, solder.

[0231] With the above configuration, the interference noise observed at the capacitor 172 passes through the ground line 130G and propagates through the ground lines 610G and 120G to the semiconductor component 151. Therefore, the interference noise propagating from the capacitor 172 to the semiconductor component 151 is reduced.

[0232] Furthermore, in the sixth embodiment, power supply pads 114V and 132V to which electrode 1721 of capacitor 172 is joined are used to connect power supply lines 610V and 130V in parallel. This makes it possible to achieve a reduction in the size of printed wiring board 102 and a high density of signal lines while ensuring the number of power supply pads for each of power supply lines 610V and 130V required to connect power supply lines 610V and 130V in parallel.

[0233] Furthermore, in the sixth embodiment, the printed wiring board 601 includes a dummy pad 612D disposed at a position facing the electrode 1712 of the capacitor 171. The dummy pad 612D is not in contact with the power supply line 610V and the ground line 610G on the printed wiring board 601, i.e., is independent. The electrode 1712 of the capacitor 171 and the dummy pad 612D are joined to each other via a conductive joint. Because the electrode 1712 of the capacitor 171 is joined to the dummy pad 612D, it is possible to prevent the capacitor 171 from losing balance and tilting when the printed wiring board 102 is mounted on the printed wiring board 601. This prevents an open circuit failure between the electrode 1712 and the ground pad 122G, allowing the capacitor 171 to be stably mounted between the printed wiring boards 601 and 102. While the dummy pad 212D is preferably present, it may be omitted.

[0234] Furthermore, in the sixth embodiment, the printed wiring board 601 includes a dummy pad 614D disposed at a position facing the electrode 1722 of the capacitor 172. The dummy pad 614D is not in contact with the power supply line 610V and the ground line 610G on the printed wiring board 601, i.e., is independent. The electrode 1722 of the capacitor 172 and the dummy pad 614D are joined to each other via a conductive joint. Because the electrode 1722 of the capacitor 172 is joined to the dummy pad 614D, it is possible to prevent the capacitor 172 from losing balance and tilting when the printed wiring board 102 is mounted on the printed wiring board 601. This prevents an open circuit failure between the electrode 1722 and the ground pad 132G, allowing the capacitor 172 to be stably mounted between the printed wiring boards 601 and 102. While the dummy pad 614D is preferably present, it may be omitted.

[0235] The joining structure of the capacitors 171, 172 in the sixth embodiment may be applied to the joining structure of the capacitors 171, 172 in the second to fifth embodiments.

[0236] The present invention is not limited to the above-described embodiments, and many modifications are possible within the technical concept of the present invention. Furthermore, the effects described in the embodiments are merely a list of the most preferable effects resulting from the present invention, and the effects of the present invention are not limited to those described in the embodiments.

[0237] In the above-described embodiment, the electronic module of the present invention is applied to an imaging device such as a digital camera, but the present invention is not limited to this. The electronic module of the present invention can also be applied to electronic devices such as mobile communication devices such as smartphones, tablet PCs, and game consoles, as well as wearable devices. The electronic module of the present invention can also be applied to electronic devices such as image forming devices such as printers, copiers, facsimiles, and multifunction devices equipped with these functions. [Explanation of symbols]

[0238] 101...printed wiring board (first wiring board), 102...printed wiring board (second wiring board), 110G...ground line (first ground line), 110V...power supply line (first power supply line), 120G...ground line (second ground line), 120V...power supply line (second power supply line), 151...semiconductor component (first semiconductor component), 153G...ground terminal (first ground terminal), 153V...power supply terminal (first power supply terminal), 171...capacitor (first capacitive element), 1711...electrode (first electrode), 1712...electrode (second electrode)

Claims

1. a first wiring board; a second wiring board disposed on the first wiring board; a first semiconductor component disposed on the second wiring board, the first semiconductor component having a first power supply terminal and a first ground terminal; a first capacitance element having a first electrode and a second electrode, the first capacitance element being disposed between the first wiring board and the second wiring board; the first wiring board has a first power supply line and a first ground line; the second wiring board has a second power supply line and a second ground line; the first power supply terminal is electrically connected to the first power supply line via the second power supply line; the first ground terminal is electrically connected to the first ground line via the second ground line; the first electrode is not connected to the first power supply line but is connected to the second power supply line; the second electrode is joined to both the first ground line and the second ground line; 1. An electronic module comprising:

2. the first power supply line has a first power supply pad; the second power supply line has a second power supply pad and a third power supply pad; the first power supply pad and the second power supply pad are joined to each other at a first joining portion; the third power supply pad and the first electrode are joined to each other at a second joining portion; 2. The electronic module of claim 1.

3. the first ground line includes a first ground pad and a second ground pad; the second ground line includes a third ground pad and a fourth ground pad; the first ground pad and the third ground pad are joined to each other at a third joint; the second ground pad and the second electrode are joined to each other at a fourth joint; the fourth ground pad and the second electrode are joined to each other at a fifth joint; 3. The electronic module of claim 2.

4. the first ground line includes a first ground pad and a second ground pad; the second ground line includes a third ground pad and a fourth ground pad; the first ground pad and the third ground pad are joined to each other at a third joint; the second ground pad, the fourth ground pad, and the second electrode are joined to one another at a fourth joint; 3. The electronic module of claim 2.

5. a second semiconductor component disposed on the second wiring board, the second semiconductor component having a second power supply terminal and a second ground terminal; the second wiring board has a third power supply line that is not in contact with the second power supply line and a third ground line that is not in contact with the second ground line, the first power supply terminal is electrically connected to the second power supply terminal via the second power supply line, the first power supply line, and the third power supply line; the first ground terminal is electrically connected to the second ground terminal via the second ground line, the first ground line, and the third ground line; 5. An electronic module according to any one of claims 1 to 4.

6. a second capacitance element having a third electrode and a fourth electrode, the second capacitance element being disposed between the first wiring board and the second wiring board; the third electrode is not connected to the first power supply line but is connected to the third power supply line; the fourth electrode is joined to both the first ground line and the third ground line; 6. The electronic module according to claim 5.

7. a third wiring board disposed on the second wiring board; a second semiconductor component disposed on the third wiring board, the second semiconductor component having a second power supply terminal and a second ground terminal; the second wiring board has a third power supply line that is not in contact with the second power supply line and a third ground line that is not in contact with the second ground line, the third wiring board has a fourth power supply line and a fourth ground line; the first power supply terminal is electrically connected to the second power supply terminal via the second power supply line, the first power supply line, the third power supply line, and the fourth power supply line; the first ground terminal is electrically connected to the second ground terminal via the second ground line, the first ground line, the third ground line, and the fourth ground line; 5. An electronic module according to any one of claims 1 to 4.

8. a second capacitance element having a third electrode and a fourth electrode, the second capacitance element being disposed between the second wiring board and the third wiring board; the third electrode is not connected to the third power supply line but is connected to the fourth power supply line; the fourth electrode is joined to both the third ground line and the fourth ground line; 8. The electronic module according to claim 7.

9. a third wiring board disposed on the first wiring board; a second semiconductor component disposed on the third wiring board, the second semiconductor component having a second power supply terminal and a second ground terminal; the third wiring board has a third power supply line and a third ground line; the first power supply terminal is electrically connected to the second power supply terminal via the second power supply line, the first power supply line, and the third power supply line; the first ground terminal is electrically connected to the second ground terminal via the second ground line, the first ground line, and the third ground line; 5. An electronic module according to any one of claims 1 to 4.

10. a second capacitance element having a third electrode and a fourth electrode, the second capacitance element being disposed between the first wiring board and the third wiring board; the third electrode is not connected to the first power supply line but is connected to the third power supply line; the fourth electrode is joined to both the first ground line and the third ground line; 10. The electronic module of claim 9.

11. the first semiconductor component includes a second power supply terminal and a second ground terminal; the second wiring board has a third power supply line that is not in contact with the second power supply line and a third ground line that is not in contact with the second ground line, the first power supply terminal is electrically connected to the second power supply terminal via the second power supply line, the first power supply line, and the third power supply line; the first ground terminal is electrically connected to the second ground terminal via the second ground line, the first ground line, and the third ground line; 5. An electronic module according to any one of claims 1 to 4.

12. a second capacitance element having a third electrode and a fourth electrode, the second capacitance element being disposed between the first wiring board and the second wiring board; the third electrode is not connected to the first power supply line but is connected to the third power supply line; the fourth electrode is joined to both the first ground line and the third ground line; 12. The electronic module of claim 11.

13. When viewed in a direction perpendicular to the main surface of the first wiring board, the first capacitance element is disposed at a position overlapping the first semiconductor component.

13. Electronic module according to any one of the preceding claims.

14. a third capacitance element disposed on the first wiring board and having a fifth electrode and a sixth electrode; the fifth electrode is connected to the first power supply line; the sixth electrode is joined to the first ground line; 14. Electronic module according to any one of the preceding claims.

15. The capacitance of the third capacitance element is larger than the capacitance of the first capacitance element.

15. The electronic module of claim 14.

16. When viewed in a direction perpendicular to the main surface of the first wiring board, the third capacitance element is disposed at a position overlapping the first semiconductor component.

16. Electronic module according to claim 14 or 15.

17. the first wiring board has a dummy pad that is not in contact with the first power supply line and the first ground line; the dummy pad and the first electrode are joined to each other at a sixth joint.

17. Electronic module according to any one of the preceding claims.

18. a first wiring board; a second wiring board disposed on the first wiring board; a first semiconductor component disposed on the second wiring board, the first semiconductor component having a first power supply terminal and a first ground terminal; a first capacitance element having a first electrode and a second electrode, the first capacitance element being disposed between the first wiring board and the second wiring board; the first wiring board has a first power supply line and a first ground line; the second wiring board has a second power supply line and a second ground line; the first power supply terminal is electrically connected to the first power supply line via the second power supply line; the first ground terminal is electrically connected to the first ground line via the second ground line; the first electrode is joined to both the first power supply line and the second power supply line; the second electrode is not connected to the first ground line but is connected to the second ground line; 1. An electronic module comprising:

19. The housing and and an electronic module according to any one of claims 1 to 18 disposed inside the housing. An electronic device characterized by:

20. the electronic device is an imaging device, the first semiconductor component of the electronic module is configured to perform image processing; 20. The electronic device according to claim 19.

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