System and method for determining time flight using both code and phase classification of received signals

Abstract

To reduce the size of a frequency search space without requiring high-quality TXCO.SOLUTION: Provided is a method for detecting the earliest arrival time of one or more components of a received signal in a receiver, wherein the received signal is a periodical PRN code modulation signal, and wherein the components of the received signal arrive at the receiver via one of a plurality of signal paths, the method including the steps of: (i) dividing each of the periods of the received signal into a plurality of sections; (ii) assigning one of a plurality of code categories to each of the sections of the received signal; (iii) selecting the assigned code category corresponding to a signal pattern including one or more signal transitions in a real part of the periodical PRN code modulation signal; (iv) accumulating sample values of the sections corresponding to the assigned code categories over one or more periods of the periodical PRN code modulation signal; (v) detecting the signal transitions in the real part and a peak value of an imaginary part in the accumulated sample values; and (vi) determining the arrival time of the peak value as the earliest arrival time.SELECTED DRAWING: Figure 1A

Description

[Technical Field]

[0001] (CROSS-REFERENCE TO RELATED APPLICATIONS) This application claims priority to (i) U.S. Provisional Patent Application No. 62 / 846,240, entitled "System of Method For Time-of-Flight Determination Using Categorization of Both Code and Phase in Received Signal," filed May 10, 2019, and (ii) U.S. Provisional Patent Application No. 62 / 964,950, entitled "System of Method For Time-of-Flight Determination Using Categorization of Both Code and Phase in Received Signal," filed January 23, 2020.

[0002] The present invention also relates to "System and Method of Time of Flight Detection," filed July 27, 2017, which is a continuation of U.S. patent application Ser. No. 14 / 826,128 (now U.S. Patent No. 9,439,040), entitled "System and Method of Time of Flight Detection," filed August 13, 2015, which claims priority to U.S. provisional patent application Ser. No. 62 / 037,607, entitled "System and Method of Time of Flight Detection," filed August 13, 2014. This application is related to U.S. patent application Ser. No. 16 / 587,779, entitled "System and Method of Time of Flight Detection," filed Sep. 30, 2019 (the "related application"), which is a continuation of U.S. patent application Ser. No. 16 / 359,315, entitled "System and Method of Time of Flight Detection," filed March 20, 2019 (now U.S. Patent No. 10,477,353), which is a continuation of U.S. patent application Ser. No. 15 / 661,477, entitled "System and Method of Time of Flight Detection," filed March 20, 2019 (now U.S. Patent No. 10,285,009). The entire disclosure of this related application is incorporated herein by reference.

[0003] (Technical field) The present invention relates to processing received signals to determine the distance from the signal's source. In particular, the present invention relates to processing direct sequence Code Division Multiple Access (CDMA) signals to determine the distance from the signal's source to the receiver using both the signal's code sequence and phase. [Background technology]

[0004] The location of a signal receiver at a given time can be triangulated with great accuracy using signals received from multiple signal-transmitting satellites whose positions at that time are known with great precision. Currently, satellites available for obtaining location information include those transmitted by the Beidou, GLONASS, GNSS, and GPS systems. For example, each satellite in the GPS system transmits a "probe signal" containing a carrier signal modulated by a 1023-chip pseudorandom number (PRN) code at 1.023 Mbps and navigation data at 1575.42 MHz and 50 bps. A receiver can accurately determine its distance from a satellite based on the transmission time ("time of flight" or "code delay") of the probe signal detected between the satellite and the receiver. Furthermore, by detecting signals from multiple satellites (e.g., five or more), a receiver can accurately triangulate its location. Summary of the Invention [Means for solving the problem]

[0005] According to one embodiment of the present invention, there is provided a method for detecting a probe signal with an estimated code delay and an estimated Doppler frequency, the method comprising: (i) dividing a period of the probe signal into a plurality of sections, each having a predetermined duration; (ii) assigning one of a plurality of code categories to each section of the probe signal, each code category indicating a signal pattern of the probe signal in the corresponding section; (iii) selecting a phase category of a sinusoidal signal from the plurality of phase categories, each phase category indicating a phase range of the sinusoidal signal corresponding to the selected phase category; (iv) receiving a received signal including the probe signal; (v) dividing the received signal into sections, each having a predetermined duration; (vi) assigning both a corresponding code category and phase category to each section of the received signal based on the estimated code delay and the estimated Doppler frequency; and (vii) individually accumulating each section of the received signal according to the code category and phase category assigned to each section. In some embodiments, the predetermined duration is at most one chip. Also, in some embodiments, each section of the received signal includes multiple samples, and in some embodiments, each sample includes an in-phase component and a quadrature component, and in some embodiments, the probe signal is modulated with repeating cycles of a pseudorandom code.

[0006] Also, in accordance with one embodiment of the present invention, an integrated circuit for detecting a probe signal in a received signal includes: a memory circuit for storing one or more sections of the received signal including the probe signal, each section having a predetermined duration; a plurality of processing circuits, each processing circuit having one or more individually addressable accumulators; and a dispatch circuit, wherein the dispatch circuit includes: (i) a memory element for storing a plurality of code categories each assigned to a corresponding one of a plurality of consecutive sections of the probe signal, each section having a predetermined duration, and each code category corresponding to a signal transition pattern of the probe signal within its corresponding section; an integrated circuit including: (i) a memory element for indicating a turn; (ii) a code counter circuit for mapping each section of the received signal to a corresponding one of a plurality of code categories stored in the memory element based on an estimated code delay between the probe signal and the received signal; and (iii) a phase counter circuit for mapping each section of the received signal to a corresponding one of a plurality of phase categories of a sinusoidal signal based on an estimated Doppler frequency between the probe signal and the received signal, wherein the dispatch circuit maps each section of the received signal to one of a plurality of addressable accumulators based on its corresponding code category and phase category.

[0007] In some embodiments of the present invention, each accumulator separately accumulates the in-phase and quadrature components of each sample, and each accumulator further includes a vector register, a vector adder, and a vector accumulation element for separately accumulating the in-phase and quadrature components of each sample.

[0008] In some embodiments of the present disclosure, the integrated circuit of the present disclosure further includes a control circuit that causes a code category of the probe signal to be stored in a storage element. The control circuit provides overall control of circuit elements within the integrated circuit and allocates resources (e.g., accumulator circuits in each processing unit) for probe signal detection. The dispatch circuit may further include a code category generation circuit that determines the code category to be stored in the storage element based on a pseudorandom code specified by the control circuit. The code category may be generated by the control circuit executing software or firmware. Additionally, the dispatch circuit may further include a Gold code generation circuit.

[0009] In one embodiment of the present invention, the control circuitry is provided in a system-on-chip manner by a microprocessor or microcontroller.

[0010] In one embodiment of the present invention, the dispatch circuitry includes multiple sets of storage elements, code counter circuitry, and phase counter circuitry for detecting multiple probe signals, multiple estimated code delays, and multiple estimated Doppler frequencies.

[0011] The present invention can be better understood by reference to the following detailed description taken in conjunction with the accompanying drawings. [Brief explanation of the drawings]

[0012] [Figure 1A] FIG. 1A is a block diagram illustrating a signal processing circuit 100 of a GPS receiver. [Figure 1B] FIG. 1B illustrates an exemplary implementation 150 of each of the channels 103-1, 103-2, . . . , 103-n in FIG. 1A. [Figure 2A] FIG. 2A is a diagram illustrating how the samples of an exemplary 12-chip PRN code 603 are divided in time into sections. [Figure 2B] FIG. 2B illustrates the phase change (modulo 2π) of a sinusoidal signal 650 of frequency f D over three periods. [Figure 3A] FIG. 3A is a block diagram illustrating a digital circuit 300 including an arithmetic logic unit (ALC) 301, a dispatch circuit (or category assignment circuit) 302, a memory circuit 303, and processing circuits 304-1, 304-2, . . . , 304-n, in accordance with one embodiment of the present invention. [Figure 3B] FIG. 3B is a diagram illustrating a functional representation 315 of dispatch circuitry 302 during section accumulation. [Figure 3C] FIG. 3C illustrates an accumulator implementation 320 for assisting accumulation in any of the processing circuits 304-1, 304-2, . . . , 304-n, according to one embodiment of the present invention. [Figure 3D] FIG. 3D illustrates data registers provided in dispatch circuit 302 to assist in implementing function representation 315. [Figure 4] FIG. 4 shows a waveform 401 corresponding to accumulated in-phase samples in a section of the received signal (i.e., the values ​​of the real part of the signal) and a waveform 402 corresponding to accumulated quadrature samples in the same section of the received signal (i.e., the values ​​of the imaginary part of the signal). [Figure 5] FIG. 5 shows the relative sizes of frequency search spaces in satellite acquisition, showing frequency search space 501 due to uncertainty in relative velocity |vk−v| and frequency search space 502 due to uncertainty in the total Doppler component. DETAILED DESCRIPTION OF THE INVENTION

[0013] FIG. 1A is a block diagram illustrating a signal processing circuit 100 of a GPS receiver. As shown in FIG. 1A, an antenna 101 receives a satellite signal 120. The satellite signal 120 received by the antenna 101 is downconverted to an intermediate frequency (IF) signal 121 (e.g., 4 MHz) by mixing it with a local oscillator-generated signal 122 in a radio frequency (RF) front-end circuit 102. The local oscillator-generated signal 122 is generated, for example, by an oscillator 125 (e.g., a temperature-compensated crystal oscillator (“TCXO”)). The downconversion is achieved, for example, by mixing the satellite signal 120 with the locally generated signal 122 (e.g., a 1471.42 MHz signal) in an analog mixer within the RF front-end circuit 102. The present invention is applicable to processing signals from satellites having multiple constellations (e.g., GPS, GLONASS, Galileo, and Beidou). These constellations use different carrier frequencies, so IF signal 121 contains signals from different constellations modulated at slightly different intermediate frequencies.

[0014] The IF signal 121 is then sampled (e.g., at 32 MHz) by an analog-to-digital (ADC) circuit 103 to obtain a digitized signal 123. This digitized signal 123 is then provided to each of the channels 104-1, 104-2, ..., 104-n for parallel detection. In many embodiments, the digitized signal 123 is provided in complex form, i.e., having an in-phase (I) component and a quadrature (Q) component (e.g., two bits are provided for each of the I and Q components). Movement of the satellite relative to the receiver causes a frequency shift f of the received signal 120. D (the "Doppler frequency"). In many embodiments, the Doppler frequency is typically determined to within ±5 KHz. Typically, to detect the received signal 120 at any given time, each channel 104-1, 104-2, ..., 104-n is tested under both an estimated code delay (estimated code delay) and a Doppler shift (estimated Doppler frequency).

[0015] FIG. 1B illustrates an exemplary implementation 150 of each channel 104-1, 104-2, ..., 104-n in FIG. 1A. As shown in FIG. 1B, channel embodiment 150 includes a Doppler frequency rejection (DFR) circuit 151 and a match filter circuit 152. Doppler frequency rejection circuit 151 multiplies digitized received signal 123 by digital samples of a sinusoidal signal having an estimated Doppler frequency to provide a Doppler frequency-removed input signal 124. Match filter circuit 152 calculates a correlation value 125 between the Doppler frequency-removed input signal 124 and a replica of the PRN code of the probe signal at an estimated code delay. If the output value 125 of match filter circuit 152 is significantly greater than the background noise level, it is determined that a satellite has been detected at the estimated code delay and Doppler frequency.

[0016] 1A is used to process the code delays of the detected satellites to determine the receiver's position, velocity, and GPS time. Processor 180 may be implemented, for example, by any microprocessor (e.g., a microprocessor customized for signal processing or a general-purpose microprocessor) or any suitable host computer.

[0017] A highly efficient method for calculating correlation is disclosed in the above-referenced related application, the disclosure of which is incorporated herein by reference. The above-referenced related application teaches a method for dividing samples of an exemplary 12-chip PRN code 603 into sections according to time, as described herein in conjunction with FIG. 2A. Note that the PRN code 603 in FIG. 2A is constructed for illustrative purposes only; the actual PRN code in any probe signal (e.g., a probe signal transmitted from a GPS satellite) will have a significantly larger number of chips (i.e., code length). FIG. 2A also shows a received signal 604 aligned with the PRN code 603 at an estimated code delay. The received signal 604 has been downconverted and its Doppler frequency removed. Each section boundary 601 is set at the midpoint of the corresponding chip in the 12-chip PRN code of the probe signal 603. Each section spans one chip time t c 2A, each section is classified according to the bit transitions of the PRN code 603 within the section. For example, adjacent sections 602 are classified into categories "0" and "1." The categories of the remaining sections are similarly labeled. In the example of FIG. 2A, the category k of each section is one of four categories: (a) k=0 (when all signal values ​​within the section are equal to the +1 level), (b) k=1 (when the signal values ​​within the section transition from the +1 level to the -1 level once), (c) k=2 (when all signal values ​​within the section are equal to the -1 level), or (d) k=3 (when the signal values ​​within the section transition from the -1 level to the +1 level).

[0018] In the method disclosed in the related application, samples of each section of the received signal 604 are accumulated in an accumulator corresponding to the category of that section. For example, in the classification method shown in Figure 2A, four accumulators corresponding to four categories are used to accumulate samples of the sections of the received signal 604 classified into the corresponding categories in parallel. In each accumulator, the detected signal (i.e., its estimated code delay and estimated Doppler frequency are close to the actual code delay and actual Doppler frequency) is used to match the accumulated sample of each accumulator to the waveform of the corresponding bit transition in the PRN code for that section.

[0019] The present invention extends the method described in the related application cited above to eliminate the need for a separate step to remove Doppler frequencies. D The phase change (modulo 2π) of the sinusoidal signal 650 is calculated over three periods (i.e., from time 0.0 to time 3.0 / f D2B illustrates a diagram of a sinusoidal signal 650 over a period of time (i.e., 0.0 to π / 2, as indicated by interval 651); (ii) a period of time between π / 2 and π, as indicated by interval 652; (iii) a period of time between π and 3π / 2, as indicated by interval 653; and (iv) a period of time between 3π / 2 and 2π (i.e., 0.0), as indicated by interval 654. For illustrative purposes only, FIG. 2B illustrates the mapping of the phase change in each period of a sinusoidal signal to the four phase categories. The phase change in each cycle of a sinusoidal signal may be mapped to any number of phase categories. For example, in FIG. 2B, the phase change in each cycle of the sinusoidal signal may be mapped into eight phase categories: (i) between 0.0 and π / 4, (ii) between π / 4 and π / 2, (iii) between π / 2 and 3π / 4, (iv) between 3π / 4 and π, (v) between π and 5π / 4, (vi) between 5π / 4 and 3π / 2, (vii) between 3π / 2 and 7π / 4, and (viii) between 7π / 4 and 2π.

[0020] According to one embodiment of the present invention, the received signal 604 of FIG. 2A can be divided in time into sections that are classified not only by code category as described above with reference to FIG. 2A, but also by phase category. In other words, each section of the received signal 604 can be assigned a composite category (c, p), where c is the code category and p is the phase category. Samples of each section of the received signal 604 assigned a composite category (c, p) are accumulated in an accumulator assigned to that composite category. In each accumulator, the detected signal causes the accumulated samples in each accumulator to match the phase and quadrature waveform of the corresponding downconverted probing signal at the estimated code delay and estimated Doppler frequency. According to one embodiment of the present invention, by combining the four code categories of FIG. 2A and the four phase categories of FIG. 2B, 16 accumulators can be used to perform the corresponding accumulations in parallel. In GPS applications, where the Doppler frequency is typically between ±5 KHz and each chip is 1.0 microsecond in duration, very little phase category change occurs during the code period. Therefore, in accordance with one embodiment of the present invention, in GPS applications, signal sections can be created using the same single chip duration, as shown in FIG. 2A.

[0021] According to one embodiment of the present invention, the probe signal is detected at the estimated code delay and Doppler frequency by the following method. (i) dividing a period of a probe signal into a plurality of sections, each having a predetermined duration; (ii) assigning one of a plurality of code categories to each section of the probe signal, each code category indicating a signal pattern of the probe signal in the corresponding section; (iii) selecting a phase category of the sinusoidal signal from a plurality of phase categories, each phase category indicating a corresponding range of phases of the sinusoidal signal; (iv) receiving a received signal including a probe signal; (v) dividing the received signal into sections, each having a predetermined duration; (vi) assigning to each section of the received signal both a corresponding code category and a corresponding phase category based on the estimated code delay and the estimated Doppler frequency; (vii) accumulating each section of the received signal separately according to the code category and phase category assigned to each section.

[0022] The above step (vii) is implemented, for example, by providing each composite category (c, p) to an accumulator. In the composite category, c is a code category and p is a phase category. With this configuration, high performance and high efficiency can be achieved by utilizing parallelism.

[0023] According to one embodiment of the present invention, the method of the present invention is implemented by dedicated digital circuitry, such as illustrated by digital circuit 300 in FIGS. 3A-3C. FIG. 3A is a block diagram illustrating digital circuit 300 according to one embodiment of the present invention. Digital circuit 300 includes a central processing unit (CPU) 301 (also known as an arithmetic logic unit (ALC) 301), a dispatch circuit (or category assignment circuit) 302, a memory circuit 303, and processing circuits 304-1, 304-2, . . . , 304-n. Digital circuit 300 can be used to simultaneously search for multiple probe signals from multiple signal sources ("channels"). Data (e.g., digitized received signals, PRN codes, and output data) is received by digital circuit 300 and distributed throughout or transmitted from digital circuit 300 via system bus 305. Internal bus 306 provides communication of internal data and control signals between circuits in digital circuit 300.

[0024] In some embodiments, CPU 301 is any general-purpose microprocessor or microcontroller (e.g., of the ARM architecture), often available as a configurable circuit module that can be directly incorporated into a custom "system-on-chip" integrated circuit. In some embodiments, CPU 301 is a custom control circuit capable of performing selected arithmetic and logic functions. According to one embodiment of the present invention, CPU 301 configures and controls the operation of the circuits within digital circuit 300. In some embodiments, each processing circuit 304-1, 304-2, ..., 304-n includes one or more accumulator circuits suitable for use in accumulating samples of sections of the received signal, as described in further detail below. For example, CPU 301 may assign each accumulator, at any given time, to be used to accumulate sections of the received signal for a particular channel, a particular composite category, and a particular pair of estimated code delay and estimated Doppler frequency.

[0025] The dispatch circuit 302 is a logic circuit that dispatches and accumulates each section of the received signal to its assigned accumulator. The digital circuit 300 is used to search for probe signals from multiple channels, with each section of the received signal being dispatched to multiple accumulators. First, the CPU 301 loads one or more PRN codes into the dispatch circuit 302. The dispatch circuit 302 divides a cycle of the PRN code into desired sections and classifies each section according to a predetermined code category. Alternatively, rather than providing the PRN code to the dispatch circuit 302, the CPU 301 may provide a code category for each section of the PRN code cycle. In some embodiments, the dispatch circuit includes a gold code generator configurable to generate the desired PRN code. The dispatch circuit 302 includes data registers for storing data necessary to assign sections of the received signal to a particular probe signal composite category based on a pair of its corresponding estimated code delay and corresponding estimated Doppler frequency, and for dispatching the sections of the received signal to one or more of the processing circuits 304-1, 304-2, ..., 304-n for further processing.

[0026] FIG. 3B illustrates a functional representation 315 of the dispatch circuit 302 during section accumulation. FIG. 3D illustrates data registers provided in the dispatch circuit 302 to assist in implementing the functional representation 315. First, the code category of the PRN code cycle and the corresponding search channel identity are provided to data register 343 (FIG. 3D). As shown in FIG. 3B, samples 316 of each section of the received signal are retrieved from memory circuit 303 to dispatch circuit 302 (e.g., the sample data portion of register 344 of FIG. 3D). For example, in a GPS application, under a sampling rate of 32 MHz, 32 complex samples (i.e., both in-phase and quadrature samples) are provided for each section having a one-chip duration. The dispatch circuit 302 dispatches the received samples to an accumulator, which maps them as a function of search parameters 317, namely, the assigned channel, estimated code delay, and Doppler frequency (which determines the phase category transition over time). Based on the estimated code delay, a section of the received signal is mapped to the beginning of a cycle of the PRN code for the assigned channel. Offset counter 341 (FIG. 3D) indicates the offset 318 of the current section of the received signal relative to the beginning of the PRN code. Based on this offset, dispatch circuit 302 determines the code category. Phase counter 342, based on the estimated Doppler frequency, indicates the phase category of the received section. The combination of channel, code category, and phase category allows dispatch circuit 302 to determine the destination accumulator assigned by CPU 301 for accumulation. The identifier or address of the destination accumulator is provided in the accumulator address portion of register 344 (FIG. 3D). The accumulator address and sample data from register 344 are provided to internal data bus 306 (FIG. 3A) to send the received signal sample to the destination accumulator.

[0027] FIG. 3C illustrates an accumulator implementation 320 for supporting accumulation in any of processing circuits 304-1, 304-2, ..., 304-n, according to one embodiment of the present invention. As shown in FIG. 3C, samples for each section are provided on data bus 324 (which may be part of internal data bus 306 of FIG. 3A). As described above, each sample in each section is provided with both an in-phase component and a quadrature component (e.g., two bits for each of the in-phase and quadrature components). The in-phase and quadrature components of a sample are received in vector registers 325-I and 325-Q, respectively. Each of vector registers 325-I and 325-Q, for example, includes 32 2-bit sub-registers, each holding a corresponding one of the 32 samples in the section. Accumulation registers 327-I and 327-Q hold corresponding accumulated vector sums of corresponding in-phase and quadrature components of samples in previously received sections. Vector summers 326-I and 326-Q add the in-phase and quadrature components of the current section to the accumulated vector sum in accumulation registers 327-I and 327-Q. Each in-phase or quadrature component of each sample in accumulation registers 327-I and 327-Q may be, for example, 8 or 16 bits, as appropriate, based in part on the length of the expected PRN code.

[0028] As described above, the detected signal (i.e., its estimated code delay and estimated Doppler frequency are close to the actual code delay and actual Doppler frequency) in each accumulator causes the accumulated samples in each accumulator to match the waveform of the corresponding bit transition in the PRN code within that section. FIG. 4 illustrates waveform 401 (i.e., the value of the real part of the signal) corresponding to the accumulated in-phase samples in a section of the received signal and waveform 402 (i.e., the value of the imaginary part of the signal) corresponding to the accumulated quadrature samples in the same section of the received signal. Note that the section of the PRN code corresponding to the section of the received signal in FIG. 4 includes a signal transition (e.g., a transition from −1 to +1 or from +1 to −1). Waveforms 401 and 402 resemble a step function and its derivative (i.e., an impulse function), respectively. In FIG. 4, waveform 402 has a peak (i.e., peak 403) preceding the midpoint 404 of the signal transition in waveform 401. The inventors have found that in this configuration the received signal represents a superposition of signals arriving via multipath, with peak 403 of waveform 402 representing its earliest arrival time.

[0029] The distance ("pseudorange") between the receiver and the location where the signal was received from the satellite can be calculated by multiplying the measured code delay by the speed of light c. If the receiver receives a signal at time t, the signal must have been transmitted from the satellite at GPS time t-τ, where τ represents the actual code delay. The satellite's position at GPS time t-τ can be accurately estimated from its ephemeris. The receiver's position and velocity can typically be calculated using pseudorange measurements from four or more satellites. This calculation can be performed, for example, in processor 180 shown in FIG. 1A above. For example, in section 6.1 of the book "Global Positioning System: Signals, Measurement and Performance ("Misra")" (P. Misra and P. Enge, 2nd Revised Edition), Misra states that the pseudorange measurements ρ from the satellites kWe provide a model for (t, t-τ) (1≦k≦N, N≧4).

[0030]

number

[0031] where r(t, t-τ) is the actual pseudorange. r (t) is the receiver clock bias, and δt s (t-τ) is the satellite clock bias. k (t) represents the atmospheric delay compensation coefficient. ε ρ k (t) is a noise term, typically modeled as zero-mean Gaussian noise. Collectively, the pseudoranges form a pseudorange vector ρ(t), the time derivative of which is the pseudorange time derivative vector ρ · Form (t).

[0032] The receiver's position vector x and velocity vector v are calculated as the pseudorange vector ρ(t) and pseudorange time derivative vector ρ · (t), satellite ephemeris, and system state variables of a dynamical system that can be solved using statistical analysis techniques known to those skilled in the art (e.g., Kalman filters). See, for example, section 6.2 of the book by Misra mentioned above.

[0033] The above equation 1 can be rewritten as follows:

[0034]

number

[0035] In the formula, |x k -x| is the actual pseudorange and the satellite position vector x k The Euclidean distance between the satellite and the receiver's position vector x is expressed as the Euclidean distance between the satellite and the receiver's position vector x. k and the receiver velocity vector v are related as follows:

[0036]

number

[0037] Thus, for each satellite, the observed Doppler frequency (which is linearly related to the time rate of change of the pseudorange) is a function of the relative velocity along the line of sight between the satellite and the receiver (v k -v) and the receiver clock bias rate δ · t r (t) and the satellite clock bias rate δ · t s (t-τ) and the atmospheric correction factor rate A ·k Assuming that the satellite clock is of high quality and that the atmospheric model varies relatively slowly, the satellite clock bias rate δ · t s (t-τ) and atmospheric correction factor rate A ·k (t) is generally the receiver clock bias rate δ · t r (t) and relative radial velocity |v k -v|. As mentioned above, the IF signal 121 is obtained by mixing the received signal with a fixed frequency signal generated by a local oscillator 125 (usually a TXCO). The stability of the oscillator 125 is determined by the receiver clock bias rate δ · t r (t) is reflected in the uncertainty of the relative velocity |v k -v| is dominated by the motion of the satellite, and this uncertainty is typically on the order of 100 kHz. However, the receiver clock bias rate δ · t r The uncertainty in (t) can be quite large. Figure 5 shows the relative size of the frequency search space in satellite acquisition, and the relative velocity |v k 5 shows the frequency search space due to uncertainty in −v| 501 and the frequency search space due to uncertainty in the total Doppler component 502. Also shown in FIG.

[0038] In the prior art, reducing the size of the frequency search space 502 requires a high-quality TCXO with a known and limited drift, which adds additional cost to the receiver. However, this prior art may make the receiver too expensive for many applications, such as IoT applications. Observing that the uncertainty caused by the TCXO in the receiver is common to all satellites, the method according to the present invention requires the entire frequency search space 502 only during the initial acquisition of the first satellite in a cold start or a warm start. Once the first satellite is successfully acquired, the receiver clock bias δt determined during the initial acquisition of the first satellite is used. r (t) and the receiver clock bias rate δ · t r The value of (t) and its respective variance are used for all subsequent satellite acquisitions. With this method, uncertainty is essentially eliminated except for the uncertainty in the relative velocity of each satellite, so that the only frequency search space likely required is frequency search space 501. This method can be summarized as follows: (i) The receiver position vector x and velocity vector v, and the receiver clock bias δt r (t) and receiver clock bias rate δ · t r Using a system model that includes (t) as a state variable, the receiver position vector x and velocity vector v are initialized to their best initial estimates. (ii) The uncertainty due to the orbit of the first satellite and the receiver clock bias δt r (t) and receiver clock bias rate δ · t r The first satellite is acquired using a first frequency search space that covers both the uncertainty due to (t) and the uncertainty due to (t). (iii) Receiver clock bias δt r (t) and receiver clock bias rate δ · t rThe internal states corresponding to (t) are set to the respective estimates obtained upon acquisition of the first satellite. (iv) acquiring a second satellite using a second frequency search space that substantially covers only the uncertainty due to the orbit of the second satellite;

[0039] In some embodiments of the present invention, a Kalman filter is used to calculate the receiver position vector x and velocity vector v, as well as the receiver clock bias δt r (t) and receiver clock bias rate δ · t r In some embodiments, a system model is implemented in which the satellite clock bias δt s (t-τ), atmospheric correction coefficient A k (t), and other factors that affect the pseudorange measurements, may be provided as input variables or may be processed separately. In a Kalman filter, the system state variables x and v, the receiver clock bias δt r (t) and receiver clock bias rate δ · t r (t), and their covariances are predicted from their corresponding current estimates and noise models. The current estimates of the system variables and their covariances are then updated using the latest estimates and measurements of the pseudoranges and Doppler frequencies of each satellite. For example, the receiver clock bias rate δ · t r The current estimate of (t) is updated using a linear function of the most recent estimate and the measured Doppler frequency.

[0040] The above detailed description is provided to illustrate particular embodiments of the present invention and is not intended to be limiting. Various modifications and variations are possible within the scope of the present invention, which is set forth in the appended claims.

Claims

1. 1. A method for detecting, in a receiver, an earliest time of arrival of one or more components of a digitized complex-valued received signal, comprising: the received signal is a periodic PRN code modulated signal; each component of the received signal arrives at the receiver via one of a plurality of signal paths; The method comprises: (i) dividing each period of the received signal into a plurality of sections; (ii) assigning one of a plurality of code categories to each section of the received signal, each code category corresponding to a signal pattern of a portion of the cyclic PRN code modulated signal corresponding to the section to which that code category is assigned; (iii) selecting the assigned code category corresponding to a signal pattern including one or more signal transitions in the real part of the periodic PRN code modulated signal; (iv) accumulating sample values ​​of a section corresponding to the assigned code category over one or more periods of the periodic PRN code modulated signal, accumulating real and imaginary parts of the sample values ​​separately; (v) detecting signal transitions in the real part of the accumulated sample values ​​and peak values ​​of the imaginary part preceding the signal transitions in the real part; (vi) determining the arrival time of the peak value as the earliest arrival time.

2. 10. The method of claim 1, The method, wherein the received signal corresponds to a probe signal transmitted from a satellite.

3. 3. The method of claim 2, The method further comprising determining a pseudorange based on the time of arrival.

4. 10. The method of claim 1, The method, wherein the real part and the imaginary part correspond to sample values ​​of an in-phase component and a quadrature component, respectively, of the received signal downconverted at a predetermined intermediate frequency.

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