Semiconductor Devices

Abstract

To provide a semiconductor device capable of suppressing degrading of measurement accuracy of a temperature sensor.SOLUTION: A semiconductor device includes: a substrate body having a first surface and a second surface arranged back to back with the first surface; a power semiconductor element mounted on the first surface; a radiator brought into contact with the second surface; and a temperature sensor for measuring the temperature of the power semiconductor element. The temperature sensor is arranged at a first side being a side where the power semiconductor element is mounted rather than the substrate body, and further arranged at a position apart from the first surface of the substrate body rather than the power semiconductor element.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present disclosure relates to semiconductor devices. [Background technology]

[0002] Patent Document 1 discloses a power semiconductor element used in a power converter such as an inverter. The power semiconductor element is responsible for power conversion and part of a circuit for stepping up and stepping down, and generates a large amount of heat because it handles a large current. For this reason, the power semiconductor element needs to be cooled by a cooler, and the control device of the power converter needs to monitor the temperature of the power semiconductor element using a temperature sensor.

[0003] For example, the temperature sensor may be mounted on the same substrate as the power semiconductor element, but spaced apart from the power semiconductor element in the in-plane direction. The temperature sensor measures the temperature of heat conducted from the power semiconductor element at the mounted location. The measurement results of this temperature sensor enable the control device to indirectly monitor the temperature of the power semiconductor element. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2015-122876 Summary of the Invention [Problem to be solved by the invention]

[0005] Recently, there has been a demand for improved cooling performance of coolers that cool power semiconductor elements so that the elements can handle larger currents. The more the cooling performance of a cooler for a power semiconductor element improves, the more difficult it becomes for the heat of the power semiconductor element to dissipate in the in-plane direction. When the heat of the power semiconductor element is difficult to dissipate in the in-plane direction, the amount of heat conducted to the location where the temperature sensor is mounted decreases, which may result in a deterioration in the measurement accuracy of the temperature sensor in response to temperature increases in the power semiconductor element.

[0006] The present disclosure has been made to solve the above-mentioned problems, and has an object to provide a semiconductor device that can suppress deterioration in the measurement accuracy of a temperature sensor. [Means for solving the problem]

[0007] In order to solve the above-described problems, a semiconductor device according to the present disclosure includes a substrate body having a first surface and a second surface facing the first surface, a power semiconductor element mounted on the first surface, a cooler in contact with the second surface, a lead frame connected to a surface of the power semiconductor element opposite to the substrate body, a temperature sensor located on the lead frame opposite to the power semiconductor element and located in a region where the lead frame overlaps with the power semiconductor element in a stacking direction in which the substrate body and the power semiconductor element are stacked, and an insulating member provided between the lead frame and the temperature sensor, thermally connecting the lead frame and the temperature sensor and electrically insulating the lead frame and the temperature sensor. , the lead frame is not connected to the cooler. [Effects of the Invention]

[0008] According to the present disclosure, it is possible to provide a semiconductor device that can suppress deterioration in the measurement accuracy of a temperature sensor. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 1 is a side view of a semiconductor device according to a first embodiment of the present disclosure. [Figure 2] FIG. 10 is a side view of a semiconductor device according to a second embodiment of the present disclosure. [Figure 3] FIG. 10 is a view of a semiconductor device according to a second embodiment of the present disclosure as viewed from the stacking direction. [Figure 4] FIG. 10 is a diagram showing a modified example of the semiconductor device according to the second embodiment of the present disclosure as viewed from the stacking direction. DETAILED DESCRIPTION OF THE INVENTION

[0010] [First embodiment] (Semiconductor Devices) Hereinafter, a semiconductor device according to a first embodiment of the present disclosure will be described with reference to the drawings. The semiconductor device of this embodiment constitutes a part of a power conversion circuit included in a power converter such as an inverter or a converter. The semiconductor device of this embodiment is used in an inverter that receives a direct current as an input and outputs an alternating current.

[0011] 1 is a side view of a semiconductor device according to a first embodiment. As shown in Fig. 1, the semiconductor device 1 of this embodiment includes a substrate 10, a power semiconductor element 20, a cooler 30, a lead frame 40, an insulating substrate 50, and a temperature sensor 60.

[0012] (substrate) The substrate 10 has a substrate body 11, an input circuit Ci, an output circuit Co, a control circuit Cn, and a bonding pattern Cb. The substrate body 11 is a flat plate-shaped member. The substrate body 11 has a first surface 11a and a second surface 11b located on the back side of the first surface 11a. In other words, the first surface 11a and the second surface 11b of the substrate body 11 are back-to-back.

[0013] Hereinafter, in this embodiment, the direction in which the substrate body 11 extends (the depth direction and the up-down direction in the plane of FIG. 1) will be referred to as an in-plane direction A. In this embodiment, the substrate body 11 is made of, for example, ceramic. The substrate body 11 may be made of paper phenol, paper epoxy, glass composite, glass epoxy, glass polyimide, fluororesin, or the like.

[0014] The input circuit Ci, output circuit Co, and control circuit Cn are patterns of copper foil or the like formed on the first surface 11a of the substrate body 11 at intervals in the in-plane direction A. More specifically, these circuits are formed integrally with the substrate body 11 by brazing or the like to the first surface 11a of the substrate body 11, and each forms an independent circuit pattern on the substrate body 11.

[0015] A direct current, which is an input to the semiconductor device 1, is input to the input circuit Ci from outside the substrate 10 via an input bus bar (not shown) extending from a part of the substrate body 11. The output circuit Co is formed spaced apart from the input circuit Ci in the in-plane direction A. The output circuit Co outputs the AC current converted by the semiconductor device 1 to a device provided outside the substrate 10 via an output bus bar (not shown) extending from a part of the substrate main body 11.

[0016] The detailed configuration of the control circuit Cn in this embodiment will be described later. The bonding pattern Cb is a pattern of copper foil or the like provided on the second surface 11b of the substrate body 11. The bonding pattern Cb is formed integrally with the substrate body 11 by brazing or the like over the entire second surface 11b in order to bond a cooler 30, which will be described later.

[0017] The input circuit Ci, output circuit Co, and control circuit Cn formed on the first surface 11a are electrically insulated from the bonding pattern Cb formed on the second surface 11b by sandwiching the substrate main body 11 made of an electrically insulating material therebetween.

[0018] (power semiconductor element) The power semiconductor element 20 is, for example, an IGBT, a MOSFET, or an FWD, and has an input surface 20b and an output surface 20a located on the back side of the input surface 20b. An input terminal (not shown) for receiving a current is provided on the input surface 20b, and an output terminal (not shown) for outputting the converted current is provided on the output surface 20a. The input terminal is electrically connected to an input circuit Ci formed on the first surface 11a of the substrate body 11 via a bonding material S. That is, the power semiconductor element 20 is mounted on the first surface 11a of the substrate body 11. Hereinafter, the direction in which the substrate 10 and the power semiconductor element 20 are stacked (the left-right direction in FIG. 1 ) will be referred to as the stacking direction L.

[0019] The power semiconductor device 20 has at least a power transistor circuit (not shown) in which a power transistor is incorporated as a circuit element. The power semiconductor element 20 receives a control signal input from a control circuit Cn (described later) via a control wire 70. The power semiconductor element 20 performs switching in accordance with the control signal input from the control circuit Cn.

[0020] (cooler) The cooler 30 is bonded to a bonding pattern Cb provided on the second surface 11b of the substrate 10 via a bonding material S. The cooler 30 has a base 31 and heat dissipation fins 32. The base 31 has a bonding surface 31a bonded to the bonding pattern Cb of the substrate 10 via the bonding material S, and a fin surface 31b facing back to back to the bonding surface 31a and on which the heat dissipation fins 32 are provided. A plurality of heat dissipation fins 32 are provided so as to extend in the stacking direction L from the fin surface 31b of the base 31.

[0021] As a result, when the power semiconductor element 20 generates heat, the heat of the power semiconductor element 20 is conducted in the following order: the bonding material S connecting the power semiconductor element 20 and the input circuit Ci, the input circuit Ci, the substrate main body 11, the bonding pattern Cb, the bonding material S connecting the substrate main body 11 and the base 31, the base 31, and the heat dissipation fins 32. Therefore, the heat dissipated from the input surface 20b of the power semiconductor element 20 in the stacking direction L propagates through the above-mentioned path and is dissipated by the heat dissipation fins 32.

[0022] In this embodiment, aluminum is used as the material for the base 31 and the heat dissipation fins 32 of the cooler 30. However, iron, copper, ceramic, etc. may also be used for the base 31 and the heat dissipation fins 32 of the cooler 30.

[0023] The heat dissipation fins 32 of the cooler 30 are immersed in a refrigerant flow path (details not shown) through which the refrigerant flows. In FIG. 1, the outline of the refrigerant flow path is indicated by a two-dot chain line, and the flow W of the refrigerant is indicated by a right-pointing arrow. The heat dissipation fins 32 constantly exchange heat with the refrigerant flowing in the refrigerant flow path, and dissipate heat conducted from the power semiconductor elements 20 by a water-cooling method. In this embodiment, for example, water is used as the refrigerant. However, a liquid other than water may also be used as the refrigerant.

[0024] (lead frame) The lead frame 40 is a conductor that bridges the power semiconductor element 20 and the output circuit Co, thereby electrically connecting them. One end of the lead frame 40 is connected to the output circuit Co, and the other end is connected to the power semiconductor element 20. More specifically, the one end of the lead frame 40 is connected to the output circuit Co formed on the first surface 11a of the substrate body 11 via a bonding material S. The other end of the lead frame 40 is connected to an output terminal provided on the output surface 20a of the power semiconductor element 20 via the bonding material S, so as to cover at least a portion of the output surface 20a. In this embodiment, for example, a copper clip is used for the lead frame 40.

[0025] (insulating substrate) The insulating substrate 50 is an insulating member that is in contact with the lead frame 40 via a bonding material S. The insulating substrate 50 has an insulating substrate body 51 and a bonding pattern Cb. The insulating substrate body 51 is a flat plate-shaped member. The insulating substrate body 51 has an insulating surface 51b and a sensor mounting surface 51a located on the back side of the insulating surface 51b. That is, the insulating surface 51b and the sensor mounting surface 51a of the insulating substrate body 51 are back-to-back.

[0026] In this embodiment, for example, ceramic is used for the insulating substrate body 51. Note that the insulating substrate body 51 may also be made of paper phenol, paper epoxy, glass composite, glass epoxy, glass polyimide, fluororesin, or the like.

[0027] The bonding pattern Cb in this embodiment is a pattern of copper foil or the like provided on the insulating surface 51b and the sensor mounting surface 51a of the insulating substrate 50. More specifically, the bonding pattern Cb is formed integrally with the insulating substrate main body 51 by brazing or the like to one surface of the insulating surface 51b and one surface of the sensor mounting surface 51a of the insulating substrate main body 51. The bonding pattern Cb formed on the insulating surface 51b and the bonding pattern Cb formed on the sensor mounting surface 51a are electrically insulated by the insulating substrate main body 51 being sandwiched therebetween.

[0028] The bonding pattern Cb formed on the insulating surface 51b is connected to the lead frame 40 via a bonding material S. One end of a sensor lead wire (not shown) is connected to the other end of the bonding pattern Cb formed on the sensor mounting surface 51a, and the other end is connected to a control device (not shown) of a power converter outside the semiconductor device 1. The sensor lead wire supplies a current from the control device to operate the temperature sensor 60 mounted on the sensor mounting surface 51a, and also extracts a response signal output by the temperature sensor 60 as a measurement result to the control device.

[0029] The bonding material S connecting the power semiconductor element 20 to the input circuit Ci of the substrate 10, the bonding pattern Cb between the base 31 of the cooler 30 and the substrate 10, the lead frame 40 to the output circuit Co, the lead frame 40 to the power semiconductor element 20, and the bonding pattern Cb between the lead frame 40 and the insulating substrate 50 may be, for example, solder. Note that a sintered material (powder of metal, ceramic, etc.) may also be used as the bonding material S. Also, an adhesive may be used as the bonding material S connecting the base 31 of the cooler 30 to the substrate 10 and the bonding pattern Cb between the lead frame 40 and the insulating substrate 50.

[0030] (Temperature sensor) The temperature sensor 60 is mounted on a bonding pattern Cb formed on the sensor mounting surface 51a of the insulating substrate 50. The temperature sensor 60 is a sensor that measures the temperature at the mounting location of the bonding pattern Cb on the insulating substrate 50. In this embodiment, a thermistor is used as the temperature sensor 60, for example. Note that a resistance temperature detector or the like may also be used as the temperature sensor 60.

[0031] The temperature sensor 60 is provided on a first side of the substrate 10, on which the power semiconductor element 20 is mounted, and is provided at a position farther away from the first surface 11a of the substrate body 11 than the power semiconductor element 20. The temperature sensor 60 in this embodiment is further located in a region where the lead frame 40 overlaps with the power semiconductor element 20 in the stacking direction L.

[0032] Heat dissipated from the power semiconductor element 20 is conducted in the stacking direction L through the bonding material S connecting the power semiconductor element 20 and the lead frame 40, the lead frame 40, the bonding material S connecting the lead frame 40 and the bonding pattern Cb, the bonding pattern Cb, the insulating substrate 50, the bonding pattern Cb, and the temperature sensor 60 in that order. The mounting location of the temperature sensor 60 on the sensor mounting surface 51a is heated by the heat conducted through the above-mentioned path. In this embodiment, it is desirable to configure the temperature sensor 60 to be provided at approximately the center of the power semiconductor element 20 when viewed from the stacking direction L.

[0033] (Control circuit) The control circuit Cn is provided on the first surface 11a of the substrate body 11, spaced apart from the input circuit Ci in the in-plane direction A. A control wire 70 is connected to the control circuit Cn, which enables the control circuit Cn to transmit an electrical signal for controlling the power semiconductor element 20. One end of the control wire 70 is electrically connected to the control circuit Cn, and the other end is electrically connected to an input terminal (not shown) for inputting a control signal of the power semiconductor element 20.

[0034] A control unit (not shown) that generates a control signal for the power semiconductor element 20 is connected to the control circuit Cn. This allows the control circuit Cn to input the control signal generated by the control unit to the power semiconductor element 20 via the control wire 70. In this embodiment, the control wire 70 is made of, for example, aluminum. However, the control wire 70 may also be made of copper, gold, or the like.

[0035] (Action and effect) The semiconductor device 1 according to the first embodiment includes a substrate main body 11 having a first surface 11a and a second surface 11b that is back-to-back with the first surface 11a, a power semiconductor element 20 mounted on the first surface 11a, a cooler 30 that contacts the second surface 11b, and a temperature sensor 60 that measures the temperature of the power semiconductor element 20, the temperature sensor 60 being provided on the first side, which is the side on which the power semiconductor element 20 is mounted, of the substrate main body 11, and being provided at a position farther away from the first surface 11a of the substrate main body 11 than the power semiconductor element 20.

[0036] With this configuration, the heat conducted from the power semiconductor element 20 to the temperature sensor 60 is not affected by heat dissipation in the in-plane direction A of the substrate 10 on which the power semiconductor element 20 is mounted. Therefore, even if, for example, the performance of the cooler 30 is improved and the heat dissipation in the in-plane direction A of the substrate 10 is reduced, it is possible to prevent a decrease in the measurement accuracy of the temperature sensor 60.

[0037] In addition, the semiconductor device 1 according to the first embodiment further includes a lead frame 40 connected to the power semiconductor element 20, and an insulating substrate 50 that is thermally conductively connected to the lead frame 40 and the temperature sensor 60 and electrically insulates the lead frame 40 and the temperature sensor 60.

[0038] With this configuration, the temperature sensor 60 does not affect the circuits related to the input and output of the power semiconductor element 20. Therefore, the degree of freedom in circuit design of the power semiconductor element 20 is not reduced.

[0039] In addition, in the stacking direction L in which the substrate 10 and the power semiconductor element 20 are stacked, the temperature sensor 60 is located in a region where the lead frame 40 overlaps with the power semiconductor element 20.

[0040] According to this configuration, the temperature sensor 60 is located at a position where the heat generated in the power semiconductor element 20 is conducted without loss. Therefore, the temperature measured by the temperature sensor 60 can be made closer to the actual temperature of the power semiconductor element 20.

[0041] Furthermore, in the semiconductor device 1 according to the first embodiment, the cooler 30 has a base 31 that contacts the second surface 11b of the substrate 10, and heat dissipation fins 32 that extend from the base 31 toward the other side of the stacking direction L.

[0042] With this configuration, the cooler 30 does not cool the location measured by the temperature sensor 60. Therefore, the power semiconductor element 20 can be cooled without affecting the measured value of the temperature sensor 60.

[0043] [Second embodiment] A semiconductor device according to a second embodiment of the present disclosure will be described below with reference to Figures 2 and 3. In the second embodiment, the configurations of the power semiconductor element 20, the lead frame 40, and the control circuit Cn included in the semiconductor device 1 of the first embodiment are partially different. The same components as those in the first embodiment are denoted by the same reference numerals, and detailed description thereof will be omitted. 2 is a side view of the semiconductor device according to the second embodiment. As shown in FIG. 2, the semiconductor device 1 of this embodiment includes a plurality of power semiconductor elements 20.

[0044] (power semiconductor element) Each of the multiple power semiconductor elements 20 has an input surface 20b and an output surface 20a located on the back side of the input surface 20b. Input terminals (not shown) provided on the input surface 20b of each of the multiple power semiconductor elements 20 are electrically connected via a bonding material S to input circuits Ci provided on the first surface 11a of the substrate body 11. That is, the multiple power semiconductor elements 20 are mounted on the first surface 11a of the substrate body 11.

[0045] In this embodiment, three power semiconductor elements 20 are mounted in parallel on the first surface 11a of the substrate body 11. Of the three power semiconductor elements 20 mounted in parallel on the first surface 11a of the substrate body 11, the central power semiconductor element 20 sandwiched between two other power semiconductor elements 20 is affected by the heat dissipated from the two power semiconductor elements 20, and therefore its temperature is likely to become relatively high.

[0046] (cooler) The cooler 30 is bonded to a bonding pattern Cb provided on the second surface 11b of the substrate 10 via a bonding material S. The cooler 30 has the same configuration as that of the first embodiment.

[0047] 3 is a view of the semiconductor device 1 as viewed from the stacking direction L. In the semiconductor device 1 shown in FIG. 3, the control circuit Cn is not shown.

[0048] (lead frame) The lead frame 40 is a conductor that electrically connects the plurality of power semiconductor elements 20 to the output circuit Co by bridging between them. As shown in Fig. 3, a portion of the lead frame 40 is connected to the output circuit Co, and a plurality of portions of the remaining portion are connected to the plurality of power semiconductor elements 20, respectively. More specifically, the remaining portions of the lead frame 40 cover at least a portion of each output surface 20a of the plurality of power semiconductor elements 20, extend linearly, and are connected to output terminals provided on each output surface 20a.

[0049] (insulating substrate) The insulating substrate 50 is an insulating member that is in contact with the lead frame 40. The insulating substrate 50 has the same configuration as that of the first embodiment.

[0050] (Temperature sensor) The temperature sensor 60 is mounted on a bonding pattern Cb formed on the sensor mounting surface 51a of the insulating substrate 50. The temperature sensor 60 is a sensor that measures the temperature at the mounting location of the bonding pattern Cb on the insulating substrate 50. The temperature sensor 60 is located in a region where the lead frame 40 overlaps with the power semiconductor elements 20 in the stacking direction L. In this embodiment, the temperature sensor 60 is located approximately in the center of a region where the central power semiconductor element 20 of the three power semiconductor elements 20 mounted in parallel on the substrate 10 and the lead frame 40 overlap in the stacking direction L.

[0051] (Control circuit) A plurality of control wires 70 (three in this embodiment) are connected to the control circuit Cn, and enable the control circuit Cn to transmit electrical signals for controlling the power semiconductor elements 20. One end of each of the plurality of control wires 70 is electrically connected to the control circuit Cn, and the other end is electrically connected to an input terminal (not shown) of the control signal of each power semiconductor element 20.

[0052] (Action and effect) In the semiconductor device 1 according to the second embodiment, a plurality of power semiconductor elements 20 are mounted on the first surface 11a of the substrate body 11, and the lead frame 40 extends across and is connected to the plurality of power semiconductor elements 20.

[0053] With this configuration, the temperature sensor 60 can collectively measure the temperatures of the multiple power semiconductor elements 20. Therefore, even if an abnormality occurs in which the temperature of any of the power semiconductor elements 20 rises excessively, the power semiconductor elements 20 can be protected from overheating based on the measurement value of the temperature sensor 60.

[0054] Furthermore, in the semiconductor device 1 according to the second embodiment, the temperature sensor 60 is located approximately in the center of the area where the central power semiconductor element 20 and the lead frame 40 overlap in the stacking direction L among the three power semiconductor elements 20 mounted in parallel on the substrate 10.

[0055] With this configuration, the temperature sensor 60 can measure the temperature at a location where the temperature is relatively high. Therefore, it is possible to more appropriately protect the power semiconductor element 20 from overheating based on the measurement value of the temperature sensor 60.

[0056] [Other embodiments] Although the embodiments of the present disclosure have been described above in detail with reference to the drawings, the specific configurations are not limited to those of the embodiments, and additions, omissions, substitutions, and other modifications to the configurations are possible within the scope of the gist of the present disclosure. Furthermore, the present disclosure is not limited to the embodiments.

[0057] In the second embodiment, the lead frame 40 extends linearly and is connected to the power semiconductor elements 20 so as to cover at least a portion of each of the output surfaces 20a. However, the present invention is not limited to this configuration. FIG. 4 shows a modified example of the lead frame 40 of the second embodiment. As shown in FIG. 4, the lead frame 40 may extend from any three positions on the output circuit Co toward the output surfaces 20a of the power semiconductor elements 20, and may be connected to each other so as to cover at least a portion of each of the output surfaces 20a of the power semiconductor elements 20. This allows the same effects as those of the second embodiment to be achieved.

[0058] In addition, in the above-described embodiments, the cases where one power semiconductor element 20 is mounted on the substrate 10 and the cases where three power semiconductor elements 20 are mounted in parallel are illustrated, but the number of power semiconductor elements 20 mounted is not limited to the above-described numbers. Two or four or more power semiconductor elements 20 may be mounted. For example, when two power semiconductor elements 20 are mounted in parallel, the temperature sensor 60 does not necessarily have to be positioned in the region where the lead frame 40 overlaps with the power semiconductor elements 20 in the stacking direction L. The temperature sensor 60 may be configured to measure the temperature of the mounting location at a substantially midpoint between the two power semiconductor elements 20. This makes it possible to efficiently measure the temperatures of the two power semiconductor elements 20, and to achieve the same effects as those of the second embodiment.

[0059] Furthermore, in the above embodiment, the temperature sensor 60 is located in a region where the lead frame 40 overlaps with the power semiconductor element 20 in the stacking direction L, but this configuration is not limited to this. At least a portion of the temperature sensor 60 may be located in a region where the lead frame 40 overlaps with the power semiconductor element 20 in the stacking direction L. Even in this case, the effects described in the above embodiment can be achieved.

[0060] In addition, in the above embodiment, copper clips are used for the lead frame 40, but the present invention is not limited to copper clips. Any conductor may be used for the lead frame 40 as long as at least the insulating substrate 50 can be in contact with the lead frame 40 and the temperature sensor 60 can stably measure the temperature of the power semiconductor element 20 on the insulating substrate 50.

[0061] Furthermore, in the above embodiment, a flat insulating substrate 50 is used, but the shape is not limited to a flat plate. Any shape of insulating member may be used as long as it is at least thermally conductively connected to the lead frame 40 and the temperature sensor 60, electrically insulates the lead frame 40 from the temperature sensor 60, and enables the temperature sensor 60 to stably measure the temperature of the power semiconductor element 20.

[0062] In the above embodiment, the semiconductor device 1 is used in a power conversion circuit of an inverter, but is not limited to such a power conversion circuit. The semiconductor device 1 may also constitute a part of a power conversion circuit of a converter that receives AC current as input and outputs DC current, or a boost circuit of a regulator that changes the voltage of DC current.

[0063] [Note] The semiconductor device described in the above embodiment can be understood, for example, as follows.

[0064] (1) A semiconductor device 1 according to a first aspect includes a substrate body 11 having a first surface 11a and a second surface 11b that is back-to-back with the first surface 11a, a power semiconductor element 20 mounted on the first surface 11a, a cooler 30 that contacts the second surface 11b, and a temperature sensor 60 that measures the temperature of the power semiconductor element 20, wherein the temperature sensor 60 is provided on a first side of the substrate body 11 on which the power semiconductor element 20 is mounted, and is provided at a position farther away from the first surface 11a of the substrate body 11 than the power semiconductor element 20.

[0065] As a result, the heat conducted from the power semiconductor element 20 to the temperature sensor 60 is not affected by heat dissipation in the in-plane direction A of the substrate 10 on which the power semiconductor element 20 is mounted. Therefore, even if, for example, the performance of the cooler 30 is improved and the heat dissipation in the in-plane direction A of the substrate 10 is reduced, it is possible to prevent a decrease in the measurement accuracy of the temperature sensor 60.

[0066] (2) The semiconductor device 1 according to the second aspect may be the semiconductor device 1 of (1), further comprising a lead frame 40 connected to the power semiconductor element 20, and an insulating member that is thermally conductively connected to the lead frame 40 and the temperature sensor 60 and electrically insulates the lead frame 40 from the temperature sensor 60.

[0067] As a result, the temperature sensor 60 does not affect the circuits related to the input and output of the power semiconductor element 20. Therefore, the degree of freedom in circuit design of the power semiconductor element 20 is not reduced.

[0068] (3) The semiconductor device 1 according to the third aspect is the semiconductor device 1 of (2), wherein a plurality of the power semiconductor elements 20 are mounted on the first surface 11a of the substrate body 11, and the lead frame 40 may extend across and be connected to the plurality of the power semiconductor elements 20.

[0069] This allows the temperature sensor 60 to collectively measure the temperatures of the multiple power semiconductor elements 20. Therefore, even if an abnormality occurs in which the temperature of any of the power semiconductor elements 20 rises excessively, the power semiconductor elements 20 can be protected from overheating based on the measurement value of the temperature sensor 60.

[0070] (4) The semiconductor device 1 according to the fourth aspect is the semiconductor device 1 of (2) or (3), and in the stacking direction L in which the substrate body 11 and the power semiconductor element 20 are stacked, at least a portion of the temperature sensor 60 may be located in an area where the lead frame 40 overlaps with the power semiconductor element 20.

[0071] As a result, the temperature sensor 60 is located at a location where the heat generated in the power semiconductor element 20 is conducted without loss. Therefore, the temperature measured by the temperature sensor 60 can be made closer to the actual temperature of the power semiconductor element 20.

[0072] (5) The semiconductor device 1 according to the fifth aspect is any one of the semiconductor devices 1 of (1) to (4), wherein the cooler 30 may have a base 31 in contact with the second surface 11b of the substrate body 11 and a heat dissipation fin 32 extending from the base 31.

[0073] As a result, the cooler 30 does not cool the location measured by the temperature sensor 60. Therefore, the power semiconductor element 20 can be cooled without affecting the measured value of the temperature sensor 60. [Explanation of symbols]

[0074] REFERENCE SIGNS LIST 1...Semiconductor device 10...Substrate 11...Substrate body 11a...First surface 11b...Second surface 20...Power semiconductor element 20a...Output surface 20b...Input surface 30...Cooler 31...Base 31a...Joint surface 31b...Fin surface 32...Heat dissipation fin 40...Lead frame 50...Insulating substrate 51...Insulating substrate body 51a...Sensor mounting surface 51b...Insulating surface 60...Temperature sensor 70...Control wire A...In-plane direction Cb...Joint pattern Ci...Input circuit Cn...Control circuit Co...Output circuit L...Stacking direction S...Joint material W...Flow of refrigerant

Claims

1. a substrate body having a first surface and a second surface facing back to back with the first surface; a power semiconductor element mounted on the first surface; a cooler in contact with the second surface; a lead frame connected to a surface of the power semiconductor element opposite to the substrate body; a temperature sensor located on the lead frame opposite to the power semiconductor element, and located in a region where the lead frame overlaps with the power semiconductor element in a stacking direction in which the substrate body and the power semiconductor element are stacked; an insulating member provided between the lead frame and the temperature sensor, connecting the lead frame and the temperature sensor in a thermally conductive manner and electrically insulating the lead frame and the temperature sensor; Equipped with The lead frame is not connected to the cooler.

2. a plurality of the power semiconductor elements are mounted on the first surface of the substrate body; The semiconductor device according to claim 1 , wherein the lead frame extends across and is connected to a plurality of the power semiconductor elements.

3. The semiconductor device according to claim 1 , wherein the cooler has a base portion in contact with the second surface of the substrate body, and heat dissipation fins extending from the base portion.

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