Cover tape for packaging electronic components and packaging body

Abstract

The present disclosure provides a cover tape for use in packaging an electronic component, the cover tape comprising: a base material layer; a heat-seal layer disposed on one surface side of the base material layer; and an intermediate layer disposed between the base material layer and the heat-seal layer. The cover tape for use in packaging an electronic component has a void area proportion of at most 10% as calculated from an image observed from the heat-seal layer side thereof.

Description

[Technical Field]

[0001] The present disclosure relates to a cover tape for packaging electronic components and a package using the same. [Background technology]

[0002] In recent years, electronic components such as ICs, resistors, transistors, diodes, capacitors, and piezoelectric resistors have been packaged in tape for surface mounting. In tape packaging, electronic components are housed in a carrier tape with multiple compartments for housing the components, and then the carrier tape is heat-sealed with a cover tape to obtain a package for storing and transporting the electronic components. When mounting the electronic components, the cover tape is peeled off the carrier tape, and the electronic components are automatically removed and surface-mounted on a board. The cover tape is also called top tape.

[0003] When the tape package is unopened, the electronic components contained therein are visually or mechanically inspected through the cover tape. Therefore, the cover tape must have excellent visibility, and various cover tapes for packaging electronic components have been proposed that focus on the haze value and total light transmittance as indicators of visibility (for example, Patent Documents 1 and 2). [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2003-155090 [Patent Document 2] Japanese Patent Application Laid-Open No. 2005-096852 Summary of the Invention [Problem to be solved by the invention]

[0005] However, in recent years, electronic components stored in the storage containers have become smaller, and there are cases where it is necessary to check the orientation of such small electronic components visually or mechanically. In such cases, even if a cover tape for packaging electronic components having a good haze value or total light transmittance as an index of visibility as described above is used, it may not be sufficient.

[0006] The present disclosure has been made in view of the above circumstances, and has an object to provide a cover tape for packaging electronic components that provides excellent visibility of the electronic components. [Means for solving the problem]

[0007] One embodiment of the present disclosure is a cover tape for packaging electronic components, comprising a base material layer, a heat seal layer disposed on one side of the base material layer, and an intermediate layer disposed between the base material layer and the heat seal layer, wherein the cover tape for packaging electronic components has a void area ratio of 10% or less as calculated from an image observed from the heat seal layer side of the cover tape for packaging electronic components.

[0008] One embodiment of the present disclosure is a packaging body comprising a carrier tape having a plurality of storage sections for storing electronic components, the electronic components stored in the storage sections, and the above-mentioned cover tape for packaging electronic components arranged to cover the storage sections. [Effects of the Invention]

[0009] The present disclosure has an effect of providing a cover tape for packaging electronic components that provides excellent visibility of the electronic components. [Brief explanation of the drawings]

[0010] [Figure 1] 1 is a schematic cross-sectional view illustrating a cover tape for packaging electronic components according to the present disclosure. [Figure 2] 1A and 1B are schematic plan and cross-sectional views illustrating a packaging body of the present disclosure. [Figure 3]1 is a schematic cross-sectional view illustrating a cover tape for packaging electronic components according to the present disclosure. [Figure 4] 1 shows stereomicroscopic images and binarized images of the cover tapes of Example 2 and Comparative Example 1 observed from the heat seal layer side. [Figure 5] 3 is a partially enlarged view of the interface between the intermediate layer and the heat seal layer of the cover tape for packaging electronic components of the present disclosure. FIG. [Figure 6] FIG. 1 is a partially enlarged view of the interface between the intermediate layer and the heat seal layer of a conventional cover tape for packaging electronic components. [Figure 7] 1 is a photograph of the edge of a storage section of a package using a conventional cover tape, taken through the cover tape. DETAILED DESCRIPTION OF THE INVENTION

[0011] Embodiments of the present disclosure will be described below with reference to the drawings and the like. However, the present disclosure can be implemented in many different forms, and should not be construed as being limited to the description of the embodiments exemplified below. Furthermore, to clarify the explanation, the drawings may schematically depict the width, thickness, shape, etc. of each part compared to the actual form, but these are merely examples and are not intended to limit the interpretation of the present disclosure. Furthermore, in this specification and each drawing, elements similar to those previously described with reference to the preceding drawings will be designated by the same reference numerals, and detailed descriptions may be omitted as appropriate.

[0012] In this specification, when describing a mode in which another component is placed on a certain component, the terms "above" or "below" are used, unless otherwise specified, to include both a case in which another component is placed directly above or below a certain component so as to be in contact with the component, and a case in which another component is placed above or below a certain component with another component interposed therebetween. Also, in this specification, when describing a mode in which another component is placed on the surface of a certain component, the terms "on the surface side" or "on the surface" are used, unless otherwise specified, to include both a case in which another component is placed directly above or below a certain component so as to be in contact with the component, and a case in which another component is placed above or below a certain component with another component interposed therebetween.

[0013] The cover tape for packaging electronic components and the package according to the present disclosure will be described in detail below. In this specification, the "cover tape for packaging electronic components" may be simply referred to as the "cover tape."

[0014] A. Cover tape for packaging electronic components The cover tape for packaging electronic components of this embodiment is a cover tape for packaging electronic components having a base material layer, a heat seal layer arranged on one side of the base material layer, and an intermediate layer arranged between the base material layer and the heat seal layer, and the void area ratio calculated from an image of the cover tape for packaging electronic components observed from the heat seal layer side is 10% or less.

[0015] The cover tape of the present disclosure will be described with reference to the drawings. FIG. 1 is a schematic cross-sectional view showing an example of a cover tape of the present disclosure. As shown in FIG. 1, the cover tape 1 of the present disclosure has a base layer 2, a heat seal layer 3 disposed on one side of the base layer 2, and an intermediate layer 4 disposed between the base layer 2 and the heat seal layer 3. Furthermore, as shown in FIG. 3, an antistatic layer 5 may be disposed on the side of the base layer 2 opposite the side on which the heat seal layer 3 is disposed. The cover tape 1 of the present disclosure has a void area ratio of 10% or less obtained from an image observed from the heat seal layer 3 side. In FIG. 1, the observation direction when acquiring the image is indicated by D.

[0016] 2(a) and 2(b) are a schematic plan view and a cross-sectional view showing an example of a package using the cover tape for packaging electronic components according to the present disclosure, and FIG. 2(b) is a cross-sectional view taken along line AA in FIG. 2(a). As shown in FIGS. 2(a) and 2(b), the package 10 includes a carrier tape 11 having multiple storage compartments 12 for storing electronic components 13, the electronic components 13 stored in the storage compartments 12, and a cover tape 1 arranged to cover the storage compartments 12. The cover tape 1 is heat-sealed to the carrier tape 11, and heat-sealed portions 3h are formed in lines of a predetermined width on both ends of the heat-seal layer 3 of the cover tape 1. In addition, in the package 10, the carrier tape 11 has feed holes 14.

[0017] In the manufacturing process of conventional cover tapes for packaging electronic components, a method for laminating an intermediate layer onto a substrate layer includes, for example, extruding a heat-molten film (intermediate layer) raw material onto the substrate layer using a T-die or the like, and then pressing the intermediate layer onto the substrate layer using a chill roll (extrusion lamination). In this process, a chill roll with a certain degree of surface roughness (e.g., arithmetic mean roughness Ra ≥ 2.0 μm) must be used to peel the intermediate layer from the chill roll and ensure adhesion to the substrate layer. Figure 6 shows a partially enlarged view of the interface between the intermediate layer 24 and the heat seal layer 23 of a conventional cover tape for packaging electronic components.

[0018] The inventors discovered that in the manufacturing process of conventional cover tapes for packaging electronic components, a cooling roll with a certain degree of surface roughness is used to form an intermediate layer on one side of a base layer. This results in a rough surface on the heat seal layer 23 side of the intermediate layer 24, resulting in the formation of voids X between the intermediate layer 24 and the heat seal layer 23, as shown in FIG. 6. Furthermore, they discovered that when the electronic component is observed through the cover tape (from the base layer side of the cover tape), these voids appear as white spots, impairing the visibility of the electronic component. FIG. 7 shows the edge of a photograph of a storage compartment of a package using a conventional cover tape, taken through the cover tape. Reference numeral 40 denotes the carrier tape, 41 denotes the storage compartment, and 42 denotes the electronic component. The white spots impair the visibility of the electronic component.

[0019] When the white spots occur, they obstruct the view of the spotted areas, which has a very negative effect on the visibility of electronic components using machines, etc. This is a different type of problem from the negative effect of high haze, which makes objects appear blurry.

[0020] Furthermore, although the area and amount of the white spots are somewhat correlated with the total light transmittance and haze, they tend to show different trends depending on the conditions. Therefore, by measuring only the total light transmittance and haze, it is not possible to obtain a cover tape for packaging electronic components with good visibility.

[0021] Therefore, the inventors focused on the void area ratio calculated from an image observed from the heat seal layer side of the cover tape and found that if the void area ratio is below a certain value, the visibility of the electronic components will be good.

[0022] 5 shows a partially enlarged view of the interface between the intermediate layer and the heat seal layer of the cover tape for packaging electronic components according to the present disclosure. The cover tape for packaging electronic components according to the present disclosure reduces the gap between the heat seal layer 3 and the intermediate layer 4. Therefore, when the electronic components are observed through the cover tape (when observed from the base layer side of the cover tape), deterioration of the visibility of the electronic components due to white spots can be suppressed, and the visibility of the electronic components is improved.

[0023] The cover tape in the present disclosure has a void area ratio of 10% or less as calculated from an image observed from the heat seal layer side. In the present disclosure, the "void area ratio" is determined as follows. Observation images were taken from the heat seal layer side of the cover tape using an optical microscope (Nikon ECLIPSE ME600). Next, the image was binarized using image analysis software (Win ROOF ver. 7.4.5 (Mitani Corporation)), the void areas were selected, and the percentage (%) of the total void area in the analyzed area was calculated. Since the resin has a higher refractive index than air (voids), it has a high reflectivity and is treated as a non-void area. The image acquisition conditions and image analysis conditions can be the same as those in the Examples described below.

[0024] The cover tape according to the present disclosure has a void area ratio calculated from an image observed from the heat seal layer side of preferably 8.0% or less, more preferably 7.5% or less, and particularly preferably 5.0% or less, while it may be, for example, 1.0% or more, or 2.0% or more.

[0025] A plurality of voids are usually observed in the binarized image. The size of the voids is, for example, 100 μm or less, preferably 30 μm or less. If the size of the voids is larger than the above, they may overlap with the characters printed on the chip or part of the chip electrode portion, which will reduce the visibility of the printing and electrodes. The size of the voids refers to the average of three measurements of the longest length connecting any two points on the periphery of the voids. In other words, if the size is less than the above value, the cover tape will have even better visibility.

[0026] The density of the voids is, for example, 0.1 voids / 100 μm 2 or less, and preferably 0.01 voids / 100 μm 2 or less. If the density is less than this value, the cover tape will have even better visibility.

[0027] A cover tape having a void area ratio within the above range can be obtained by adjusting the roughness of the surface of the intermediate layer on the heat-seal layer side, as described below. Specifically, when forming the intermediate layer, a cooling roll with a small arithmetic mean roughness Ra or maximum height roughness Rz is used, and the arithmetic mean roughness Ra or maximum height roughness Rz of the surface of the intermediate layer on the heat-seal layer side can be reduced, thereby reducing the void area ratio. In addition, as described below, a cover tape having a void area ratio within the above range can also be obtained by selecting the material of the heat-seal layer or the material of the intermediate layer. In the present disclosure, the method of adjusting the roughness of the surface of the intermediate layer on the heat seal layer side is particularly preferred, because the void area ratio can be reduced relatively easily by changing the design of the cooling roll.

[0028] I. Heat-seal layer The heat seal layer in the present disclosure is a layer disposed on one side of the base layer, and when a package is produced using the cover tape of the present disclosure, the heat seal layer is heat-sealed to the carrier tape to bond the cover tape and the carrier tape together.

[0029] (a) Material The heat seal layer contains a thermoplastic resin, and examples of the thermoplastic resin include ethylene-vinyl acetate copolymer, acrylic resin, ethylene-acrylic acid copolymer, acrylic-styrene copolymer, polyester resin, polyurethane resin, and vinyl chloride-vinyl acetate copolymer, or resins containing any of these as the main component.

[0030] Among these, the softening point of the thermoplastic resin is preferably 80°C or lower, and particularly preferably 70°C or lower. If the softening point is lower than the above value, the resin has high fluidity when the heat seal layer is laminated onto the intermediate layer by extrusion lamination, allowing the heat seal layer to be laminated so as to conform to the irregularities on the surface of the intermediate layer. This makes it possible to suppress the occurrence of voids. On the other hand, the softening point of the thermoplastic resin may be 30°C or higher, or 40°C or higher.

[0031] The softening point of the heat seal material used in the heat seal layer is preferably 80° C. or lower, particularly preferably 70° C. or lower. On the other hand, the softening point of the heat seal material may be 30° C. or higher, or may be 40° C. or higher.

[0032] Furthermore, the thermoplastic resin preferably has a melt mass flow rate (MFR) of 5 g / 10 min or more, more preferably 20 g / 10 min or more. If the thermoplastic resin has an MFR within the above range, it will easily flow into the irregularities on the surface of the intermediate layer, allowing the heat seal layer to be laminated so as to conform to the irregularities on the surface of the intermediate layer, thereby preventing the occurrence of voids. On the other hand, the melt mass flow rate (MFR) may be 120 g / 10 min or less, or 80 g / 10 min or less. In this specification, MFR refers to a value measured in accordance with JIS K7210:2014 at 190°C under a load of 2.16 kg.

[0033] The melt mass flow rate (MFR) of the heat seal material forming the heat seal layer is preferably 5 g / 10 min or more, more preferably 20 g / 10 min or more, while the melt mass flow rate (MFR) of the heat seal material may be 120 g / 10 min or less, or may be 80 g / 10 min or less.

[0034] In the present disclosure, the thermoplastic resin preferably contains an ethylene-vinyl acetate copolymer. When the heat seal layer contains an ethylene-vinyl acetate copolymer, the heat sealability to the carrier tape is improved. Therefore, unintended peeling during transportation, storage, etc. can be suppressed.

[0035] In the present disclosure, an ethylene-vinyl acetate copolymer is a copolymer containing at least an ethylene monomer unit and a vinyl acetate monomer unit. An ethylene monomer unit refers to a structural unit derived from an ethylene monomer, and a vinyl acetate monomer unit refers to a structural unit derived from a vinyl acetate monomer. The ethylene content in the ethylene-vinyl acetate copolymer is not particularly limited, but is preferably 65% ​​by mass or more and 98% by mass or less. This is because the softening point can be adjusted to the above range. The vinyl acetate content in the ethylene-vinyl acetate copolymer is not particularly limited, but is preferably 2% by mass or more and 35% by mass or less. This is because the softening point can be adjusted to the above range.

[0036] The ethylene-vinyl acetate copolymer may contain a third monomer unit in addition to the ethylene monomer unit and the vinyl acetate monomer unit. The third monomer unit may contain a functional group having antistatic properties.

[0037] The number average molecular weight of the ethylene-vinyl acetate copolymer is not particularly limited, but is preferably 50,000 or more and 500,000 or less, because the melt mass flow rate (MFR) can be adjusted to fall within the above range.

[0038] The content of the ethylene-vinyl acetate copolymer in the heat seal layer is not particularly limited, but can be 50% by mass to 90% by mass, or 60% by mass to 80% by mass. Increasing the content of the ethylene-vinyl acetate copolymer improves the heat seal performance, but tends to increase the surface tackiness.

[0039] When the heat seal layer of the present disclosure contains an ethylene-vinyl acetate copolymer, it is preferable that the heat seal layer further contains a polyethylene resin, which can reduce surface tackiness while maintaining good heat sealability and suppress deterioration after exposure to high humidity and heat.

[0040] Examples of polyethylene include various polyethylenes such as low-density polyethylene, linear low-density polyethylene, medium-density polyethylene, and high-density polyethylene. Low-density polyethylene (LDPE, density 0.910 to less than 0.930) and linear low-density polyethylene (LLDPE, density 0.910 to 0.925) are preferably used because they have superior dispersibility.

[0041] In the present disclosure, the classification of various polyethylenes refers to those defined in the old JIS K6748:1995 and JIS K6899-1:2000. The content of polyethylene in the heat seal layer is preferably 10% by mass or more and 50% by mass or less, and more preferably 20% by mass or more and 40% by mass or less. Increasing the polyethylene content reduces heat sealability, but tends to reduce surface tack.

[0042] The heat seal layer may contain additives such as a tackifier, an antistatic agent, an antiblocking agent, a dispersant, a filler, a plasticizer, and a colorant, as required.

[0043] (b) Thickness The thickness of the heat seal layer is not particularly limited and can be, for example, 1 μm to 30 μm, preferably 10 μm to 20 μm. A thickness within the above range is preferable because it is easy to adjust the void area ratio within the above range. Furthermore, if the thickness of the heat seal layer is too thin, the sealing properties may be poor and a uniform film may not be obtained. If the heat seal layer is too thick, the transparency of the cover tape may be reduced, and the increased stress in the single heat seal layer may cause a deterioration (increase) in tackiness regardless of the surface roughness shape of the intermediate layer.

[0044] (c) Surface roughness As described above, a cover tape with a void area ratio of 10% or less can be obtained by reducing the roughness of the surface of the intermediate layer on the heat seal layer side. However, reducing the roughness of the surface of the intermediate layer on the heat seal layer side may also reduce the surface roughness of the cover tape on the heat seal layer side. In particular, if the arithmetic mean roughness Ra of the surface on the heat seal layer side of the cover tape is too small, electronic components stored in the storage section of the carrier tape may adhere to the surface on the heat seal layer side of the cover tape, resulting in mounting defects. Therefore, from the perspective of preventing mounting defects, the arithmetic mean roughness Ra of the surface on the heat seal layer side of the cover tape is preferably 0.3 μm or more, more preferably 0.4 μm or more. Here, "the surface of the intermediate layer facing the heat seal layer" refers to surface A of intermediate layer 4 that contacts heat seal layer 3 in Figure 1, and "the surface of the cover tape facing the heat seal layer" refers to surface B of heat seal layer 3 on the opposite side from intermediate layer 4 in Figure 1.

[0045] On the other hand, the arithmetic mean roughness Ra of the surface on the heat seal layer side of the cover tape is preferably 0.7 μm or less, and more preferably 0.6 μm or less. This is because the haze value can be reduced. The arithmetic mean roughness Ra is a value measured using a small surface roughness measuring instrument, Surftest SJ-210 (manufactured by Mitutoyo Corporation), in accordance with JIS B 0601-2001. The test conditions and test procedures can be those described in the Examples below.

[0046] Thus, if the cover tape has a void area ratio of 10% or less and the arithmetic mean roughness Ra of the surface on the heat seal layer side of the cover tape is 0.3 μm or more and 0.7 μm or less, the cover tape will be able to suppress mounting defects while maintaining good visibility.

[0047] The surface roughness in maximum height Rz of the heat seal layer side of the cover tape according to the present disclosure is, for example, 2 μm or more, preferably 3 μm or more, while the surface roughness in maximum height Rz is, for example, 10 μm or less, preferably 7 μm or less.

[0048] (d) Heat seal layer forming method The method for forming the heat seal layer is not particularly limited, and known methods can be used. For example, a method (extrusion lamination method) can be used in which a heat-molten film raw material is extruded onto the intermediate layer using a T-die or the like, rapidly cooled and solidified using a cooling roll, and then pressure-bonded to the intermediate layer. Another example is a method in which a pre-manufactured film is bonded to the intermediate layer using an adhesive. Examples of adhesives that can be used include polyester-based adhesives, polyurethane-based adhesives, and acrylic-based adhesives.

[0049] The surface roughness of the cooling roll used to form the heat seal layer is not particularly limited, and the arithmetic mean roughness Ra is, for example, 1.5 μm or less, preferably 1.0 μm or less, and more preferably 0.7 μm or less. The arithmetic mean roughness Ra is, for example, 0.2 μm or more, or may be 0.3 μm or more, or may be 0.4 μm or more. The maximum height roughness Rz is, for example, 13 μm or less, preferably 10 μm or less, and more preferably 7 μm or less. The maximum height roughness Rz may be, for example, 1.5 μm or more, or may be 2.5 μm or more.

[0050] Another method for forming the heat seal layer includes, for example, using a composition for a heat seal layer in which a thermoplastic resin, an antistatic agent, and other additives are dispersed or dissolved in a solvent, applying the composition for a heat seal layer to the surface of the intermediate layer (described below) opposite the base layer, and drying the composition. Examples of methods for applying the composition for a heat seal layer include known application methods such as roll coating, reverse roll coating, gravure coating, gravure reverse coating, comma coating, bar coating, wire bar coating, rod coating, kiss coating, knife coating, die coating, flow coating, dip coating, and spray coating.

[0051] II. Middle class The intermediate layer of the present disclosure is disposed between the substrate layer and the heat seal layer. The intermediate layer can improve the adhesion between the substrate layer and the heat seal layer. Furthermore, the intermediate layer can improve cushioning when heat sealing the cover tape of the present disclosure to the carrier tape, thereby allowing heat to be applied more uniformly to the heat seal layer.

[0052] In the present disclosure, the void area ratio can be adjusted to fall within the above range by adjusting the roughness of the surface of the intermediate layer on the heat seal layer side. Specifically, the arithmetic mean roughness Ra of the surface of the intermediate layer facing the heat seal layer is, for example, 2.0 μm or less, preferably 1.5 μm or less, and more preferably 0.5 μm or less. If it is less than the above value, the void area ratio can be adjusted to the above range. On the other hand, the arithmetic mean roughness Ra of the surface of the intermediate layer facing the heat seal layer is, for example, 0.2 μm or more, preferably 0.25 μm or more. This is because sufficient adhesion to the substrate is achieved.

[0053] Furthermore, the maximum height roughness Rz of the surface of the intermediate layer facing the heat seal layer is, for example, 14.0 μm or less, preferably 10.0 μm or less, and more preferably 5.0 μm or less. If it is less than the above value, the void area ratio can be adjusted to the above range. On the other hand, the maximum height roughness Rz of the surface of the intermediate layer facing the heat seal layer is, for example, 1.5 μm or more, preferably 3.0 μm or more. This is because sufficient adhesion to the substrate is achieved. The roughness of the intermediate layer depends on the surface roughness of the cooling roll used for extrusion lamination when forming the intermediate layer. Therefore, by adjusting the surface roughness of the cooling roll when forming the intermediate layer, a cover tape having the above void area ratio can be obtained.

[0054] The surface roughness of the cooling roll used to form the intermediate layer is, for example, 2.0 μm or less in arithmetic mean roughness Ra, preferably 1.5 μm or less, and more preferably 0.5 μm or less. The arithmetic mean roughness Ra may be, for example, 0.2 μm or more, and may be 0.25 μm or more. The maximum height roughness Rz may be, for example, 14.0 μm or less, preferably 10.0 μm or less, and more preferably 5.0 μm or less. The maximum height roughness Rz may be, for example, 1.0 μm or more, and may be 3.0 μm or more.

[0055] The resin material used for the intermediate layer can be appropriately selected depending on the materials of the base layer and the heat seal layer, and examples thereof include polyolefins such as polyethylene and polypropylene, polyurethanes, and polyesters.

[0056] The resin material used for the intermediate layer preferably has a softening point of 70° C. or higher, particularly 90° C. or higher. If the softening point is higher than this range, the resin hardens before being shaped into the irregularities of the cooling roll, thereby reducing the irregularities and enabling the reduction of voids between the heat seal layer and the intermediate layer.

[0057] The thickness of the intermediate layer can be, for example, 5 μm or more and 50 μm or less. A film can be used as the intermediate layer. In this case, the lamination method for the substrate layer and the intermediate layer is not particularly limited, and known methods can be used. For example, a method (extrusion lamination) can be used in which a heat-molten film raw material is extruded onto the substrate layer using a T-die or the like, rapidly cooled and solidified using the cooling roll, and then pressure-bonded to the substrate layer. This results in the formation of an intermediate layer on one side of the substrate layer. It is preferable that an anchor coat layer is formed in advance on the surface of the substrate layer on which the intermediate layer will be disposed. Another method is to bond a pre-manufactured film to the substrate layer with an adhesive. In the present disclosure, the former method is preferred. This is because adjusting the surface roughness of the cooling roll makes it easy to adjust the roughness of the surface of the intermediate layer on the heat-seal layer side.

[0058] III. Base material layer The substrate layer in the present disclosure is a layer that supports the intermediate layer, heat seal layer, and antistatic layer described below. Various materials can be used for the substrate layer as long as they have the mechanical strength to withstand external forces during storage and transportation, and the heat resistance to withstand manufacturing and taping packaging. Examples of such materials include polyester, polyamide, and polyolefin. Examples of polyesters include polyethylene terephthalate, polybutylene terephthalate, polyethylene naphthalate, polyethylene terephthalate-isophthalate copolymer, and terephthalic acid-cyclohexanedimethanol-ethylene glycol copolymer. Examples of polyamides include nylon 6, nylon 66, and nylon 610. Examples of polyolefins include polyethylene, polypropylene, and polymethylpentene. Among these, polyesters such as polyethylene terephthalate and polyethylene naphthalate are preferred due to their cost and mechanical strength.

[0059] The substrate layer may contain additives such as fillers, plasticizers, colorants, and antistatic agents as needed. The substrate layer may be a single layer or a laminate of multiple layers of the same or different types. The substrate layer may be a stretched film or an unstretched film. In particular, the substrate layer may be a film that has been stretched uniaxially or biaxially to improve its strength.

[0060] The thickness of the substrate layer can be, for example, 2.5 μm to 300 μm, or 6 μm to 100 μm, or 12 μm to 50 μm. If the substrate layer is too thick, the rigidity during tape packaging increases, which is disadvantageous in terms of handling and cost. On the other hand, if the substrate layer is too thin, the mechanical strength may be insufficient.

[0061] IV. Cover tape (1) Haze value The cover tape according to the present disclosure, which is formed by laminating the above-mentioned layers, preferably has a haze value of 70% or less, and particularly preferably 60% or less.

[0062] (2) Total light transmittance The cover tape according to the present disclosure preferably has a total light transmittance of 80% or more, particularly preferably 85% or more, in the cover tape formed by laminating the above-mentioned layers.

[0063] In the present disclosure, the total light transmittance and haze value are values ​​measured using a haze meter NDH 7000 (manufactured by Nippon Denshoku Industries Co., Ltd.) in accordance with JIS-K-7361 and JIS-K-7136:2000, respectively.

[0064] A cover tape having such optical properties will have better visibility. Furthermore, as mentioned above, even if only the haze value and total light transmittance are used as indicators of visibility, there is not much correlation with the number of white spots caused by the voids between the intermediate layer and the heat seal layer, so it is not possible to suppress the occurrence of reduced visibility caused by white spots, and it is not possible to produce a cover tape that provides excellent visibility.

[0065] (3) Width and length The width and length of the cover tape of the present disclosure can be appropriately set depending on the width and length of the carrier tape. For example, the width of the cover tape may be approximately 1 mm to 100 mm, and may be 5.25 mm to 5.5 mm. The length may be approximately 100 m to 10,000 m. The cover tape of the present disclosure is usually stored in a rolled state before use (before being heat-sealed to the carrier tape).

[0066] V. Other components (1) Antistatic layer In the present disclosure, an antistatic layer is preferably disposed on the surface of the base layer opposite the surface on the intermediate layer side. The antistatic layer is disposed on the surface of the base layer opposite the surface on the intermediate layer side and is a layer for preventing the cover tape from being charged. The presence of the antistatic layer can suppress chip damage and mounting defects due to static electricity caused by peeling electrification when the cover tape is peeled from the carrier tape, prevent static electricity from being generated by contact with other surfaces, and prevent static electricity from being charged and causing dirt, dust, etc. to adhere to the surface of the cover tape.

[0067] The antistatic layer can be formed by coating the substrate layer with an antistatic agent. Examples of antistatic agents include conductive polymers, such as polythiophene, polyaniline, polypyrrole, polyacetylene, polyparaphenylene, polyphenylene vinylene, and polyvinyl carbazole. Among these, the conductive polymer is preferably one or more selected from the group consisting of polythiophene, polyaniline, and polypyrrole. This is because sufficient antistatic properties and transparency independent of humidity can be obtained. A preferred example of polythiophene is PEDOT / PSS (poly(3,4-ethylenedioxythiophene / polystyrene sulfonic acid)). A preferred example of polyaniline is sulfonated polyaniline. An antistatic layer containing the above-mentioned conductive polymer is preferable because it can achieve low surface resistivity even with a thin thickness. A thin antistatic layer can improve the light transmittance of the cover tape. Furthermore, a thin antistatic layer can reduce the light absorption rate of the cover tape, thereby improving the visibility of the cover tape.

[0068] The antistatic layer of the present disclosure may also exhibit antistatic properties by including an antistatic agent other than a conductive polymer. Examples of antistatic agents other than conductive polymers include polymeric surfactants and low-molecular-weight surfactants. These surfactants are available in nonionic, cationic, and anionic types. Cationic polymeric surfactants are preferred from the viewpoints of antistatic performance and coatability, while nonionic low-molecular-weight surfactants are preferred from the viewpoints of cost, optical properties, and ink production. Polymeric quaternary ammonium salts are preferred as cationic polymeric surfactants. The counter anion of the quaternary ammonium salt is not particularly limited, and examples include halogen ions and sulfide ions. Aryl or alkyl groups are present at the first to third positions of the ammonium. While not particularly limited, a carbon number of six or less is preferred from the viewpoint of solubility. The main chain of the polymeric quaternary ammonium salt is preferably an acrylic main chain from the viewpoints of transparency and substrate adhesion. The antistatic layer may also contain a resin. The nonionic low-molecular-weight surfactant is not particularly limited, but is preferably a fatty acid ester type having 10 to 20 lipophilic groups, an ether type such as polyoxyethylene alkyl ether, an ester ether type, an alkanolamide type, an alkyl glycoside type, or an alkylamine type. Furthermore, to impart optical and mechanical properties to the coating film, an acrylic resin binder or a crosslinked acrylic resin binder may be included.

[0069] The antistatic layer may be formed, for example, by using a composition for an antistatic layer, in which an antistatic agent or the like is dispersed or dissolved in a solvent, applying the composition for an antistatic layer to the surface of the substrate layer opposite the intermediate layer, and then drying the composition. Examples of the method for applying the composition for an antistatic layer include known coating methods such as air doctor coating, blade coating, knife coating, rod coating, bar coating, direct roll coating, reverse roll coating, gravure coating, and slide coating.

[0070] The thickness of the antistatic layer can be, for example, 0.02 μm to 3 μm, and by making the antistatic layer of this thickness, it is possible to impart antistatic properties to the cover tape.

[0071] (2)Adhesive layer Furthermore, an adhesive layer may be provided between the substrate layer and the intermediate layer, or between the intermediate layer and the heat-sealing layer. By forming an adhesive layer, even if the substrate layer, intermediate layer, or heat-sealing layer has poor adhesive strength, the adhesion between the substrate layer and the intermediate layer, or between the intermediate layer and the heat-sealing layer, can be improved. The adhesive layer may be appropriately selected depending on the materials used for the substrate layer, intermediate layer, and heat-sealing layer, and is not particularly limited. The adhesive layer may be formed from a resin with good adhesive properties, such as an olefin-based, acrylic-based, isocyanate-based, urethane-based, or ester-based adhesive.

[0072] The adhesive can be applied by, but not limited to, gravure coating, roll coating, or the like.

[0073] The thickness of the adhesive layer can be adjusted as appropriate. For example, it may be set to 1 g / m to give the cover tape appropriate rigidity. 2 More than 10g / m 2 is preferably 2 g / m or less. 2 More than 5g / m 2 Less than 1g / m 2 If this is the case, the adhesive strength can be made uniform.

[0074] VI. Manufacturing method The method for producing the cover tape for packaging electronic components of the present disclosure is not particularly limited, but preferably includes an intermediate layer formation step in which the intermediate layer is formed on one side of the base layer by an extrusion lamination method using a cooling roll having a surface arithmetic mean roughness Ra of 2.0 μm or less, preferably 1.5 μm or less.

[0075] By including such an intermediate layer forming step, it is possible to reduce the gap between the heat seal layer and the intermediate layer, and to obtain a cover tape for packaging electronic components that has excellent visibility of the electronic components.

[0076] 1. Intermediate layer formation process The extrusion lamination method used in this process involves extruding the heat-molten raw material of the intermediate layer film onto the substrate layer using a T-die or the like, rapidly solidifying it with a cooling roll, and then bonding it to the substrate layer under pressure. This forms an intermediate layer on one side of the substrate layer. It is preferable to form an anchor coat layer in advance on the side of the substrate layer where the intermediate layer will be placed. The substrate layer and intermediate layer used in this process are described above in the sections "A. Cover tape for packaging electronic components III. Substrate layer" and "A. Cover tape for packaging electronic components II. Intermediate layer," respectively, and therefore will not be described here. The cooling roll used to form the intermediate layer is described above in the section "A. Cover tape for packaging electronic components II. Intermediate layer," and therefore will not be described here.

[0077] 2. Other processes The method for producing the cover tape for packaging electronic components of the present disclosure typically includes a heat-seal layer forming step. The heat-seal layer forming step can be carried out by an extrusion lamination method in which the raw material for the heat-seal layer film is extruded onto the intermediate layer using a T-die or the like, rapidly cooled and solidified using a cooling roll, and then pressure-bonded to the intermediate layer. The heat-seal layer in this step is described above in the section "A. Cover tape for packaging electronic components I. Heat-seal layer," so a detailed description is omitted here.

[0078] B. Packaging The packaging body of the present disclosure comprises a carrier tape having a plurality of storage sections for storing electronic components, the electronic components stored in the storage sections, and the above-mentioned cover tape arranged to cover the storage sections.

[0079] A package using the cover tape of the present disclosure improves the visibility of electronic components when the electronic components are inspected visually or mechanically through the cover tape.

[0080] 2(a) and 2(b) are a schematic plan view and a cross-sectional view showing an example of the packaging body of the present disclosure. Note that, as Figures 2(a) and 2(b) were described above in the section "A. Cover tape for packaging electronic components," their description will be omitted here.

[0081] Each configuration of the packaging body of the present disclosure will be described below.

[0082] 1. Cover tape The cover tape in this disclosure has been described above in the section "A. Cover tape for packaging electronic components," so a description thereof will be omitted here.

[0083] In the package of the present disclosure, the heat seal layer of the cover tape and the carrier tape are bonded together by a heat seal portion. The heat seal portion can be located, for example, in a portion of the area where the heat seal layer of the cover tape contacts the carrier tape. That is, the heat seal layer may have a heat seal portion and a non-heat seal portion. This improves the peelability of the cover tape from the carrier tape.

[0084] 2. Carrier tape The carrier tape in the present disclosure is a member having a plurality of storage sections for storing electronic components.

[0085] The carrier tape may be any tape having a plurality of storage sections, and may be, for example, an embossed carrier tape (also called an embossed tape), a punched carrier tape (also called a punched tape), or a pressed carrier tape (also called a pressed tape). Of these, an embossed carrier tape is preferably used from the viewpoints of cost, formability, dimensional accuracy, etc.

[0086] Examples of materials for the carrier tape include plastics such as polyvinyl chloride, polystyrene, polyester, polypropylene, polycarbonate, polyacrylonitrile, and ABS resin, as well as paper, etc. In the present disclosure, paper refers to a material containing cellulose as its main component and may further contain a resin component.

[0087] The thickness of the carrier tape is appropriately selected depending on the material of the carrier tape, the thickness of the electronic components, etc. For example, the thickness of the carrier tape can be 30 μm or more and 1500 μm or less. If the carrier tape is too thick, moldability may be poor, and if the carrier tape is too thin, strength may be insufficient.

[0088] The carrier tape has a plurality of storage sections. The storage sections are usually arranged at predetermined intervals in the longitudinal direction of the carrier tape. The size, depth, pitch, etc. of the storage sections are appropriately adjusted depending on the size, thickness, etc. of the electronic components.

[0089] A general carrier tape molding method can be applied as a method for forming a carrier tape having a storage portion, and the method can be appropriately selected depending on the type and material of the carrier tape, etc. Examples include press molding, vacuum molding, pressure molding, punching, compression processing, etc.

[0090] 3. Electronic Components The electronic components used in the package of the present disclosure are not particularly limited, and examples thereof include ICs, resistors, capacitors, inductors, transistors, diodes, LEDs (light-emitting diodes), liquid crystals, piezoelectric element resistors, filters, quartz oscillators, quartz vibrators, connectors, switches, volumes, relays, etc. The type of IC is also not particularly limited.

[0091] 4.Packaging The package of the present disclosure is used for storing and transporting electronic components. The electronic components are stored and transported in the package and are then mounted. During mounting, the cover tape is peeled off, the electronic components stored in the carrier tape storage compartment are removed, and the components are mounted on a substrate or the like.

[0092] The present disclosure is not limited to the above-described embodiments. The above-described embodiments are merely examples, and any configuration that is substantially identical to the technical idea described in the claims of the present disclosure and that provides similar effects is included within the technical scope of the present disclosure. [Example]

[0093] The present disclosure will be described in more detail below with reference to examples and comparative examples. Example 1 A 23 μm-thick biaxially stretched polyethylene terephthalate film (FE2002, manufactured by Futamura Chemical Co., Ltd.; hereafter, PET film) was prepared as the substrate layer. An antistatic coating agent (Aracoat AS601D / CL910 (mass ratio) = 10 / 1, containing poly-3,4-ethylenedioxythiophene (PEDOT) as a conductive polymer and aziridine as a curing agent, manufactured by Arakawa Chemical Co., Ltd., solution solids concentration 1.5 wt%) was applied to one side of the PET film to form an antistatic layer (0.05 μm thick). A urethane anchor coating agent (Takenate A-3075 / Takelac A-3210 (mass ratio) = 3 / 1, diluted 5% with ethyl acetate) was applied to the side opposite the antistatic layer of the PET film (wet thickness 1 μm) to form an adhesive layer. Next, a polyethylene resin (Novatec LC600A, manufactured by Japan Polyethylene Corporation) was melted and extruded onto the PET film surface with the adhesive layer formed. A 15-μm-thick intermediate layer was formed by extrusion lamination using a chill roll with a surface having an arithmetic mean roughness Ra of 0.25 μm and a maximum height roughness Rz of 3.87 μm. The arithmetic mean roughness Ra and maximum height roughness Rz of the surface of the intermediate layer opposite the PET layer are shown in Table 1. Next, a heat-sealing material (softening point 48°C, MFR 28 g / 10 min) containing CMPS V8021 (manufactured by Mitsui Dow Polychemicals Co., Ltd.) and Elastmaster LL-10 (manufactured by Kao Corporation) in a 150:3 blend ratio (by weight) was melted and extruded onto the intermediate layer surface. A 15-μm-thick heat-sealing layer (HS layer) was formed by extrusion lamination using a chill roll with a surface having an arithmetic mean roughness Ra of 0.41 μm and a maximum height roughness Rz of 2.9 μm. The arithmetic mean roughness Ra and maximum height roughness Rz of the surface of the formed heat seal layer opposite to the intermediate layer side are shown in Table 1. In this way, a cover tape of Example 1 having a configuration of antistatic layer / substrate layer / adhesive layer / intermediate layer / heat seal layer was produced.

[0094] The arithmetic mean roughness Ra and maximum height roughness Rz are values ​​measured in accordance with JIS B 0601-2001 using a small surface roughness measuring instrument Surftest SJ-210 (manufactured by Mitutoyo Corporation) under the following test conditions and procedures.

[0095] (Test conditions) ·Standard JIS B 0601-2001 ·Curve: R Filter:GAUSS λc / λs: 2.5mm / 8μm Number of sections: x5 ·Measurement speed 0.5mm / s Measure a total of 5 points and calculate the average value

[0096] (Test procedure for surface roughness of the intermediate layer opposite the PET layer) The laminate obtained by laminating the intermediate layer to the substrate as described above was cut into a 50 mm x 20 mm sample. The sample was placed with the intermediate layer side facing up on a glass slide (76 x 26 mm, 0.8-1.0 mm thick) using 3M™ heat-resistant polyimide tape 7414, affixing it flat to the four corners or four sides of the sample without allowing the polyimide tape to extend beyond the glass slide. A small surface roughness tester and its scanning probe were placed horizontally on the sample surface. Under the above test conditions, the scanning probe was scanned across the film surface, and the arithmetic mean roughness (Ra) and maximum height roughness (Rz) values ​​of the roughness curve were obtained.

[0097] (Test procedure for surface roughness of heat seal layer side of cover tape) The cover tape obtained above was cut into a 50 mm x 20 mm sample. The heat-sealable side of the sample was placed facing up on a glass slide (76 x 26 mm, 0.8-1.0 mm thick) using 3M™ heat-resistant polyimide tape 7414. The polyimide tape was applied flat to the four corners or four sides of the sample, ensuring that it did not extend beyond the glass slide. A small surface roughness tester and its scanning probe were placed horizontally on the sample surface. Under the above test conditions, the scanning probe was scanned across the film surface, and the arithmetic mean roughness (Ra) and maximum height roughness (Rz) values ​​of the roughness curve were obtained.

[0098] Example 2 The intermediate layer was formed by extrusion lamination using a cooling roll having a surface with an arithmetic mean roughness Ra of 1.2 μm and a maximum height roughness Rz of 9.7 μm, and the heat seal layer was formed using a heat seal material (softening point 60 ° C, MFR 10 g / 10 min) containing CMPS V8021 (manufactured by Mitsui Dow Polychemicals Co., Ltd.), Sumikathene L705 (low-density polyethylene resin manufactured by Sumitomo Chemical Co., Ltd.) and Elastmaster LL-10 (manufactured by Kao Corporation) in a blending ratio (weight ratio) of 117:33:3, and an arithmetic mean roughness Ra of 0.41 μm and a maximum height roughness Rz of 2.9 μm. Except for this, a cover tape consisting of an antistatic layer / substrate layer / adhesive layer / intermediate layer / heat seal layer was produced in the same manner as in Example 1. Table 1 shows the arithmetic mean roughness Ra and maximum height roughness Rz of the surface of the intermediate layer opposite the PET layer side, and the arithmetic mean roughness Ra and maximum height roughness Rz of the surface of the heat seal layer opposite the intermediate layer side.

[0099] Example 3 A cover tape having a structure consisting of an antistatic layer / substrate layer / adhesive layer / intermediate layer / heat seal layer was produced in the same manner as in Example 1, except that the intermediate layer was formed by extrusion lamination using a cooling roll having a surface with an arithmetic mean roughness Ra of 1.2 μm and a maximum height roughness Rz of 9.7 μm, and the heat seal layer was formed by extrusion lamination using a heat seal material made of Mersen MX65D (manufactured by Tosoh Corporation) (softening point 69°C, MFR 65 g / 10 min) and a cooling roll having a surface with an arithmetic mean roughness Ra of 0.41 μm and a maximum height roughness Rz of 2.9 μm.

[0100] Example 4 The intermediate layer was formed by extrusion lamination using a chilled roll having a surface with an arithmetic mean roughness Ra of 0.2 μm and a maximum height roughness Rz of 1.22 μm, and the heat seal layer was formed using a heat seal material (softening point 60 ° C, MFR 10 g / 10 min) containing CMPS V8021 (manufactured by Mitsui Dow Polychemicals Co., Ltd.), Sumikathene L705 (manufactured by Sumitomo Chemical Co., Ltd.) and Elastmaster LL-10 (manufactured by Kao Corporation) in a blending ratio (weight ratio) of 117:33:3. The arithmetic mean roughness Ra of 0.25 μm and a maximum height roughness Rz of 3.87 μm were used. Except for this, a cover tape consisting of an antistatic layer / substrate layer / adhesive layer / intermediate layer / heat seal layer was produced in the same manner as in Example 1.

[0101] Example 5 The intermediate layer was formed by extrusion lamination using a chilled roll having a surface with an arithmetic mean roughness Ra of 1.2 μm and a maximum height roughness Rz of 9.7 μm, and the heat seal layer was formed using a heat seal material (softening point 75 ° C, MFR 20 g / 10 min) containing ethylene-vinyl acetate copolymer (product name: Ultrathene 537, manufactured by Tosoh Corporation), low-density polyethylene resin (product name: Sumikathene L705, manufactured by Sumitomo Chemical Co., Ltd.) and terpene resin (product name: YS Resin PX1250, manufactured by Yasuhara Chemical Co., Ltd.) in a blend ratio of 73:20:7. The arithmetic mean roughness Ra of 0.71 μm and a maximum height roughness Rz of 6.69 μm were used. Except for this, a cover tape consisting of an antistatic layer / substrate layer / adhesive layer / intermediate layer / heat seal layer was produced in the same manner as in Example 1.

[0102] (Comparative Example 1) A cover tape having a structure consisting of an antistatic layer / substrate layer / adhesive layer / intermediate layer / heat seal layer was produced in the same manner as in Example 1, except that the intermediate layer was formed by extrusion lamination using a cooling roll having a surface with an arithmetic mean roughness Ra of 2.1 μm and a maximum height roughness Rz of 14.4 μm, and the heat seal layer was formed by extrusion lamination using a cooling roll having a surface with an arithmetic mean roughness Ra of 0.41 μm and a maximum height roughness Rz of 2.9 μm.

[0103] (Comparative Example 2) A cover tape having a structure consisting of an antistatic layer / substrate layer / adhesive layer / intermediate layer / heat seal layer was produced in the same manner as in Example 1, except that the intermediate layer was formed by extrusion lamination using a cooling roll having a surface with an arithmetic mean roughness Ra of 2.1 μm and a maximum height roughness Rz of 14.4 μm, and the heat seal layer was formed using the same heat seal material as in Example 3 by extrusion lamination using a cooling roll having a surface with an arithmetic mean roughness Ra of 0.71 μm and a maximum height roughness Rz of 6.69 μm.

[0104] [Measurement of void area ratio] Images were observed from the heat seal layer side of the cover tapes produced in Examples 1 to 5 and Comparative Examples 1 and 2 using an optical microscope (Nikon ECLIPSE ME600) under the following image acquisition conditions. The images were then binarized using image analysis software (Win ROOF ver. 7.4.5 (Mitani Corporation)) under the following analysis conditions, and void areas were selected, and the percentage (%) of the total area of ​​void areas in the analyzed area was calculated. The results are shown in Table 1.

[0105] Image acquisition conditions Optical microscope: Nikon ECLIPSE ME600 Magnification: 10x Software: Motic images plus 2.3S Image analysis Image analysis: Win ROOF ver 7.4.5 (Mitani Shoji) Setting value Brightness: 3 Contrast: 54 Threshold: 205-256 Binarized rate: 14.21% Closing times: 3 Detections to be removed: Area threshold 5 or less Analysis area: 346.9μm×484.8μm

[0106] FIG. 4 shows stereomicroscopic images and binarized images of the cover tapes of Example 2 and Comparative Example 1 observed from the heat seal layer side.

[0107] [Haze measurement] The haze values ​​of the cover tapes produced in Examples 1 to 5 and Comparative Examples 1 and 2 were measured by the method described above in "A. Cover tape for packaging electronic components IV. Cover tape." The results are shown in Table 1.

[0108] (Production of packaging samples) A package sample was prepared under the following taping conditions: 500 electronic components (0402 size chip capacitors) were placed consecutively in the cavities of the paper carrier tape, and the paper carrier tape and cover tape were heat-sealed and wound up using a taping machine NST-35 (Nitto Kogyo) under the following conditions to obtain a roll-shaped package sample.

[0109] (Production conditions) Paper carrier tape: Hokuetsu Corporation, 0.31mm thick, 8mm wide (virgin paper) Paper carrier tape feed hole pitch: 2mm Cover tape width: 5.25mm Taping temperature: 150°C for Example 1 and Comparative Example 1 Example 2 and Comparative Example 2 were heated at 170°C. Example 3 is 170°C Example 4 is 170°C Example 5 is 180 ° C. Taping speed: 3500 tacts Taping iron size: 0.6±0.05mm x 2 wires Taping iron length (seal length in one stroke) 8±1mm Electronic components: 0402 size chip capacitors

[0110] [Visibility evaluation] The prepared package samples were evaluated for visibility of the electronic components through the cover tape using the following evaluation method. The results are shown in Table 1. Evaluation method: Ten inspectors visually inspected the filled electronic components through the cover tape to determine whether they could be recognized. A total of 50 chips were inspected, and the pass rate was calculated. A pass rate of 100% means that all 10 inspectors were able to recognize 50 electronic chips, and a pass rate of 40% means that 4 out of 10 inspectors were able to recognize 50 electronic chips.

[0111] [Evaluation of the number of abnormal chip behaviors during implementation] After storing the roll-shaped package sample in a humid and hot environment (40°C, 95% RH for 100 hours), the cover tape was peeled off at a speed of 100 mm / sec using a cover tape peeling device (W08f Intelligent Feeder, manufactured by FUJI Corporation). Peeling was performed in an environment of 25±3°C, 30±5% RH, and was completed in 10 seconds. The behavior of the electronic components during peeling was observed with a high-speed camera. Abnormal behavior was defined as when more than half of the chip protruded from the paper carrier cavity during peeling (including when the electronic component stuck to the cover tape, when the electronic component rotated 90 degrees and stood up, and when the electronic component protruded from the cavity in the paper carrier tape). The number of chips that exhibited abnormal behavior out of 500 was tallied by looking at the footage taken with the high-speed camera (number of mounting defects). The results are shown in Table 1.

[0112] [Table 1]

[0113] As shown in Table 1, the cover tapes of Examples 1 to 5, which had a void area ratio of 10% or less, had better visibility than the cover tapes of Comparative Examples 1 and 2. Here, although the cover tape of Comparative Example 2 had approximately the same arithmetic mean roughness (Ra) and haze value as the cover tape of Example 5, when observed through the cover tape, white spots were observed, hindering the visibility of the electronic components and deteriorating the inspection suitability. Furthermore, although Example 3 used the same cooling roll as Example 2 to form the intermediate layer and heat seal layer, Example 3 had a lower void area ratio and better visibility due to the higher MFR of the heat seal layer material. Furthermore, Examples 1 to 3 and 5 suppressed the occurrence of abnormal chip behavior during mounting compared to Example 4. This is presumably due to the smaller arithmetic mean roughness Ra of the surface on the heat seal layer side of the cover tape of Example 4.

[0114] That is, the present disclosure provides the following inventions. [1] A cover tape for packaging electronic components, comprising a base layer, a heat seal layer disposed on one side of the base layer, and an intermediate layer disposed between the base layer and the heat seal layer, wherein the void area ratio calculated from an image of the cover tape for packaging electronic components observed from the heat seal layer side is 10% or less. [2] The cover tape for packaging electronic components according to [1], wherein the arithmetic mean roughness Ra of the surface of the heat seal layer side of the cover tape for packaging electronic components is 0.3 μm or more and 0.7 μm or less. [3] The cover tape for packaging electronic components according to [1] or [2], wherein the arithmetic mean roughness Ra of the surface of the intermediate layer facing the heat seal layer is 1.5 μm or less. [4] A package comprising a carrier tape having a plurality of storage sections for storing electronic components, the electronic components stored in the storage sections, and a cover tape for packaging electronic components according to any one of [1] to [3], arranged to cover the storage sections. [Explanation of symbols]

[0115] 1... Cover tape 2...Base material layer 3... Heat seal layer 4. Middle class 5...Antistatic layer 10 … Packaging 11... Carrier tape 12...Storage area 13...Electronic components

Claims

1. a substrate layer; a heat seal layer disposed on one surface side of the base material layer; an intermediate layer disposed between the substrate layer and the heat seal layer; A cover tape for packaging electronic components, comprising: The cover tape for packaging electronic components has a void area ratio of 1.0% or more and 10% or less, calculated by the image analysis described below using an image obtained from the heat seal layer side of the cover tape for packaging electronic components using an optical microscope under the image acquisition conditions described below. (Image acquisition conditions) Optical microscope magnification: 10x Software: Motic images plus 2.3S (Image analysis) Image analysis: Win ROOF ver. 7.4.5 (Mitani Shoji) Setting value Brightness: 3 Contrast: 54 Threshold: 205-256 Binarized rate: 14.21% Closing times: 3 Detected objects to be deleted: Area threshold 5 or less Analysis area: 346.9μm x 484.8μm

2. 2. The cover tape for packaging electronic components according to claim 1, wherein the arithmetic mean roughness Ra of the surface of the cover tape for packaging electronic components on the side of the heat seal layer is 0.3 μm or more and 0.7 μm or less.

3. 2. The cover tape for packaging electronic components according to claim 1, wherein the arithmetic mean roughness Ra of the surface of said intermediate layer facing said heat seal layer is 1.5 μm or less.

4. a carrier tape having a plurality of storage sections for storing electronic components; an electronic component housed in the housing; The cover tape for packaging electronic components according to any one of claims 1 to 3, which is disposed so as to cover the storage section; A packaging body comprising:

Images