Polarized Vertical Cavity Surface Emitting Laser (VCSEL) System

Abstract

To provide a vertical cavity surface emitting laser (VCSEL) structure with locked polarization and collimation optics.SOLUTION: A VCSEL structure includes a lattice, an optical emitter such as a lens, and a plurality of GaAs / AlGaAs mirrors between the lattice and the optical emitter. The lattice located between the mirror stacks and also above or below the active region can polarize an incident wave of the VCSEL structure.SELECTED DRAWING: Figure 1

Description

[Background technology]

[0001]

[0001] The limitations and disadvantages of conventional vertical cavity surface emitting lasers will become apparent to those skilled in the art by comparing their approaches with certain aspects of the present method and system described below in this disclosure with reference to the drawings. Summary of the Invention

[0002]

[0002] Systems and methods are provided for making a back-side emitting, vertical-cavity surface-emitting laser (BSE VCSEL) with locked polarization and collimation optics, as fully shown and / or described in connection with at least one of the drawings, as fully set forth in the claims. [Brief explanation of the drawings]

[0003] [Figure 1]

[0003] FIG. 1 illustrates an example polarized / lensed BSE VCSEL structure with a dielectric mirror, according to various example implementations of the present disclosure. [Figure 2]

[0004] 1A-1C illustrate an example polarized / lensed BSE VCSEL structure with a regrown DBR mirror, in accordance with various example implementations of the present disclosure. [Figure 3]

[0005] 1A-1C illustrate an example polarized / lensed BSE VCSEL structure using wafer bonding, according to various example implementations of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0004]

[0006] A vertical-cavity surface-emitting laser is a type of semiconductor laser diode that uses a laser beam emission that is perpendicular to the top surface, as opposed to conventional edge-emitting semiconductor lasers, which emit from a surface formed by cleaving individual chips from a wafer. VCSELs are used in a variety of laser products, including computer mice, fiber optic communications, laser printers, facial recognition ID, and smart glasses.

[0005]

[0007] As disclosed, a back-emitting (BSE) VCSEL with locked polarization and collimation optics is proposed. Addressable BSE VCSEL arrays with emitters or zones can perform a variety of optical functions.

[0006]

[0008] FIG. 1 illustrates an example polarized / lensed BSE VCSEL structure with a dielectric mirror, according to various example implementations of the present disclosure.

[0009] The non-emitting side of the BSE VCSEL structure of Figure 1 comprises a dielectric mirror 101. For example, the dielectric mirror 101 may comprise alternating quarter wave layers of Si and SiN.

[0007]

[0010] The emission side of the BSE VCSEL structure of Figure 1 includes a GaAs / AlGaAs mirror 103, which may be alternating quarter-wave plasma enhanced chemical vapor deposited (PECVD) layers of GaAs and AlGaAs. There may be more layers in the GaAs / AlGaAs mirror 103 than in the dielectric mirror 101.

[0008]

[0011] A dielectric mirror 101 and a GaAs / AlGaAs mirror 103 are separated by a grating 105 operable to polarize the incident wave of the BSE VCSEL. The grating 105 may comprise a region of GaAs. An optical emitter, such as a lens 107, a focusing metasurface, or a diffractive optical element (DOE), is located on the emission side. The surface of the emitter on the emission side may be covered by an anti-reflective (AR) coating layer.

[0009]

[0012] FIG. 2 illustrates an example polarized / lensed BSE VCSEL structure with a regrown DBR, according to various example implementations of the present disclosure.

[0013] The non-emitting side of the BSE VCSEL structure of Figure 2 includes a regrown GaAs / AlGaAs mirror 201. The regrown layer immediately above the grating layer 105 may be uneven, which can assist in locking the polarization.

[0010]

[0014] The emission side of the BSE VCSEL structure of Figure 2 includes a GaAs / AlGaAs mirror 103. The GaAs / AlGaAs mirror 103 may be alternating quarter-wave plasma-enhanced chemical vapor deposition (PECVD) layers of GaAs and AlGaAs. There may be more layers in the GaAs / AlGaAs mirror 103 than in the dielectric mirror 101.

[0011]

[0015] A dielectric mirror 101 and a GaAs / AlGaAs mirror 103 are separated by a grating 105 operable to polarize the incident wave of the BSE VCSEL. The grating 105 may comprise a region of GaAs. An optical emitter, such as a lens 107, a focusing metasurface, or a DOE, is located on the emission side. The surface of the emitter on the emission side may be covered by an AR coating layer.

[0012]

[0016] FIG. 3 illustrates an example polarized / lensed BSE VCSEL structure using wafer bonding, according to various example implementations of the present disclosure.

[0017] 3 includes a lens 501, a semi-insulating (SI) GaAs substrate 503, a current spreading layer 505, a first DBR 507, a cladding layer 509, a linear grating 511, one or more quantum wells (QWs) 513, a second DBR 515, and a contact layer 517. All layers in the stack except for the SI GaAs substrate 503 may be doped to support current injection into the active region.

[0013]

[0018] A linear GaAs / air polarization grating 511, operable to polarize the incident wave of the BSE VCSEL, is inserted near the VCSEL cavity 513 by wafer bonding 519. An optical element 501, operable to collimate the incident wave of the BSE VCSEL, is located on the emission side 107 of the substrate 503. An optical emitter, such as a lens, metasurface, or DOE, is located on the emission side. The surface of the emitter on the emission side may be covered by an AR coating layer.

[0014]

[0019] The method and / or system may be implemented in hardware, software, or a combination of hardware and software. The method and / or system may be implemented in a centralized manner in at least one computing system, or in a distributed manner with different elements spread across multiple interconnected computing systems. Any type of computing system or other device adapted to perform the methods disclosed herein is suitable. A typical implementation may include one or more application-specific integrated circuits (ASICs), one or more field programmable gate arrays (FPGAs), and / or one or more processors (e.g., x86, x64, ARM, PIC, and / or any other suitable processor architecture), as well as associated supporting circuitry (e.g., storage, DRAM, FLASH, bus interface circuits, etc.). Each individual ASIC, FPGA, processor, or other circuit may be referred to as a "chip," and multiple such circuits may be referred to as a "chipset." Another implementation may comprise a non-transitory machine-readable (e.g., computer-readable) medium (e.g., a FLASH drive, optical disk, or magnetic storage disk, etc.) having stored thereon one or more lines of code that, when executed by the machine, causes the machine to perform the processes described in this disclosure. Another implementation may comprise a non-transitory machine-readable (e.g., computer-readable) medium (e.g., a FLASH drive, optical disk, or magnetic storage disk, etc.) having stored thereon one or more lines of code that, when executed by the machine, causes the machine to configure (e.g., load software and / or firmware into its circuitry) to operate as a system described in this disclosure.

[0015]

[0020] The terms “circuit” and “circuitry,” as used herein, refer to physical electronic components (i.e., hardware) as well as any software and / or firmware (“code”) that can constitute, be executed by, and / or otherwise be associated with hardware. For example, a particular processor and memory, as used herein, can comprise a first “circuit” when executing a first line or lines of code, and can further comprise a second “circuit” when executing a second line or lines of code. “And / or,” as used herein, refers to any one or more of the items in the list connected by “and / or.” As an example, “x and / or y” refers to any element of the three-element set {(x), (y), (x,y)}. As another example, “x, y, and / or z” refers to any element of the seven-element set {(x), (y), (z), (x,y), (x,z), (y,z), (x,y,z)}. The term "exemplary" as used herein means serving as a non-limiting example, instance, or illustration. "Eg" and "for example" as used herein evoke a list of one or more non-limiting examples, instances, or illustrations. As used herein, a circuit is "operable" to perform a function whenever it comprises the hardware and code (if any) necessary to perform that function, regardless of whether performing that function would be disabled or impossible (e.g., due to user configuration, factory trim, etc.). As used herein, the term "based on" means "based at least in part on." For example, "x based on y" means "x is based at least in part on y (and may also be based on, for example, z)."

[0016]

[0021] While the present method and / or system has been described with reference to particular implementations, those skilled in the art will recognize that various modifications can be made and equivalents can be substituted without departing from the scope of the present method and / or system. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the disclosure without departing from its scope. Therefore, the present method and / or system is not intended to be limited to the particular implementations disclosed, but rather is intended to include all implementations falling within the scope of the appended claims. [Explanation of symbols]

[0017] 101 Dielectric mirror 103 GaAs / AlGaAs mirror 105 Lattice 107 Lens 201 Regrowth GaAs / AlGaAs mirror 501 Lens 503 Semi-insulating GaAs substrate 505 Current diffusion layer 507 First DBR 509 Cladding layer 511 Linear Grid 513 Quantum Well 515 Second DBR 517 Contact layer 519 Wafer Bonding

Claims

1. Vertical cavity surface emitting laser (VCSEL) structure comprising a grating operable to polarize a wave incident on the grating A system comprising: the lattice comprises GaAs; the VCSEL structure includes a plurality of GaAs / AlGaAs mirrors operably coupled to the grating on emitting and non-emitting sides of the VCSEL structure; the GaAs / AlGaAs mirrors on the non-emitting side are regrown, whereby a layer of the GaAs / AlGaAs mirrors on the non-emitting side immediately above the grating is uneven, which can assist in locking polarization; system.

2. 10. The system of claim 1, wherein the VCSEL structure is a bottom-emitting (BSE) VCSEL.

3. 10. The system of claim 1, wherein the plurality of GaAs / AlGaAs mirrors comprises alternating quarter wave layers of GaAs / AlGaAs.

4. 10. The system of claim 1, wherein the VCSEL structure includes a semi-insulating GaAs substrate between the plurality of GaAs / AlGaAs mirrors and an optical emitter.

5. 10. The system of claim 1, wherein the VCSEL structure includes an optical emitter on an emitting side of the VCSEL structure.

6. The system of claim 5 , wherein the optical emitter is a lens.

7. 6. The system of claim 5, wherein the optical emitter is a metasurface.

8. The system of claim 5 , wherein the optical emitter is a diffractive optical element.

9. The system of claim 5 , wherein the optical emitter includes an anti-reflective coating.

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