Method for forming conductive member and method for forming channel

The method for forming conductive members with large crystal grains addresses the challenges of non-uniform cooling and dendrite formation by using an isothermal diffusion process, enabling improved carrier mobility in semiconductor devices.

JP7738436B2Active Publication Date: 2025-09-12TOKYO ELECTRON LTD
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Patent Information

Application Number
JP2021154079
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2021-09-22
Publication Date
2025-09-12
Estimated Expiration
2041-09-22

AI Technical Summary

Technical Problem

Existing methods for increasing crystal grain size in polycrystalline silicon channels face challenges due to non-uniform cooling rates and the formation of dendrites, making it difficult to achieve uniform composition and precise temperature control, which affects carrier mobility in semiconductor devices.

Method used

A method involving the formation of a first portion with a first element and a second element that undergoes a eutectic reaction, and a second portion with a third element forming an intermetallic compound, where the second element diffuses isothermally to increase the crystal grain size of the first element, eliminating the need for precise temperature control during cooling.

Benefits of technology

This method enables the easy and controlled growth of large crystal grains in conductive members, improving carrier mobility without requiring precise temperature control, thus enhancing semiconductor device performance.

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Abstract

To provide a formation method for a conductive member capable of enlarging a particle diameter of a crystal particle with high controllability and easily, and a formation method for a channel.SOLUTION: First of all, a first portion containing a first element constituting a conductive member to be obtained and a second element that causes an eutectic reaction with the first element, and a second portion containing a third element to form an inter-metal compound with the second element are formed on a substrate. Next, the first portion is brought into a liquid-phase state, a temperature of the substrate is then adjusted, and a primary crystal of the first element is formed. Next, in a state where the temperature of the substrate is maintained at the same temperature, the second element is diffused from the first portion to the second portion, a ratio of a crystal of the first element in the first portion with respect to a liquid phase is increased, and a crystal particle of the first element is grown. Next, the first portion after end of the diffusion of the second element to the second portion is defined as the conductive member including the crystal particles of the first element.SELECTED DRAWING: Figure 3
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Description

Technical Field

[0001] The present disclosure relates to a method for forming a conductive member and a method for forming a channel.

Background Art

[0002] For example, in a semiconductor device using polycrystalline silicon for a channel, carriers responsible for the on-current are scattered by grain boundaries. Such scattering at grain boundaries increases the channel resistance and decreases the current value. Therefore, attempts have been made to reduce grain boundaries, which are sources of carrier scattering, by increasing the grain size of the polycrystalline silicon used for the channel.

[0003] For example, Non-Patent Document 1 discloses a technique for increasing the grain size of a polycrystalline silicon channel in a 3D flash memory by a metal-induced lateral growth method (MILC) using a Ni catalyst.

Prior Art Documents

Non-Patent Documents

[0004]

Non-Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] The present disclosure provides a method for forming a conductive member and a method for forming a channel that can easily and with good control increase the size of crystal grains. [Means for solving the problem]

[0006] A method for forming a conductive member according to one embodiment of the present disclosure includes forming, on a substrate, a first portion including a first element constituting a conductive member to be obtained, a second element that undergoes a eutectic reaction with the first element, and a second portion including a third element that forms an intermetallic compound with the second element; bringing the first portion into a liquid phase state and then adjusting the temperature of the substrate to crystallize a primary crystal of the first element; diffusing the second element from the first portion to the second portion while maintaining the temperature of the substrate at the same temperature, thereby increasing the ratio of the crystal of the first element to the liquid phase in the first portion and growing crystal grains of the first element; 2nd part and forming the first portion after the diffusion into the conductive member into the conductive member having crystal grains of the first element. [Effects of the Invention]

[0007] According to the present disclosure, a method for forming a conductive member and a method for forming a channel are provided that can easily and with good control increase the size of crystal grains. [Brief explanation of the drawings]

[0008] [Figure 1] 1 is a cross-sectional view showing an example of a structure used in a method for forming a conductive member according to a first embodiment. [Figure 2] 2 is a cross-sectional view showing a state in which a first portion of the structure of FIG. 1 is in a liquid phase. FIG. [Figure 3] 2 is a cross-sectional view showing a conductive member having large crystal grains of a first element obtained by out-diffusing a second element from a first portion in the structure of FIG. 1. FIG. [Figure 4] 1 is a Si-Al binary phase diagram for explaining the mechanism of Si crystal growth when the first element is Si and the second element is Al. [Figure 5] FIG. 1 is a binary phase diagram of Si—Al for explaining the case where Si crystals grow during the cooling process from the liquidus temperature in a Si—Al system. [Figure 6] 4 is a cross-sectional view showing a state in which a portion above a conductive member has been removed from the structure of FIG. 3. FIG. [Figure 7] FIG. 7 is a diagram for explaining a process for forming an amorphous conductive layer on the conductive member of FIG. 6 and then performing solid phase epitaxial growth to form a thicker conductive layer as a whole. [Figure 8] FIG. 10 is a cross-sectional view showing an example of a structure used in a method for forming a conductive member according to a second embodiment. [Figure 9] 9 is a cross-sectional view showing a state in which the first portion of the structure of FIG. 8 is in a liquid phase. [Figure 10] 9 is a cross-sectional view showing a conductive member having large crystal grains containing a first element and a fourth element obtained by out-diffusing a second element from a first portion in the structure of FIG. 8. FIG. [Figure 11] FIG. 10 is a cross-sectional view showing an example of a structure used in a method for forming a conductive member according to a third embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, embodiments will be described with reference to the accompanying drawings.

[0010] <Background and Overview> When polycrystalline conductors such as polycrystalline silicon are used in applications requiring high carrier mobility, such as the channel of a semiconductor device, increasing the crystal grain size has been studied to reduce the grain boundaries that are the source of carrier scattering. A well-known technique for increasing the crystal grain size is to limit the crystallization of precipitation nuclei that are the source of crystals from a solid amorphous state, reduce their number, and then slowly cool the nuclei to grow only the precipitation nuclei that crystallized first (primary crystals).

[0011] When using this method in semiconductor manufacturing processes, precise temperature control within the substrate (wafer) surface is required, but it is virtually impossible to control the uniform cooling rate across the substrate surface. Furthermore, when nucleation is performed from the liquid phase, if a two-component or multi-component system is used to lower the melting point, the system will form a solid-liquid two-phase system during the cooling process. Furthermore, if latent heat is released at the solid-liquid interface, the crystals may grow into dendrites, with other components remaining between the dendrites. This makes it difficult to obtain flat crystals with a uniform composition.

[0012] Therefore, in one embodiment, crystal growth is performed in an isothermal process. That is, a first portion containing a first element constituting the conductive member to be obtained and a second element that undergoes a eutectic reaction with the first element, and a second portion containing a third element that forms an intermetallic compound with the second element and into which the second element can diffuse from the first portion are formed on a substrate. Then, after the first portion is brought into a liquid phase state, the substrate temperature is adjusted to crystallize the primary crystal of the first element, and while maintaining that temperature, the second element is diffused from the first portion to the second portion, increasing the ratio of the crystal of the first element to the liquid phase in the first portion and growing the crystal grains of the first element. Then, the second element is 2nd part After the diffusion into the first portion is completed, the first portion becomes a conductive member having large crystal grains. Therefore, there is no need to control the slow cooling rate within the substrate surface, and precise temperature control is not required. Therefore, even if the temperature is non-uniform within the substrate surface, the crystal grains can be enlarged with good controllability. Furthermore, a conductive member with large crystal grains can be easily formed without using a special method.

[0013] <Specific embodiment> Specific embodiments will be described below.

[0014] [First embodiment] FIG. 1 is a cross-sectional view showing an example of a structure used in the method for forming a conductive member according to the first embodiment. As shown in Figure 1, first, a conductive layer 1 made of a first element constituting the conductive member to be obtained is formed on a substrate with an insulating film 10 made of SiO2 or the like interposed therebetween, and then a metal layer 2 made of a second element that undergoes a eutectic reaction with the first element is formed thereon. The conductive layer 1 and metal layer 2 form a first portion 11 containing the first element and the second element. Then, an intermetallic compound-forming layer 3 containing a third element that forms an intermetallic compound with the second element is formed on the metal layer 2 with a barrier layer 4 interposed therebetween. The intermetallic compound-forming layer 3 is configured as a second portion 12 into which the second element can diffuse from the first portion 11.

[0015] The barrier layer 4 is a layer that acts as a barrier to the second element, and has the function of suppressing and controlling the diffusion of the second element into the second portion 12 (intermetallic compound-forming layer 3). In the example of FIG. 1, a barrier layer 4a that has the function of suppressing the diffusion of elements into upper layers is formed on the intermetallic compound-forming layer 3. The barrier layer 4a can be made of the same material as the barrier layer 4.

[0016] The conductive layer 1, the metal layer 2, the intermetallic compound forming layer 3, and the barrier layers 4 and 4a are formed by a thin film forming technique such as CVD, ALD, or PVD.

[0017] The first element constituting the conductive layer 1 is the conductive material to be formed, and may be, for example, a semiconductor material such as silicon (Si) or germanium (Ge). As described above, the metal layer 2 is composed of a second element that undergoes a eutectic reaction with the first element. That is, the second element satisfies the following formula (1) with respect to the first element: E 12 -(E 11 +E 22 / 2)>0 (1) where E 12 is the bond energy between the first and second elements, E 11 is the bond energy between the first elements, E 22is the bond energy between the second element. In formula (1), the bond energy between the first element and the second element is higher than the average bond energy between the first element and the second element, and the first element and the second element are repulsive. The solid solubility limit of the second element in the first element is preferably less than 1 mol%.

[0018] The thickness of each of the conductive layer 1 and the metal layer 2 is adjusted so that when they melt and the first element and the second element reach their liquidus temperature from a liquid phase, the first element crystallizes as the primary crystal.

[0019] As described above, the intermetallic compound-forming layer 3 contains a third element that forms an intermetallic compound with the second element. That is, the third element satisfies the following formula (2) with respect to the second element. E 23 -(E 22 +E 33 / 2)<0 (2) where E 23 is the bond energy between the second and third elements, E 22 is the bond energy between the second element, E 33 is the bond energy between tertiary elements. In other words, the bond energy between secondary and tertiary elements is higher than the average bond energy between secondary and tertiary elements, and secondary and tertiary elements tend to attract each other.

[0020] When the first element is Si, the second element may be, for example, aluminum (Al). When the second element is Al, the third element constituting the intermetallic compound-forming layer 3 may be, for example, titanium (Ti), and the material constituting the barrier layers 4, 4a may be, for example, titanium nitride (TiN).

[0021] When the first element is Ge, the second element may be, for example, tin (Sn). When the second element is Sn, the third element may be, for example, Ti, and the material constituting the barrier layers 4, 4a may be, for example, TiN.

[0022] In this embodiment, the temperature is set to a temperature at which the first element and the second element are in a liquid phase. As shown in FIG. 2, the conductive layer 1 and the metal layer 2 are melted to create a liquid phase in the first portion 11. The process temperature (substrate temperature) is then adjusted to crystallize the primary crystal of the first element. The second element is then out-diffused while maintaining the temperature, growing the primary crystal. By satisfying the above formulas (1) and (2), a chemical potential gradient of the second element is formed between the first portion 11 and the intermetallic compound-forming layer 3, which will become the second portion 12. The out-diffusion of the second element into the second portion 12 via the barrier layer 4 proceeds through an isothermal process. The out-diffusion of the second element increases the concentration of the first element, and when the first element becomes supersaturated, the first element precipitates as a primary crystal in the liquid phase and begins to grow. As the out-diffusion of the second element further proceeds, the ratio of the crystal of the first element to the liquid phase in the first portion 11 increases, and crystal growth proceeds.

[0023] An important point here is that the outward diffusion of the second element is the rate-determining step in the crystal growth process of the first element. Therefore, the crystal grain size can be designed by controlling the crystal growth due to the outward diffusion of the second element through the material of the barrier layer 4 (diffusion rate and density of the second element), film thickness, and process temperature (constant). Ultimately, as shown in FIG. 3, the first portion 11 becomes a conductive member 31 having large crystal grains 21 of the first element. If the first element is a semiconductor material such as Si or Ge, the conductive member 31 can be used as a channel in a semiconductor device. The intermetallic compound-forming layer 3 incorporates the second element to form a metallic compound, and changes into an intermetallic compound layer 32.

[0024] As a specific example, a case where the first element is Si and the second element is Al will be described. As shown in the binary phase diagram in Figure 4, for a composition (C1) of 20 mole% Si-80 mole% Al, the temperature at which the primary crystals crystallize is 700°C. When the temperature t1 is between 600 and 700°C, the molar ratio of the liquid phase to the solid phase in composition C1 can be expressed as solid phase:liquid phase = l1C1:S1C1, using l1 and S1 in the diagram.

[0025] If the outward diffusion of the second element continues at temperature t1 and the composition of Si changes very slowly from C1 to C2 during the solidification process, the molar ratio of the liquid phase to the solid phase becomes solid:liquid = l1C2:S1C2, and the ratio of the crystal to the liquid phase increases from l1C1 to l1C2. This causes crystal growth to progress, and ultimately polycrystalline silicon with large crystal grains is formed as the conductive member 31.

[0026] When growing Si crystals during the cooling process from the liquidus temperature, the number of crystals that precipitate is determined by the "composition" and "temperature," while the crystal growth is determined by the "cooling rate." For example, in the case of a Si-Al system, as shown in the binary phase diagram in Figure 5, with a composition (C1) of 20 mole% Si-80 mole% Al, the primary crystals are crystallized at 700°C, and then the crystals are grown by cooling at the desired cooling rate. Therefore, as mentioned above, precise temperature control within the substrate surface is required, and because two solid-liquid phases occur during the cooling process, it is difficult to obtain flat crystals with a uniform composition.

[0027] In contrast, in the present embodiment, cooling is not required, and therefore precise temperature control is not required. Furthermore, the crystal growth of the first element can be controlled by controlling the outward diffusion of the second element, so that the crystal grains can be enlarged with good controllability and ease.

[0028] Once the process of forming conductive member 31 by the reaction between the second element and the third element at the process temperature is completed as described above, the temperature is lowered to 300°C or less, and as shown in FIG. 6, the barrier layers 4, 4a and intermetallic compound layer 32 on conductive member 31 are removed, leaving conductive member 31. If the first element is a semiconductor material, the remaining conductive member 31 can be used as a channel as is. The film thickness of conductive member 31 at this time is, for example, about 4 to 5 nm.

[0029] 7, a conductive member 31 having large crystal grains may be used as a template, and an amorphous conductive layer 33 containing a first element may be formed thereon, followed by solid phase epitaxial growth to form a thicker conductive member 34. That is, by solid phase epitaxial growth of the amorphous conductive layer 33, the large crystal grains of the conductive member 31 of the template become transferred crystals, resulting in a thicker conductive member 34 as a whole. When the first element 1 is a semiconductor material, such a method can provide a thicker channel.

[0030] When the first element is Si, the amorphous conductive layer 33 is, for example, n + The conductive member 34 is doped a-Si, and in this case, the conductive member 34 is n-Si. The film thickness of the amorphous conductive layer 33 is, for example, about 3 to 10 nm. In this case, the film thickness of the thick conductive member 34 after solid phase epitaxial growth is about 7 to 15 nm for the conductive member 31 having a thickness of 4 to 5 nm. The solid phase epitaxial growth temperature is preferably 600°C or higher in the case of Si. Furthermore, from the viewpoint of suppressing nucleation from sites present above, it is preferably less than 800°C.

[0031] In this embodiment, the film thickness of the first portion 11 is set according to the thickness of the conductive member 31 to be obtained. The thickness of the intermetallic compound-forming layer 3 is set appropriately according to the amount of the second element that should diffuse from the first portion 11 to the intermetallic compound-forming layer 3. The thickness of the barrier layer 4 is set to a thickness that can suppress the diffusion of the second element from the first portion 11 and control the diffusion rate to an appropriate level.

[0032] When the first element is Si, the second element is Al, the third element is Ti, and the barrier layers 4, 4a are TiN, the film thickness of the first portion 11 can be in the range of 10 to 50 nm, for example, 15 nm. The thickness of the intermetallic compound-forming layer 3 can be in the range of 20 to 100 nm, for example, 20 nm. The thickness of the barrier layer 4 can be in the range of 3 to 15 nm, for example, 3 nm, and the thickness of the barrier layer 4a can be in the range of 5 to 50 nm, for example, 5 nm. 1 to 3, 6 and 7, for convenience, the element symbols of the specific examples are assigned to each layer.

[0033] [Second embodiment] Next, a second embodiment will be described. In the second embodiment, the conductive member is a first element to which a fourth element, which has a lower melting point than the first element and forms a complete solid solution with the first element, is added. That is, the fourth element satisfies the following formula (3) with respect to the first element. E 14 -(E 11 +E 44 / 2)=0 (3) E 14 is the bond energy between the first and fourth elements, E 11 is the bond energy between the first elements, E 44 is the bond energy between the fourth element. Equation (3) means that there is no interaction between the first and fourth elements.

[0034] FIG. 8 is a cross-sectional view showing an example of a structure used in a method for forming a conductive member according to the second embodiment. In this embodiment, a conductive layer 41 in which a fourth element is added to a first element constituting the conductive member to be obtained is used instead of the conductive layer 1 of the structure of FIG. 1. A metal layer 2 is formed on the conductive layer 41. The conductive layer 41 and the metal layer 2 form a first portion 11' containing the first element, the fourth element, and the second element. The intermetallic compound-forming layer 3 and the barrier layers 4, 4a, which are the second portion 12, are the same as those in the structure shown in FIG. 1 of the first embodiment.

[0035] The first and fourth elements constituting the conductive layer 41 may be, for example, Si and Ge, which are semiconductor materials.

[0036] In this embodiment, the temperature is set to a temperature at which the first element, the fourth element, and the second element are in a liquid phase. As shown in FIG. 9, the conductive layer 41 and the metal layer 2 are melted to create a liquid phase in the first portion 11'. The process temperature (substrate temperature) is then adjusted to crystallize a primary crystal containing the first element and the fourth element. While maintaining this temperature, the second element is out-diffused to grow the primary crystal. Then, as in the first embodiment, crystal grains are grown in an isothermal process. Once the crystal grains reach a desired size, excess portions are removed. Finally, as shown in FIG. 10, a conductive member 61 having large crystal grains 51 containing the first element and the fourth element is formed. When the first element and the fourth element are Si and Ge, the conductive member 61 is silicon germanium (SiGe).

[0037] In this embodiment, by using the conductive member 61 in which the first element is doped with a fourth element having a melting point lower than that of the first element, it is possible to lower the melting point and lower the process temperature. The advantage of lowering the process temperature in this way is that the lower temperature suppresses the outward diffusion of the second element, allowing the crystallization process of the first element to proceed more slowly and resulting in larger crystal grains. 8 to 10, for convenience, the element symbols of the specific examples are assigned to each layer.

[0038] [Third embodiment] Next, a third embodiment will be described. FIG. 11 is a cross-sectional view showing an example of a structure used in a method for forming a conductive member according to a third embodiment. In this embodiment, a diffusion-inhibiting layer 5 for inhibiting outward diffusion of a first element is formed between the first portion 11 and the intermetallic compound-forming layer 3 (the second portion 12) of the structure of the first embodiment, more specifically, between the barrier layer 4 and the intermetallic compound-forming layer 3. When the conductive layer 1 and the metal layer 2 are melted to bring the first portion 11 into a liquid state and then the process temperature (substrate temperature) is set to allow the second element to outwardly diffuse into the second portion 12, there is a possibility that the first element also outdiffuses. The diffusion-inhibiting layer 5 has a function of inhibiting such outward diffusion of the first element. The diffusion-inhibiting layer 5 may contain the first element. For example, when the first element is Si, a Si film may be used as the diffusion-inhibiting layer 5.

[0039] <Other applications> Although the embodiments have been described above, the disclosed embodiments should be considered to be illustrative and not restrictive in all respects. The above embodiments may be omitted, substituted, or modified in various ways without departing from the scope and spirit of the appended claims.

[0040] For example, in the above embodiment, an example was shown in which semiconductor materials were used as the first element and the fourth element, and the conductive member was used as the channel of the semiconductor device, but the first element and the fourth element are not limited to semiconductor materials and other conductive materials can be used, and the conductive member is not limited to the channel of the semiconductor device. [Explanation of symbols]

[0041] 1,41;Conductive layer 2;metal layer 3; Intermetallic compound forming layer 4, 4a; Barrier layer 5: Diffusion suppression layer 11,11´;1st part 12;Second part 21,51;grains 31, 34, 61;Conductive members 33: Amorphous conductive layer

Claims

1. A method for forming a conductive member, comprising: forming, on a substrate, a first portion including a first element constituting a conductive member to be obtained, a second element that undergoes a eutectic reaction with the first element, and a second portion including a third element that forms an intermetallic compound with the second element; After the first portion is brought into a liquid phase state, the temperature of the substrate is adjusted to crystallize primary crystals of the first element; diffusing the second element from the first portion to the second portion while maintaining the temperature of the substrate at the same temperature, thereby increasing the ratio of the crystal to liquid phase of the first element in the first portion and growing crystal grains of the first element; forming the first portion after the diffusion of the second element into the second portion into the conductive member having crystal grains of the first element; A method for forming a conductive member having the following structure:

2. The method for forming a conductive member according to claim 1 , wherein the first portion is formed by stacking a conductive layer containing the first element and a metal layer containing the second element.

3. 3. The method for forming a conductive member according to claim 1, wherein the first element is a semiconductor material.

4. The method for forming a conductive member according to claim 3 , wherein the first element is silicon.

5. 3. The method for forming a conductive member according to claim 1, wherein the first portion is doped with a fourth element having a lower melting point than the first element and forming a complete solid solution with the first element, and the conductive member is doped with the fourth element in the first element.

6. The method for forming a conductive member according to claim 5 , wherein the first element and the fourth element are semiconductor materials.

7. 7. The method for forming a conductive member according to claim 6, wherein the first element is silicon and the fourth element is germanium.

8. 8. The method for forming a conductive member according to claim 4, wherein the second element is aluminum and the third element is titanium.

9. 4. The method for forming a conductive member according to claim 3, wherein the first element is germanium.

10. 10. The method for forming a conductive member according to claim 1, further comprising providing a barrier layer between the first portion and the second portion to act as a barrier to the second element, and the barrier layer suppresses and controls diffusion of the second element into the second portion.

11. The method of claim 10, wherein the barrier layer is titanium nitride.

12. 12. The method for forming a conductive member according to claim 1, further comprising removing a portion above the conductive member after forming the first portion into the conductive member.

13. 13. The method for forming a conductive member according to claim 12, further comprising the steps of: removing a portion above the conductive member; forming an amorphous conductive layer containing the first element on the conductive member; and transferring crystal grains of the conductive member to the amorphous conductive layer by solid phase epitaxial growth, thereby forming the conductive member thicker.

14. The method for forming a conductive member according to claim 1 , further comprising providing a diffusion suppression layer between the first portion and the second portion to suppress diffusion of the first element into the second portion.

15. The method for forming a conductive member according to claim 14 , wherein the diffusion suppression layer contains the first element.

16. A method for forming a channel of a semiconductor device, comprising: forming a first portion on a substrate, the first portion including a first element that is a semiconductor material constituting a channel to be obtained, a second element that undergoes a eutectic reaction with the first element, and a second portion including a third element that forms an intermetallic compound with the second element; After the first portion is brought into a liquid phase state, the temperature of the substrate is adjusted to crystallize primary crystals of the first element; diffusing the second element from the first portion to the second portion while maintaining the temperature of the substrate at the same temperature, thereby increasing the ratio of the crystal to liquid phase of the first element in the first portion and growing crystal grains of the first element; the first portion after the diffusion of the second element into the second portion is completed is made into a conductive member having crystal grains of the first element and serving as the channel; removing a portion above the conductive member; A method for forming a channel having the following structure:

17. 17. The method of claim 16, wherein the first element is silicon.

18. 17. The method for forming a channel according to claim 16, wherein the first portion is made of silicon as the first element and germanium as a fourth element added thereto, and the conductive member is silicon germanium.

19. 19. The method for forming a channel according to claim 16, further comprising providing a barrier layer between the first portion and the second portion to serve as a barrier to the second element, and the barrier layer suppresses and controls diffusion of the second element into the second portion.

20. 20. The method for forming a channel according to claim 16, further comprising the steps of: removing a portion located above the conductive member; forming an amorphous conductive layer containing the first element on the conductive member; and transferring crystal grains of the conductive member to the amorphous conductive layer by solid phase epitaxial growth, thereby making the conductive member thicker and the channel thicker.

Citation Information

Patent Citations

  • Methods for purifying silicon

    JP2013522160A

  • Methods of growing heteroepitaxial single crystal or large grained semiconductor films and devices thereon

    US20100237272A1

  • Methods of growing heteroepitaxial single crystal or large grained semiconductor films and devices thereon

    US20150263201A1