Semiconductor device and method for operating a semiconductor device - Patent Application 20070122997

Abstract

According to one embodiment, the semiconductor device (100) comprises a semiconductor body (1) having a first side (10) and a second side (20) opposite the first side. The semiconductor device further comprises a first thyristor structure (I) and a second thyristor structure (II). The second thyristor structure is arranged laterally beside the first thyristor structure. Each of the first thyristor structure and the second thyristor structure comprises a first base region (11a, 11b) on the first side and a gate electrode (1a, 1b) on the first side adjacent to the assigned first base region. The first base regions of the two thyristor structures are regions of the semiconductor body and are of the same conductivity type. The gate electrodes of the thyristor structures are individually and singly electrically contactable.

Description

[Technical Field]

[0001] The present disclosure relates to semiconductor devices and methods for operating semiconductor devices. Additionally, the present disclosure relates to housings for such semiconductor devices and semiconductor modules including such semiconductor devices. [Background technology]

[0002] French Patent Application Publication No. 2560440 relates to a self-igniting thyristor with an integrated structure for high-current on / off switching and its control circuit. U.S. Patent Application Publication No. 2013 / 207157 relates to a reverse-conducting power semiconductor device. U.S. Patent No. 3795846 relates to an integrated semiconductor device having functional regions separated by a pn junction between them. Haschimoto O et al., "2.5KV-2000A MONOLITHIC REVERSE CONDUCTING GATE TURN-OFF THYRISTOR," January 1, 1986 (1986-01-01), ADVANCES IN COLLOID SCIENCE, NEW YORK, INTERSCIENCE, US, pp. 388-392, XP000014619, relates to a 2.5KV-2000A monolithic reverse-conducting gate turn-off thyristor. Summary of the Invention [Problem to be solved by the invention]

[0003] There is a need for improved semiconductor devices, for example, semiconductor devices with controlled turn-on behavior, and there is also a need for methods for operating such semiconductor devices. [Means for solving the problem]

[0004] Embodiments of the present disclosure relate to improved semiconductor devices, such as semiconductor devices with controlled turn-on behavior, methods for operating such semiconductor devices, housings for such semiconductor devices, and semiconductor modules having such semiconductor devices.

[0005] First, the semiconductor device is specified. According to one embodiment, a semiconductor device includes a semiconductor body having a first side and a second side opposite the first side. The semiconductor device further includes a first thyristor structure and a second thyristor structure. The second thyristor structure is laterally disposed beside the first thyristor structure. Each of the first and second thyristor structures includes a first base region on the first side and a gate electrode on the first side adjacent to and in electrical contact with the assigned first base region. The first base regions of the two thyristor structures are of the same conductivity type and are each a region of the semiconductor body. The gate electrodes of the thyristor structures are individually and independently electrically contactable.

[0006] Thyristor-type semiconductor devices designed to establish an autonomous, gate-current-independent on-state exhibit uncontrollable turn-on behavior, known as triggering or latching. When latched, the anode-cathode voltage rapidly and irrecoverably collapses. The associated rapid rise in anode current can be problematic for diodes connected in power electronic circuits, forcing them to perform reverse recovery under large negative current rates of change. To avoid overstressing diodes or any other circuit elements with limited capability for rapid current rates of change, inductive snubbers are often used to limit current transients. In most cases, added circuit impedances ("chokes") cause induced voltages during switching, necessitating a voltage-limiting snubber circuit ("clamp") consisting of a diode, resistor, and capacitor. Snubber circuit elements entail significant size, cost, and complexity that can limit the applicability of the overall layout required for reliable operation of thyristor-based circuits.

[0007] The present disclosure is based, inter alia, on the idea of ​​providing a fully controllable semiconductor device having two thyristor structures. This allows for the elimination of snubbers. The first and second thyristor structures can be supplied with separate gate currents. In this way, the first thyristor structure can be turned on before the second thyristor structure is turned on. For example, the first thyristor structure can be designed not to latch when turned on by its assigned gate electrode. Thus, the anode current and / or voltage transient of the first thyristor structure can be controlled by the gate current. The appearance of the anode-cathode voltage drop can then be smoothly passed on to the second thyristor structure, which can be turned on by its respective gate electrode thereafter.

[0008] Here and below, an element or region is "assigned" to another element or region if they belong to the same thyristor structure or the same thyristor cell, respectively. The expression "respectively" is used interchangeably.

[0009] A semiconductor device specified herein may be a power semiconductor device, for example, a gate turn-off thyristor (GTO) or a gate-commutated thyristor (GCT) or an integrated gate-commutated thyristor (IGCT) or a reverse-conducting IGCT (RC-IGCT) or an asymmetric IGCT (AS-IGCT) or a reverse-blocking IGCT (RB-IGCT).

[0010] The semiconductor body may be a continuous body, e.g., an integrally formed semiconductor body. For example, the semiconductor body extends continuously across the first and second thyristor structures. The first and second thyristor structures may each comprise or be assigned to a portion of the semiconductor body. In other words, the semiconductor device may be or comprise a semiconductor chip having a single semiconductor body, and the first and second thyristor structures may be integrated into the semiconductor chip.

[0011] The first and second side surfaces of the semiconductor body may extend essentially parallel to each other and / or parallel to a main extension plane of the semiconductor body.

[0012] The first thyristor structure and the second thyristor structure are laterally arranged next to each other. Here and hereinafter, the lateral direction is, for example, a direction parallel to the first side surface of the semiconductor body, and / or parallel to the second side surface, and / or parallel to the main extension plane. For example, the first thyristor structure is arranged in the center of the semiconductor body, and / or the second thyristor structure laterally surrounds the first thyristor structure.

[0013] The first thyristor structure includes a gate electrode and a first base region. Similarly, the second thyristor structure includes a gate electrode and a first base region. Here and below, when a structure such as a thyristor structure includes an element or region such as an electrode, this means, for example, that the element or region is assigned to this structure on a one-to-one basis.

[0014] The first base regions of the thyristor structures are of the same conductivity type, which may be hole-conducting (also called p-conductivity or p-doped). Alternatively, they may be electron-conducting (also called n-conductivity or n-doped). Therefore, the first base regions of the two thyristor structures may both be p-doped or n-doped. Each first base region may be adjacent to or form part of the first side surface. The gate electrodes of the two thyristor structures are adjacent to, i.e., in direct mechanical contact with, the assigned first base region.

[0015] The different regions of the semiconductor body defined here and below may each have a homogeneous doping concentration throughout their entire volume. The regions may, for example, be formed continuously without any breaks. "Homogeneous" means uniform within the limits of manufacturing tolerances.

[0016] The gate electrodes of the two thyristor structures can be electrically contacted separately and independently. For example, they are electrically connected only through reverse-biased p-n junctions in the semiconductor body, and are therefore substantially isolated. The two gate electrodes may be set to different potentials during operation of the semiconductor device. For example, gate currents may be applied separately and independently through the two gate electrodes of the two thyristor structures.

[0017] According to a further embodiment, the first thyristor structure is designed not to latch when turned on by a (reasonable) gate current applied through the assigned gate electrode. Thus, the anode-cathode current through the first thyristor structure can be controlled by the gate current, e.g., the amplitude of the anode-cathode current can be controlled by the amplitude of the gate current applied through the assigned gate electrode. For example, the first thyristor structure is designed not to be self-sustaining, e.g., to automatically turn off when the gate current through the assigned gate electrode is turned off. The second thyristor structure may be designed to latch when turned on. For example, the second thyristor structure is self-sustaining.

[0018] Whether the first and second thyristor structures latch or not can be set, for example, by correspondingly adjusting the doping concentrations in the thyristor structures, i.e., by appropriately selecting the doping concentrations in one or more regions of the semiconductor body allocated to the thyristor structures, the thyristor structures can be set to latch or not.

[0019] In practice, non-latching behavior can be achieved in several ways, for example, by adjusting the doping concentration within the semiconductor body. For example, the doping concentration within the first base region and / or the second base region of the first thyristor structure can be increased until the desired non-latching behavior is achieved. Additionally or alternatively, the doping concentration within the first and / or second emitter regions of the first thyristor structure can be decreased until the desired non-latching behavior is achieved. The second base region and the first and second emitter regions are further introduced below.

[0020] According to further embodiments, at least one region of the semiconductor body allocated to the first thyristor structure has a different doping concentration than a corresponding region of the semiconductor body allocated to the second thyristor structure, the corresponding region of the second thyristor structure being a region having the same function within the thyristor structure. For example, the doping concentrations in the two corresponding regions differ from each other by at least two times, at least five times, at least ten times, at least one hundred times, or at least one thousand times.

[0021] According to a further embodiment, the first base region of the first thyristor structure has a higher doping concentration than the first base region of the second thyristor structure, which can reduce current gain due to the higher doping concentration.

[0022] The second thyristor structure may be designed like a standard thyristor structure, such as a GTO thyristor structure, with a more highly doped first base region, so that the first thyristor structure does not latch when turned on by, for example, a reasonably controlled gate electrode.

[0023] According to a further embodiment, the semiconductor device comprises a diode structure, for example an anti-parallel diode structure or a freewheeling diode structure, which is for example integrated into the semiconductor body, meaning that the diode structure comprises or is respectively assigned to a part of the semiconductor body.

[0024] The diode structure may be laterally disposed between the first thyristor structure and the second thyristor structure, or the diode structure may be laterally surrounded by or surround the first and second thyristor structures.

[0025] The diode structure may include, for example, a first diode electrode on a first side of the semiconductor body. For example, the first diode electrode can be electrically contacted separately and independently from the gate electrode of the thyristor structure. Furthermore, the diode structure may include a second diode electrode on a second side of the semiconductor body. The diode structure may also include a first diode region and a second diode region, both of which are regions of the semiconductor body. The first diode region and the second diode region are of different conductivity types. For example, the first diode region may be of the second conductivity type and the second diode region may be of the first conductivity type, or vice versa. For example, here and below, the first conductivity type is electron conduction and the second conductivity type is hole conduction.

[0026] The first diode region may be adjacent to the first diode electrode, and / or the second diode region may be adjacent to the second diode electrode. The first and second diode regions may be adjacent to each other. A p-n junction may be formed between the first diode region and the second diode region. In the integrated diode structure, the semiconductor device is a reverse conducting (RC) semiconductor device.

[0027] The first diode region is separated from either of the first base regions of the thyristors by, for example, a reverse-biased pn junction in the semiconductor body.

[0028] Each of the electrodes specified herein may be made of metal. Moreover, in addition to the first and second thyristor structures, the semiconductor device may include additional thyristor structures. For example, the additional thyristor structures may also each include a portion of the semiconductor body or be assigned a portion of the semiconductor body. Similarly, the semiconductor device may include one or more additional diode structures, each of which may be designed like the diode structures described herein.

[0029] According to further embodiments, the area of ​​the first thyristor structure is smaller than the area of ​​the second thyristor structure. For example, the area of ​​the first thyristor structure is at most 50%, 30%, 20%, or 10% of the area of ​​the second thyristor structure. This may be advantageous in terms of thermal management of the semiconductor device.

[0030] As used herein, the area of ​​a structure is defined as the area of ​​a particular region of the structure when projected onto, for example, a major extension surface, a first side surface, or a second side surface of a semiconductor body. For example, the area of ​​a thyristor structure is defined as the area of ​​a projected assigned first base region, a projected gate electrode, or a projected active region. Similarly, the area of ​​a diode structure may be defined as the area of ​​a projected assigned first diode region, a projected first diode electrode, or a projected active region.

[0031] According to further embodiments, the area of ​​the second thyristor structure is at least 60%, or at least 80%, or at least 90% of the total area of ​​the semiconductor device, which may be the total area of ​​the first side and / or the second side.

[0032] According to further embodiments, the doping concentration in the first base region of the first thyristor structure is at least twice, or at least five times, or at least ten times, or at least 100 times, or at least 1000 times, the doping concentration in the first base region of the second thyristor structure.

[0033] According to a further embodiment, the second thyristor structure is a gate-commutated thyristor structure having a plurality of thyristor cells. For example, different thyristor cells are connected or connectable in parallel. Each thyristor cell may include a portion of the first base region of the second thyristor structure and a portion of the gate electrode of the second thyristor structure.

[0034] According to a further embodiment, the first base regions of the first and second thyristor structures are separated from each other by at least one isolation region of the semiconductor body that is of a different, i.e., opposite, conductivity type than the first base region. For example, the first base regions of the two thyristor structures are separated from each other by at least one isolation region at every location such that there is no direct contact between the two first base regions. For example, the first base regions are p-conducting, and the at least one isolation region therebetween is n-conducting.

[0035] According to a further embodiment, the first base region of the first thyristor structure is formed continuously, for example without any breaks.

[0036] According to a further embodiment, the first base region of the second thyristor structure is formed continuously, i.e. without any breaks.

[0037] According to a further embodiment, the first thyristor structure comprises a first main electrode on a first side, a second main electrode on a second side, a first emitter region on the first side adjacent to and in electrical contact with the first main electrode of the first thyristor structure, a second emitter region on the second side adjacent to and in electrical contact with the second main electrode of the first thyristor structure, and a second base region. The first main electrode can be a cathode and the second main electrode can be an anode, or vice versa.

[0038] According to a further embodiment, the second thyristor structure comprises a first main electrode on a first side, a second main electrode on a second side, a first emitter region on the first side adjacent to and in electrical contact with the first main electrode of the second thyristor structure, a second emitter region on the second side adjacent to and in electrical contact with the second main electrode of the second thyristor structure, and a second base region, where again the first main electrode can be a cathode and the second main electrode can be an anode, or vice versa.

[0039] In the case of several thyristor cells, each thyristor cell may have its own first main electrode on a first side surface and / or its own first emitter region on a first side surface adjacent to an assigned first main electrode.

[0040] According to a further embodiment, the first emitter region of the thyristor structure, the second emitter region of the thyristor structure, and the second base region of the thyristor structure are each regions of the semiconductor body.

[0041] According to a further embodiment, the first emitter region and the second base region of the thyristor structure are each of a first conductivity type, for example n-conductivity.

[0042] According to a further embodiment, the first base region and the second emitter region of the thyristor structure are each of a second conductivity type, for example p-conductivity.

[0043] According to a further embodiment, the second base region of the thyristor structure is disposed between the second emitter region and the first base region in the vertical direction. The vertical direction is perpendicular to the lateral direction, i.e., perpendicular to the first and / or second side surfaces and / or the main extension surface of the semiconductor body. Therefore, the term "vertical" does not necessarily characterize a direction parallel to the direction of gravity. Rather, it is used to designate a direction extending perpendicular to the lateral direction.

[0044] According to a further embodiment, in the vertical direction the first base region of the thyristor structure is arranged between the respectively assigned first emitter region and the respectively assigned second base region.

[0045] In other words, when viewed from the first side to the second side, each thyristor structure comprises a first emitter region, a first base region, a second base region, and a second emitter region, in that order.

[0046] A p-n junction may be formed between the first emitter region and the first base region, and / or between the first base region and the second base region, and / or between the second base region and the second emitter region. Adjacent regions may be adjacent to each other.

[0047] According to further embodiments, the first emitter region of the first thyristor structure has a lower doping concentration than the first emitter region of the second thyristor structure, for example, the doping concentration in the first emitter region of the second thyristor structure is at least two times, or at least five times, or at least ten times, or at least one hundred times, or at least one thousand times, the doping concentration in the first emitter region of the first thyristor structure.

[0048] According to further embodiments, the second emitter region of the first thyristor structure has a lower doping concentration than the second emitter region of the second thyristor structure, for example, the doping concentration in the second emitter region of the second thyristor structure is at least two times, or at least five times, or at least ten times, or at least 100 times, or at least 1000 times, the doping concentration in the second emitter region of the first thyristor structure.

[0049] According to further embodiments, the second base region of the first thyristor structure has a higher doping concentration than the second base region of the second thyristor structure, for example, the doping concentration in the second base region of the first thyristor structure is at least two times, or at least five times, or at least ten times, or at least 100 times, or at least 1000 times greater than the doping concentration of the second base region of the second thyristor structure.

[0050] Also, as stated in the last paragraph, if the doping concentrations in the first emitter region and / or the second emitter region and / or the second base region are different, the first thyristor structure will not latch when it is turned on by a reasonably controlled gate electrode, and the anode-cathode voltage drop may be smoothly passed on to the second thyristor structure.

[0051] According to further embodiments, the first and / or second emitter regions of the first and / or second thyristor structures are penetrated by one or more short circuits. A short circuit is a region of the semiconductor body that penetrates the emitter region and is of the opposite conductivity type to the emitter region it penetrates. The short circuit may be adjacent to and in electrical contact with the first or second main electrode, respectively. The short circuit through the first emitter region may be electrically connected to the assigned first base region and / or have the same doping concentration as the assigned first base region. The short circuit through the second emitter region may be connected to the assigned second base region and / or have the same doping concentration as the assigned second base region. In other words, the short circuit through the first emitter region may electrically connect the assigned first main electrode with the assigned first base region. The short circuit through the second emitter region may electrically connect the assigned second main electrode with the assigned second base region.

[0052] For example, in the event of a short circuit in the first and / or second emitter regions of the first thyristor structure, the first thyristor structure will not latch when it is turned on by a reasonably controlled gate electrode, and the anode-cathode voltage drop may be smoothly passed on to the second thyristor structure.

[0053] According to a further embodiment, the second base region of the thyristor structure is formed by a continuous second base layer extending across the first and second thyristor structures. For example, the second base layer is continuous and of the first conductivity type. In other words, the second base regions are connected to each other. For example, the second base regions have the same doping concentration within manufacturing tolerances. In this case, the second base layer may be homogeneously doped.

[0054] In a further embodiment, the second emitter region of the thyristor structure is formed by a continuous second emitter layer extending across the first and second thyristor structures. For example, the second emitter layer is continuous and of the second conductivity type. In other words, the second emitter regions are connected to each other. For example, the second emitter regions have the same doping concentration within manufacturing tolerances. In this case, the second emitter layer may be homogeneously doped.

[0055] According to a further embodiment, the second main electrodes of the first and second thyristor structures are formed by a continuous second main electrode extending across the first and second thyristor structures.

[0056] According to a further embodiment, the first emitter regions of the thyristor structure have the same doping concentration within the limits of manufacturing tolerances.

[0057] According to a further embodiment, each of the second base regions includes a lightly doped drift region and a heavily doped buffer region. This means that the buffer region has a higher doping concentration than the drift region in each second base region. Thus, the second base layer may include a lightly doped drift layer and a heavily doped buffer layer. For example, the doping concentration of the buffer region or buffer layer may be at least 10 times, or at least 100 times, or at least 1000 times, or at least 10,000 times, that of the drift region or drift layer. The buffer region / layer may be vertically disposed between the drift region / layer and the second emitter region / layer.

[0058] If the second base regions of the first and second thyristor structures have different doping concentrations, the buffer regions of the two thyristor structures may have different doping concentrations, while the drift regions may have the same doping concentration within the limits of manufacturing tolerances.

[0059] In a further embodiment, the first and second thyristor structures are laterally alternatingly arranged. Thus, a line parallel to the first and / or second side and / or main extension plane of the semiconductor body alternately intersects the first and second thyristor structures. For example, the first thyristor structure interdigitates with the second thyristor structure. Such an arrangement can be advantageous from the standpoint of thermal management.

[0060] For example, the first and second thyristor structures may both have rotational symmetry about an axis of rotation, the axis of rotation may extend parallel to the vertical direction, and a circular line about the axis of rotation may intersect alternating sections of the first and second thyristor structures.

[0061] Next, a housing for a semiconductor device is specified, the housing being configured for a semiconductor device according to any embodiment described herein.

[0062] According to one embodiment of the housing, the housing comprises at least two main electrode structures for electrically contacting the first and second main electrodes of the thyristor structure and / or diode structure. Additionally, the housing comprises two or more auxiliary electrode structures: a first auxiliary electrode structure for electrically contacting the gate electrode of the first thyristor structure, and a separate second auxiliary electrode structure for electrically contacting the gate electrode of the second thyristor structure. The electrode structures may be incorporated into a substrate of the housing. For example, the substrate may be or include plastic or ceramic.

[0063] Next, a semiconductor module is specified. The semiconductor module may include a semiconductor device as disclosed herein disposed within a housing as disclosed herein. The electrode structure of the housing is then, for example, electrically connected to appropriate electrodes of the semiconductor device. The semiconductor module may be, for example, a power semiconductor module.

[0064] Next, a method for operating a semiconductor device is specified. The method is suitable for operating a semiconductor device according to any embodiment described herein, for example. Consequently, all features disclosed in relation to the semiconductor device are also disclosed in relation to the method, and vice versa.

[0065] According to one embodiment of the method, the method includes a first step in which a first gate current is applied through the gate electrode of a first thyristor structure but no current is applied through the gate electrode of a second thyristor structure, and then a second gate current is applied through the gate electrode of the second thyristor structure in a second step. After performing the second step, the first gate current may also be applied through the gate electrode of the first thyristor structure.

[0066] A first gate current may be applied between the gate electrode and the first main electrode of the first thyristor structure. A second gate current may be applied between the gate electrode and the first main electrode of the second thyristor structure. During these steps, an anode-cathode voltage may be applied between the first main electrode and the second main electrode of the thyristor structure. Applying the first gate current switches the first thyristor structure to an ON state. Applying the second gate current switches the second thyristor structure to an ON state.

[0067] By initially applying a first gate current through the gate electrode of the first thyristor structure, control over the anode voltage is maintained by controlling the amplitude of the gate current, which moderates the rate of current commutation from a forward conducting diode, e.g., a freewheeling diode that is forced by the power electronics to perform reverse recovery following a turn-on event. Thus, the diode in this example enjoys protection from an unsafe reverse recovery condition by virtue of its moderated current decay rate.

[0068] According to a further embodiment, the second gate current is applied after a sudden decay or drop in the anode-cathode voltage in the semiconductor device. Due to the first thyristor structure, the sudden decay or drop or drop in the anode-cathode voltage is controlled. The second step is performed only when the anode-cathode voltage has decayed to, for example, a safe value. The anode-cathode voltage may be approximately 10% of the DC link voltage.

[0069] With the first and second thyristor structures in the on state, the first and / or second gate currents can be turned off. As long as the current between the anode and cathode exceeds the holding current, at least the second thyristor structure, and ultimately the first thyristor structure, remains in the on state.

[0070] Although it is possible to reduce the second gate current to zero, this is often not done in practice. A relatively small DC "back porch" current is usually maintained throughout the conduction period. This practice has various incentives related to keeping the second thyristor latched under all circumstances.

[0071] Reducing the first gate current to zero may turn off the first thyristor structure in normal operation, which assumes that the second thyristor structure is on. As one might expect, the first thyristor structure does not retain significant capability for hard turn-off, and attempts to do so will most likely fail.

[0072] According to a further embodiment, the method includes a third step in which no turn-off gate current is applied through the gate electrode of the second thyristor structure and / or through the gate electrode of the first thyristor structure. The turn-off gate current may be applied simultaneously through the first and second thyristor structures. In this step, the thyristor structures are switched to their respective off states.

[0073] Hereinafter, a semiconductor device and a method for operating the semiconductor device will be described in more detail with reference to the drawings based on exemplary embodiments. The accompanying figures are included to provide a further understanding. In the figures, elements of the same structure and / or function may be referred to by the same reference numerals. It should be understood that the embodiments shown in the figures are exemplary representations and are not necessarily drawn to scale. To the extent that elements or components correspond to each other in terms of their function in different figures, the description thereof will not be repeated for each of the following figures. For clarity, elements may not appear with corresponding reference symbols in all figures. [Brief explanation of the drawings]

[0074] [Figure 1] 1A-1D are cross-sectional views illustrating different exemplary embodiments of a semiconductor device. [Figure 2] 1A-1D are cross-sectional views illustrating different exemplary embodiments of a semiconductor device. [Figure 3] FIG. 3 is a top view of the exemplary embodiment of FIG. 1 or FIG. 2. [Figure 4] 1 is a cross-sectional view illustrating a further exemplary embodiment of a semiconductor device. [Figure 5] 1 is a top view illustrating a further exemplary embodiment of a semiconductor device. [Figure 6] 1 is a cross-sectional view illustrating a further exemplary embodiment of a semiconductor device. [Figure 7] 1 is a top view illustrating a further exemplary embodiment of a semiconductor device. [Figure 8]3A-3C illustrate different views of further exemplary embodiments of a semiconductor device. [Figure 9] 3A-3C illustrate different views of further exemplary embodiments of a semiconductor device. [Figure 10] 3A-3C illustrate different views of further exemplary embodiments of a semiconductor device. [Figure 11] 3A-3C illustrate different views of further exemplary embodiments of a semiconductor device. [Figure 12] 1 is a flowchart of an exemplary embodiment of a method for operating a semiconductor device. DETAILED DESCRIPTION OF THE INVENTION

[0075] 1 shows in cross-section a first exemplary embodiment of a semiconductor device 100. The semiconductor device 100 comprises a semiconductor body 1, which may be silicon-based. The semiconductor body 1 comprises a first side 10 and a second side 20 opposite the first side 10. Furthermore, the semiconductor device 100 comprises a first thyristor structure I and a second thyristor structure II that are laterally arranged beside each other but laterally separated from each other.

[0076] The first thyristor structure I comprises a gate electrode 1a and a first main electrode 2a, both on a first side surface 10. Furthermore, the first thyristor structure I comprises a second main electrode 3a on a second side surface 20. In the direction from the first side surface 10 to the second side surface 20, the portion of the semiconductor body 1 assigned to or belonging to the first thyristor structure I comprises a first emitter region 12a, a first base region 11a, a second base region 14a, and a second emitter region 13a. The first emitter region 12a and the second base region 14a are of the same first conductivity type, e.g., n-conductivity. The first base region 11a and the second emitter region 13a are of the same second conductivity type, e.g., p-conductivity. The first emitter region 12a may have a higher doping concentration than the second base region 14a.

[0077] The gate electrode 1a is adjacent to the first base region 11a in the lateral area beside the first emitter region 12a. The first main electrode 2a is adjacent to the first emitter region 12a. The second main electrode 3a is adjacent to the second emitter region 13a. The first main electrode 2a can be a cathode, and the second main electrode 3a can be an anode.

[0078] The second thyristor structure II comprises the same elements as the first thyristor structure I: a gate electrode 1b, a first main electrode 2b, a second main electrode 3b, a first emitter region 12b, a first base region 11b, a second base region 14b, and a second emitter region 13b. The order of the different regions is the same as in the first thyristor structure I. In the second thyristor structure II, the gate electrode 1b also adjoins the first base region 11b in the lateral area beside the first emitter region 12b. The first main electrode 2b adjoins the first emitter region 12b. The second main electrode 3b adjoins the second emitter region 13b. Moreover, also in the second thyristor structure II, the first emitter region 12b and the second base region 14b are of the same conductivity type, e.g., n-conductivity, while the first base region 11b and the second emitter region 13b are of a second conductivity type, e.g., p-conductivity.

[0079] The difference between the first thyristor structure I and the second thyristor structure II is the doping concentration in the respective first base regions 11a, 11b. Both first base regions 11a, 11b have the same conductivity type, e.g., p-type conductivity, but the doping concentration in the first base region 11a of the first thyristor structure I is higher than the doping concentration in the first base region 11b of the second thyristor structure II. For example, the doping concentration in the first base region 11a of the first thyristor structure I is at least 10 times, or at least 100 times, higher than the doping concentration in the first base region 11b of the second thyristor structure II.

[0080] The first base regions 11a, 11b of the two thyristor structures I, II are laterally separated from one another by an n-doped separation region 14c having the same doping concentration as the second base regions 14a, 14b.

[0081] 1, the second base regions 14a, 14b of the two thyristor structures I, II are realized by a second base layer 14 that extends continuously across the first thyristor structure I and the second thyristor structure II. Similarly, the second emitter regions 13a, 13b of the first thyristor structure I and the second thyristor structure II are realized by a second emitter layer 13 that extends continuously across the first thyristor structure I and the second thyristor structure II. Also, the second main electrodes 3a, 3b of the first thyristor structure I and the second thyristor structure II are realized by a common second electrode layer 3 that extends continuously across the first thyristor structure I and the second thyristor structure II.

[0082] The gate electrodes 1a, 1b of the two thyristor structures I, II are individually and independently electrically contactable. Therefore, to turn on the first thyristor structure I, a first gate current can be first applied through the gate electrode 1a of the first thyristor structure I. Due to the higher doping concentration in the first base layer 11a, this turn-on occurs in a controlled manner by a controlled increase in the anode current or a controlled decay in the anode-cathode voltage, respectively. Subsequently, to turn on the second thyristor structure II, a second gate current can be applied through the gate electrode 1b of the second thyristor structure II. Due to the controlled turn-on of the first thyristor structure I, a diode connected in series with the semiconductor device 100 can be protected without the use of a snubber.

[0083] 2 shows a second exemplary embodiment of the semiconductor device 100 in a cross-sectional view. In contrast to the first exemplary embodiment of FIG. 1, the second base layer 14 now comprises a drift layer 15 and a buffer layer 16, with the buffer layer 16 being arranged between the second emitter layer 13 and the drift layer 15. The buffer layer 16, for example, has a higher doping concentration than the drift layer 15. The drift layer 15 and the buffer layer 16 are furthermore of the same conductivity type, for example n-conductivity.

[0084] In the second base layer 14 with the buffer layer 16 and the drift layer 15, each of the thyristor structures I, II includes a drift region 15a, 15b and a buffer region 16a, 16b.

[0085] 2, the first thyristor structure I includes a third base region 17a between the first base region 11a and the second base region 14a. The third base region 17a has the same conductivity type as the first base region 11a but a lower doping concentration. For example, the doping concentration in the third base region 17a is the same as the doping concentration in the first base region 11b of the second thyristor structure II.

[0086] Figure 3 shows the exemplary embodiment of figures 1 and 2 in a top view on a first side 10 of the semiconductor body 1. The dashed lines in figure 3 indicate the cross-sectional plane of the view of figure 1 or 2, respectively.

[0087] As can be seen in Figure 3, the second thyristor structure II laterally surrounds the first thyristor structure I. The first thyristor structure I is disposed in the center of the semiconductor device 100. The gate electrodes 1a, 1b of the thyristor structures I, II are each formed continuously with a plurality of cuts or holes. The first main electrodes 2a, 2b are located within the cuts or holes.

[0088] 3 that the area of ​​the first thyristor structure I is smaller than the area of ​​the second thyristor structure II. For example, the area of ​​the second thyristor structure is at least 60% of the total area of ​​the semiconductor device 100.

[0089] FIG. 4 illustrates a cross-sectional view of a further exemplary embodiment of a semiconductor device 100. Here, an anti-parallel diode structure III is laterally disposed between a first thyristor structure I and a second thyristor structure II. The anti-parallel diode structure III includes a first main electrode 1c on a first side surface 10 and a second main electrode 3c on a second side surface 20. Furthermore, the anti-parallel diode structure III includes a first diode region 18c and second diode regions 13c, 15c, and 16c. The first diode region 18c may be of the same conductivity type as the first base regions 11a and 11b. For example, the first diode region 18c has the same doping concentration as the first base region 11b of the second thyristor structure II. The second diode regions 13c, 15c, and 16c are of the opposite conductivity type to the first diode region 18c. For example, the second diode regions 13c, 15c, and 16c include a drift region 15c, a buffer region 16c, and a contact region 13c. The contact region 13c may have the highest doping concentration. The doping concentration of the drift region 15c may be the same as the doping concentration of the drift regions 15a and 15b of the first thyristor structure I and the second thyristor structure II, and the doping concentration of the buffer region 16c may be the same as the doping concentration of the buffer regions 16a and 16b of the first thyristor structure I and the second thyristor structure II.

[0090] With the anti-parallel diode structure III formed in the same semiconductor body 1 as the first thyristor structure I and the second thyristor structure II, the semiconductor device 100 of FIG. 4 constitutes a reverse conducting (RC) semiconductor device 100.

[0091] FIG. 5 shows the semiconductor device of FIG. 4 in a top view onto a first side 10 of the semiconductor body 1. FIG. 6 shows a further exemplary embodiment of a semiconductor device 100 in a cross-sectional view. The difference with the exemplary embodiments of FIGS. 4 and 5 is that the second thyristor structure II is now realized as a commutated gate transistor structure having a plurality of thyristor cells. Each thyristor cell is assigned its own first emitter region 12b and its own first main electrode 2b. The illustrated semiconductor device 100 is, for example, an RC-IGCT.

[0092] FIG. 7 shows the semiconductor device 100 of FIG. 6 in a top view onto a first side 10 of the semiconductor body 1.

[0093] 8 shows a further exemplary embodiment of the semiconductor device 100 in a top view on the first side 10. In contrast to the previous exemplary embodiment, the anti-parallel diode structure III is now arranged in the center of the semiconductor device 100 and is laterally surrounded by the first thyristor structure I and the second thyristor structure II. The two thyristor structures I, II or their first base regions 11 a, 11 b, respectively, are separated from each other by an isolation region 14 c.

[0094] FIG. 9 illustrates a cross-sectional view of a further exemplary embodiment of a semiconductor device 100. Here, the first base regions 11a, 11b may have the same doping concentration. The first emitter region 12b of the second thyristor structure II has a higher doping concentration than the first emitter region 12a of the first thyristor structure I. The second emitter region 13b of the second thyristor structure II has a higher doping concentration than the second emitter region 13a of the first thyristor structure I. The buffer region 16a of the first thyristor structure I has a higher doping concentration than the buffer region 16b of the second thyristor structure II. Each of these differences in doping concentrations can achieve a similar effect to that described with respect to FIG. 1, namely, that the first thyristor structure I can be turned on in a controlled manner, and then the associated controlled decay of the anode-cathode voltage can be smoothly passed on to the second thyristor structure II.

[0095] In particular, to achieve the above-described effects, it is sufficient to have a difference in doping concentration in one region of the first thyristor structure I and the second thyristor structure II, for example, only the first base regions 11 a, 11 b, or only the second base regions 14 a, 14 b, or only the first emitter regions 12 a, 12 b, or only the second emitter regions 13 a, 13 b. However, any combination of differently doped regions is possible, such as the exemplary embodiment of FIG. 9 in which three regions (the second base region, the first emitter region, and the second emitter region) are differently doped, for example, all four regions can be differently doped.

[0096] 10 shows a further exemplary embodiment of the semiconductor device 100 in a top view on the first side 10. The first thyristor structure I and the second thyristor structure II are alternately arranged along the lateral direction. The first thyristor structure I engages with the second thyristor structure II in a comb-like manner such that a circular line around the center of the semiconductor device 100 alternately crosses the cross sections of the first thyristor structure I and the second thyristor structure II. The arrangement of FIG. 10 is beneficial from a thermal management perspective.

[0097] 11 shows a further exemplary embodiment of a semiconductor device 100 in a cross-sectional view. The difference with the previous exemplary embodiment is a short circuit 19a, also called an emitter short circuit, that runs through the first emitter region 12a of the first thyristor structure I. The short circuit 19a electrically connects the first main electrode 2a with the first base region 11a. The short circuit 19a is a region of the semiconductor body 1, e.g., having the same doping concentration and the same conductivity type as the first base region 11a, and therefore the opposite conductivity type to the first emitter region 12a. With this short circuit 19a, the first thyristor structure I does not latch when turned on.

[0098] In Figure 11, the doping concentrations of all corresponding regions of the first thyristor structure I and the second thyristor structure II are the same. This is only an example, and instead, the doping concentrations may be selected differently, for example, as in Figures 1 and / or 9.

[0099] 12 shows a flow chart of an exemplary embodiment of a method for operating the semiconductor device of any of the previous figures. In step S1, a first gate current is applied through gate electrode 1a of first thyristor structure I, and no gate current is applied through gate electrode 1b of second thyristor structure II.

[0100] Then, in step S2, a second gate current is applied through the gate electrode 1b of the second thyristor structure II. This second step S2 may be performed only after the voltage decay between the anode and cathode occurs. Now, the semiconductor device 100 is turned on.

[0101] Then, after that, in step S3, a turn-off gate current is applied through the gate electrode 1b of the second thyristor structure II, whereby the semiconductor device 100 is turned off.

[0102] 1-12 represent exemplary embodiments of semiconductor devices and methods for operating semiconductor devices. As such, they do not constitute an exhaustive list of all embodiments of semiconductor devices and methods for operating semiconductor devices. Actual semiconductor devices and methods may differ from the illustrated embodiments, for example, in terms of layout, devices, and elements. [Explanation of symbols]

[0103] Reference sign 1. Semiconductor body 1a, 1b Gate electrode 1c First main electrode 2a, 2b First main electrode 3a,3b,3c 2nd main electrode 10 First Aspect 11a, 11b First base region 12a, 12b First emitter region 13a, 13b Second emitter region 14a, 14b second base region 14c Separation area 14 Second Base Layer 15a, 15b, 15c Drift region 15 Drift Layer 16a, 16b, 16c Buffer area 16 Buffer layer 17a Third base region 18c First diode region 19a Short circuit 20 The Second Aspect 100 Semiconductor Devices I. First thyristor structure II. Second Thyristor Structure III Diode structure S1,S2,S3 Method steps

Claims

1. a semiconductor body (1) having a first side (10) and a second side (20) opposite said first side (10); a first thyristor structure (I) and a second thyristor structure (II) laterally next to said first thyristor structure (I); A semiconductor device (100) comprising: - each of said first thyristor structure (I) and said second thyristor structure (II) comprises a first base region (11 a, 11 b) on said first side (10) and a gate electrode (1 a, 1 b) on said first side (10) adjacent to and in electrical contact with said assigned first base region (11 a, 11 b); - said first base regions (11a, 11b) are of the same conductivity type and are each regions of said semiconductor body (1); - said gate electrodes (1a, 1b) are individually and independently electrically contactable; - the doping concentration in said first thyristor structure (I) is adjusted so that said first thyristor structure (I) does not latch when turned on by a gate current applied via said assigned gate electrode (1 a), at least one region of the semiconductor body (1) assigned to the first thyristor structure (I) has a doping concentration different from a corresponding region of the semiconductor body (1) assigned to the second thyristor structure (II); A semiconductor device (100).

2. the first base region (11a) of the first thyristor structure (I) has a higher doping concentration than the first base region (11b) of the second thyristor structure (II); The semiconductor device (100) of claim 1.

3. - said semiconductor device (100) comprises a diode structure (III) arranged laterally beside said first thyristor structure (I) and said second thyristor structure (II), The semiconductor device (100) of claim 1 or 2.

4. the area of ​​the first thyristor structure (I) is smaller than the area of ​​the second thyristor structure (II); The semiconductor device (100) of claim 1 or 2.

5. the second thyristor structure (II) is a gate commutated thyristor structure having a plurality of thyristor cells; The semiconductor device (100) of claim 1 or 2.

6. the first base regions (11 a, 11 b) are separated from one another by at least one isolation region (14 c) of the semiconductor body (1), the at least one isolation region (14 c) having a conductivity type different from the conductivity type of the first base regions (11 a, 11 b); - the first base region (11a) of the first thyristor structure (I) is formed continuously without any breaks, - the first base region (11b) of the second thyristor structure (II) is formed continuously without any breaks; The semiconductor device (100) of claim 1 or 2.

7. each of the first thyristor structure (I) and the second thyristor structure (II) comprises a first main electrode (2a, 2b) on the first side (10), a second main electrode (3a, 3b) on the second side (20), a first emitter region (12a, 12b) on the first side (10) adjacent to and in electrical contact with the assigned first main electrode (2a, 2b), a second emitter region (13a, 13b) on the second side (20) adjacent to and in electrical contact with the assigned second main electrode (3a, 3b), and a second base region (14a, 14b); the first emitter regions (12a, 12b), the second emitter regions (13a, 13b) and the second base regions (14a, 14b) are each regions of the semiconductor body (1); the first emitter regions (12a, 12b) and the second base regions (14a, 14b) are each of a first conductivity type; the first base regions (11a, 11b) and the second emitter regions (13a, 13b) are each of a second conductivity type; in the vertical direction, the second base regions (14a, 14b) are respectively arranged between the assigned second emitter regions (13a, 13b) and the assigned first base regions (11a, 11b); in the vertical direction, the first base regions (11a, 11b) are respectively arranged between the assigned first emitter regions (12a, 12b) and the assigned second base regions (14a, 14b); The semiconductor device (100) of claim 1 or 2.

8. the first emitter region (12a) of the first thyristor structure (I) has a lower doping concentration than the first emitter region (12b) of the second thyristor structure (II), and / or the second emitter region (13a) of the first thyristor structure (I) has a lower doping concentration than the second emitter region (13b) of the second thyristor structure (II), and / or the second base region (14a) of the first thyristor structure (I) has a higher doping concentration than the second base region (14b) of the second thyristor structure (II); The semiconductor device (100) of claim 7.

9. - said first emitter region (12a) of said first thyristor structure (I) is penetrated by one or more short circuits (19a), - said short circuit or short circuits (19a) are of the opposite conductivity type to said first emitter region (12a); - said short circuit or short circuits (19a) electrically connect said first base region (11a) with said first main electrode (2a) of said first thyristor structure (I); The semiconductor device (100) of claim 7.

10. the second base regions (14a, 14b) each comprise a drift region (15a, 15b) and a buffer region (16a, 16b), the buffer regions (16a, 16b) having a higher doping concentration than the drift regions (15a, 15b); the buffer regions (16a, 16b) separate the assigned drift regions (15a, 15b) from the assigned second emitter regions (13a, 13b), The semiconductor device (100) of claim 7.

11. In the lateral direction, the first thyristor structures (I) and the second thyristor structures (II) are arranged alternately. The semiconductor device (100) of claim 1 or 2.

12. - applying a first gate current through the gate electrode (1 a) of the first thyristor structure (I) while no current is applied through the gate electrode (1 b) of the second thyristor structure (II); then applying a second gate current through said gate electrode (1b) of said second thyristor structure (II); 3. A method for operating a semiconductor device (100) according to claim 1, comprising:

13. - said second gate current is applied after decay of the anode-cathode voltage in said semiconductor device (100); The method of claim 12.

14. - a semiconductor device (100) according to claim 1 or 2, - two main electrode structures for electrically contacting the first and second main electrodes (2a, 2b, 3) of the thyristor structure (I, II) of the semiconductor device (100), a first auxiliary electrode structure for electrically contacting said gate electrode (1a) of said first thyristor structure (I), and a second separate auxiliary electrode structure for electrically contacting said gate electrode (1b) of said second thyristor structure (II); a housing for said semiconductor device (100), A semiconductor module comprising:

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