Semiconductor optical integrated device and method for manufacturing the same

The semiconductor optical integrated device design with an undoped portion enhances ESD resistance by preventing strong electric fields at critical connections, addressing the productivity loss issue in existing complex manufacturing processes.

JP7745787B2Active Publication Date: 2025-09-29MITSUBISHI ELECTRIC CORP
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Patent Information

Application Number
JP2024572767
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2023-01-27
Publication Date
2025-09-29
Estimated Expiration
2043-01-27

AI Technical Summary

Technical Problem

Existing semiconductor optical integrated devices require a complex process for forming an ESD protection portion, leading to reduced productivity.

Method used

A semiconductor optical integrated device design that includes a first cladding layer, a transparent waveguide layer, a modulation layer, an undoped portion, and a second cladding layer, with specific manufacturing steps to form the undoped portion and improve ESD resistance without significantly impacting productivity.

Benefits of technology

The solution achieves improved ESD resistance while maintaining productivity by incorporating an undoped portion to prevent strong electric fields at critical connections, thereby reducing the risk of ESD damage.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention comprises a first clad layer (20) of a first conduction type, a transparent waveguide layer (22) which is formed on the first clad layer (20) and generates laser light, a modulation layer (24) which is formed on the first clad layer (20), is connected to the transparent waveguide layer (22) at a lower portion, and modulates the laser light, an undoped portion (26) which is formed on the connection position between the transparent waveguide layer (22) and the modulation layer (24) and between the transparent waveguide layer (22) and the modulation layer (24), and a second clad layer (28) of a second conduction type which is formed on the transparent waveguide layer (22), the modulation layer (24), and the undoped portion (26).
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Description

[Technical Field]

[0001] The present disclosure relates to a semiconductor integrated optical device and a method for manufacturing the semiconductor integrated optical device. [Background technology]

[0002] High reliability is required for semiconductor integrated optical devices used in optical communication networks and data centers. To increase the reliability of semiconductor integrated optical devices, it is important to improve their resistance to ESD (Electro Static Discharge).

[0003] Patent Document 1 discloses a semiconductor optical integrated device in which an ESD protection section is formed in parallel with an active layer for the purpose of increasing ESD resistance. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2010-287604 Summary of the Invention [Problem to be solved by the invention]

[0005] However, in order to manufacture the semiconductor optical integrated device disclosed in Patent Document 1, a complicated process for forming the ESD protection portion is required in addition to the normal process, which causes a problem of reduced productivity.

[0006] The present disclosure has been made to solve the above problems, and aims to provide a semiconductor optical integrated device and a method for manufacturing the semiconductor optical integrated device that improves ESD resistance while suppressing a decrease in productivity. [Means for solving the problem]

[0007] The semiconductor optical integrated device according to the present disclosure comprises a first cladding layer of a first conductivity type, a transparent waveguide layer formed on the first cladding layer and generating laser light, a modulation layer formed on the first cladding layer, connected to the transparent waveguide layer at a lower part, and modulating the laser light, an undoped portion formed above a connection point between the transparent waveguide layer and the modulation layer and between the transparent waveguide layer and the modulation layer, and a second cladding layer of a second conductivity type formed on the transparent waveguide layer, the modulation layer, and the undoped portion.

[0008] A first method for manufacturing a semiconductor optical integrated device according to the present disclosure includes the steps of forming a modulation layer on a first clad layer of a first conductivity type, forming a striped mask layer on the modulation layer, etching the modulation layer using the mask layer as a mask, cleaning the side surfaces of the etched modulation layer by wet processing so that the side surfaces are inclined inward, using the mask layer as a selective growth mask to form a transparent waveguide layer whose lower part is connected to the modulation layer, forming an undoped portion above the connection point between the transparent waveguide layer and the modulation layer and between the transparent waveguide layer and the modulation layer, removing the mask layer, and forming a second clad layer of a second conductivity type on the transparent waveguide layer, the modulation layer, and the undoped portion.

[0009] A second method for manufacturing a semiconductor optical integrated device according to the present disclosure includes the steps of: forming a transparent waveguide layer on a first clad layer of a first conductivity type; forming a striped mask layer on the transparent waveguide layer; etching the transparent waveguide layer using the mask layer as a mask; cleaning the side surfaces of the etched transparent waveguide layer by wet processing so that the side surfaces are inclined inward; using the mask layer as a selective growth mask, forming a modulation layer whose lower part is connected to the transparent waveguide layer; forming an undoped portion above the connection point between the transparent waveguide layer and the modulation layer and between the transparent waveguide layer and the modulation layer; removing the mask layer; and forming a second clad layer of a second conductivity type on the transparent waveguide layer, the modulation layer, and the undoped portion. [Effects of the Invention]

[0010] According to the present disclosure, it is possible to obtain a semiconductor optical integrated device and a method for manufacturing the semiconductor optical integrated device that achieves improved ESD resistance while suppressing a decrease in productivity. [Brief explanation of the drawings]

[0011] [Figure 1] 1 is a diagram illustrating a semiconductor optical integrated device according to a first embodiment. [Figure 2] FIG. 1 is a diagram showing a semiconductor optical integrated device according to a comparative example. [Figure 3] 1A to 1C are diagrams illustrating a method for manufacturing the semiconductor optical integrated device according to the first embodiment. [Figure 4] 1A to 1C are diagrams illustrating a method for manufacturing the semiconductor optical integrated device according to the first embodiment. [Figure 5] 1A to 1C are diagrams illustrating a method for manufacturing the semiconductor optical integrated device according to the first embodiment. [Figure 6] 2A to 2C are diagrams illustrating a method for manufacturing the semiconductor optical integrated device according to the first embodiment. [Figure 7] 1A to 1C are diagrams illustrating a method for manufacturing the semiconductor optical integrated device according to the first embodiment. [Figure 8] 1A to 1C are diagrams illustrating a method for manufacturing the semiconductor optical integrated device according to the first embodiment. [Figure 9] 1A to 1C are diagrams illustrating a method for manufacturing the semiconductor optical integrated device according to the first embodiment. [Figure 10] 1A to 1C are diagrams illustrating a method for manufacturing the semiconductor optical integrated device according to the first embodiment. [Figure 11] FIG. 10 is a diagram showing a semiconductor optical integrated device according to a modified example of the first embodiment. [Figure 12] FIG. 10 is a diagram illustrating a semiconductor optical integrated device according to a second embodiment. [Figure 13] FIG. 10 is a diagram illustrating a semiconductor optical integrated device according to a third embodiment. [Figure 14] FIG. 10 is a diagram illustrating a semiconductor optical integrated device according to a fourth embodiment. [Figure 15] FIG. 10 is a diagram showing a semiconductor optical integrated device that combines the features of the third and fourth embodiments. DETAILED DESCRIPTION OF THE INVENTION

[0012] Embodiment 1 FIG. 1 shows a semiconductor optical integrated device 10 according to a first embodiment. The semiconductor optical integrated device 10 is a semiconductor laser with an electro-absorption modulator (EML), and FIG. 1 is a cross-sectional view of the semiconductor optical integrated device 10 as viewed from a direction perpendicular to the resonance direction of laser light. The semiconductor optical integrated device 10 includes a laser generating section 12 that generates laser light and an electro-absorption optical modulating section 14 that modulates the laser light generated by the laser generating section 12, which are formed adjacent to each other. The laser light modulated by the electro-absorption optical modulating section 14 is emitted from the end face opposite to the laser generating section 12. The semiconductor optical integrated device 10 includes a back electrode 18, a first cladding layer 20, a transparent waveguide layer 22, a modulating layer 24, an undoped section 26, a second cladding layer 28, an insulating film 30, and a front electrode 34.

[0013] The first cladding layer 20 is a semiconductor substrate made of, for example, n-type (first conductivity type) InP. A back electrode 18 is formed under the first cladding layer 20.

[0014] A transparent waveguide layer 22 is formed on the first cladding layer 20 on the side of the laser generating section 12. The transparent waveguide layer 22 is made of, for example, InGaAsP.

[0015] A modulation layer 24 is formed on the first cladding layer 20 on the electro-absorption optical modulator 14 side, and is connected to the transparent waveguide layer 22 at its bottom. The modulation layer 24 is made of, for example, AlGaInAs. The connection between the transparent waveguide layer 22 and the modulation layer 24 is inclined toward the modulation layer 24.

[0016] An undoped portion 26 is formed above the connection between the transparent waveguide layer 22 and the modulation layer 24 and between the transparent waveguide layer 22 and the modulation layer 24. The undoped portion 26 is a region with a low impurity concentration, and is made of, for example, InP. Alternatively, it may be InGaAsP with a low content of Ga and As. The impurity concentration is 3×10 16 cm -3 The following is the result.

[0017] A second cladding layer 28 is formed on the transparent waveguide layer 22, the modulation layer 24, and the undoped portion 26. The second cladding layer 28 is made of, for example, p-type (second conductivity type) InP.

[0018] An insulating film 30 is formed on the second cladding layer 28. The insulating film 30 is made of, for example, SiO2. An opening 32 is provided in the insulating film 30 above the modulation layer 24.

[0019] A surface electrode 34 is formed in the opening 32, on the opening 32, and on the insulating film 30. The surface electrode 34 is in contact with the second cladding layer 28 on the electro-absorption optical modulator 14 side in the opening 32.

[0020] Here, a comparison will be made between a semiconductor optical integrated device 200 as a comparative example and the semiconductor optical integrated device 10 of this embodiment.

[0021] Unlike the semiconductor optical integrated device 10, the semiconductor optical integrated device 200 does not have an undoped portion 26, and this region forms part of a p-type second cladding layer 218. This region in the semiconductor optical integrated device 200 is referred to as region 216. When the semiconductor optical integrated device 200 is in operation, carriers (holes) enter the p-type region 216. As a result, a strong electric field is generated at the connection between the transparent waveguide layer 22 and the modulation layer 24. The generation of a strong electric field increases the possibility of ESD damage occurring at this connection.

[0022] On the other hand, in the semiconductor optical integrated device 10 of this embodiment, the undoped portion 26 is formed, and no carriers penetrate during operation, so no strong electric field is generated at the connection between the transparent waveguide layer 22 and the modulation layer 24. Therefore, the possibility of ESD damage occurring at this connection is low.

[0023] A method for manufacturing the semiconductor optical integrated device 10 will now be described.

[0024] 3, the modulation layer 24 is formed on the first cladding layer 20. The method of formation is, for example, MOCVD (Metal Organic Chemical Vapor Deposition).

[0025] Next, an SiO2 layer is deposited on the modulation layer 24, and photoetching is performed using a resist pattern to form a striped mask layer 36 made of SiO2, as shown in FIG.

[0026] Next, as shown in FIG. 5, dry etching is performed by RIE (Reactive Ion Etching) or ICP (Inductively Coupled Plasma) using the mask layer 36 as a mask to etch the modulation layer 24.

[0027] 6, the side surfaces of the etched modulation layer 24 are cleaned by wet processing using a chemical solution, and at this time, the cleaned side surfaces are inclined inward.

[0028] Next, as shown in Figure 7, the transparent waveguide layer 22 is formed using the mask layer 36 as a selective growth mask. The formation method is, for example, MOCVD. The growth temperature is in the range of 600 to 650°C. At this time, a cavity is formed under the end of the mask layer 36 (on the transparent waveguide layer 22 side). This is because the end of the mask layer 36 acts as a visor, making it difficult for the source gas to reach this region.

[0029] Next, as shown in FIG. 8, the undoped portion 26 is formed. The undoped portion 26 is formed by changing film formation conditions, such as the growth temperature and supply gas flow rate, compared to the process of forming the transparent waveguide layer 22, and controlling the mass transport amount. The growth temperature is lowered by 30 to 100°C compared to when the transparent waveguide layer 22 was formed. The gas flow rate is also reduced to 50 to 95% of that when the transparent waveguide layer 22 was formed. By lowering the growth temperature, the growth rate of the (111) plane (the inclined plane) and the (110) plane (the plane perpendicular to the surface of the first cladding layer 20) is increased compared to the (001) plane (the plane parallel to the surface of the first cladding layer 20). Furthermore, by reducing the gas flow rate, the growth of the (001) plane is suppressed, and the undoped portion 26 is formed.

[0030] Next, after removing the mask layer 36, the second cladding layer 28 is formed on the transparent waveguide layer 22, the modulation layer 24 and the undoped portion 26, as shown in Fig. 9. The forming method is, for example, MOCVD.

[0031] Next, as shown in FIG. 10, an insulating film 30 having an opening 32 is formed, and then a front electrode 34 and a back electrode 18 are formed to obtain the semiconductor optical integrated device 10 shown in FIG.

[0032] As described above, according to this embodiment, it is possible to improve ESD resistance by providing the undoped portion 26. The undoped portion 26 can be formed continuously after the formation of the transparent waveguide layer 22, and a decrease in productivity due to the formation of the undoped portion 26 can be suppressed.

[0033] As a modified example, the transparent waveguide layer may be formed first, and then the modulation layer may be formed. A semiconductor optical integrated device 40 in this case is shown in FIG. 11. In FIG. 11, the laser generating section 12 is on the left side of the page, and the electro-absorption optical modulation section 14 is on the right side of the page. The connection point between the transparent waveguide layer 22 and the modulation layer 24 is inclined toward the transparent waveguide layer 22. In this manufacturing method, the transparent waveguide layer and the modulation layer are interchanged in the above description. The feature of forming the transparent waveguide layer first and then the modulation layer can be applied to other embodiments described later.

[0034] Embodiment 2 12 shows a cross section of a semiconductor optical integrated device 70 according to the second embodiment. Unlike the first embodiment, in the semiconductor optical integrated device 70 according to the second embodiment, a recess 97 is formed in the lower surface of the first cladding layer 80 below the connection portion between the transparent waveguide layer 22 and the modulation layer 24, and a rear surface opening 98 is formed in the rear surface electrode 78 below the recess 97. The recess 97 and the rear surface opening 98 are formed by etching the rear surface electrode 78 and the lower surfaces of the first cladding layer 80.

[0035] In this embodiment, the recess 97 is formed, which suppresses the concentration of carriers (electrons) at the connection point between the transparent waveguide layer 22 and the modulation layer 24. As a result, a strong electric field is not generated at the connection point between the transparent waveguide layer 22 and the modulation layer 24, thereby improving ESD resistance. Furthermore, the recess 97 can be formed simply by removing a portion of the first cladding layer 80 by etching, which suppresses a decrease in productivity.

[0036] Furthermore, since the recess 97 extends to the side surface parallel to the resonance direction of the laser light, when the semiconductor optical integrated element 70 is joined to a carrier such as a submount, the recess 97 prevents the solder or other joining material from creeping up, making assembly easier.

[0037] In order to prevent the generation of a strong electric field, the thickness of the first cladding layer 80 above the recess 97 is preferably half the thickness of the transparent waveguide layer 22 or less.

[0038] Embodiment 3 13 shows a cross section of a semiconductor optical integrated device 100 according to the third embodiment. Unlike the second embodiment, in the semiconductor optical integrated device 100 according to the third embodiment, the opening 122 extends from above the modulation layer 24 to above the connection point between the transparent waveguide layer 22 and the modulation layer 24. As a result, the region in which the surface electrode 124 is in contact with the second clad layer 28 extends to above the connection point between the transparent waveguide layer 22 and the modulation layer 24. This allows the modulation drive region of the modulation layer 24 to extend close to the connection point with the transparent waveguide layer 22, thereby increasing the extinction ratio of the emitted laser light.

[0039] Embodiment 4 14 shows a cross section of a semiconductor optical integrated device 130 according to the fourth embodiment. Unlike the second embodiment, the semiconductor optical integrated device 130 according to the fourth embodiment has a semi-insulating material or a low-dielectric-constant material (such as BCB (benzocyclobutene)) embedded in a recess 157 in the first cladding layer 80. The embedding step is performed before the formation of the back electrode 138, and the back electrode 138 is formed after the embedding step. Therefore, the back electrode 138 is also formed below the recess 157.

[0040] This embodiment also suppresses the concentration of carriers (electrons) at the connection portion between the transparent waveguide layer 22 and the modulation layer 24. As a result, the ESD resistance of the connection portion between the transparent waveguide layer 22 and the modulation layer 24 is improved. Moreover, since the recess 157 is simply filled with one type of material, there is little decrease in productivity.

[0041] Furthermore, since the recess 157 extends to the side surface parallel to the resonance direction of the laser light, when the semiconductor optical integrated device 130 is bonded to a carrier such as a submount, the recess 157 prevents the bonding material such as solder from creeping up, making assembly easier.

[0042] The features of the third embodiment may be combined with the features of the fourth embodiment, in which case a cross section of the semiconductor optical integrated device 160 is shown in FIG.

[0043] In all the above embodiments, the first cladding layer and the second cladding layer are respectively n-type and p-type, but the first cladding layer and the second cladding layer may be respectively p-type and n-type, in which case the first conductivity type and the second conductivity type become respectively p-type and n-type. [Explanation of symbols]

[0044] 10,40,70,100,130,160,200 Semiconductor optical integrated device, 12,72,102,132,162,202 Laser generating section, 14,74,104,134,164,204 Electroabsorption optical modulation section, 18,78,138,168 Back electrode, 20,80 First cladding layer, 22 Transparent waveguide layer, 24 Modulation layer, 26 Undoped section, 28,218 Second cladding layer, 30,120,180 Insulating film, 32,122,182 Opening, 34,124,184 Front electrode, 36 Mask layer, 216 Region, 97,157 Recess, 98 Back opening

Claims

1. a first cladding layer of a first conductivity type; a transparent waveguide layer formed on the first cladding layer for generating laser light; a modulation layer formed on the first clad layer, connected to the transparent waveguide layer at a lower portion thereof, and modulating the laser light; an undoped portion formed on a connection portion between the transparent waveguide layer and the modulation layer and between the transparent waveguide layer and the modulation layer; a second clad layer of a second conductivity type formed on the transparent waveguide layer, the modulation layer, and the undoped portion; A semiconductor optical integrated device comprising:

2. A recess is formed in the lower surface of the first clad layer below the connection point.

2. The semiconductor optical integrated device according to claim 1.

3. an insulating film formed on the second clad layer and having an opening extending from above the modulation layer to above the connection portion; a surface electrode formed in the opening, on the opening, and on the insulating film, the surface electrode being in contact with the second cladding layer in the opening; Equipped with 3. The semiconductor optical integrated device according to claim 2.

4. A semi-insulating material or a low dielectric constant material is filled in the recess.

4. The semiconductor optical integrated device according to claim 2.

5. forming a modulation layer on a first cladding layer of a first conductivity type; forming a striped mask layer on the modulation layer; Etching the modulation layer using the mask layer as a mask; cleaning the side surfaces of the etched modulation layer by wet processing so that the side surfaces are inclined inward; forming a transparent waveguide layer, the lower portion of which is connected to the modulation layer, using the mask layer as a selective growth mask; forming an undoped portion on a connection portion between the transparent waveguide layer and the modulation layer and between the transparent waveguide layer and the modulation layer; removing the mask layer; forming a second clad layer of a second conductivity type on the transparent waveguide layer, the modulation layer, and the undoped portion; A method for manufacturing a semiconductor optical integrated device comprising:

6. In the step of forming the undoped portion, the growth temperature is lowered by 30 to 100° C. and the gas flow rate is reduced to 50 to 95% compared to the step of forming the transparent waveguide layer. The method for manufacturing the semiconductor optical integrated device according to claim 5 .

7. forming a transparent waveguide layer on a first cladding layer of a first conductivity type; forming a striped mask layer on the transparent waveguide layer; etching the transparent waveguide layer using the mask layer as a mask; cleaning the side surfaces of the etched transparent waveguide layer by wet processing so that the side surfaces are inclined inward; forming a modulation layer, the lower portion of which is connected to the transparent waveguide layer, using the mask layer as a selective growth mask; forming an undoped portion on a connection portion between the transparent waveguide layer and the modulation layer and between the transparent waveguide layer and the modulation layer; removing the mask layer; forming a second clad layer of a second conductivity type on the transparent waveguide layer, the modulation layer, and the undoped portion; A method for manufacturing a semiconductor optical integrated device comprising:

8. In the step of forming the undoped portion, the growth temperature is lowered by 30 to 100° C. and the gas flow rate is reduced to 50 to 95% compared to the step of forming the modulation layer. The method for manufacturing the semiconductor optical integrated device according to claim 7 .

9. etching the lower surface of the first clad layer below the connection portion to form a recess. The method for manufacturing the semiconductor optical integrated device according to any one of claims 5 to 8.

10. forming an insulating film on the second clad layer, the insulating film having an opening extending from above the modulation layer to above the connection portion; forming a surface electrode in the opening, on the opening, and on the insulating film, the surface electrode being in contact with the second cladding layer in the opening; Equipped with The method for manufacturing the semiconductor optical integrated device according to claim 9 .

11. and filling the recess with a semi-insulating material or a low dielectric constant material. The method for manufacturing the semiconductor optical integrated device according to claim 9 .

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