Semiconductor Devices

Abstract

This semiconductor device comprises a lead, a semiconductor element, and a sealing resin. The lead includes an island portion having a main surface and a back surface facing away from each other in the thickness direction. The semiconductor element is mounted on the main surface of the island portion. The sealing resin covers the semiconductor element and the island portion. Further, the sealing resin includes a first portion and a second portion overlapping the island portion when viewed in the thickness direction. The sealing resin is configured such that the second portion has a higher infrared transmittance than the first portion.

Description

[Technical Field]

[0001] The present disclosure relates to semiconductor devices. [Background technology]

[0002] Various semiconductor devices have been known in the art. One of them is called an IPM (Intelligent Power Module). This semiconductor device includes a plurality of semiconductor elements, a plurality of island portions, a heat dissipation member, and a sealing resin. The semiconductor elements are mounted on the plurality of island portions, respectively. Each island portion is bonded to the heat dissipation member. The sealing resin covers the semiconductor elements, the plurality of island portions, and the heat dissipation member. An example of an IPM is described in, for example, Patent Document 1.

[0003] Generally, when an IPM is in use, each semiconductor element generates heat. This heat can be detected by a temperature measurement element such as a thermistor. The thermistor is provided, for example, on an island on which the semiconductor element whose temperature is to be measured is mounted, and is positioned at a distance from the semiconductor element. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2011-243839 Summary of the Invention [Problem to be solved by the invention]

[0005] The above-described configuration requires an area for mounting the thermistor in the island portion. This may result in a larger semiconductor device. Furthermore, the temperature detection by the thermistor is based on the heat transfer from the semiconductor element to the thermistor via the island portion, resulting in a change in the resistance of the thermistor. However, this conventional temperature detection method still has room for improvement in terms of accurately measuring the heat generation state of the semiconductor element.

[0006] In view of the above circumstances, an object of the present disclosure is to provide a semiconductor device that is capable of more accurate temperature measurement while avoiding an increase in size. [Means for solving the problem]

[0007] The semiconductor device provided by the present disclosure includes a lead including an island portion having a main surface and a back surface facing opposite each other in a thickness direction, a semiconductor element mounted on the main surface of the island portion, and a sealing resin covering the semiconductor element and the island portion. The sealing resin has a first portion and a second portion that overlaps the island portion when viewed in the thickness direction and has a higher infrared transmittance than the first portion. [Effects of the Invention]

[0008] According to the above configuration, it is possible to prevent the semiconductor device from becoming larger in size and to perform more accurate temperature measurement.

[0009] Other features and advantages of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings. [Brief explanation of the drawings]

[0010] [Figure 1] 1 is a perspective view showing a semiconductor device according to a first embodiment of the present disclosure. [Figure 2] FIG. 2 is a plan view showing the semiconductor device of FIG. [Figure 3] FIG. 2 is a plan view showing the semiconductor device of FIG. [Figure 4] FIG. 2 is a front view showing the semiconductor device of FIG. [Figure 5] FIG. 2 is a side view showing the semiconductor device of FIG. [Figure 6] FIG. 6 is a cross-sectional view of a main part taken along line VI-VI in FIG. [Figure 7] FIG. 7 is a cross-sectional view of a main part taken along line VII-VII in FIG. [Figure 8] 2 is an enlarged plan view showing a main part of the semiconductor device shown in FIG. 1. [Figure 9] FIG. 9 is a cross-sectional view of a main part taken along line IX-IX in FIG. 8. [Figure 10] FIG. 9 is a cross-sectional view of a main part taken along line XX in FIG. 8. [Figure 11] 2 is an enlarged plan view showing a main part of the semiconductor device shown in FIG. 1. [Figure 12] FIG. 12 is an enlarged cross-sectional view of a main part taken along line XII-XII in FIG. [Figure 13] 2 is a cross-sectional view of a main part showing an example of a method for manufacturing the semiconductor device of FIG. 1. [Figure 14] 2 is a cross-sectional view of a main part showing an example of a method for manufacturing the semiconductor device of FIG. 1. [Figure 15] FIG. 10 is a cross-sectional view of a main part showing a modified example of the semiconductor device according to the first embodiment of the present disclosure. [Figure 16] 16 is a cross-sectional view of a main part showing an example of a method for manufacturing the semiconductor device of FIG. 15. [Figure 17] FIG. 4 is a plan view showing a semiconductor device according to a second embodiment of the present disclosure. [Figure 18] FIG. 10 is a plan view showing a semiconductor device according to a third embodiment of the present disclosure. [Figure 19] FIG. 19 is a cross-sectional view taken along line XIX-XIX in FIG. 18. [Figure 20] 19 is a cross-sectional view of a main part showing an example of a method for manufacturing the semiconductor device of FIG. 18. [Figure 21] FIG. 10 is an enlarged plan view of a main part showing a semiconductor device according to a fourth embodiment of the present disclosure. [Figure 22] FIG. 22 is an enlarged cross-sectional view of a main part taken along line XXII-XXII in FIG. 21. [Figure 23]22 is a cross-sectional view of a main part showing an example of a method for manufacturing the semiconductor device of FIG. 21. DETAILED DESCRIPTION OF THE INVENTION

[0011] Preferred embodiments of the present disclosure will now be described in detail with reference to the drawings.

[0012] 1 to 10 show a semiconductor device according to a first embodiment of the present disclosure. The illustrated semiconductor device A1 includes a lead 100, a heat dissipation member 200, a bonding layer 300, multiple semiconductor elements 410, 420, 430, and 440, multiple passive components 490, bonding materials 510 and 520, wires 600 and 650, and a sealing resin 700. The semiconductor device A1 is configured as an IPM used, for example, for controlling the drive of an inverter motor provided in an air conditioner. For example, the dimensions of the semiconductor device A1 are approximately 38 mm in the x direction, approximately 24 mm in the y direction, and approximately 3.5 mm in the z direction (thickness of the sealing resin 700).

[0013] FIG. 1 is a perspective view of the semiconductor device A1, and only the main outline of the sealing resin 700 is indicated by a two-dot chain line. FIG. 2 is a plan view of the semiconductor device A1. FIG. 3 is a plan view of the semiconductor device A1, and the sealing resin 700 is indicated by a two-dot chain line. FIG. 4 is a front view of the semiconductor device A1, and FIG. 5 is a side view of the semiconductor device A1. FIG. 6 is a cross-sectional view in the zx plane taken along line VI-VI in FIG. 3, omitting a terminal portion (described later). FIG. 7 is a cross-sectional view in the yz plane taken along line VII-VII in FIG. 3. FIG. 8 is an enlarged plan view of a main portion of the semiconductor device A1. FIG. 9 is a cross-sectional view of a main portion taken along line IX-IX in FIG. 8. FIG. 10 is a cross-sectional view of a main portion taken along line XX in FIG. 8. FIG. 11 is an enlarged plan view of a main portion of the semiconductor device A1. FIG. 12 is an enlarged cross-sectional view of a main portion taken along line XII-XII in FIG. 11. 8, a second portion 720, which will be described later, is shown by an imaginary line. In the cross-sectional views referred to in the following description, wires 600 and 650 are omitted.

[0014] The lead 100 is a conductive support member that supports the semiconductor elements 410, 420, 430, and 440 and provides a conductive path to these elements. In this embodiment, the lead 100 has island portions 110, 120, 130, 140, and 150, pad portions 160, 170, and 180, and terminal portions 111, 121, 141, 151, 161, 171, 181, and 191. The lead 100 is made of a metal, and in this embodiment, is made of Cu. The thickness of the lead 100 is, for example, approximately 0.42 mm. The lead 100 is formed, for example, by subjecting a metal plate material to cutting, such as punching, and bending.

[0015] The island portions 110, 120, 130, 140, and 150 are portions on which a plurality of semiconductor elements 410, 420, 430, and 440 and a plurality of passive components 490 are mounted. In this embodiment, one island portion 110 and three island portions 120 are aligned in the x direction. Similarly, the island portion 130 and the island portion 140 are aligned in the x direction. A group consisting of the island portion 110 and the three island portions 120 and a group consisting of the island portion 130 and the island portion 140 are aligned in the y direction. The three island portions 150 are positioned adjacent to the island portion 130 in the y direction.

[0016] The island portion 110 has a main surface 1101 and a back surface 1102 that face opposite each other in the z direction. Each island portion 120 has a main surface 1201 and a back surface 1202 that face opposite each other in the z direction. The island portion 130 has a main surface 1301 and a back surface 1302 that face opposite each other in the z direction. The island portion 140 has a main surface 1401 and a back surface 1402 that face opposite each other in the z direction.

[0017] As shown in FIG. 3 , the island unit 110 has a substantially rectangular shape in a plan view, and semiconductor elements 410 and 420 are mounted on a main surface 1101. In this embodiment, three semiconductor elements 410 and three semiconductor elements 420 are mounted on the island unit 110. The three semiconductor elements 410 are aligned in the x direction, and the three semiconductor elements 420 are aligned in the x direction as well. Each semiconductor element 410 is spaced apart from a corresponding semiconductor element 420 in the y direction, and the semiconductor elements 410 and 420 share a common (virtual) central axis extending parallel to the y direction. In the example shown in the figure, three parallel central axes are assumed for the three semiconductor elements 410 (and therefore the three semiconductor elements 420). This situation can also be expressed as three element pairs (each pair consisting of one semiconductor element 410 and one corresponding semiconductor element 420) being parallel to each other along the y direction.

[0018] A plurality of recesses 112 and a plurality of moats 113 are formed in the island portion 110. The plurality of recesses 112 are formed in the main surface 1101 of the island portion 110. More precisely, each recess 112 is recessed from the main surface 1101 and has an opening that is flush with the main surface (this situation may also be expressed as "each recess 112 opens into the main surface 1101"). In this embodiment, the recess 112 is circular in plan view (circular in a cross section perpendicular to the z direction), but the shape of the recess is not limited thereto. The plurality of recesses 112 are formed in regions of the island portion 110 other than the moats 113 and regions surrounded by the moats 113. In this embodiment, the plurality of recesses 112 are arranged in a matrix along the x and y directions.

[0019] As shown in FIG. 8, each trench 113 is formed to surround three semiconductor elements 410 or one semiconductor element 420 and opens to the main surface 1101 of the island unit 110. In FIG. 8, the upper trench 113 (first trench 113) has a rectangular outer frame that is relatively long in the x direction and two inner regions that extend in the y direction within the outer frame. Both ends of each inner region are connected to the outer frame. With this configuration, three regions (three separate individual regions) surrounded by the first trench 113 are formed on the main surface 1101. Three semiconductor elements 410 are disposed in each of these individual regions. On the other hand, the lower three trenches 113 (second trenches 113) in FIG. 8 each have a rectangular shape that is relatively long in the y direction. A corresponding semiconductor element 420 is disposed in the region surrounded by each second trench 113. In the illustrated example, each second trench 113 is a continuous ring (closed ring) without ends, but the present disclosure is not limited to this. For example, a configuration in which multiple portions (e.g., individual grooves) are discretely arranged to form a ring as a whole may also be used. A similar configuration may also be applied to the first trench 113. Unlike the illustrated example, the island portion 110 may have a configuration in which the recesses 112 and trenches 113 are not formed.

[0020] In FIG. 3, the three island portions 120 are arranged adjacent to but spaced apart from each other in the x direction. The three island portions 120 are referred to as the first island portion 120, the second island portion 120, and the third island portion 120, respectively, from left to right in the x direction. FIG. 11 is an enlarged plan view of the first island portion 120 and its associated components. The second and third island portions 120 have the same configuration as the first island portion 120, except for slight differences in shape. As shown in FIG. 11, the (first) island portion 120 is a substantially rectangular shape elongated in the y direction, and semiconductor elements 410 and 420 are mounted on it. In this embodiment, one semiconductor element 410 and one semiconductor element 420 are mounted on the island portion 120, and these two semiconductor elements are aligned along the y direction.

[0021] As shown in Fig. 11, a plurality of recesses 122 and a plurality of moats 123 are formed in the island portion 120. Each recess 122 opens to a main surface 1201 of the island portion 120. In this embodiment, each recess 122 has a circular shape in a plan view, but the present disclosure is not limited to this. The plurality of recesses 122 are formed in regions of the island portion 120 other than the moats 123 and regions surrounded by the moats 123. In this embodiment, the plurality of recesses 122 are arranged in a matrix along the x and y directions.

[0022] Each trench 123 is formed to surround the semiconductor element 410 or the semiconductor element 420 and opens to the main surface 1201 of the island portion 120. In FIG. 11 , the upper trench 123 is rectangular, and the semiconductor element 410 is disposed in the area surrounded by this trench 123. Similarly, the lower trench 123 is also rectangular, and the semiconductor element 420 is disposed in the area surrounded by this trench 123. As described above with respect to the island portion 110, each trench 123 may not have a continuous annular shape, but may be configured with multiple portions discretely arranged to form an annular shape as a whole. Furthermore, the island portion 120 may be configured without the recesses 122 and trenches 123.

[0023] The island portion 120 shown in FIG. 11 has two corners 125 and an arc portion 126. The two corners 125 are provided at the upper end of the island portion 120 (the end farther from the terminal portion 121, which will be described later), and the arc portion 126 is provided at the lower end of the island portion 120 (the end close to the terminal portion 121). Each corner 125 is provided on the opposite side of the semiconductor element 420 from the semiconductor element 410. In other words, each corner 125 is provided farther from the terminal portion 121 than the semiconductor elements 410 and 420. The arc portion 126 is provided on the opposite side of the semiconductor element 410 from the semiconductor element 420. In other words, the arc portion 126 is provided closer to the terminal portion 121 than the semiconductor elements 410 and 420. Each corner 125 is formed by connecting two adjacent sides of the island portion 120, and in this embodiment, the two sides form a 90° angle. The arc portion 126 is formed to smoothly connect the two adjacent sides, and is, for example, an arc with a constant radius of curvature, although the present disclosure is not limited to this. For example, the radius of curvature of the arc portion 126 does not have to be constant throughout the entire arc, and the radius of curvature may vary in parts.

[0024] 1 to 3 and 7, the island unit 130 is disposed adjacent to the island unit 110 in the y direction and has a generally rectangular shape with its longitudinal direction in the x direction. A semiconductor element 430 is mounted on the island unit 130. The semiconductor element 430 has a rectangular shape with its longitudinal direction in the x direction and its longitudinal direction coincides with that of the island unit 130.

[0025] A plurality of recesses 132 are formed in the island portion 130. The recesses 132 are open to the surface of the island portion 130 on which the semiconductor element 430 is mounted. In this embodiment, the recesses 132 have a circular cross section, but this is not limiting. The recesses 132 are mainly formed in regions of the island portion 130 that avoid the semiconductor element 430. Furthermore, the recesses 132 may be formed at positions that overlap the semiconductor element 430, as long as peeling of the semiconductor element 430 is not caused. In this embodiment, the recesses 132 are arranged in a matrix along the x and y directions. The island portion 130 may also be configured without the recesses 132.

[0026] The island section 140 is disposed adjacent to the three island sections 120 (particularly the second island section 120) in the y direction, and has a generally elongated rectangular shape with its longitudinal direction in the x direction. A semiconductor element 440 is mounted on the island section 140. The semiconductor element 440 has an elongated rectangular shape with its longitudinal direction in the x direction, and its longitudinal direction coincides with that of the island section 130.

[0027] A plurality of recesses 142 are formed in the island portion 140. The recesses 142 are open to the surface of the island portion 140 on which the semiconductor element 440 is mounted. In this embodiment, the recesses 142 have a circular cross section, but this is not limiting. The recesses 142 are mainly formed in regions of the island portion 140 that avoid the semiconductor element 440. The recesses 142 may be formed in positions that overlap the semiconductor element 440, as long as peeling of the semiconductor element 440 is not caused. In this embodiment, the recesses 142 are arranged in a matrix along the x and y directions. A plurality of recesses 142 are also formed in approximately triangular portions connected to the island portion 140. The island portion 140 may be configured without the recesses 142.

[0028] The three island portions 150 are arranged adjacent to the island portion 130 in the y direction. The three island portions 150 are lined up along the x direction. Each island portion 150 is smaller than the island portions 110, 120, 130, and 140. A passive component 490 is mounted on each island portion 150. A plurality of recesses 152 are formed in each island portion 150. The recesses 152 are open on the surface of the island portion 150 on which the passive component 490 is mounted, and are formed at positions that avoid the passive component 490. In this embodiment, the plurality of recesses 152 are arranged in a matrix along the x and y directions. Each island portion 150 has an arc-shaped notch formed therein, corresponding to a groove 780 in the sealing resin 700, which will be described later. The island portion 150 may be configured without the recesses 152.

[0029] The pad portions 160, 170, and 180 are portions that are electrically connected to the semiconductor elements 410, 420, 430, and 440 via wires 600 and 650, respectively.

[0030] 3, the pad portions 160 are provided at intervals in a diagonal direction relative to the island portions 110 and 120. Each pad portion 160 is rectangular, and at least one corresponding wire 650 (see FIG. 8) is bonded to it. In the example shown in the figure, six pad portions 160 are provided, but the present disclosure is not limited to this.

[0031] The pads 170 are arranged adjacent to the island portions 130 and 140. Each pad 170 is generally rectangular. More specifically, each pad 170 is a portion near the tip of a thin strip. At least one wire 600 is bonded to each pad 170.

[0032] The pad section 180 is arranged toward one side in the x direction of the semiconductor device A1 (to the left in FIG. 3). At least one corresponding wire 600 is bonded to each pad section 180. In the example shown in the figure, each pad section 180 is approximately triangular in shape, and multiple recesses 182 are formed therein. The recesses 182 open on the surface of the pad section 180 to which the wire 600 is bonded, and are formed at positions that avoid the wire 600. In this embodiment, the multiple recesses 182 are arranged in a matrix along the x and y directions.

[0033] The recesses 112, 122, 132, 142, 152, 182 and the trenches 113, 123 can be formed by, for example, etching in the process of forming the lead 100. Alternatively, they can be formed by providing a plurality of protrusions on a mold used in the cutting or bending process for forming the lead 100.

[0034] 1, 3, and 7, the lead 100 has bent portions 114, 124. The bent portion 114 is connected to the island portion 110 and is bent so that the side away from the island portion 110 is positioned upward in the z direction. The bent portion 124 is connected to the island portion 120 and is bent so that the side away from the island portion 120 is positioned upward in the z direction.

[0035] In this embodiment, the positions in the z direction of the bent portions 114 and 124 located on the upper side in the z direction are substantially the same as the positions of the island portions 130, 140, and 150 and the pad portions 160, 170, and 180. In other words, the island portions 110 and 120 are positioned slightly shifted downward in the z direction with respect to the island portions 130, 140, and 150 and the pad portions 160, 170, and 180.

[0036] The terminal portions 111, 121, 141, 151, 161, 171, 181, and 191 protrude from the sealing resin 700. These terminal portions 111, 121, 141, 151, 161, 171, 181, and 191 have bent portions bent at angles close to 90°, with one end facing upward in the z direction. The terminal portions 111, 121, 141, 151, 161, 171, 181, and 191 are used to mount the semiconductor device A1 on, for example, a circuit board (not shown).

[0037] The terminal portion 111 is connected to the bent portion 114 and is electrically connected to the island portion 110. The three terminal portions 121 are connected to the bent portion 124 and are electrically connected to the island portion 120. The two terminal portions 141 are connected to the island portion 140. The three terminal portions 151 are connected to the three island portions 150, respectively. The three terminal portions 161 are connected to the three pad portions 160, respectively. The multiple terminal portions 171 are connected to the multiple pad portions 170, respectively. The terminal portion 181 is connected to the pad portion 180.

[0038] In this embodiment, the intervals between the terminal portions 111, 121, 141, 151, 161, 171, 181, and 191 are not all equal. For example, with respect to the intervals between the terminal portions 141, 151, 171, and 181 arranged on the same side in the y direction, two terminal portions 141 and multiple terminal portions 171 and terminal portion 181 are arranged in the x direction at approximately equal intervals. On the other hand, the intervals between three terminal portions 151 and the terminal portion 171 adjacent to these terminal portions 151 are clearly large. A groove portion 780 of the sealing resin 700, which will be described later, is located between the three terminal portions 151 and the terminal portion 171 that are spaced apart widely, and also the arc-shaped notch provided in the island portion 150, as described above, is located between the three terminal portions 151 and the terminal portion 171 that are spaced apart widely.

[0039] The terminal portion 191 is provided at a distance from the edge in the x direction. In this embodiment, the terminal portion 191 is not electrically connected to the island portions 110, 120, 130, and 140 or the semiconductor elements 410, 420, 430, and 440.

[0040] Furthermore, the three terminal portions 161 are arranged at relatively narrow intervals between the terminal portions 111, 121, and 161 arranged on the same side in the y direction. On the other hand, the intervals between the terminal portion 111 and the three terminal portions 121 and between the adjacent terminal portions 161 are clearly large. Furthermore, the terminal portion 191 is arranged at an even larger interval from the terminal portion 111.

[0041] The reason why the spacing between the terminals 111, 121, 141, 151, 161, 171, 181, and 191 has the above-described relationship is due to the functions of these terminals. For example, when the semiconductor device A1 of this embodiment is configured as an IPM, the current controlled by the semiconductor device A1 is, for example, a three-phase AC current having a U phase, a V phase, and a W phase. The three terminals 121 are assigned as the U phase, the V phase, and the W phase terminals, respectively. A relatively high voltage is applied to the three terminals 151. For this reason, the spacing between adjacent terminals is relatively large for terminals through which a relatively large current flows or to which a high voltage is applied.

[0042] The heat dissipation member 200 is provided mainly to transfer heat from the semiconductor elements 410 and 420 to the outside of the semiconductor device A1. In this embodiment, the heat dissipation member 200 is made of ceramics and has a rectangular plate shape. Note that, although a ceramic configuration is preferable for the heat dissipation member 200 from the viewpoints of strength, heat conductivity, and insulation, various materials may be used.

[0043] The heat dissipation member 200 has a bonding surface 210, an exposed surface 220, and a side surface 230. The bonding surface 210 and the exposed surface 220 face opposite each other in the thickness direction of the heat dissipation member 200 and are parallel to each other. The bonding surface 210 is bonded to the island portion 110 and the three island portions 120 via a bonding layer 300. In this embodiment, when viewed in the z direction, the heat dissipation member 200 overlaps with at least a portion of the island portions 130 and 140 in addition to the island portions 110 and 120. However, the heat dissipation member 200 is not bonded to the island portions 130 and 140.

[0044] The bonding layer 300 bonds the heat dissipation member 200 to the rear surface 1102 of the island portion 110 and the rear surface 1202 of the island portion 120. The bonding layer 300 preferably has a relatively good thermal conductivity and can appropriately bond the heat dissipation member 200, which is made of, for example, ceramics, to the island portions 110 and 120, which are made of, for example, Cu.

[0045] The semiconductor elements 410, 420, 430, and 440 are functional elements that cause the semiconductor device A1 to function as an IPM. In this embodiment, the semiconductor elements 410 and 420 are so-called power semiconductor elements. The power semiconductor elements referred to in this disclosure are, for example, elements that input and output three-phase AC current, which is the control target of an IPM, and typically include an IGBT (Insulated-Gate Bipolar Transistor), a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), and an FRD (Fast Recovery Diode). These power semiconductor elements may also be those that use SiC as a base material. In this embodiment, the semiconductor element 410 is, for example, an IGBT, and the semiconductor element 420 is, for example, an FRD.

[0046] As shown in FIGS. 8 to 12, the semiconductor element 410 has a bottom surface 411, a first electrode 414, a second electrode 412, and a third electrode 413. In this embodiment, the third electrode 413 is a gate electrode (control electrode), the second electrode 412 is an emitter electrode, and the first electrode 414 is a collector electrode. The second electrode 412 and the third electrode 413 are formed on a surface of the semiconductor element 410 facing upward in the z direction and are made of, for example, Au. A wire 650 is bonded to the second electrode 412. A wire 600 is bonded to the third electrode 413. The first electrode 414 is formed so as to occupy the entire lower surface (bottom surface 411) of the semiconductor element 410 in the z direction and is made of, for example, Au or Ag. The bottom surface 411 is a surface bonded to the island portions 110 and 120 via a bonding material 510 and is constituted by the first electrode 414 in this embodiment.

[0047] The semiconductor element 420 has a bottom surface 421, an upper surface electrode 422, and a bottom surface electrode 423. The upper surface electrode 422 is formed on a surface of the semiconductor element 420 facing upward in the z direction and is made of, for example, Au. A wire 650 is bonded to the upper surface electrode 422. The bottom surface electrode 423 is formed so as to occupy the entire lower surface of the semiconductor element 420 in the z direction and is made of, for example, Au or Ag. The bottom surface 421 is the surface bonded to the island portions 110 and 120 via a bonding material 510, and in this embodiment, is constituted by the bottom surface electrode 423.

[0048] The bonding material 510 bonds the semiconductor elements 410, 420 to the island portions 110, 120. In this embodiment, solder is used as the bonding material 510. The solder, which is the bonding material 510, bonds the semiconductor elements 410, 420 to the island portions 110, 120 by melting and then hardening. In this embodiment, the first electrode 414 of the semiconductor element 410 and the bottom electrode 423 of the semiconductor element 420 are made of Au or Ag, and the island portions 110, 120 are made of Cu. As a result, the wettability of the bottom surfaces 411, 421 of the semiconductor elements 410, 420 to the molten solder, i.e., the bonding material 510, is superior to that of the island portions 110, 120. Note that the bonding material 510 is not limited to solder and may be Ag paste, baked silver, or the like.

[0049] In this embodiment, the semiconductor elements 430 and 440 are so-called control-system semiconductor elements. In this disclosure, the control-system semiconductor elements are elements that perform the function of controlling the operation of the above-mentioned power-system semiconductor elements, such as driver ICs. In this embodiment, the semiconductor elements 430 and 440 are both driver ICs. Furthermore, the semiconductor element 430 is a high-voltage driver IC that handles a relatively high-voltage current, and the semiconductor element 440 is a low-voltage driver IC that handles a relatively low-voltage current.

[0050] As shown in Fig. 3, the semiconductor elements 430, 440 have a plurality of upper surface electrodes 432, 442. Wires 600 are bonded to the upper surface electrodes 432, 442. As shown in Fig. 7, the semiconductor element 430 is bonded to the island portion 130 via a bonding material 520. The bonding material 520 is, for example, an Ag paste. Similarly, the semiconductor element 440 is bonded to the island portion 140 via a bonding material 520 made of, for example, an Ag paste.

[0051] The passive component 490 is a single-function electronic component such as a resistor, capacitor, or coil, and in this embodiment, acts on the current to the semiconductor element 430. The passive component 490 is bonded to the island portion 150 via a bonding material 520. A wire 600 is bonded to the upper surface of the passive component 490 in the z direction.

[0052] The wire 600 and the wire 650, together with the lead 100 described above, constitute a conductive path that enables the semiconductor elements 410, 420, 430, and 440 and the passive component 490 to perform their predetermined functions. In this embodiment, the wire 600 is used to constitute a conductive path through which a relatively small current flows, and the wire 650 is used to constitute a conductive path through which a relatively large current flows. The wire 600 is made of, for example, Au and has a diameter of, for example, about 38 μm. The wire 650 is made of, for example, Al and has a diameter of, for example, about 400 μm.

[0053] The sealing resin 700 partially or entirely covers the leads 100, the semiconductor elements 410, 420, 430, 440, the passive components 490, and the wires 600, 650. The sealing resin 700 has a first portion 710 and a plurality of second portions 720.

[0054] The first portion 710 and the second portion 720 have different infrared transmittances. The infrared transmittance of the second portion 720 is higher than that of the first portion 710. The materials of the first portion 710 and the second portion 720 are not limited in any way. An example of the material of the first portion 710 is black epoxy resin mixed with filler. An example of the material of the second portion 720 is epoxy resin that transmits most infrared rays with wavelengths of approximately 770 to 1000 nm, while blocking most visible light with wavelengths of 770 nm or less. The material of the second portion 720 may be a general transparent resin that transmits not only infrared rays but also visible light.

[0055] The first portion 710 constitutes the majority of the sealing resin 700. The first portion 710 has a resin main surface 711 and a resin back surface 712. The resin main surface 711 and the resin back surface 712 are surfaces facing opposite each other in the z direction.

[0056] 2, four grooves 780 and two grooves 790 are formed in the first portion 710. The four grooves 780 are recessed in the y direction and extend in the z direction. The four grooves 780 are provided between the three terminal portions 151 and the terminal portion 171 and at positions adjacent to the terminal portions 151. As shown in FIG. 3, arc-shaped notches are formed in the island portion 150 in correspondence with these grooves 780. As described above, the spacing between the three terminal portions 151 is relatively large.

[0057] The two grooves 790 are provided at both ends in the x direction, are recessed in the x direction, and extend in the z direction. These grooves 790 are used, for example, when transporting or mounting the semiconductor device A1.

[0058] 6, 7, 9, 10, and 12, the sealing resin 700 fills the recesses 112, 122, 132, 142, 152, and 182 and the trenches 113 and 123 of the lead 100. In this embodiment, the sealing resin 700 covers the entire side surface 230 of the heat dissipation member 200, and the surface facing downward in the z direction is flush with the exposed surface of the heat dissipation member 200.

[0059] The second portion 720 overlaps the island portion 110 or the island portion 120 when viewed in the z direction, and is disposed on the side where the main surface 1101 and the main surface 1201 face the island portion 110 or the island portion 120. The second portion 720 of this embodiment overlaps the semiconductor element 410 when viewed in the z direction, and is contained within the semiconductor element 410. Furthermore, in the illustrated example, the second portion 720 overlaps the second electrode 412 of the semiconductor element 410 when viewed in the z direction. Furthermore, the second portion 720 of this embodiment is spaced apart from the wire 650 when viewed in the z direction.

[0060] 9 and 12, a recess 713 is formed in the first portion 710. The recess 713 is a portion recessed in the z direction from the resin main surface 711. The recess 713 may penetrate a portion of the resin main surface 711, or may be a non-penetrating recess with a bottom. In the example shown, the recess 713 penetrates a portion of the resin main surface 711 in the z direction and reaches the second electrode 412 of the semiconductor element 410.

[0061] The second portion 720 is housed in the recess 713. The second portion 720 has an exposed surface 721. The exposed surface 721 is exposed in the z direction from the resin main surface 711 of the first portion 710. In the example shown, the second portion 720 is in contact with the semiconductor element 410, for example, with the second electrode 412. The shape of the second portion 720 is not limited in any way. In the example shown, the second portion 720 is a tapered cylinder whose diameter decreases in the z direction from the resin main surface 711 toward the semiconductor element 410.

[0062] In this embodiment, six second sections 720 are provided corresponding to the six semiconductor elements 410, respectively. Alternatively, the number of second sections 720 may be different from the number of semiconductor elements 410. For example, a configuration may be possible in which a second section 720 overlaps one of the three semiconductor elements 410 mounted on the island section 110, and no second section 720 overlaps the other two semiconductor elements 410.

[0063] 13 and 14 are enlarged cross-sectional views of a main part showing an example of a manufacturing method of semiconductor device A1. In Fig. 13, after mounting semiconductor elements 410, 420, 430, and 440 on lead 100 and bonding wires 600 and 650 are completed, first part 710 shown in Fig. 10 is formed using, for example, a mold. At this stage, first part 710 does not yet have multiple recesses 713 formed therein.

[0064] Next, as shown in FIG. 14 , a plurality of recesses 713 are formed in the first portion 710. The method for forming the recesses 713 is not particularly limited as long as it is a method that can remove appropriate locations of the first portion 710. Examples of such methods include a method using laser light and a method using etching. In the illustrated example, a portion of the first portion 710 is removed by irradiating the resin main surface 711 of the first portion 710 with laser light L. This processing using laser light forms a plurality of recesses 713 in the first portion 710. In the illustrated example, the recesses 713 reach the second electrode 412 of the semiconductor element 410.

[0065] Then, for example, a liquid resin material is filled into the recess 713, and the resin material is cured, thereby obtaining the second portion 720 shown in FIGS.

[0066] Next, the operation of the semiconductor device A1 will be described.

[0067] According to this embodiment, as shown in FIGS. 2, 3, 8, 9, 11, and 12, the sealing resin 7 has a first portion 710 and a second portion 720. The second portion 720 is made of a material with a higher infrared transmittance than the first portion 710. Furthermore, the second portion 720 overlaps the island portion 110 and the island portion 120 when viewed in the z direction. This allows the heat generated from the semiconductor element 410 through the second portion 720 to be treated as radiant heat by a radiation thermometer or the like, thereby enabling more accurate measurement of the heat generation state of the semiconductor element 410. Furthermore, there is no need to secure space for providing an element such as a thermistor in the island portion 110 or the island portion 120. This eliminates the need for increased size of the semiconductor device A1 and enables more accurate temperature measurement.

[0068] In this embodiment, the second portion 720 overlaps the semiconductor element 410 when viewed in the z direction. This makes it possible to detect a larger amount of heat generated from the semiconductor element 410 through the second portion 720, thereby enabling more accurate temperature measurement.

[0069] The second portion 720 overlaps the second electrode 412 when viewed in the z direction and is in contact with the second electrode 412. This makes it possible to further prevent heat from the semiconductor element 410 from being absorbed by the first portion 710. This corresponds to directly measuring the temperature of the semiconductor element 410 and is preferable for accurate temperature measurement.

[0070] 14, the technique of forming the recess 713 using laser light L makes it possible to remove a desired portion of the first portion 710 to a desired size, and is preferable for providing the second portion 720 at a desired position. In addition, the second portion 720 is spaced apart from the wire 650. Therefore, for example, when forming the recess 713, it is possible to avoid unintentionally damaging the wire 650.

[0071] 15 to 23 show modifications and other embodiments of the present invention. In these figures, elements that are the same as or similar to those in the above embodiment are given the same reference numerals as those in the above embodiment.

[0072] 15 shows a first modified example of the semiconductor device A1. The semiconductor device A11 of this modified example differs from the semiconductor device A1 in the configurations of the first portion 710 and the second portion 720 of the sealing resin 700. In this embodiment, the first portion 710 has a plurality of intervening portions 714.

[0073] The intervening portion 714 is interposed between the second portion 720 and the semiconductor element 410 in the z direction. In the example shown, the intervening portion 714 contacts the second portion 720 and the second electrode 412 of the semiconductor element 410. The dimension of the intervening portion 714 in the z direction is smaller than the dimension of the second portion 720 in the z direction.

[0074] FIG. 16 shows an example of a manufacturing method for semiconductor device A11. As in the example shown in FIG. 13, after forming first portion 710 using a mold or the like, laser light L is irradiated onto resin main surface 711 as shown in FIG. 16. When part of first portion 710 is removed by laser light L, a part of first portion 710 that covers semiconductor element 410 remains. This remaining part becomes interposed portion 714. Furthermore, recess 713 formed by this processing is a non-penetrating recess that does not penetrate first portion 710 and has a bottom. Resin material is filled into recess 713 and cured, thereby obtaining second portion 720 shown in FIG. 15.

[0075] This embodiment also enables more accurate temperature measurement while avoiding an increase in size of the semiconductor device A11. Furthermore, although the intervening portion 714 is interposed between the second portion 720 and the semiconductor element 410, the heat generated by the semiconductor element 410 is transferred to the intervening portion 714 and radiated as radiant heat. Therefore, the heat generation state of the semiconductor element 410 can be measured.

[0076] By making the dimension of interposed portion 714 in the z direction smaller than the dimension of second portion 720 in the z direction, it is possible to prevent interposed portion 714 from unduly insulating heat from semiconductor element 410. Note that, from the viewpoint of measurement accuracy, it is preferable that the dimension of interposed portion 714 in the z direction be as thin as possible, and for example, it is preferable that it be about 1 / 20 to 1 / 5 of the dimension of second portion 720 in the z direction, or about 10 μm to 100 μm. Furthermore, in the step shown in FIG. 16 , laser light L is not directly irradiated onto semiconductor element 410, which is preferable for protecting semiconductor element 410. Note that in the following embodiments, unless otherwise described, a configuration may or may not include interposed portion 714.

[0077] 17 shows a semiconductor device according to a second embodiment of the present invention. A semiconductor device A2 of this embodiment differs from the first embodiment described above in the arrangement of the plurality of second portions 720.

[0078] In this embodiment, the multiple second portions 720 include second portions 720 that overlap the semiconductor element 410 and second portions 720 that overlap the semiconductor element 420, as seen in the z direction. The second portions 720 that overlap the semiconductor element 420 may be configured to be in contact with the upper surface electrode 422, similar to the second portions 720 of the semiconductor device A1, or may have an intervening portion 714 interposed between them and the upper surface electrode 422.

[0079] This embodiment also makes it possible to measure the temperature more accurately while avoiding an increase in the size of the semiconductor device A2. Furthermore, it is possible to measure the temperature of the semiconductor element 420 in addition to the temperature of the semiconductor element 410, and therefore it is possible to grasp the operating state of the semiconductor device A2 more accurately.

[0080] 18 shows a semiconductor device according to a third embodiment of the present invention. A semiconductor device A3 of this embodiment differs from the above-described embodiments in the configuration of the plurality of second portions 720.

[0081] In this embodiment, when viewed in the z direction, the second portion 720 overlapping the island portion 110 overlaps with three semiconductor elements 410. In addition, the second portion 720 overlaps with the wire 650 when viewed in the z direction.

[0082] FIG. 20 shows an example of a manufacturing method for the semiconductor device A3. In this manufacturing method, the recess 713 in the first portion 710 is formed by etching. For example, etching is performed on a region that overlaps with three semiconductor elements 410 mounted on the island portion 110 when viewed in the z direction, and a portion of the first portion 710 is removed. This forms the recess 713. In the illustrated example, the intervening portion 714 that covers the semiconductor elements 410 remains even after etching. The wire 650 may be covered by the intervening portion 714, or may be housed in the recess 713 while being exposed from the intervening portion 714. In this case, the second portion 720 is configured to contact the wire 650.

[0083] This embodiment also makes it possible to perform more accurate temperature measurement while avoiding an increase in the size of the semiconductor device A3. Furthermore, by providing the second portion 720 large enough to overlap the three semiconductor elements 410, it is possible to perform more accurate temperature measurement of the three semiconductor elements 410.

[0084] The technique of forming the recess 713 by etching can suppress the influence on the wire 650 and the like by appropriately selecting an etching solution, for example.

[0085] 21 and 22 show a semiconductor device according to a fourth embodiment of the present invention. A semiconductor device A4 of this embodiment differs from the above-described embodiments in the configuration of the plurality of second portions 720.

[0086] In this embodiment, the second portion 720 overlaps the island portion 110 when viewed in the z direction but is spaced apart from the semiconductor element 410. The second portion 720 is in contact with the island portion 110. More specifically, the second portion 720 is in contact with the main surface 1101 of the island portion 110 and is also in contact with the recess 122. In other words, the recess 122 that overlaps with the second portion 720 when viewed in the z direction is filled with a portion of the second portion 720.

[0087] FIG. 23 shows an example of a manufacturing method for a semiconductor device A4. A pin P is used to form a first portion 710 using a mold M. Before a resin material is injected into the cavity of the mold M, the pin P is abutted against a portion of the island portion 110 within the cavity. In the illustrated example, the tip surface of the pin P blocks a certain recess 122. In this state, the resin material is injected and hardened. As a result, a recess 713 shaped like the outline of the pin P is formed in the first portion 710. This recess 713 is connected to the recess 122 that the pin P previously blocked. Then, a resin material for forming a second portion 720 is filled into the recess 713. This resin material also fills the recess 122. The second portion 720 is formed by hardening this resin material.

[0088] This embodiment also enables more accurate temperature measurement while avoiding an increase in the size of the semiconductor device A4. As can be seen from this embodiment, the second section 720 is not limited to overlapping the semiconductor element 410, but may overlap the island section 110. Even with this configuration, more accurate temperature measurement can be performed by utilizing radiant heat from the island section 110. Furthermore, the space required to provide the second section 720 can be smaller than the space required to mount a thermistor on the island section 110, for example, thereby enabling the semiconductor device A4 to be made smaller.

[0089] The semiconductor device according to the present disclosure is not limited to the above-described embodiment, and the specific configuration of each part of the semiconductor device according to the present disclosure can be freely modified in various ways.

[0090] Appendix 1. a lead including an island portion having a main surface and a back surface facing opposite to each other in a thickness direction; a semiconductor element mounted on the main surface of the island portion; a sealing resin that covers the semiconductor element and the island portion, The sealing resin has a first portion and a second portion that overlaps the island portion when viewed in the thickness direction and has a higher infrared transmittance than the first portion. Appendix 2. 2. The semiconductor device according to claim 1, wherein the second portion is exposed from the first portion. Appendix 3. 3. The semiconductor device according to claim 1, wherein the second portion is located on the main surface side of the island portion in the thickness direction. Appendix 4. 4. The semiconductor device according to claim 3, wherein the second portion overlaps the semiconductor element when viewed in the thickness direction. Appendix 5. 5. The semiconductor device according to claim 4, wherein the second portion is included in the semiconductor element when viewed in the thickness direction. Appendix 6. 6. The semiconductor device according to claim 4, wherein the first portion has an intervening portion interposed between the second portion and the semiconductor element. Appendix 7. 7. The semiconductor device according to claim 6, wherein the dimension of the interposition portion in the thickness direction is smaller than the dimension of the second portion in the thickness direction. Appendix 8. 6. The semiconductor device according to claim 4, wherein the second portion is in contact with the semiconductor element. Appendix 9. 4. The semiconductor device according to claim 3, wherein the second portion is spaced apart from the semiconductor element when viewed in the thickness direction. Appendix 10. 10. The semiconductor device according to claim 9, wherein the second portion is included in the island portion when viewed in the thickness direction. Appendix 11. 11. The semiconductor device according to claim 9, wherein the second portion is in contact with the main surface of the island portion. Appendix 12. the island portion has a plurality of recesses recessed from the main surface in the thickness direction, 12. The semiconductor device according to claim 11, wherein the second portion is in contact with the recess. Appendix 13. 13. The semiconductor device according to any one of claims 1 to 12, wherein the semiconductor element is a switching element having a first electrode facing the island portion, a second electrode and a third electrode located on the opposite side of the first electrode in the thickness direction, and the third electrode is used as a control electrode. Appendix 14. 14. The semiconductor device according to claim 13, wherein the second portion overlaps the second electrode when viewed in the thickness direction. Appendix 15. 15. The semiconductor device according to any one of claims 1 to 14, further comprising a heat dissipation member fixed to the back surface of the island portion and exposed from the sealing resin. Appendix 16. further comprising a wire bonded to the semiconductor element; 16. The semiconductor device according to any one of claims 1 to 15, wherein the second portion is spaced apart from the wire. Appendix 17. 17. The semiconductor device according to any one of claims 1 to 16, further comprising a control IC that controls the semiconductor element. [Explanation of symbols]

[0091] A1, A2: Semiconductor device 100: Lead 110, 120, 130, 140, 150: Island section 160, 170, 180: Pad section 111,121,141,151,161,171,181,191:Terminal section 112, 122, 132, 142, 152, 182: recesses 113,123: Moat 114,124: Bend 115,125: Corner section 116,126: Arc section 1101, 1201: Main surface 1102, 1202: Back surface 200: Heat dissipation member 210: Bonding surface 220: Exposed surface 230: Side 231: Smooth area 232: Rough area 300: Bonding layer 310: Individual area 410, 420, 430, 440: Semiconductor elements 411,421:Bottom surface 412,422,432,442:Top surface electrode 413, 423: Bottom electrode 490: Passive component 510, 520: Joining material 600, 650: Wire 601: Wire 610: First bonding part 605: Stepped part 620: Second bonding part 630: Reinforced bonding part 631: Disk part 632: Cylindrical part 633: Pointed part 690: Circular mark 700: Sealing resin 710: Part 1 711: Resin main surface 712: Resin back surface 713: Recess 714: Intervening part 720: Part 2 780, 790: Groove

Claims

1. a lead including an island portion having a main surface and a back surface facing opposite to each other in a thickness direction; a semiconductor element mounted on the main surface of the island portion; a sealing resin that covers the semiconductor element and the island portion, the sealing resin has a first portion and a second portion that overlaps the island portion when viewed in the thickness direction and has a higher infrared transmittance than the first portion; the second portion is located on the main surface side of the island portion in the thickness direction, The second portion is spaced apart from the semiconductor element when viewed in the thickness direction.

2. A lead including an island portion having a main surface and a back surface facing opposite to each other in a thickness direction; a semiconductor element mounted on the main surface of the island portion; a sealing resin that covers the semiconductor element and the island portion, the sealing resin has a first portion and a second portion that overlaps the island portion when viewed in the thickness direction and has a higher infrared transmittance than the first portion; The semiconductor element is a switching element having a first electrode facing the island portion, a second electrode and a third electrode located on the opposite side of the first electrode in the thickness direction, and the third electrode is used as a control electrode.

3. A lead including an island portion having a main surface and a back surface facing opposite each other in a thickness direction; a semiconductor element mounted on the main surface of the island portion; a sealing resin that covers the semiconductor element and the island portion, the sealing resin has a first portion and a second portion that overlaps the island portion when viewed in the thickness direction and has a higher infrared transmittance than the first portion; The semiconductor device further includes a heat dissipation member fixed to the back surface of the island portion and exposed from the sealing resin.

4. 4. The semiconductor device according to claim 1, wherein said second portion is exposed from said first portion.

5. The semiconductor device according to claim 4 , wherein the second portion overlaps the semiconductor element when viewed in the thickness direction.

6. The semiconductor device according to claim 5 , wherein the second portion is included in the semiconductor element when viewed in the thickness direction.

7. 7. The semiconductor device according to claim 5, wherein the first portion has an intervening portion interposed between the second portion and the semiconductor element.

8. The semiconductor device according to claim 7 , wherein a dimension of said interposed portion in said thickness direction is smaller than a dimension of said second portion in said thickness direction.

9. The semiconductor device according to claim 5 , wherein the second portion is in contact with the semiconductor element.

10. The semiconductor device according to claim 1 , wherein the second portion is included in the island portion when viewed in the thickness direction.

11. The semiconductor device according to claim 9 , wherein the second portion is in contact with the main surface of the island portion.

12. the island portion has a plurality of recesses recessed from the main surface in the thickness direction, The semiconductor device according to claim 11 , wherein the second portion is in contact with the recess.

13. 8. The semiconductor device according to claim 5, wherein the second portion overlaps the second electrode when viewed in the thickness direction.

14. further comprising a wire bonded to the semiconductor element; The semiconductor device according to claim 1 , wherein the second portion is spaced apart from the wire.

15. 15. The semiconductor device according to claim 1, further comprising a control IC that controls the semiconductor element.

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