Output circuit, photoelectric conversion device, and photoelectric conversion system

Abstract

To solve the problem in which, when a bias current is switched, an amplitude limiting voltage of an output signal changes and it is not possible to restrict the voltage to a desired one.SOLUTION: An output circuit has a comparator that compares an input signal with another signal and outputs a signal indicating the result of the comparison and a limiting element that restricts the amplitude of the signal indicating the result of the comparison. The limiting element can adjust a range of signal amplitude changes due to a change in the current when a current flowing in the output circuit changes.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to an output circuit, and a photoelectric conversion device and a photoelectric conversion system that include this output circuit. [Background technology]

[0002] The imaging device of Patent Document 1 has an output circuit equipped with an amplitude limiting element that limits the amplitude of the output signal of the comparator. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 2017-73746 Summary of the Invention [Problem to be solved by the invention]

[0004] In the imaging device of Patent Document 1, the amplitude of the output signal may change when the magnitude of the bias current of the output circuit is switched, and there is a problem in that the amplitude limiting element cannot limit the amplitude of the output signal to the desired voltage. [Means for solving the problem]

[0005] One aspect of the present invention is a comparator that compares an input signal with another signal and outputs a signal indicating the result of the comparison, and a limiting circuit that limits the amplitude of the signal indicating the result of the comparison. Set the first limit and a limiting element, wherein when a current flowing through the output circuit changes, the limiting element is configured to limit the current flowing through the output circuit in response to the change in the current. Accordingly, the first limit value can be adjusted.

[0006] Another aspect of the present invention is an output circuit having a comparator that compares an input signal with another signal and outputs a signal indicating the result of the comparison, and a limiting element that limits the amplitude of the signal indicating the result of the comparison, wherein a current source that supplies a current to the output circuit a first power supply voltage node connected to the limiting element; and a second power supply voltage node connected to the current source. wherein the limiting element is a first amplitude limiting element; , th a second amplitude limiting element and a switch connected in parallel to the second amplitude limiting element; the first amplitude limiting element and the second amplitude limiting element are connected in series between the first power supply voltage node and the second power supply voltage node; The current source and the switch are controlled by a control unit.

[0007] Yet another aspect of the present invention is an output circuit having a comparator that compares an input signal with another signal and outputs a signal indicative of the result of the comparison, and a limiting element that limits the amplitude of the signal indicative of the result of the comparison, the output circuit further comprising a current source that supplies a current to the output circuit, the limiting element comprising a first amplitude limiting element and a second amplitude limiting element. , th a second amplitude limiting element and a switch connected in series with the second amplitude limiting element; the first amplitude limiting element and the second amplitude limiting element are connected in parallel between the comparator and the current source; The current source and the switch are controlled by a control unit. [Effects of the Invention]

[0008] According to the present invention, even if the bias current of the output circuit changes, the amplitude of the output signal can be limited to a desired voltage. [Brief explanation of the drawings]

[0009] [Figure 1] 1 is a schematic diagram of a photoelectric conversion device including an output circuit according to a first embodiment. [Figure 2] 1 is a schematic diagram of a photoelectric conversion device including an output circuit according to a first embodiment. [Figure 3] 4 is a timing chart of a photoelectric conversion device including an output circuit according to the first embodiment. [Figure 4] FIG. 10 is a schematic diagram of a photoelectric conversion device including an output circuit according to a second embodiment. [Figure 5] FIG. 10 is a schematic diagram of a photoelectric conversion device including an output circuit according to a third embodiment. [Figure 6] FIG. 10 is a schematic diagram of a photoelectric conversion device including an output circuit according to a fourth embodiment. [Figure 7] FIG. 10 is a schematic diagram of a photoelectric conversion device including an output circuit according to a fifth embodiment. [Figure 8] FIG. 10 is a schematic diagram of a photoelectric conversion device including an output circuit according to a sixth embodiment. [Figure 9] FIG. 13 is a schematic diagram of a photoelectric conversion device including an output circuit according to a seventh embodiment. [Figure 10] FIG. 13 is a diagram illustrating a configuration of a photoelectric conversion system according to an eighth embodiment. [Figure 11] 13A and 13B are diagrams illustrating the configuration and operation of a moving body according to a ninth embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0010] Hereinafter, each embodiment will be described with reference to the drawings.

[0011] In the following embodiments, an image pickup device, which is an example of a photoelectric conversion device, will be described as an example of a device to which the present invention can be applied. However, the embodiments are not limited to photoelectric conversion devices and can be applied to other devices. Furthermore, application of the present invention to photoelectric conversion devices is not limited to image pickup devices. For example, the present invention can be applied to distance measurement devices (devices that measure distance using focus detection or TOF (Time Of Flight)), photometry devices (devices that measure the amount of incident light), etc.

[0012] (First embodiment) FIG. 1 is a schematic diagram of a photoelectric conversion device including an output circuit according to this embodiment.

[0013] The photoelectric conversion device of Figure 1 includes a pixel array 110 having pixels 100 arranged in an array, and an output circuit having a vertical output line 120, a current source 130, a RAMP signal generating circuit 140, a comparator 150, and a pulse generating circuit 160.

[0014] The pixel array 110 has a plurality of pixels 100 arranged in an array across a plurality of rows and a plurality of columns. The pixels 100 convert incident light into electric charges through photoelectric conversion, and then convert the electric charges into signals, thereby outputting signals based on the incident light. A vertical output line 120 is arranged in each column of the pixel array 110, extending in the column direction (the vertical direction in FIG. 1). The vertical output line 120 is connected to each of the pixels 100 arranged in the column direction, and serves as a signal line common to these pixels 100. Although one vertical output line is depicted in FIG. 1, a plurality of vertical output lines may be connected depending on the number of bits of the output signal.

[0015] There is no particular limitation on the number of pixels 100 that make up the pixel array 110. For example, the pixel array 110 may be made up of several thousand rows and several thousand columns of pixels 100, as in a typical digital camera, or may be made up of a plurality of pixels 100 arranged in one row or one column. Alternatively, the pixel array 110 may be made up of a single pixel 100.

[0016] The current source 130 supplies a current to the source follower transistor of the pixel 100, and forms a source follower circuit together with the source follower transistor. A signal read from the pixel 100 is output to a vertical output line 120 using the source follower circuit as an output section.

[0017] One end of the vertical output line 120 of each column is connected to a comparator 150. The pixel signals read out from the pixels 100 are input to the comparator 150 via the vertical output line 120.

[0018] The RAMP signal generating circuit 140, the comparator 150, and the pulse generating circuit 160 are an example of an analog-to-digital conversion unit that performs analog-to-digital conversion (hereinafter, AD conversion) on the signal output from the pixel 100. The output of the vertical output line 120 and the output of the RAMP signal generating circuit 140 are connected to two inputs of the comparator 150, respectively. The RAMP signal generating circuit 140 is an example of a reference signal source that outputs a reference signal used for AD conversion of a ramp signal, etc. The comparator circuit 150 is a comparator that compares the potential of the vertical output line 120, which is an input signal, with the output potential of the RAMP signal generating circuit 140, which is a reference signal. When the magnitude relationship of the potentials is inverted, the output potential of the comparator 150 is inverted from high to low or from low to high. The count value of the output of the pulse generating circuit 160 corresponding to the inversion of the output potential of the comparator 150 is used as digital data. Note that the signal input to the comparator 150 is not limited to this, and the comparator 150 may be configured to compare the input signal with a signal other than the input signal.

[0019] 2 is a timing chart showing an example of AD conversion operation of a photoelectric conversion device including an output circuit according to this embodiment. The AD conversion operation of the photoelectric conversion device will be explained using FIG. 2. In the following explanation, it is assumed that as the luminance of incident light increases, the level of the pixel signal decreases due to processing by the readout circuit 2.

[0020] At time t1, the RAMP signal generating circuit 140 outputs a ramp signal whose potential drops over time. The ramp signal may be a signal whose potential changes continuously over time, or a signal whose potential changes in a sawtooth pattern. In the former case, it is acceptable for the potential change to be blunted at the rising edge of the potential. At the same time, the vertical output line 120 outputs a voltage corresponding to the reset level of the pixel signal.

[0021] At time t2, the magnitude relationship between the output voltage of the vertical output line 120 and the output voltage of the RAMP signal generating circuit 140 is reversed, and the output VOUT of the comparator 150 starts to reverse from low to high. At this time, VOUT has a delay due to a slope according to the slew rate.

[0022] At time t3, when the output VOUT of the comparator 150 becomes lower than a certain threshold, the pulse generating circuit 160 generates and outputs a pulse signal. By this operation, the reset level of the pixel signal is AD converted.

[0023] At time t4, the RAMP signal generating circuit 140 is reset, and the output of the RAMP signal generating circuit 140 returns to the reference potential. Here, the reference potential refers to the potential at the time when the ramp signal starts to rise. The output VOUT of the comparator 150 is also reset.

[0024] At time t5, the output VOUT of the vertical output line 120 becomes the optical signal level.

[0025] At time t6, the RAMP signal generating circuit 140 starts outputting the ramp signal.

[0026] At time t7, the output voltage of the vertical output line 120 input to the comparator 150 becomes equal to the output voltage of the RAMP signal generating circuit 140, and the inversion of the output VOUT of the comparator 150 begins.

[0027] At time t8, a pulse is output from the pulse generating circuit 160 with a delay amount according to the slope corresponding to the slew rate of VOUT. This operation performs AD conversion on the optical signal level of the pixel signal. Correlated double sampling (CDS) is performed by taking the difference between the digital values ​​(digital data) of the optical signal level and the reset level, and digital data used for image formation is obtained.

[0028] In such an AD conversion operation, if the delay amount of the pulses generated at time t3 and time t8 increases, the AD conversion time increases by the amount of the delay, and therefore the readout time of the photoelectric conversion device increases.

[0029] Furthermore, when multiple comparators 150 are inverted at once, the GND voltage and the power supply voltage fluctuate, and the voltage fluctuations propagate as noise, causing deterioration in image quality.

[0030] That is, the readout speed and image quality of the photoelectric conversion device are affected by the delay in the output of the comparator 150 and the voltage fluctuations that accompany the inversion operation of the comparator 150. The amount of delay in the output of the comparator 150 is determined by the slew rate of the output VOUT of the comparator 150 and the Hi level Vouthi of the output VOUT.

[0031] FIG. 3 is a schematic diagram showing an example of the comparator 150 included in the output circuit according to this embodiment.

[0032] The comparator 150 of FIG. 3 includes input transistors 170 and 180, a current source 190, current mirror transistors 200 and 210, an input transistor 220, an amplitude limiting element 230, a variable voltage source 240, and a current source 250.

[0033] The input transistors 170 and 180, the current source 190, and the current mirror transistors 200 and 210 form a differential stage. The input transistor 220, the amplitude limiting element 230, and the current source 250 form an amplification stage. The output of the variable voltage source 240 is input in common to the comparators 150 of multiple columns.

[0034] The comparator 150 shown in FIG. 3 can reduce the Hi level Vouthi of the output of the amplification stage by using the amplitude limiting element 230, and can suppress the amount of inversion delay and kickback to other column circuits during inversion.

[0035] The HI level Vouthi of the output voltage of the amplification stage is determined by the bias voltage Vbias of the variable voltage source 240 and the gate-source voltage Vgs of the amplitude limiting element 230, as shown in equation (1). Vouthi=Vbias-Vgs (1)

[0036] The gate-source voltage Vgs of the amplitude limiting element 230 is determined by the element size of the amplitude limiting element 230, the flowing current Id, and the threshold voltage Vth, as shown in equation (2).

[0037]

number

[0038] where μ is the carrier mobility, Cox is the oxide film capacitance per unit area of ​​the transistor, W is the channel width of the transistor, and L is the channel length of the transistor.

[0039] From equations (1) and (2), the high level Vouthi of the amplifier stage output voltage is given by equation (3).

[0040]

number

[0041] To reduce power consumption, the amount of current supplied from the current source 250 may be changed depending on the imaging mode. For example, consider a case where there are two imaging modes: a still image mode that prioritizes noise reduction, and a video mode that prioritizes power consumption reduction and uses a smaller amount of current than the still image mode. As the amount of current changes depending on the imaging mode, Vgs of the amplitude limiting element 230 changes according to equation (2), and the Hi level Vouthi of the output voltage of the amplifier stage changes (equation (3))).

[0042] For example, when the imaging mode is switched from still image mode to video mode and the amount of current of the current source 250 is reduced, Vgs decreases and Vouthi increases, so the inversion delay of the output voltage of the amplification stage increases according to this change.

[0043] That is, in an imaging mode in which the amount of current is reduced to reduce power consumption, there is a concern that the readout time may increase.

[0044] In this embodiment, to solve this problem, Vbias is obtained from a variable voltage source 240.

[0045] By making Vbias variable and optimizing Vbias for each imaging mode with different current so that Vouthi can be kept at a constant value, it is possible to shorten the readout time even in imaging modes in which the amount of current in the comparator 150 is small.

[0046] For example, when the amount of current of current source 250 is reduced, Vgs is reduced according to equation (2). By reducing Vbias, which is the output of variable voltage source 240, by the amount of Vgs reduced, Vouthi can be kept constant (equation (3)). The outputs of current source 250 and variable voltage source 240 are controlled by control signals (bias voltages) supplied from a control unit (not shown).

[0047] As described above, according to this embodiment, the limiting element is adjusted to reduce the change in amplitude of the output signal due to a change in current, thereby correcting the change in amplitude, and therefore it is possible to keep the amplitude limiting voltage (amplitude of the output signal) Vouthi constant even when there is a change in the amount of current of the current source 250. Therefore, with regard to the readout time when the imaging mode is switched (when the amount of current is reduced), the increase in the readout time from the readout time in the imaging mode before the switch can be set to zero (the same readout time) or made small.

[0048] (Second embodiment) The second embodiment will be described with reference to FIG.

[0049] Fig. 4 is a schematic diagram of a comparator included in an output circuit according to a second embodiment. Elements in Fig. 4 that are the same as those in Fig. 3 are given the same reference numerals as in Fig. 3, so their explanation will be omitted, and the explanation will focus mainly on the differences from the first embodiment shown in Fig. 3.

[0050] The comparator of the photoelectric conversion device according to the second embodiment has diode-connected amplitude limiting elements 260 and 270, and a switch 280 connected in parallel to the amplitude limiting element 270, instead of the amplitude limiting element 230 and variable voltage source 240. The amplitude limiting elements 260 and 270 are connected in series. The current source 250 and the switch 280 are controlled by a control signal supplied from a control unit (not shown).

[0051] The amplitude limiting elements 260 and 270 connected in series and the switch 280 are components of the channel length variable amplitude limiting element (also called an amplitude limiter) of this embodiment.

[0052] By turning on switch 280, limiting element 270 is disabled, and one stage of limiting by limiting element 260 is enabled. By turning off switch 280, limiting element 270 is enabled, and two stages of limiting by limiting elements 260 and 270 are enabled. In other words, by turning switch 280 on and off, it is possible to set a different number of limiting elements connected in series. Here, the "number of limiting elements connected" includes the case where there is only one limiting element. In this case, the effective channel length of the limiting element is the sum of the channel lengths of limiting elements 290 and 300.

[0053] For example, when the imaging mode is changed from a still image mode with a large current amount to a video mode with a small current amount, the switch 280 is turned on. In this way, the number of stages of the amplitude limiting element connected in series is changed in response to the change in the current amount of the current source 250 accompanying the change in imaging mode, and the limiting element is adjusted so that the change in amplitude of the output signal due to the change in current is reduced, thereby correcting the change in amplitude. This makes it possible to keep the Hi level (amplitude of the output signal) Vouthi of the output voltage of the amplification stage constant, thereby improving the readout time when the imaging mode is switched (when the current amount is reduced). In other words, the increase in the readout time when the imaging mode is switched (when the current amount is reduced) from the readout time in the imaging mode before the switch can be set to zero (the readout time remains the same) or reduced.

[0054] This embodiment does not have a configuration in which a common voltage is supplied from one variable voltage source to multiple columns of comparators, and there is no deterioration in image quality due to noise propagating through the common wiring, which occurs in this configuration.

[0055] (Third embodiment) The third embodiment will be described with reference to FIG.

[0056] Fig. 5 is a schematic diagram of a comparator included in an output circuit according to the third embodiment. Elements in Fig. 5 that are the same as those in Fig. 3 are given the same reference numerals as in Fig. 3, so their explanation will be omitted and differences from the first embodiment will be mainly described.

[0057] 5, the third embodiment has diode-connected limiting elements 290 and 300 instead of limiting element 230 and variable voltage source 240. Switch 310 is connected in series to limiting element 300, and limiting elements 290 and 300 are connected in parallel.

[0058] The parallel-connected amplitude limiting elements 290 and 300 and the switch 310 are components of the variable channel width amplitude limiting element (also called an amplitude limiter) of this embodiment. The current source 250 and the switch 310 are controlled by control signals supplied from a control unit (not shown).

[0059] 5, limiting element 300 is enabled by turning on switch 310, and the effective channel width of the limiting element becomes the sum of the channel widths of limiting element 290 and limiting element 300. By turning off switch 310, limiting element 300 is disabled, and limiting by limiting element 290 alone becomes effective. In other words, by switching switch 310 on and off, it is possible to set different numbers of limiting elements connected in parallel.

[0060] For example, when the imaging mode is changed from a still image mode with a large current amount to a video mode with a small current amount, the switch 310 is turned on. In this way, by switching the channel width of the amplitude limiting element in response to the switching of the current amount of the current source 250 accompanying the change in imaging mode, the limiting element is adjusted to reduce the change in amplitude of the output signal due to the change in current, thereby correcting the change in amplitude. This makes it possible to keep the amplitude of the output signal of the amplification stage constant, and with regard to the readout time when the imaging mode is switched (when the current amount is reduced), the increase in the readout time from the readout time in the imaging mode before the switch can be set to zero (the readout time is the same) or reduced.

[0061] This embodiment also does not have a configuration in which a common voltage is supplied from one variable voltage source to comparators on multiple columns, and there is no deterioration in image quality due to noise propagating through the common wiring that occurs in this configuration.

[0062] (Fourth embodiment) The fourth embodiment will be described with reference to FIG.

[0063] Fig. 6 is a schematic diagram of a comparator included in an output circuit according to a fourth embodiment. Elements in Fig. 6 that are the same as those in Fig. 4 and Fig. 5 are given the same reference numerals as in Fig. 4 and Fig. 5, and therefore their explanation will be omitted, and differences from the first embodiment will be mainly described.

[0064] 6, instead of amplitude limiting element 230 and variable voltage source 240, the fourth embodiment has amplitude limiting elements 260, 270, and 300, a switch 280 connected in parallel to amplitude limiting element 270, and a switch 310 connected in series to amplitude limiting element 300. Amplitude limiting elements 260 and 270 are connected in series, and amplitude limiting elements 260 and 300 are connected in parallel.

[0065] The variable channel width limiting element (also called an amplitude limiter) of this embodiment is made up of the series-connected limiting elements 260 and 270, the parallel-connected limiting elements 260 and 300, and the switches 280 and 310. The current source 250 and the switches 280 and 310 are controlled by control signals supplied from a control unit (not shown).

[0066] In other words, this embodiment is an embodiment in which the second and third embodiments are combined.

[0067] In FIG. 6, by turning on the switch 280 and turning off the switch 310, the amplitude limiting elements 270 and 300 are disabled, and one stage of amplitude limiting by the amplitude limiting element 260 is enabled.

[0068] By turning on switch 310 while keeping switch 280 on, limiting element 300 becomes active, and the channel width of the limiting element becomes the sum of the channel widths of limiting element 260 and limiting element 300 .

[0069] Furthermore, by turning off switch 280, amplitude limiting element 270 becomes active, and two stages of amplitude limiting, that is, the upper amplitude limiting element having a channel width equal to the sum of the channel widths of amplitude limiting element 260 and amplitude limiting element 300, and amplitude limiting element 270, become active.

[0070] If both the switch 280 and the switch 310 are turned off, the amplitude limiting effect of the two stages of the amplitude limiting element 260 and the amplitude limiting element 270 becomes effective.

[0071] In this way, by switching the number of amplitude limiting elements connected in series and the number connected in parallel in response to switching of the current amount of the current source 250 accompanying a change in imaging mode, the limiting elements are adjusted to reduce changes in the amplitude of the output signal due to changes in current, thereby correcting the change in amplitude. For example, when the imaging mode is a still image mode with a large current amount, switch 310 is turned on and switch 280 is turned off, and when the imaging mode is a video mode with a small current amount, both switches 310 and 280 are turned off. This makes it possible to maintain a constant Hi level (output signal amplitude) Vouthi of the output voltage of the amplification stage. Regarding the readout time when the imaging mode is switched (when the current amount is reduced), the increase in the readout time from the readout time in the imaging mode before the switch can be set to zero (the same readout time) or reduced.

[0072] Furthermore, by configuring an amplifier stage by combining three amplitude limiting elements in this way, it is possible to increase the number of compatible imaging modes compared to Embodiments 2 and 3. Note that the number of amplitude limiting elements to be combined is not limited to this and can be four or more, and the number of amplitude limiting elements and the number of switches can be changed depending on the number of imaging modes to be switched between.

[0073] Like the second and third embodiments, this embodiment does not have a configuration in which a common voltage is supplied to multiple columns of comparators from a single variable voltage source, and there is no degradation in image quality due to noise propagating along the common wiring that occurs in this configuration.

[0074] (Fifth embodiment) The fifth embodiment will be described with reference to FIG.

[0075] Fig. 7 is a schematic diagram of a comparator included in an output circuit according to a fifth embodiment. Elements in Fig. 7 that are the same as those in Fig. 3 are given the same reference numerals as in Fig. 3, so their explanation will be omitted and differences from the first embodiment shown in Fig. 3 will be mainly described.

[0076] By using the present invention, not only for the output of the amplification stage of the comparator shown in the first embodiment, but also for the output of the differential stage of the comparator, the amplitude of the output signal can be limited to a desired voltage even if the bias current changes.

[0077] Therefore, as a fifth embodiment, a case where the present invention is applied to a differential stage having an amplitude limiting element 320 connected in parallel to a current mirror circuit 210 will be described below. The comparator shown in Fig. 7 has an amplitude limiting element 320 and a variable voltage source 330. The amplitude limiting element 320 is connected in parallel to the current mirror circuit 210. In this comparator, the variable voltage source 330 is used in common by the comparators 150 of each column, and inputs a voltage to the comparator under control of a control signal supplied from a control unit (not shown).

[0078] The low level of the output signal (voltage) of the differential stage is determined by the current Id flowing through the amplitude limiting element 320, which is determined by the current amount and element size, and the threshold voltage Vth. Increasing the current amount of the differential stage reduces the low level, increasing the inversion delay of the differential stage output and increasing the readout time of the photoelectric conversion device. Furthermore, as the amplitude of the output signal increases, kickback also increases, degrading image quality.

[0079] In this embodiment, the bias voltage supplied from the variable voltage source 330 is adjusted in response to the change in the current amount of the current source 190 accompanying a change in the imaging mode. For example, when the imaging mode is changed from a still image mode with a large current amount to a video mode with a small current amount, the output of the variable voltage source 330 is increased to increase the Low level of the output signal of the differential stage. This adjusts the limiting element so that the change in amplitude of the output signal due to the change in current is reduced, and the change in amplitude is corrected, thereby making it possible to maintain a constant amplitude of the output signal. Therefore, with regard to the readout time when switching imaging modes, the increase in the readout time from the readout time in the imaging mode before switching can be set to zero (the readout time remains the same) or reduced.

[0080] (Sixth embodiment) The sixth embodiment will be described with reference to FIG.

[0081] Fig. 8 is a schematic diagram of a photoelectric conversion device including an output circuit according to a sixth embodiment. Elements in Fig. 8 that are the same as those in Fig. 7 are given the same reference numerals as in Fig. 7, and therefore their explanation will be omitted. The following mainly describes the differences from the fifth embodiment shown in Fig. 7.

[0082] The differential stage of the comparator according to the sixth embodiment includes an amplitude limiting element 340 and an amplitude limiting element 350 connected in parallel to a current mirror circuit, and has a switch 360 connected in series to the amplitude limiting element 350. The current source 190 and the switch 360 are controlled by a control signal supplied from a control unit (not shown).

[0083] By turning on the switch 360, the amplitude limiting element 350 is enabled, and the channel width of the amplitude limiting element becomes the sum of the channel widths of the amplitude limiting element 340 and the amplitude limiting element 350. By turning off the switch 360, the amplitude limiting element 350 is disabled, and amplitude limitation by the amplitude limiting element 340 alone becomes effective. In this way, by switching the switch 360, the channel width of the amplitude limiting element can be switched.

[0084] For example, when the imaging mode is changed from a still image mode with a large current amount to a video mode with a small current amount, the switch 260 is turned on. In this way, by switching the channel width of the amplitude limiting element in response to the change in the current amount of the current source 190 accompanying the change in imaging mode, the limiting element is adjusted so that the change in amplitude of the output signal due to the change in current is reduced. This corrects the change in amplitude and makes it possible to keep the amplitude of the output signal of the differential stage constant.

[0085] As a result, the increase in the readout time when switching the imaging mode from the readout time in the imaging mode before switching can be set to zero (the same readout time) or reduced.

[0086] (Seventh embodiment) The seventh embodiment will be described with reference to FIG.

[0087] Fig. 9 is a schematic diagram of a photoelectric conversion device including an output circuit according to a seventh embodiment. Elements in Fig. 9 that are the same as those in Fig. 3 are given the same reference numerals as in Fig. 3, and therefore their explanation will be omitted, and the explanation will focus mainly on the parts that are different from the first embodiment shown in Fig. 3.

[0088] The seventh embodiment is an output circuit comprising an amplitude limiting element 370 and a comparator with a variable voltage source 380 .

[0089] The output of variable voltage source 380 is connected in common to the amplification stage including amplitude limiting element 370 and the differential stage as the power supply voltage for comparator 150. Current source 250 and variable voltage source 380 are controlled by a control signal supplied from a control unit (not shown).

[0090] When the imaging mode is switched and the amount of current supplied from the current source 250 of the amplification stage is reduced, the current Id of the amplitude limiting element 370 decreases, and the Hi level Vouthi of the output voltage of the amplification stage increases.

[0091] In this embodiment, the limiting element is adjusted to correct the change in amplitude of the output signal due to the change in current by reducing the voltage output from the variable voltage source 380 in response to a change in the amount of current of the current source 250 accompanying a change in the imaging mode, thereby reducing the change in amplitude. For example, when the imaging mode is changed from a still image mode with a large amount of current to a video mode with a small amount of current, the voltage output from the variable voltage source 380 is reduced to keep constant the amplitude of the output voltage of the differential stage (amplitude of the output signal). This makes it possible to make the increase in the readout time when switching imaging modes from the readout time in the imaging mode before the change zero (the same readout time) or reduce it.

[0092] (Eighth embodiment) The photoelectric conversion system according to this embodiment will be described with reference to Fig. 10. Fig. 10 is a block diagram showing a schematic configuration of the photoelectric conversion system according to this embodiment.

[0093] The photoelectric conversion devices described in the first to seventh embodiments can be applied to various photoelectric conversion systems. Examples of applicable photoelectric conversion systems include digital still cameras, digital camcorders, surveillance cameras, copiers, fax machines, mobile phones, vehicle-mounted cameras, and observation satellites. Also included in the photoelectric conversion system is a camera module equipped with an optical system such as a lens and an imaging device. Fig. 10 illustrates a block diagram of a digital still camera as an example of such systems.

[0094] 10 includes an image pickup device 1004, which is an example of a photoelectric conversion device, and a lens 1002 that forms an optical image of a subject on the image pickup device 1004. The system further includes an aperture 1003 that adjusts the amount of light passing through the lens 1002, and a barrier 1001 that protects the lens 1002. The lens 1002 and aperture 1003 form an optical system that focuses light on the image pickup device 1004. The image pickup device 1004 is a photoelectric conversion device according to any of the above embodiments, and converts the optical image formed by the lens 1002 into an electrical signal.

[0095] The photoelectric conversion system also includes a signal processing unit 1007, which is an image generation unit that generates an image by processing an output signal output from the imaging device 1004. The signal processing unit 1007 performs various corrections and compressions as necessary to output image data. The signal processing unit 1007 may be formed on the same semiconductor substrate on which the imaging device 1004 is provided, or may be formed on a semiconductor substrate separate from the imaging device 1004.

[0096] The photoelectric conversion system further includes a memory unit 1010 for temporarily storing image data, and an external interface unit (external I / F unit) 1013 for communicating with an external computer or the like. The photoelectric conversion system further includes a recording medium 1012 such as a semiconductor memory for recording or reading out imaging data, and a recording medium control interface unit (recording medium control I / F unit) 1011 for recording or reading out data from the recording medium 1012. The recording medium 1012 may be built into the photoelectric conversion system or may be detachable.

[0097] The photoelectric conversion system further includes an overall control and calculation unit 1009 that performs various calculations and controls the entire digital still camera, and a timing generation unit 1008 that outputs various timing signals to the image capture device 1004 and the signal processing unit 1007. Here, the various timing signals may be input from outside, and the photoelectric conversion system only needs to include at least the image capture device 1004 and the signal processing unit 1007 that processes the output signal output from the image capture device 1004.

[0098] The imaging device 1004 outputs an imaging signal to a signal processing unit 1007. The signal processing unit 1007 performs predetermined signal processing on the imaging signal output from the imaging device 1004 and outputs image data. The signal processing unit 1007 generates an image using the imaging signal.

[0099] As described above, according to this embodiment, it is possible to realize a photoelectric conversion system to which the photoelectric conversion device (imaging device) according to any one of the above embodiments is applied.

[0100] (Ninth embodiment) The photoelectric conversion system and the moving object of this embodiment will be described with reference to Fig. 11. Fig. 11 is a diagram showing the configuration of the photoelectric conversion system and the moving object of this embodiment.

[0101] FIG. 11(a) shows an example of a photoelectric conversion system related to an in-vehicle camera. The photoelectric conversion system 300 includes an image capture device 310. The image capture device 310 is the photoelectric conversion device (image capture device) described in any of the above embodiments. The photoelectric conversion system 300 includes an image processing unit 312 that performs image processing on multiple pieces of image data acquired by the image capture device 310, and a parallax acquisition unit 314 that calculates parallax (phase difference between parallax images) from the multiple pieces of image data acquired by the photoelectric conversion system 300. The photoelectric conversion system 300 also includes a distance acquisition unit 316 that calculates the distance to an object based on the calculated parallax, and a collision determination unit 318 that determines whether or not there is a possibility of a collision based on the calculated distance. Here, the parallax acquisition unit 314 and the distance acquisition unit 316 are examples of distance information acquisition means that acquire information about the distance to the object. That is, the distance information includes information about the parallax, the defocus amount, the distance to the object, etc. The collision determination unit 318 may determine the possibility of a collision using any of this distance information. The distance information acquisition means may be realized by dedicated hardware, a software module, a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), or a combination thereof.

[0102] The photoelectric conversion system 300 is connected to a vehicle information acquisition device 320 and can acquire vehicle information such as vehicle speed, yaw rate, and steering angle. The photoelectric conversion system 300 is also connected to a control ECU 330, which is a control unit that outputs a control signal to generate a braking force for the vehicle based on the determination result of the collision determination unit 318. The photoelectric conversion system 300 is also connected to an alarm device 340 that issues an alarm to the driver based on the determination result of the collision determination unit 318. For example, if the determination result of the collision determination unit 318 indicates a high possibility of a collision, the control ECU 330 performs vehicle control to avoid the collision and mitigate damage by applying the brakes, releasing the accelerator, suppressing engine output, etc. The alarm device 340 warns the user by sounding an alarm, displaying alarm information on a screen such as a car navigation system, or vibrating the seat belt or steering wheel.

[0103] In this embodiment, the surroundings of the vehicle, for example, the front or rear, are imaged by the photoelectric conversion system 300. Fig. 11(b) shows the photoelectric conversion system when imaging the area in front of the vehicle (imaging range 350). The vehicle information acquisition device 320 sends instructions to the photoelectric conversion system 300 or the imaging device 310. This configuration can further improve the accuracy of distance measurement.

[0104] Although the above describes an example of control to prevent collision with other vehicles, the present invention can also be applied to control of automatic driving by following other vehicles, control of automatic driving to prevent deviation from a lane, etc. Furthermore, the photoelectric conversion system is not limited to mobile objects (mobile devices) such as automobiles, but can be applied to mobile objects (mobile devices) such as ships, aircraft, and industrial robots. In addition, the present invention can be applied not only to mobile objects but also to a wide range of devices that use object recognition, such as intelligent transport systems (ITS).

[0105] [Modified embodiment] The present invention is not limited to the above-described embodiment, and various modifications are possible.

[0106] For example, an example in which part of the configuration of any one of the embodiments is added to another embodiment, or an example in which part of the configuration of another embodiment is replaced with another embodiment, is also included in the embodiments of the present invention.

[0107] Furthermore, the photoelectric conversion systems shown in the eighth and ninth embodiments are examples of photoelectric conversion systems to which the photoelectric conversion device can be applied, and the photoelectric conversion systems to which the photoelectric conversion device of the present invention can be applied are not limited to the configurations shown in Figures 10 and 11.

[0108] Furthermore, the circuits in each embodiment of the present invention may be formed on a single semiconductor substrate, or may be arranged on two or more semiconductor substrates that are bonded together to form a laminated structure. For example, a laminated structure having three or more substrates may be formed by dividing the circuit or adding circuits or functions.

[0109] It should be noted that the above-described embodiments are merely examples of specific embodiments for carrying out the present invention, and the technical scope of the present invention should not be construed as being limited by these embodiments. In other words, the present invention can be carried out in various forms without departing from its technical concept or main features. [Explanation of symbols]

[0110] 100 pixels 150 Comparator 230 Amplitude limiting element 240 Variable Voltage Source

Claims

1. a comparator that compares an input signal with another signal and outputs a signal indicative of the result of the comparison; a limiting element that sets a first limit value that limits the amplitude of a signal that indicates the result of the comparison, 10. An output circuit, wherein the limiting element is capable of adjusting the first limiting value in response to a change in current when the current flowing through the output circuit changes.

2. The limiting element includes a plurality of amplitude limiting elements, and the adjustment is performed by: The output circuit according to claim 1, characterized in that it includes an adjustment to set a first state in which the plurality of amplitude limiting elements are connected in series, and an adjustment to set a second state in which the number of amplitude limiting elements connected in series is different from that of the first state.

3. The limiting element includes a plurality of amplitude limiting elements, and the adjustment is performed by: The output circuit according to claim 1, characterized in that it includes an adjustment to set a first state in which the plurality of amplitude limiting elements are connected in parallel, and an adjustment to set a second state in which the number of amplitude limiting elements connected in parallel is different from that of the first state.

4. 2. The output circuit according to claim 1, wherein the adjustment is an adjustment that corrects a change in the amplitude due to a change in the current.

5. a comparator that compares an input signal with another signal and outputs a signal indicative of the result of the comparison; an output circuit having a limiting element for limiting the amplitude of a signal indicating the result of the comparison, a current source that supplies a current to the output circuit; the limiting element includes a first amplitude limiting element, a second amplitude limiting element, and a switch connected in series with the second amplitude limiting element; the first amplitude limiting element and the second amplitude limiting element are connected in parallel between the comparator and the current source; The output circuit is characterized in that the current source and the switch are controlled by a control unit.

6. 2. The output circuit according to claim 1, wherein the adjustment includes an adjustment to change a bias voltage supplied to the limiting element.

7. When the current flowing through the output circuit is reduced, 7. The output circuit according to claim 6, wherein the bias voltage is reduced.

8. When the current flowing through the output circuit is increased, 8. The output circuit according to claim 7, wherein the bias voltage is increased.

9. 2. The output circuit according to claim 1, wherein the adjustment is capable of changing a power supply voltage supplied to the comparator.

10. 6. The output circuit according to claim 5, wherein the control is capable of changing a power supply voltage supplied to the comparator.

11. 2. The output circuit according to claim 1, wherein the limiting element has a variable channel width.

12. the comparator includes a differential stage and an amplifier stage that receives an output of the differential stage; 12. The output circuit according to claim 1, wherein the limiting element limits the amplitude of the output of the differential stage as a signal indicating the result of the comparison.

13. the comparator includes a differential stage and an amplifier stage that receives an output of the differential stage; 12. The output circuit according to claim 1, wherein the limiting element limits the amplitude of the output of the amplifier stage as a signal indicating the result of the comparison.

14. A pixel array device comprising: a plurality of pixels; and an output circuit according to any one of claims 1 to 13; the plurality of pixels generate charges in response to incident light; A photoelectric conversion device, characterized in that a signal based on the charge is used as the input signal.

15. The photoelectric conversion device according to claim 14; a signal processing unit that generates an image using the signal output by the output circuit.

16. A moving object comprising the photoelectric conversion device according to claim 14, A moving body comprising a control unit that controls the movement of the moving body using a signal output from the photoelectric conversion device.

17. A semiconductor substrate for stacking on another semiconductor substrate, a comparator that compares an input signal with another signal and outputs a signal indicative of the result of the comparison; an output circuit having a limiting element that sets a first limit value that limits the amplitude of a signal that indicates the result of the comparison; The semiconductor substrate according to claim 1, wherein the limiting element is capable of adjusting the first limiting value in response to a change in current when the current flowing through the output circuit changes.

18. A semiconductor substrate for stacking on another semiconductor substrate, a comparator that compares an input signal with another signal and outputs a signal indicative of the result of the comparison; an output circuit having a limiting element for limiting the amplitude of a signal indicative of the result of the comparison; a current source that supplies a current to the output circuit; the limiting element includes a first amplitude limiting element, a second amplitude limiting element, and a switch connected in series with the second amplitude limiting element; the first amplitude limiting element and the second amplitude limiting element are connected in parallel between the comparator and the current source; The semiconductor substrate is characterized in that the current source and the switch are controlled by a control unit.

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