Current-to-voltage signal converter

The current-to-voltage signal converter addresses the challenge of high-voltage component requirements by using a voltage regulation mechanism to adjust input signals within predetermined thresholds, enabling low-voltage amplifiers and unipolar power supplies, thus reducing system cost and improving performance.

JP7752948B2Active Publication Date: 2025-10-14ANALOG DEVICES INT UNLTD CO
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Patent Information

Application Number
JP2021036217
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2020-03-06
Filing Date
2021-03-08
Publication Date
2025-10-14
Estimated Expiration
2041-03-08

AI Technical Summary

Technical Problem

Existing current-to-voltage signal converters often require high-voltage components due to the wide dynamic range of input signals, leading to increased system cost, size, and reduced accuracy, especially when interfacing with low-voltage components like ADCs.

Method used

A current-to-voltage signal converter with a transimpedance amplifier and a subtractor circuit, utilizing a voltage regulation mechanism to adjust the input voltage within predetermined thresholds, allowing the use of low-voltage components and unipolar power supplies.

Benefits of technology

This design reduces system cost, size, and power consumption while maintaining accuracy by enabling the use of low-voltage amplifiers and unipolar power supplies, improving overall system performance.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

To provide a current-to-voltage signal converter which may operate at an adjusted voltage.SOLUTION: A current-to-voltage converter includes a trans-impedance amplifier which converts a current input into a voltage output. The voltage output may operate around an undesirable predetermined voltage, and must therefore be adjusted in order to make it suitable for any downstream signal processing circuitry, such as an ADC. As such, a subtractor circuit is coupled to an output of the trans-impedance amplifier. At an input of the subtractor circuit, a voltage adjustment circuit is employed, to adjust a voltage input to the subtractor circuit. As such, the input to the subtractor is adjusted between a first predetermined voltage threshold and a second predetermined voltage threshold, and the subtractor circuit may therefore be a low-voltage component.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] The present disclosure relates to current-to-voltage signal converters, and more particularly to circuits in which the operating voltage can be adjusted so that low-voltage components can be used. [Background technology]

[0002] In many applications, it is necessary to convert a current signal into a voltage signal. To do this, a transimpedance amplifier is used.

[0003] Within the field of optical sensing, a transimpedance amplifier can convert the output current from an optical photodiode into a voltage signal that can be converted by an analog-to-digital converter (ADC). In some applications, the output voltage range from the transimpedance amplifier is further adjusted to make it suitable for conversion by an ADC, for example, by matching the dynamic range of the signal to the dynamic range of the ADC.

[0004] Optical photodiodes are often biased with a voltage reference, and the output current signal of the optical photodiode depends on the voltage reference used. Therefore, it is possible to directly adjust the voltage reference to bias the output current signal. However, this can result in excessive components and can often affect the accuracy of the representation of the original optical signal if the voltage reference is not taken into account. Summary of the Invention

[0005] The present disclosure provides a current-to-voltage signal converter that can operate at a reduced voltage. The current-to-voltage converter includes a transimpedance amplifier that converts a current input to a voltage output. The voltage output can operate above a first predetermined voltage or below a second predetermined voltage (if the first predetermined voltage is greater than the second predetermined voltage) and must therefore be regulated to be suitable for any downstream signal processing circuitry, such as an ADC. To this end, a subtractor circuit is coupled to the output of the transimpedance amplifier. At the input of the subtractor circuit, a voltage regulation circuit is used to regulate the voltage input to the subtractor circuit. Therefore, the input to the subtractor is regulated between a first predetermined voltage threshold and a second predetermined voltage threshold, and therefore the subtractor circuit can be a low-voltage component.

[0006] According to a first aspect, there is provided a current-to-voltage signal converter comprising: a first stage configured to convert an input current signal into a first voltage signal; an analog subtractor circuit including an amplifier, the analog subtractor circuit being electrically coupled to the first stage and converting the first voltage signal into a second voltage signal; and a voltage adjustment arrangement coupled to at least one input of the amplifier and configured such that a voltage at the at least one input of the amplifier is between a first predetermined voltage threshold and a second predetermined voltage threshold.

[0007] The voltage regulation arrangement allows for improved system cost (reduced component size, lower power consumption) and improved system performance, which can allow the amplifier to be a low voltage amplifier and / or a unipolar amplifier, providing further benefits.

[0008] A low-voltage amplifier operates at a lower supply voltage than an amplifier. This is a relative concept that depends on the casting process for an integrated circuit (IC). Various voltage ranges can be selected during the casting process, some at lower voltages and some at higher voltages. An IC can have a variety of discrete voltage levels, such as 20V, 10V, 5V, 3.3V, 1.8V, and 1.3V. To distinguish between the two types of amplifiers, an amplifier within an IC can operate at a supply voltage that may be the highest voltage level supported by the IC. A low-voltage amplifier within an IC can operate at a supply voltage lower than the highest voltage level supported by the IC. For example, the highest voltage level supported on an IC may be 10V, and therefore the low-voltage amplifier may operate at a supply voltage of 5V. In another example, the highest voltage level supported on an IC may be 5V, and therefore the low-voltage amplifier may operate at a supply voltage of 1.8V.

[0009] This can provide precision and power advantages for the low-voltage amplifier, allowing it to operate at a voltage level (or supply voltage) supported by the IC that is less than the maximum voltage level supported. Alternatively, the low-voltage amplifier can operate at the lowest voltage level (or supply voltage) supported by the IC.

[0010] Similarly, an amplifier may operate with asymmetric supply voltages, such that the positive supply voltage can be the highest voltage level supported by the IC, and the negative supply voltage can be 0 V. The reduced dynamic range of this amplifier supplied from asymmetric supply voltages may also provide accuracy and power benefits.

[0011] It is also possible to arrange the voltage regulation array to bias the voltage levels so that the input to the amplifier is a positive voltage value, allowing the amplifier to be supplied by a unipolar power supply voltage, i.e., the negative voltage rail is set to electrical ground, allowing the system to operate with greater power efficiency.

[0012] Thus, the amplifiers can be low voltage amplifiers and / or can be supplied by a unipolar supply voltage, which can improve system performance (accuracy, power efficiency) and reduce system cost (reduced surface area and size).

[0013] The voltage regulation arrangement can include a first reference source coupled to at least one input of the amplifier.

[0014] The at least one input of the amplifier can comprise a first input and a second input, and the first reference source can be coupled to both the first input and the second input and can be a common-mode reference.

[0015] The common mode reference can be a voltage source or a current source.

[0016] The first predetermined voltage threshold is greater than the second predetermined voltage threshold, and the first voltage signal is at least partially above the first predetermined voltage threshold or at least partially below the second predetermined voltage threshold.

[0017] The amplifier may be a low-voltage amplifier and may operate in its linear region. The amplifier may have a predetermined input voltage range, with a first predetermined voltage threshold being equal to or less than an upper end of the predetermined input voltage range and a second predetermined voltage threshold being equal to or greater than a lower end of the predetermined input voltage range. The first and second predetermined voltage thresholds may be substantially equal to the amplifier's positive and negative supply voltages, respectively, divided by the amplifier's gain.

[0018] The first stage can be configured to operate within a first supply voltage range. The amplifier can be a differential amplifier and can be configured to operate within a second supply voltage range. The first supply voltage range can be greater than the second supply voltage range. The amplifier can be further configured to be powered by a unipolar power supply voltage. The amplifier's positive and negative supply voltages can be different from the positive and negative supply voltages of the first stage. The amplifier's dynamic range can be less than the dynamic range of the first stage. The voltage range between the amplifier's positive and negative supply voltages is less than the voltage range between the first stage's positive and negative supply voltages.

[0019] The input current signal can be generated by a photodiode biased by a first reference voltage. The first stage can be a transimpedance amplifier having a voltage input and a current input. The first reference voltage can be electrically coupled to the voltage input, and the input current signal can be electrically coupled to the current input. The second voltage signal can be suitable for supplying to an analog-to-digital converter.

[0020] The analog subtractor circuit may further include first, second, third, and fourth resistors. The first resistor may be electrically coupled in series between the first input and the first voltage signal. The second resistor may be electrically coupled to the first input and form a negative feedback loop based on the output of the differential amplifier. The output of the differential amplifier may be the second voltage signal. The third and fourth resistors may form a voltage divider such that the third resistor may be electrically coupled in series between the second input and the first reference voltage and the fourth resistor may be electrically coupled to ground. The first and third resistors may have substantially the same resistance value, and the second and fourth resistors may have substantially the same resistance value.

[0021] The common mode reference can include a fixed voltage source electrically coupled to a first terminal of a first common mode resistor and a first terminal of a second common mode resistor. The second terminal of the first common mode resistor and the second terminal of the second common mode resistor can be electrically coupled to the first input and the second input, respectively. The first common mode resistor and the second common mode resistor can have substantially the same resistance value.

[0022] The first reference voltage can have a predetermined value, and the common-mode reference is a fixed voltage source that can have a predetermined voltage based on the predetermined value.

[0023] The voltage regulation arrangement can include a feedback loop configured to regulate the voltage of both the first input and the second input to the amplifier of the analog subtractor circuit. The voltage regulation arrangement can include a feedback amplifier configured to receive the second input to the amplifier of the analog subtractor circuit.

[0024] The feedback amplifier may be an NMOS transistor, and the voltages of both the first and second inputs to the amplifier of the analog subtractor circuit may correspond to at least a threshold voltage of the NMOS transistor.

[0025] The feedback amplifier can be electrically coupled to a first terminal of the first common mode resistor and a first terminal of the second common mode resistor. The second terminal of the first common mode resistor and a second terminal of the second common mode resistor can be electrically coupled to the first input and the second input, respectively. The first common mode resistor and the second common mode resistor can have substantially the same resistance value.

[0026] The feedback amplifier can be configured to operate a current mirror arrangement including two mirrored transistors and a control transistor. The feedback amplifier can be arranged to control current flow through the control transistor, and the two mirrored transistors can be electrically coupled to the first input and the second input, respectively. The two mirrored transistors can be matched in size.

[0027] The first stage can include a first reference voltage. The first voltage signal can be dependent on the first voltage reference. The second voltage signal can be independent of the first voltage reference.

[0028] According to a second aspect, a transimpedance amplifier is provided, comprising: a current-to-voltage converter configured to receive a first current signal and to generate a positive voltage output; and a voltage regulation arrangement coupled to the current-to-voltage converter and configured to enable at least a portion of the current-to-voltage converter to be between a first predetermined voltage threshold and a second predetermined voltage threshold. The voltage regulation arrangement may include a constant voltage / constant current source coupled to a first terminal of a resistor, the second terminal of which may be coupled to a current-to-voltage converter.

[0029] The voltage regulation arrangement may comprise a feedback amplifier arranged to actively control the voltage reduction based on the positive voltage output.

[0030] According to a third aspect, there is provided a method of converting a current signal to a voltage signal, the method comprising: converting an input current signal to a first voltage signal using a first stage of a signal converter; converting the first voltage signal to a second voltage signal using an analog subtractor circuit comprising an amplifier; and applying a voltage regulation arrangement to at least one input of the amplifier to reduce a voltage at the at least one input to the amplifier between a first predetermined voltage threshold and a second predetermined voltage threshold.

[0031] The at least one input of the amplifier can include a first input and a second input. The voltage regulation arrangement can include a common-mode reference coupled to both the first input and the second input. The common-mode reference can be a DC source.

[0032] The method may further include performing a step of predetermining a DC offset voltage of the first voltage signal. The method may further perform a step of predetermining a voltage value or a current value of the DC source based on the predetermining DC offset voltage.

[0033] The method may further include performing the step of adjusting the voltage or current value at both the first input and the second input based on a DC offset voltage of the first voltage signal.

[0034] The method may further include receiving an input current signal from a photodiode. The method may further include applying a second voltage signal to an analog-to-digital converter. [Brief explanation of the drawings]

[0035] [Figure 1] FIG. 1 is a circuit diagram showing a current-to-voltage signal converter. [Figure 2] FIG. 1 is a circuit diagram illustrating a current-to-voltage signal converter with a voltage regulation arrangement. [Figure 3] FIG. 1 is a circuit diagram illustrating a current-to-voltage signal converter having a feedback voltage regulation arrangement with an NMOS transistor. [Figure 4] FIG. 1 is a flow diagram illustrating a method for converting a current signal to a voltage signal by a voltage regulation array. [Figure 5] FIG. 1 is a block diagram illustrating a current-to-voltage signal converter with a voltage regulation arrangement. [Figure 6] FIG. 1 is a circuit diagram illustrating a current-to-voltage signal converter having a feedback voltage regulation arrangement with a differential amplifier. [Figure 7] FIG. 1 is a circuit diagram illustrating a current-to-voltage signal converter having a feedback voltage regulation arrangement with a current mirror configuration. DETAILED DESCRIPTION OF THE INVENTION

[0036] The present disclosure will now be described, by way of example only, in conjunction with the accompanying drawings, in which: Certain circuit components generate outputs where the signal is a variable current rather than a variable voltage. For example, a photodiode generates a current-based output signal. Signal processing circuits used to condition analog signals, for example by converting them to digital signals, typically require a voltage-based signal within a specific voltage range. Therefore, the current-based signal must be converted to a voltage-based signal so that it can be processed. This is typically done by a transimpedance amplifier, as described above. However, the output of the transimpedance amplifier is typically outside the range of a suitable input for downstream signal processing components, such as an analog-to-digital converter. Therefore, a subtractor circuit is used to adjust the voltage of the output signal. Generally, due to the voltage required, if no further adjustment is present, the subtractor circuit needs to be a high-voltage component.

[0037] The present disclosure introduces a voltage adjustment mechanism at the input to the amplifier of the subtractor circuit. For example, a common-mode voltage can be coupled to both the inverting and non-inverting inputs of the amplifier via a pair of resistors. Therefore, the voltage at the input to the subtractor amplifier can be adjusted between a first predetermined voltage threshold and a second predetermined voltage threshold, and the subtractor can be constructed using low-voltage components. This can reduce the area required by the subtractor and the cost of the circuit.

[0038] FIG. 1 shows a current-to-voltage signal converter 1. The input to the current-to-voltage signal converter 1 is an input current signal (Ipd). Ipd can be the output of a photodiode biased by a first reference voltage (Vref). Vref can be any voltage from a high positive voltage to a high negative voltage, depending on the characteristics of the photodiode. The output (Vout2) of the current-to-voltage signal converter 1 is intended to be suitable for reception by an analog-to-digital converter (ADC) so that the optical signal incident on the photodiode can be accurately interpreted by a digital processing device.

[0039] The current-to-voltage signal converter 1 consists of two stages: a transimpedance amplifier 2 and an analog subtractor circuit 4. The current-to-voltage signal converter 1 can be understood as a transimpedance amplifier itself, as it performs the overall function of receiving an input current signal and outputting an output voltage signal that may be suitable for reception by an ADC.

[0040] The transimpedance amplifier 2 comprises a first operational amplifier (opamp) 6 having a transimpedance feedback resistor (Rtia) 8 coupled between the output and inverting input of the first opamp 6. An input current signal (Ipd) is coupled to the inverting input of the first opamp 6. A first reference voltage (Vref) is coupled to the non-inverting input of the first opamp 6. The output of the transimpedance amplifier 2 is a first voltage signal (Vout1).

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[0041] The analog subtractor circuit 4 is electrically coupled to the transimpedance amplifier 2 and converts a first voltage signal (Vout1) into a second voltage signal (Vout2). The analog subtractor circuit 4 includes a second operational amplifier 10 and four resistors 12a, 12b, 14a, and 14b. The first resistor 12a is electrically coupled in series between the inverting input of the second operational amplifier 10 and the first voltage signal (Vout1). The second resistor 14a is electrically coupled to the output and inverting input of the second operational amplifier 10 and forms a negative feedback loop based on the output of the second operational amplifier 10. The third resistor 12b and the fourth resistor 14b form a voltage divider circuit. The third resistor 12b is electrically coupled in series between the non-inverting input of the second operational amplifier 10 and a first reference voltage (Vref), and the fourth resistor 14b is electrically coupled to the non-inverting input of the second operational amplifier 10 and electrical ground 16. The first resistor 12a and the third resistor 12b are selected to have substantially the same resistance (R1). The second resistor 14a and the fourth resistor 14b are selected to have substantially the same resistance (R2). The resistance values ​​of the four resistors 12a, 12b, 14a, and 14b are selected so that the second voltage signal (Vout2) is independent of the first reference voltage (Vref). However, selecting the resistance values ​​R1 and R2 can simplify the overall circuit design and may result in reduced circuit costs (manufacturing time, materials, etc.).

[0042] The second voltage signal (Vout2) is the output of the analog subtractor circuit 4.

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[0043] The analog subtractor circuit 4 can be considered to function as an analog voltage shifter. Generally, the first output signal (Vout1) has a voltage range of Vref to Vref-Vin, and the second output signal (Vout2) has a voltage range of 0 to Vin. Here, Vin represents the signal of interest (Ipd) from the input (e.g., from a photodiode), and is Ipd*Rtia. This is a voltage shift of -Vref. However, if Vref is a high-voltage signal, the second op-amp 10 must be considered a high-voltage amplifier because its input "sees" a high-voltage signal, i.e., there is a high-voltage signal incident on the input of the second op-amp 10. The voltage signal received by the second op-amp 10 can also be a negative voltage, depending on the values ​​of Vref and Vin. If necessary, the analog subtractor circuit 4 can also be used to amplify Vin.

[0044] In integrated circuit (IC) design, high-voltage devices generally have a large physical area (e.g., 4-5 times larger than low-voltage amplifiers). These are relatively very large devices and have poor performance compared to other low-voltage IC components. This limits performance and leads to higher overall system costs.

[0045] Because Vref and Vin can change over time (i.e., are time-varying signals), they can both have associated analog voltage ranges. Circuits that can accept large analog voltage ranges and reduce the analog voltage range to a range suitable for low-voltage devices can enable downstream components to be low-voltage devices. Such circuits can reduce the material and performance costs of the downstream components and also reduce the associated design effort.

[0046] FIG. 2 shows a current-to-voltage signal converter 20 having the same structure as the current-to-voltage signal converter 1 shown in FIG. 1 (i.e., the transimpedance amplifier 2 and the analog subtractor circuit 4), with the addition of a voltage regulation arrangement 22.

[0047] The voltage adjustment arrangement 22 comprises a common mode voltage source 24 coupled to the inverting and non-inverting inputs of the second operational amplifier 10 via a first common mode resistor 26a and a second common mode resistor 26b. By using the common mode voltage source, a voltage is applied equally to the inverting and non-inverting inputs of the second operational amplifier 10. The common mode voltage source 24 is a fixed voltage source (Vcm).

[0048] 2, a common-mode voltage source 24 (Vcm) is electrically coupled to a first terminal of a first common-mode resistor 26a and a first terminal of a second common-mode resistor 26b. The second terminal of the first common-mode resistor 26a and the second terminal of the second common-mode resistor 26b are electrically coupled to the inverting and non-inverting inputs, respectively, of a second operational amplifier 10. The first common-mode resistor 26a and the second common-mode resistor 26b have substantially the same resistance value Rcm. This is because resistors 12a and 12b have substantially the same resistance value R1, and resistors 14a and 14b have substantially the same resistance value R2. That is, the resistance values ​​are selected to eliminate the first reference voltage (Vref) from the output signal as long as the second voltage signal (Vout2) is independent of Vref, i.e., any resistance values ​​can be selected for resistors 12a, 12b, 14a, 14b, 26a, and 26b.

[0049] Exemplary values ​​are as follows: the input current signal may be in the range of approximately 0 to 5 mA, the first reference voltage (Vref) may be in the range of approximately -2.5 V to 2.5 V, the transimpedance feedback resistor 8 (Rtia) may be approximately 1.75 V divided by the maximum Ipd value (in amperes), depending on Ipd, resistors 12a and 12b may be approximately 40 k ohms, resistors 14a and 14b may be approximately 50 k ohms, resistors 26a and 26b may be approximately 55 k ohms, the voltage at the non-inverting and inverting inputs of the second operational amplifier 10 may be in the range of approximately 0.5 V to 2.5 V, and the common-mode voltage source 24 may be approximately 4 V. These values ​​may be varied depending on the application and / or designer's preference. It will also be apparent that it is the ratio of the values ​​of R1:R2:Rcm that will result in the desired output (Vout2) voltage range.

[0050] The voltage adjustment array 22 is arranged to bias the voltage levels at the inverting and non-inverting inputs to the second op-amp 10 so that the analog voltage range "seen" by the input to the second op-amp 10 is between a first predetermined voltage threshold and a second predetermined voltage threshold. By adjusting the input to the second op-amp 10 between the first predetermined voltage threshold and a second predetermined voltage threshold, overall system performance can be maintained the same or even improved even when the second op-amp 10 is a low voltage op-amp.

[0051] As explained above, the use of low-voltage op-amps can achieve improved system performance as well as improved system costs (i.e., reduced size and power). If second op-amp 10 is a low-voltage op-amp, then in order for analog subtractor circuit 4 to operate properly, the second op-amp will operate in its linear region. This can be achieved by configuring voltage regulation array 22 so that second op-amp 10 does not amplify the input signal voltage above its supply voltage and saturate the input signal (i.e., the op-amp operates in its saturation region). Even with the addition of additional circuit components such as voltage regulation array 22, the use of low-voltage op-amps can all reduce power, size, and cost compared to the circuit shown in FIG. 1 .

[0052] As mentioned above, Vout1 can be made negative based on the values ​​of Vref and Vin(Ipd*Rtia). Alternatively, the voltage regulation array 22 can be configured to bias the voltage level so that the input to the second operational amplifier 10 is a positive voltage value. This allows the second operational amplifier 10 to be powered by a unipolar power supply voltage, i.e., the negative voltage rail is set to electrical ground. This allows the system to operate with higher power efficiency. In practice, when the second operational amplifier 10 is powered by a unipolar power supply, the negative supply voltage is 0 V and the positive supply voltage can be the same as the positive supply voltage of the first operational amplifier 6. Therefore, if the first operational amplifier 6 has a negative supply voltage of the same magnitude as the positive supply voltage, the second operational amplifier 10 has half the supply voltage range of the first operational amplifier 6. This allows the second operational amplifier 10 to be a low-voltage amplifier.

[0053] This allows the second operational amplifier 10 to be a low voltage operational amplifier and / or be powered by a unipolar supply voltage, which can improve system performance (accuracy, power efficiency) and reduce system cost (reduced surface area and size).

[0054] The common-mode voltage source 24 (Vcm) has a fixed voltage value with a predetermined voltage. This is determined based on a predetermined value of the first reference voltage (Vref). The first reference voltage (Vref) does not need to be a stable voltage source and therefore may fluctuate during operation. However, if the fluctuation of the first reference voltage (Vref) is relatively small (i.e., a small Vref voltage range), a pair of common-mode resistors 26a, 26b coupled to Vcm can be used. This reduces design collusion, but it cannot handle a very large Vref voltage range. This causes the second operational amplifier 10 to have a predetermined input voltage range beyond which the first voltage signal (Vout1) may begin to saturate. Therefore, the predetermined voltage threshold is below the upper end of the predetermined input voltage range.

[0055] The first operational amplifier 6 may be a high-voltage operational amplifier, and the second operational amplifier 10 may be a low-voltage operational amplifier. The first stage (i.e., transimpedance amplifier 2) may be configured to operate within a first supply voltage range. The second operational amplifier 10 may be configured to operate within a second supply voltage range. The first supply voltage range may be greater than the second supply voltage range. Generally, operational amplifiers such as the first operational amplifier 6 and the second operational amplifier 10 have two supply voltage contacts: a positive supply voltage contact and a negative supply voltage contact. The negative supply voltage contact may be 0 V or any voltage less than the positive supply voltage. Similarly, the positive supply voltage contact may be 0 V or any voltage greater than the negative supply voltage.

[0056] The current-to-voltage signal converter 20 performs a method for converting a current signal into a voltage signal, as shown in the flow diagram of Figure 4. The method may include at least the following three steps: S1: Converting the input current signal (Ipd) into a first voltage signal (Vout1) using the first stage 2 of the signal converter 20. S2: Applying a voltage adjustment arrangement 22. The voltage adjustment arrangement 22 comprises a common-mode reference (e.g., a common-mode voltage source 24, which may be a DC source 24) coupled to both inputs (e.g., an inverting input and a non-inverting input) of the amplifier 10 of the analog subtractor circuit 4. The voltage adjustment arrangement 22 adjusts the voltage at at least one input to the amplifier 10 between a first predetermined voltage threshold and a second predetermined voltage threshold. S3: Converting the first voltage signal (Vout1) into a second voltage signal (Vout2) using an analog subtractor circuit 4 comprising an amplifier 10 having a first input and a second input.

[0057] Without the voltage regulation arrangement, the first voltage signal (Vout1) may have a DC offset (Vref) that can cause the first voltage signal to vary over a wide range of voltages, requiring amplifier 10 to be a high voltage device in order to accurately subtract the DC offset (Vref) from the desired signal (i.e., Ipd*Rtia).

[0058] Voltage adjustment arrangement 22 can eliminate the requirement for amplifier 10 to be a high voltage device by applying an adjustment voltage to at least one input to amplifier 10. This allows the DC offset (Vref) to be shifted and / or scaled, thereby adjusting the input range to amplifier 10. Amplifier 10 can therefore be a low voltage amplifier and / or a unipolar amplifier. This can improve the performance and cost (materials) of the overall current-to-voltage signal converter 20.

[0059] The method may include the additional step of predetermining a DC offset voltage (Vref) of the first voltage signal (Vout1) and predetermining the voltage (or current value) of the DC source 24 based on the predetermining DC offset voltage (Vref). Depending on the tolerance of the amplifier 10 (e.g., a low-voltage amplifier) ​​and the voltage range of the desired voltage signal (i.e., Ipd*Rtia), it may be possible to fix the value of the DC source 24 to a fixed voltage. This can reduce circuit complexity.

[0060] However, the predetermination of the value of DC source 24 may further be based on expected variations in DC offset (Vref) so that during operation, the input to amplifier 10 does not exceed a first predetermined voltage threshold or fall below a second predetermined voltage threshold. These predetermined voltage thresholds may be limits where amplifier 10 ceases to operate in its linear region and begins to operate in its saturated region. Similarly, this is not a hard limit, and in most cases, some applications may allow this limit to be exceeded a percentage of the time so that the second voltage signal (Vout2) represents / is linearly proportional to the input current signal (Ipd).

[0061] FIG. 3 shows a current-to-voltage signal converter 30 that includes the structure of the current-to-voltage signal converter 1 (i.e., the transimpedance amplifier 2 and analog subtractor circuit 4) as shown in FIG. 1, with the addition of a voltage regulation arrangement 32.

[0062] The current-to-voltage signal converter 30 operates in much the same manner as the current-to-voltage converter 20 of Figure 2 and has all the same advantages. However, the current-to-voltage converter 30 of Figure 3 is further able to operate even when the voltage range / voltage variation of the first reference voltage (Vref) is large and unknown due to the presence of a feedback loop in the voltage regulation arrangement 32. The voltage regulation arrangement 32 includes a feedback amplifier 36 configured to actively control the regulation of the voltage based on the positive voltage output.

[0063] The voltage adjustment arrangement 32 can react to variations in the first reference voltage (Vref) and further voltage shift the first reference voltage (Vref) to ensure that the voltage at the non-inverting terminal of the second operational amplifier 10 remains substantially constant. Furthermore, variations in the first reference voltage (Vref) can be replicated at the inverting input of the second operational amplifier 10 (as well as at the non-inverting input of the second operational amplifier 10), thereby allowing the second operational amplifier 10 to effectively subtract the first reference voltage (Vref) from the first voltage signal (i.e., Vout1).

[0064] The voltage adjustment arrangement 32 includes a first reference source, which is a common-mode current source 34. The common-mode current source 34 is electrically coupled to a first terminal of a first common-mode resistor 26a and to a first terminal of a second common-mode resistor 26b. The second terminals of the first common-mode resistor 26a and the second common-mode resistor 26b are electrically coupled to the inverting and non-inverting inputs, respectively, of the second operational amplifier 10. Similar to the common-mode resistors of FIG. 2, the first common-mode resistor 26a and the second common-mode resistor 26b may have substantially the same resistance value for the same reasons.

[0065] 3, the feedback amplifier may be an NMOS transistor 36. The gate terminal of the NMOS transistor 36 is electrically coupled to the non-inverting input of the second operational amplifier 10. The source terminal of the NMOS transistor 36 is electrically coupled to the ground plane (or electrical ground). The drain terminal of the NMOS transistor 36 is electrically coupled to the common-mode current source 34, a first terminal of the first common-mode resistor 26a, and a first terminal of the second common-mode resistor 26b.

[0066] The transistor 36 in this arrangement can be arranged to tune its channel until the gate-to-ground voltage approaches its threshold voltage (Vth), which can be in a low-voltage range. In other words, the NMOS transistor 36 can ensure that the voltages at both the non-inverting and inverting inputs to the second operational amplifier 10 of the analog subtractor circuit 4 correspond to at least the threshold voltage (Vth) of the NMOS transistor 36. The threshold voltage (Vth) can typically be approximately 0.7 V. This results in the common mode of the signal of interest (i.e., Ipd*Rtia) varying around the bias DC voltage signal (i.e., Vth). The selection of Rtia can be predetermined so that the signal range remains in the low-voltage range, thereby allowing the second operational amplifier 10 to be a low-voltage device. The selection of Rcm can also be predetermined so that the signal remains above 0 V (i.e., electrical ground), thereby allowing the second operational amplifier 10 to be a unipolar power supply device and, in some cases, a low-voltage device.

[0067] The current-to-voltage signal converter 30 implements a method for converting a current signal to a voltage signal, which may include at least the three steps described above with reference to the current-to-voltage converter 20.

[0068] The current-to-voltage signal converter 30 can further adjust the voltage or current values ​​at both inputs to the amplifier 10 based on the DC offset voltage (Vref) of the first voltage signal (Vout1). The adjustment can be made by shifting, scaling, and / or stabilizing the DC offset voltage (Vref). The voltage or current values ​​at both inputs to the amplifier are based on the actual fluctuations in the DC offset (Vref) via a feedback loop. The feedback loop is configured to ensure that, during operation, the input to the amplifier 10 does not exceed a first predetermined voltage threshold or fall below a second predetermined voltage threshold. These predetermined voltage thresholds may be limits where the amplifier 10 ceases to operate in its linear region and begins to operate in its saturation region. This is not a hard limit, and in most cases, it may be acceptable for the second voltage signal (Vout2) to exceed this limit a percentage of the time so that it is representative of / linearly proportional to the input current signal (Ipd).

[0069] FIG. 5 shows a block diagram of a current-to-voltage signal converter 40 comprising a first stage 42, an analog subtractor circuit 4, and a voltage regulation arrangement 44.

[0070] The first stage 42 is configured to convert the input current signal (Ipd) to a first voltage signal (Vout1), which can be accomplished in many ways as known in the art, but a specific example is the transimpedance amplifier circuit 2 shown in Figures 1-3.

[0071] The second stage of the current-to-voltage signal converter 40 is an analog subtractor circuit 4. The analog subtractor circuit 4 includes an amplifier 10. The analog subtractor circuit 4 is electrically coupled to the first stage 42 and converts the first voltage signal (Vout1) to a second voltage signal (Vout2), i.e., performs at least a voltage shifting operation.

[0072] Voltage regulation circuit 44 is electrically coupled to at least one input of amplifier 10 and configured such that the voltage at the at least one input of amplifier 10 is between a first predetermined voltage threshold and a second predetermined voltage threshold. Voltage regulation circuit 44 can be an open-loop system, a feed-forward system, or a feedback system.

[0073] The analog subtractor circuit 4 may further include a first reference voltage (Vref) input. The first voltage signal (Vout1) may include a component of the first reference voltage (Vref). For example, the first reference voltage (Vref) may be a (time-) varying DC offset. This allows the voltage adjustment arrangement 44 to introduce a first reference source to the input of the amplifier 10. This allows the first reference voltage (Vref) component of the first voltage signal (Vout1) to be scaled / offset (partially or fully). The voltage adjustment circuit 44 may be designed with predetermined knowledge of the first reference voltage (Vref) to scale / offset it (i.e., for example, an open-loop system as in FIG. 2) or may be designed to react to current / future / past first reference voltages (Vref) during operation (i.e., for example, a closed-loop system [feedback or feedforward] as in FIG. 3). The voltage adjustment circuit 44 allows for improved system cost (reduced components, power) and improved system performance. This allows amplifier 10 to be a low voltage amplifier and / or a unipolar amplifier, which can provide additional benefits.

[0074] In operation, current-to-voltage signal converter 40 performs a method for converting a current signal to a voltage signal. The method can include at least three steps as described above with reference to current-to-voltage converter 20 and current-to-voltage converter 30. The method has the same advantages and benefits as those described above with respect to current-to-voltage converter 20 and current-to-voltage converter 30.

[0075] FIG. 6 shows a current-to-voltage signal converter 50 that includes the structure of the current-to-voltage signal converter 1 (i.e., the transimpedance amplifier 2 and analog subtractor circuit 4) as shown in FIG. 1, with the addition of a voltage regulation arrangement 52.

[0076] Current-to-voltage signal converter 50 operates in much the same way as current-to-voltage converter 30 of Figure 3, and has at least all of the same advantages, except that NMOS transistor 36 is replaced with a third operational amplifier 54 having a bias voltage (Vb).

[0077] The inverting input of the third operational amplifier 54 is electrically connected to the non-inverting input of the second operational amplifier 10. The non-inverting input of the third operational amplifier 54 is electrically connected to a bias voltage (Vb), which serves the same purpose as the threshold voltage (Vth) of the NMOS transistor 36. This results in the signal of interest (i.e., Ipd*Rtia) fluctuating around the bias DC voltage signal (i.e., Vb). This can effectively shift or scale, or at least stabilize, the fluctuating DC offset voltage (i.e., Vref) of the first voltage signal (Vout1). It is worth noting that the output of the third operational amplifier 54 can function as a first reference source; therefore, a common-mode voltage source / current source (similar to the common-mode current source 34 in FIG. 3) may not be present. The third operational amplifier 54 can be electrically coupled to a first terminal of the first common-mode resistor 26a and a first terminal of the second common-mode resistor 26b.

[0078] FIG. 7 shows a current-to-voltage signal converter 60 that includes the structure of the current-to-voltage signal converter 1 (i.e., the transimpedance amplifier 2 and analog subtractor circuit 4) as shown in FIG. 1, with the addition of a voltage regulation arrangement 62.

[0079] The current-to-voltage signal converter 60 operates in much the same way as the current-to-voltage converter 30 of FIG. 3 and has at least all of the same advantages. It differs from the current-to-voltage converter 30 of FIG. 3 in that the first common-mode resistor 26a and the second common-mode resistor 26b are replaced by a current mirror arrangement 63. The current mirror arrangement includes a control (PMOS) transistor 66 and two mirrored (PMOS) transistors 68a, 68b. The drain terminals of each mirrored transistor 68a, 68b are electrically coupled to the inverting and non-inverting inputs, respectively, of the second operational amplifier 10. The source terminals of each mirrored transistor 68a, 68b and the control transistor 66 are connected together and to a power source 69. The gate terminals of each mirrored transistor 68a, 68b, the gate terminal of the control transistor 66, the drain terminal of the second NMOS transistor 64, and the drain terminal of the control transistor 66 are connected together. The source terminal of the second NMOS transistor 64 is electrically coupled to electrical ground.

[0080] The drain terminal of the feedback NMOS transistor 36 is electrically coupled to the common-mode current source 34 and the gate terminal of the second NMOS transistor 64. Therefore, the feedback NMOS transistor 36 can control the current flow through the second NMOS transistor 64. Therefore, the second NMOS transistor 64 can control the current in the current mirror arrangement 63. The mirrored current drawn by the two mirrored transistors 68a, 68b controls the voltages at the inverting and non-inverting inputs of the second operational amplifier 10, similar to the pair of resistors 26a, 26b in FIGS. 2, 3, and 5. In other words, the two mirrored (PMOS) transistors 68a, 68b can help effectively shift, scale, and / or at least stabilize the fluctuating DC offset voltage (i.e., Vref) of the first voltage signal (Vout1). This allows the second operational amplifier 10 to be a low-voltage operational amplifier and / or be powered by a unipolar power supply voltage. This can improve system performance (accuracy, power efficiency) and reduce system cost (reduced surface area and size).

[0081] In the current-to-voltage signal converters 30, 40, 60, which may include a closed-loop system and a voltage regulation array 32, 42, 62 having an NMOS transistor 36, the NMOS transistor 36 can be changed to a resistor array or other simple amplifier, which is useful only for having an amplifier function. Furthermore, in the current-to-voltage signal converters 30, 40, 50, 60, any mosfet-type transistors may be changed to BJT-type transistors or any other transistor types without departing from the concepts described in this description.

[0082] For all of the above designs and circuits, it is possible to add an additional diode from the non-inverting input of the second operational amplifier 10 to electrical ground (i.e., the anode is connected to ground). This diode can protect at least one input of the second operational amplifier 10 so that it always operates within a safe range when the current-to-voltage signal converter 1, 20, 30, 40, 50, 60 is first powered up or if the voltage regulation array 22, 32, 42, 52, 62 cannot immediately change the input voltage to the second operational amplifier 10.

[0083] The analog subtractor circuit can be modified with a feedback circuit to prevent the second op-amp from "seeing" the high-voltage signal. The feedback circuit can have many different implementations, and it can also be replaced with a feed-forward circuit. A passive protection circuit can be used to protect the low-voltage amplifier from sudden failure of this circuit.

[0084] general principles Unless the context clearly requires otherwise, throughout the description and claims, the words "comprise," "comprising," "include," "including," and the like, are to be construed in an inclusive sense, that is, in the sense of "including, but not limited to," and not in an exclusive or exhaustive sense.

[0085] The words "coupled" or "connected," as generally used herein, refer to two or more elements that may be directly connected or connected via one or more intermediate elements. Furthermore, the words "herein," "above," "below," and words of similar import, when used in this application, refer to this application as a whole and not to any particular portions of this application. Where the context permits, words using the singular or plural forms in the Detailed Description can also include the plural or singular, respectively. The word "or" referring to a list of two or more items is intended to cover all interpretations of the following word, i.e., any item in the list, all items in the list, and any combination of items in the list.

[0086] It should be understood that one or more features from one or more of the above-described embodiments can be combined with one or more features of one or more other of the above-described embodiments to form further embodiments within the scope of the appended claims. [Explanation of symbols]

[0087] 1 Current-to-voltage signal converter 2. Transimpedance Amplifier 4 Analog subtractor circuit 6. First operational amplifier (op-amp) 8 Transimpedance Feedback Resistor (Rtia) 10 Second Op Amp 12 resistor 12a First Resistor 12b Third resistor 14a Second resistor 14b Fourth resistor 16 Electrical Grounding 20 Current-to-voltage signal converter 22 Voltage regulation array 24 DC source 26a First common mode resistor 26b Second Common Mode Resistor 30 Current-to-voltage signal converter 32 Voltage regulation array 34 Common-mode current source 36 Feedback NMOS transistor 40 Current-to-voltage signal converter 42 First Stage 44 Voltage Regulator Circuit 50 Current-to-voltage signal converter 52 Voltage regulation array 54 Third Op-Amp 60 Current-to-voltage signal converter 62 Voltage regulation array 63 Current mirror arrangement 64 Second NMOS transistor 66 Control transistor 68a Mirrored Transistor 68b mirrored transistor 69 Power Source

Claims

1. A current-to-voltage signal converter, a first stage configured to convert an input current signal to a first voltage signal; an analog subtractor circuit comprising an amplifier electrically coupled to the first stage for converting the first voltage signal to a second voltage signal; a voltage regulation arrangement coupled to a first input of the amplifier and configured such that a voltage at the first input of the amplifier is between a first predetermined voltage threshold and a second predetermined voltage threshold; Equipped with the amplifier having the first input and a second input; the voltage regulation array comprising a common mode reference coupled to both the first input and the second input; the input current signal is generated by a photodiode biased by a first reference voltage; the first stage is a transimpedance amplifier having a voltage input and a current input, the first reference voltage being electrically coupled to the voltage input and the input current signal being electrically coupled to the current input; The analog subtractor circuit subtracts the first voltage signal from the first reference voltage.

2. 2. The current-to-voltage signal converter of claim 1, wherein the common-mode reference is a voltage source or a current source.

3. 2. The current-to-voltage signal converter of claim 1, wherein the first predetermined voltage threshold is greater than the second predetermined voltage threshold, and the first voltage signal is at least partially above the first predetermined voltage threshold or at least partially below the second predetermined voltage threshold.

4. 2. The current-to-voltage signal converter of claim 1, wherein the amplifier is a low-voltage amplifier operating in its linear region, the amplifier has a predetermined input voltage range, the first predetermined voltage threshold is less than or equal to an upper end of the predetermined input voltage range, and the second predetermined voltage threshold is greater than or equal to a lower end of the predetermined input voltage range.

5. 2. The current-to-voltage signal converter of claim 1, wherein the first stage is configured to operate within a first supply voltage range, the amplifier is an operational amplifier and is configured to operate within a second supply voltage range, the first supply voltage range is greater than the second supply voltage range, and / or the amplifier is further configured to be powered by a unipolar power supply voltage.

6. the analog subtractor circuit further comprising first, second, third, and fourth resistors; the first resistor is electrically coupled in series between the first input and the first voltage signal; the second resistor is electrically coupled to the first input and forms a negative feedback loop based on an output of the amplifier, the output of the amplifier being the second voltage signal; the third resistor and the fourth resistor form a voltage divider such that the third resistor is electrically coupled in series between the second input and the first reference voltage and the fourth resistor is electrically coupled to ground; 2. The current-to-voltage signal converter of claim 1, wherein the first resistor and the third resistor have the same resistance value, and the second resistor and the fourth resistor have the same resistance value.

7. 2. The current-to-voltage signal converter of claim 1, wherein the common mode reference comprises a fixed voltage source electrically coupled to a first terminal of a first common mode resistor and a first terminal of a second common mode resistor, second terminals of the first common mode resistor and the second common mode resistor being electrically coupled to the first input and the second input, respectively, and the first common mode resistor and the second common mode resistor having the same value resistance.

8. 2. The current-to-voltage signal converter of claim 1, wherein the first reference voltage has a predetermined value, and the common-mode reference is a fixed voltage source having a predetermined voltage based on the predetermined value.

9. 2. The current-to-voltage signal converter of claim 1, wherein the voltage regulation arrangement comprises a feedback loop configured to regulate the voltage of both the first input and the second input to the amplifier of the analog subtractor circuit, and the voltage regulation arrangement comprises a feedback amplifier configured to receive the second input to the amplifier of the analog subtractor circuit.

10. 10. The current-to-voltage signal converter of claim 9, wherein the feedback amplifier is electrically coupled to a first terminal of a first common mode resistor and a first terminal of a second common mode resistor, and second terminals of the first common mode resistor and the second common mode resistor are electrically coupled to the first input and the second input, respectively, and the first common mode resistor and the second common mode resistor have resistances of the same value.

11. 10. The current-to-voltage signal converter of claim 9, wherein the feedback amplifier is configured to operate a current mirror arrangement comprising two mirrored transistors and a control transistor, the feedback amplifier is configured to control current flow through the control transistor, the two mirrored transistors are electrically coupled to the first input and the second input, respectively, and the two mirrored transistors are matched in size.

12. 1. A method for converting a current signal to a voltage signal, the method comprising: converting the current signal to a first voltage signal using a first stage of a signal converter; converting the first voltage signal to a second voltage signal using an analog subtractor circuit comprising an amplifier; applying a voltage regulation arrangement to a first input of the amplifier to reduce a voltage at the first input to the amplifier between a first predetermined voltage threshold and a second predetermined voltage threshold; Including, the amplifier having the first input and a second input; the voltage regulation array comprising a common mode reference coupled to both the first input and the second input; the current signal is generated by a photodiode biased by a first reference voltage; the first stage is a transimpedance amplifier having a voltage input and a current input, the first reference voltage being electrically coupled to the voltage input and the current signal being electrically coupled to the current input; The method of claim 1, wherein the analog subtractor circuit subtracts the first voltage signal from the first reference voltage.

13. The method according to claim 1, wherein the common mode reference is a DC source, and further wherein: predetermining a DC offset voltage of the first voltage signal; predetermining a voltage or current value of the DC source based on the predetermining DC offset voltage; The method of claim 12, further comprising:

14. The method according to claim 1, wherein the common mode reference is a DC source, and further wherein:

13. The method of claim 12, further comprising adjusting a voltage or current value at both the first input and the second input based on a DC offset voltage of the first voltage signal.

Citation Information

Patent Citations

  • Optical reception circuit

    JP1987015909A

  • Receiving circuit

    JP1998256840A

  • Light receiving amplifier circuit and optical pickup element equipped with same

    JP2004235764A

  • Signal amplifier circuit

    JP2009200667A

  • Transimpedance amplifier and optical signal receiver

    JP2017169156A