Driver device for supplying power to a load

Abstract

The present invention provides a driver apparatus with overvoltage protection. A control circuit monitors a first output signal responsive to an offset signal configured to compensate for AC mains power ripple in a power factor correction signal, or the sum of the offset signal and the power factor correction signal. A power factor correction converter operates in a positive feedback mode using positive feedback responsive to the first output signal. The control circuit and the power factor correction converter (which generates the power factor correction signal) are further configured to disable the positive feedback mode and enter a protection mode to limit power when a second output signal exceeds a predetermined threshold, the second output signal being one of the power factor correction signal, the offset signal, and the sum thereof.

Description

[Technical Field]

[0001] The present invention relates to the field of driver devices, and more particularly to driver devices that include power factor correction circuits. [Background technology]

[0002] Driver devices are commonly used to supply power to loads, such as light emitting elements. Typically, a driver device is capable of converting (e.g., AC) input power into (e.g., DC) output power suitable for powering the load. Some driver devices include power factor correction (PFC) circuitry to modify or adjust the power factor of a PFC output signal that defines the output power supplied to the load or bus.

[0003] The PFC output signal may be a signal across the output capacitor of a power factor correction circuit, so it is smoothed to emulate a DC signal. However, a power factor correction circuit is a slow-response converter that adjusts its output by sensing the average power. Therefore, the PFC output signal has a ripple (voltage or current) of approximately 100 / 120 Hz, the exact frequency of which depends on the ripple in the AC input power, which is typically approximately 50 / 60 Hz. Particularly in the case of LED lighting, the output luminous flux of an LED lighting device is highly sensitive to the power supplied to the LED lighting device, so it would be advantageous to reduce or attenuate the size of the ripple in the PFC output signal, e.g., to eliminate or compensate for the ripple. If unadjusted, the ripple in the PFC output signal will result in a corresponding ripple in the brightness of the light output by the LED, which will cause flicker that is perceptible to humans or to capture devices (such as cameras).

[0004] A common way to solve this problem in the art is to use a second conversion circuit cascaded from the power factor correction circuit. This topology can be classified as a two-stage conversion circuit. The second conversion circuit conditions the PFC output signal into a more regulated signal. One disadvantage of such a two-stage conversion circuit is the high material cost and high space requirement, since the second conversion circuit needs to process the entire PFC output signal, and its power rating means that it requires very high, large, and materially expensive components.

[0005] It has been proposed to use a switching converter at the output of a power factor correction circuit, where the switching converter is used to compensate only the AC component of the PFC output signal, rather than the entire PFC output signal. This means that the power rating of the switching converter is relatively smaller, resulting in lower cost and size, compared to a two-stage converter. A suitable prior art example is described in US 2017 / 0288557 A1. This topology is often referred to as or classified as a 1.5-stage or 1.25-stage converter, compared to the two-stage topology described above. US 20170099710 A1 also discloses a similar topology.

[0006] US20100202169A1 discloses overvoltage protection for a PFC converter.

[0007] There is a continuing demand for improved driver devices. Summary of the Invention [Problem to be solved by the invention]

[0008] Since PFC circuits are usually high-power converters and switching converters are low-power converters, the general principle of the above techniques for improving efficiency and operating these converters at their respective sweet spots is that the PFC circuit should still dominate the total load power supply signal, and the switching converter should only process the ripple portion and use / supply as little power as possible. Therefore, when the output power / voltage is increased, the PFC circuit should increase its output power / voltage more in terms of absolute value than the switching converter. This can be seen as a positive feedback at the output of the PFC circuit according to the voltage of the total load power supply signal.

[0009] For example, the above technique can be used in an LED window driver that supports LEDs with a wide range of forward voltages. When high forward voltage LEDs are connected to such a window driver, the window driver detects a high total output voltage and controls the PFC circuit to increase its output voltage so that its output voltage remains at, for example, 90% of the total output voltage.

[0010] The inventors have identified drawbacks or problems in implementing the above principles in real products: in particular, if a connected LED fails open, the total output voltage increases and the driver takes this increase as an incentive to further increase the output voltage of the PFC circuit, and the entire PFC circuit / driver becomes overstressed and may fail. [Means for solving the problem]

[0011] The invention is defined by the claims.

[0012] The approach proposed by this disclosure provides an improved circuit topology for providing overvoltage protection to driver devices that utilize switching converter circuits, i.e., switch mode power supplies, to compensate for the AC component of a PFC output signal.

[0013] Embodiments utilize a control circuit that limits the maximum power of a particular PFC output signal when the output signal reaches a predetermined threshold, providing an effective mechanism for providing overvoltage protection to a driver device.

[0014] According to an example according to an aspect of the present invention, there is provided a driver device having a power factor correction (PFC) converter including an input interface and a first output interface, the PFC converter adapted to receive AC mains power at the input interface, convert the AC mains power into a PFC output signal having a ripple corresponding to the AC mains power, and provide the PFC output signal at the first output interface.

[0015] The driver device also comprises a switched mode power supply including a second output interface connected in series with the first output interface, the switched mode power supply configured to superimpose an offset signal on the PFC output signal to compensate for the ripple corresponding to the AC mains power, thereby generating a load supply signal.

[0016] The driver device also has a control circuit configured to detect a first output signal responsive to a voltage of one of the offset signal and the load power supply signal, and the control circuit is configured to control the power factor correction converter in a positive feedback mode to increase the PFC output signal in response to an increase in the voltage of one of the offset signal and the load power supply signal as indicated by the first output signal.

[0017] Most importantly, the control circuit is also configured to sense a second output signal responsive to a voltage of one of the PFC output signal, the offset signal, and the load supply signal, and the control circuit is configured to control the power factor correction converter to override the positive feedback mode and enter a protection mode in response to the second output signal being at and / or exceeding a predetermined threshold to limit the power, and optionally a maximum power (e.g., maximum voltage), of the PFC output signal.

[0018] Embodiments thereby use the first output signal to control operation of the PFC converter with the positive feedback loop while monitoring a second output signal to determine whether to disable the positive feedback loop and / or limit the maximum power output by the PFC converter. This approach provides a mechanism for implementing overvoltage identification and protection using a signal generated by the driver device plus the switched-mode power supply to a positive feedback controlled PFC converter. The proposed approach provides a low-cost, easily implemented mechanism for providing overvoltage protection.

[0019] In an embodiment, the first output interface and the second output interface may be connected in series, which provides an effective mechanism for allowing the offset signal to be superimposed on the PFC output signal to compensate for the ripple in the PFC output signal and generate the load supply signal.

[0020] In an embodiment, the control circuit is configured to limit the power of the PFC output signal by limiting a maximum power of the PFC output signal, or by controlling the PFC converter to operate in a protection mode in which the PFC converter is stopped from outputting the PFC output signal in response to the second output signal being at or exceeding the predetermined threshold. In this embodiment, the control circuit may enable limited operation of the PFC converter or stop the PFC converter completely so as not to overstress the driver device.

[0021] In some examples, the predetermined threshold is a value caused by an open circuit fault in a load powered by the load power signal. This approach means that the overvoltage protection begins or is initiated when there is an open circuit fault in the load, which increases the safety of the drive device.

[0022] The control circuit may be configured to control the PFC converter to operate in the positive feedback mode in response to the second output signal being less than a critical value, wherein in the positive feedback mode the PFC converter: calculating a ratio of the PFC output signal to the load delivery signal; The PFC output signal is increased as the first output signal increases, so that the proportion of the PFC output signal in the load power supply signal is equal to or greater than the predetermined proportion, by increasing the PFC output signal if the proportion is less than a predetermined proportion and decreasing the PFC output signal if the proportion is greater than the predetermined proportion.

[0023] This approach thereby controls the driver device to perform positive feedback power factor correction when the first output signal indicates that there is no overvoltage, and allows conventional or normal operation of the driver device during periods when there is no overvoltage.

[0024] The switched-mode power supply may have a current control loop adapted to sense a current in the load supply signal, compare the current to a current reference, and control the switched-mode power supply to adjust the offset signal in a manner that increases the offset signal when the current is less than the current reference and decreases the offset signal when the current is greater than the current reference, so that the sensed current complies with the current reference, which is constant.

[0025] This embodiment provides a technique for accurate generation of an offset signal that compensates for any AC mains power ripple in the PFC output signal, for example by ensuring that the current through the load is approximately constant.

[0026] In an example, the control circuit includes a first voltage detection circuit for detecting, as the first output signal, any one of a voltage of the load power supply signal, a voltage of the PFC output signal, or a voltage of the offset signal.

[0027] When a normal load is connected, any of these three voltages can indicate the load voltage, which can then be used as a trigger for positive control of the PFC output voltage. Among them, the voltage of the load supply signal is the most directly indicated, and therefore it is preferred to use the voltage of the load supply signal as the first output signal.

[0028] In an example, the control circuit includes a second voltage detection circuit for detecting, as the second output signal, any one of the voltage of the load power supply signal, the voltage of the PFC output signal, or the voltage of the offset signal.

[0029] When the load is open, all of these three voltages increase, which can be used as a trigger to disable the positive control and limit the PFC output voltage. Among them, the voltage of the offset signal responds most quickly to the open load (because the switched mode power supply has a fast response to increase the offset signal to maintain cut-off of the output current due to an open load), and it is preferable to use the voltage of the offset signal as the second output signal.

[0030] In some embodiments, the PFC converter has a feedback terminal, the PFC converter is configured to modify the PFC output signal in response to a signal at the feedback terminal, and the control circuit is configured to modify the signal at the feedback terminal.

[0031] The feedback terminal of a PFC converter / IC is usually used to set its output voltage, so it is convenient to control the feedback terminal of the PFC converter to implement the voltage control proposed by the present invention.

[0032] The control circuit may include a first signal conversion circuit between the first voltage detection circuit and the feedback terminal, the first signal conversion circuit adapted to convert the first output signal with one of a positive gain and an inverting gain for the feedback terminal, and a second signal conversion circuit between the second voltage detection circuit and the feedback terminal, the second signal conversion circuit adapted to convert the second output signal with the other of the positive gain and the inverting gain for the feedback terminal.

[0033] This approach provides a technique that allows the voltage at a single terminal to be used to control the PFC output signal, thus achieving both the overvoltage protection and positive feedback control using a single terminal for the PFC converter.

[0034] In other words, the same terminal used to provide feedback to control the PFC output signal (by the PFC converter) is also used to directly limit the PFC output signal when an overvoltage occurs.

[0035] By controlling the feedback terminal in this manner, the operating principles of the PFC converter can be exploited to reduce or limit the voltage of the PFC output signal when an overvoltage occurs. An overvoltage event detected by the second voltage detection circuit causes the voltage at the feedback terminal to move in the opposite direction to that caused by an increase in the load power supply signal. In this manner, an overvoltage event causes the PFC output signal to decrease, thereby limiting the power of the PFC output signal.

[0036] In some examples, the first voltage sensing circuit includes a voltage divider connected across a connection between the first output interface and the second output interface, the voltage divider configured to sense the voltage of the load supply signal as the first output signal. This approach provides a simple and reliable mechanism for sensing the voltage of the load supply signal, recognizing that the voltage of the load supply signal is a useful parameter for providing feedback to the PFC converter.

[0037] In some examples, the first signal conversion circuit includes a voltage inverter circuit connected between the voltage divider and the feedback terminal and configured to generate a voltage at the feedback terminal that is inversely proportional to the voltage of the load power supply signal. The PFC converter may be adapted to increase the PFC output signal as the voltage at the feedback terminal decreases, and therefore as the first output signal increases. This approach provides feedback to the PFC converter and a reliable mechanism for the PFC converter to react / respond to the feedback.

[0038] In some examples, the second signal conversion circuit includes a trigger circuit coupled to the second output interface and adapted to sense a voltage of the offset signal as the second output signal, the trigger circuit configured to pull the feedback terminal to a high voltage when the second output signal is at or exceeds the predetermined threshold.

[0039] The PFC converter may be adapted to control the PFC converter to limit the PFC output signal when the voltage at the feedback terminal is the high voltage, wherein the first signal translating circuit has an inverting gain and the second signal translating circuit has a positive gain.

[0040] In some examples, the switched-mode power supply is adapted to enter a protection mode in response to the voltage of the offset signal reaching a predetermined voltage threshold and clamp the voltage of the offset signal at the predetermined voltage threshold, This approach also disables the switched-mode power supply when an overvoltage occurs and improves the overvoltage protection performance of the driver device.

[0041] Also proposed is an electronic device comprising any of the driver devices disclosed herein and a load connected to the first output interface and the second output interface and configured to be powered by the load power signal, In some preferred examples, the load comprises one or more light emitting diodes.

[0042] These and other aspects of the invention will be elucidated and elucidated with reference to the following embodiments. [Brief explanation of the drawings]

[0043] For a better understanding of the present invention, and to show more clearly how the same may be carried into effect, reference will now be made, by way of example only, to the accompanying drawings, in which: [Figure 1] 1 illustrates a conceptual diagram of a driver device. [Figure 2] 1 illustrates a driver device including circuitry for a control circuit. [Figure 3] 1 illustrates waveforms of signals within a driver device. DETAILED DESCRIPTION OF THE INVENTION

[0044] The present invention will be described with reference to the drawings.

[0045] It should be understood that the detailed description and specific examples, while indicating exemplary embodiments of the devices, systems, and methods, are for purposes of illustration only and are not intended to limit the scope of the invention. These and other features, aspects, and advantages of the devices, systems, and methods of the present invention will become better understood from the following description, appended claims, and accompanying drawings. It should be understood that the figures are merely schematic and are not drawn to scale. It should also be understood that the same reference numerals are used throughout the figures to indicate the same or similar parts.

[0046] The present invention provides a driver apparatus with overvoltage protection. A control circuit monitors a first output signal and a second output signal responsive to a power factor correction signal and / or an offset signal, each configured to compensate for AC mains power ripple in the power factor correction signal and / or sum signal. The control circuit and a power factor correction converter (which generates the power factor correction signal) are configured to limit maximum power if the second output signal exceeds a predetermined threshold. Otherwise, the power factor correction converter operates using positive feedback responsive to the first output signal.

[0047] 1 illustrates a driver apparatus 100 according to an embodiment. The driver apparatus 100 is configured to power or drive a load 150 that is separate from the driver apparatus 100.

[0048] Driver apparatus 100 may form part of an electronic device 10 that includes driver apparatus 100 and a load 150. Load 150 may include, for example, one or more light emitting diodes or light emitting diode devices. Other suitable loads will be apparent to those skilled in the art.

[0049] The driver device 100 includes a power factor correction converter, or PFC converter, 110. The driver device 100 also includes a switch mode power supply (or SMPS) 120 and a control circuit .

[0050] The PFC converter 110 has an input interface 111 and a first output interface 112 .

[0051] The input interface 111 is configured to receive AC mains power AC+, AC-, which may be supplied by an AC mains power supply / grid (not shown).

[0052] The PFC converter 110 is configured to convert the AC mains power AC+, AC- into a PFC output signal V(C1), which is provided at the first output interface 112. The PFC output signal V(C1) has a ripple corresponding to the AC mains power, and thus the ripple may follow an essentially 50 / 60 Hz sinusoidal waveform of the AC mains.

[0053] Generally, a power factor correction converter is configured to correct or account for distortions in the power supplied to or drawn by a load. Typically, the output of a power factor correction circuit follows the essentially 50 / 60 Hz sinusoidal waveform of the AC mains power, resulting in AC mains power ripple in the PFC output signal V(C1).

[0054] PFC converters suitable for use in the embodiments are well known in the art. By way of example, the PFC converter may be or include a boost converter, a buck converter, and / or a buck-boost converter. Those skilled in the art will appreciate that any other type of converter is also applicable as long as it is capable of providing PFC functionality.

[0055] To at least partially reduce high-frequency switching signals in the PFC output signal V(C1), the power factor conversion circuit may have a first output capacitor C1 connected across the first output interface 112, so that the PFC output signal V(C1) is a nearly continuous signal that can be drawn by a load connected to the first output interface 112. However, the PFC output signal V(C1) will still have low-frequency ripple representing residual periodic fluctuations due to the (unsuppressed) AC mains power. In fact, PFC converters are designed to preserve low-frequency ripple, because otherwise the output would not track the input.

[0056] The switched-mode power supply 120 is configured to compensate for ripple in the PFC output signal V(C1). More specifically, the switched-mode power supply is configured to generate an offset signal V(C2) that is superimposed on the PFC output signal V(C1) to generate a load supply signal, where the load supply signal is equal to V(C1)+V(C2). The load supply signal is supplied to or drawn by the load 150. The offset signal V(C2) thereby compensates for ripple (of the AC mains power) in the PFC output signal V(C1), thereby smoothing the power supplied to the load 150.

[0057] The offset signal V(C2) is supplied to the second output interface 122. In the illustrated example, the second output interface is connected in series with the first output interface 112. The load 150 can be connected between the first output interface 112 and the second output interface 122 or across the first output interface 112 and the second output interface 122. Thus, the load power supply signal can be a signal across the first output interface and the second output interface.

[0058] A second output capacitor C2 may be connected between the terminals of the second output interface.

[0059] The operation of the PFC converter 110 may be controlled by a PFC controller 115. Although the PFC controller is shown as a separate component for ease of illustration, it may form an integral part of the PFC converter 110. In other examples, the PFC controller 115 may be considered to form part of a control circuit (described below).

[0060] The PFC controller is configured to control the PFC converter 110 in response to a load supply signal (e.g., V(C1)+V(C2)). The control of the PFC controller may be a positive feedback loop. Thus, as the load supply signal increases, the PFC output signal also increases. In this manner, the PFC output signal can automatically track changes in the load supply signal to keep the output of the PFC converter as high as possible and the output of the switched-mode power supply as small as possible (while still compensating for ripple), thereby ensuring high overall efficiency of the driver device.

[0061] The PFC controller 115 may not be responsive to a load supply signal, but may instead be responsive to a PFC output signal and / or an offset signal. Suitable control techniques will be apparent to those skilled in the art.

[0062] Thus, more broadly, the PFC controller 115 may be responsive to a first output signal S1 that is responsive to the PFC output signal and / or the offset signal and / or the total load supply signal. It will be apparent that the signal responsive to the load supply signal will be responsive to a combination of the PFC output signal and the offset signal.

[0063] The operation of switched-mode power supply 130 may be controlled by SMPS controller 125. While SMPS controller 125 is shown as a separate component for ease of illustration, it may form an integral part of switched-mode power supply 120. In other examples, SMPS controller 125 may be considered to form part of control circuitry (described below).

[0064] The SMPS controller 125 detects the load voltage across a sense resistor R S The load 150 may be configured to control the switched-mode power supply 120 in response to the voltage across the load 150. The switched-mode power supply is therefore controlled in response to the current through the load 150.

[0065] In this manner, the driver device may have a current control loop adapted to sense the current of the load supply signal and control the switched mode power supply to adjust the offset signal so that the sensed current optionally follows a substantially constant current reference. S and the SMPS controller 125.

[0066] In particular, the SMPS controller 125 detects the voltage across the sense resistor R S The offset signal V(C2) may be configured to control the offset signal such that the current through the load (as measured by the voltage across V(C1)) is matched to a current reference. The current reference is preferably constant, or nearly constant, i.e., substantially constant. This process is called constant current regulation. This means that the offset signal V(C2) tracks the mains power ripple in the PFC output signal V(C1), thereby compensating for this ripple in the PFC output signal.

[0067] The control of the switched mode power supply 120 can be a fast control loop to ensure that the offset signal V(C2) varies with the ripple in the PFC output signal V(C1).

[0068] In one example, if a load with a smaller forward voltage (e.g., a first LED) is replaced with a load with a larger forward voltage (e.g., a second LED with a larger forward voltage), initially the load current will be less than the current reference, causing the switched-mode power supply 120 to increase its output voltage, the PFC converter will also sense the increased voltage of the total load power signal and increase its PFC output voltage, which will bring more load current, and the switched-mode power supply 120 will gradually decrease its output voltage. The system will converge to a state where the PFC converter outputs a majority of the forward voltage and the switched-mode power supply outputs a minor portion, and the load current will be the same as the current reference.

[0069] Examples of suitable switched mode power supplies include buck converters or buck-boost converters; other examples will be apparent to those skilled in the art.

[0070] Techniques for controlling switched mode power supplies to compensate for AC mains power ripple in the PFC output signal are well established in the art, as e.g., as disclosed by US 2017 / 0288557 A1.

[0071] In some examples, the switched-mode power supply 120 (e.g., the SMPS controller 125) is adapted to enter a protection mode in response to the voltage of the offset signal reaching a predetermined voltage threshold and clamp the voltage of the offset signal at the predetermined voltage threshold, which improves the overvoltage protection performance of the driver device.

[0072] The present disclosure relates to techniques for providing overvoltage protection to such drives.

[0073] In particular, when the load 150 exhibits an open fault (or no load is connected), the sense resistor R S The current through the sense resistor R is determined by the closed loop control of the switch mode power supply. S A large difference is seen between the offset signal V(C2) generated by the switched-mode power supply 120 and the current through the load (V(C3)). This causes the voltage of the offset signal V(C2) generated by the switched-mode power supply 120 to become extremely high, resulting in a load power signal with a very high voltage, which in itself is dangerous (e.g., to someone wanting to replace or repair the load that is deriving the load power signal).

[0074] Furthermore, the voltage of the PFC output signal V(C1) is also regulated higher because it responds to the voltage of the load supply signal in a positive feedback manner. This high voltage could damage the first output capacitor C1 (if present) and overstress or overstress the PFC converter. Therefore, overvoltage protection is desired.

[0075] There is also a problem if the voltage of the PFC output signal is too high, for example if there is a short circuit to a very high voltage, or if there is a fault in the operation of the power factor correction converter.

[0076] The present disclosure proposes an effective control circuit that can automatically adjust the PFC output signal according to the LED load voltage and at the same time realize the overvoltage protection function.

[0077] Among other things, this disclosure proposes the concept of configuring a PFC converter and / or control circuit to operate in two modes: a "normal mode," sometimes referred to as an operating mode or a normal operating mode, and a "protection mode." When controlled in the normal mode or operating mode, the PFC output signal is controlled using positive feedback, such that the PFC converter increases the PFC output signal in response to increases in the PFC output signal and / or offset signal. When triggered by certain conditions and operating in the protection mode, the PFC converter limits the maximum power of the PFC output signal, e.g., clamps the maximum power of the PFC output signal.

[0078] Switching between the normal / operating mode and the protection mode is responsive to a second output signal S2. The second output signal is responsive to the PFC output signal and / or the offset signal and / or their sum, which is the total load supply signal (e.g., voltage). In particular, the protection mode is activated in response to the second output signal being at and / or exceeding a predetermined threshold. Otherwise, the system operates in the normal / operating mode.

[0079] It has also been recognized that the overvoltage protection function may be integrated into the smart PFC output signal conditioning circuit. More specifically, the load supply signal and the overvoltage signal may be provided to the PFC controller 115 via the same feedback terminal FB.

[0080] The technique also recognizes that an overvoltage protection function can be achieved by utilizing and monitoring an offset signal at the output of the switched mode power supply.

[0081] The drive control circuit provides overvoltage protection. Among other things, the control circuit 130 controls the feedback S provided to the PFC controller 115 and / or the PFC converter 110 at the feedback terminal FB. FB The PFC converter is configured to implement this overvoltage protection function via the PFC output signal V(C1) in response to the voltage at the feedback terminal FB.

[0082] More specifically, when operating in normal mode, the control circuit 130 is configured to sense a first output signal S1 responsive to the PFC output signal and / or the offset signal (e.g., (load supply signal) as shown) and / or their sum, the sum being the voltage of the total load supply signal. The control circuit is configured to control the PFC converter to increase the PFC output signal in response to an increase in the PFC output signal and / or the offset signal as indicated by the first output signal.

[0083] In the protection mode, the control circuit 130 is also configured to sense a second output signal S2 responsive to the PFC output signal and / or the offset signal and / or their sum, and the control circuit and power factor correction converter are configured to limit the maximum power of the PFC output signal in response to the second output signal being at or exceeding a predetermined threshold.

[0084] 2 illustrates driver apparatus 100 with an electronic circuit embodiment of control circuit 130. Note that if two crossing wires do not have a point at their intersection, the two wires are not electrically connected.

[0085] For ease of illustration, the PFC controller 115 is shown as being integrated with the PFC converter 110. Similarly, the SMPS controller 125 is shown as being integrated with the switched mode power supply 120.

[0086] The PFC converter 110, and in particular the PFC controller 115, has a feedback terminal FB. The PFC converter / controller is configured to modify the PFC output signal V(C1) in response to the voltage at the feedback terminal FB. The control circuit 130 of the present invention controls the PFC output voltage via this feedback terminal FB in normal mode and protection mode.

[0087] The control circuit 130 includes a first voltage detection circuit 131. The first voltage detection circuit detects the voltage V of the load power supply signal as a first output signal S1. L The device is configured to detect:

[0088] In the illustrated example, the first voltage sensing circuit 131 comprises a voltage divider R7, R8 connected across the junction of the first output interface and the second output interface, the voltage divider being configured to sense the voltage of the load supply signal as the first output signal S1, the load supply signal being the sum / superposition of the PFC output and the switched mode power supply output.

[0089] In the normal mode, the control circuit also has a first signal conversion circuit 132 between the first voltage sensing circuit 131 and the feedback terminal FB. The first signal conversion circuit 132 is adapted or configured to convert the first output signal for the feedback terminal with one of a positive gain and an inverting gain.

[0090] In this example, the first signal conversion circuit includes a voltage inverter circuit R4 and Q1 such that the first signal conversion circuit has an inverting gain. The first transistor Q1 couples the feedback terminal FB to the second output interface 122 or the second output capacitor C2. Specifically, the first transistor Q1 is an NPN transistor having a collector connected to the feedback terminal FB and an emitter connected to the second output interface 122 or the second output capacitor C2. The base of the first transistor Q1 is connected to the first voltage detection circuit 131 via a control resistor R4. As a result, the current flowing through the control resistor R4 (or an additional resistor R9) determines the base current of the first transistor Q1. The control resistor R4 is connected to the voltage divider of the first voltage detection circuit 131 so that as the voltage of the first output signal increases, the current flowing through the control resistor R4 increases. This increases the base current of Q1, thereby increasing the collector current of Q1 and lowering or decreasing the voltage at the feedback terminal.

[0091] The voltage inverter circuit is therefore configured to generate a voltage at the feedback terminal that is inversely varied relative to the voltage of the load supply signal.

[0092] The PFC controller 115 may be adapted to control the PFC converter to increase the PFC output signal as the voltage at the feedback terminal FB decreases (and therefore as the first output signal increases). This can be achieved by controlling the first output signal V(C1) inversely to the voltage at the feedback terminal FB. Techniques for implementing such control mechanisms are well established in the art.

[0093] In particular, the voltage at the feedback terminal FB can be compared to a given reference voltage for the PFC output signal. Thus, the voltage of the PFC output signal increases as the voltage at the feedback terminal decreases. Similarly, when the voltage of the load power signal decreases, the voltage at the feedback terminal increases and the voltage of the PFC output signal is decreased. Thus, the PFC output signal can be automatically adjustable according to the load power signal. In an alternative embodiment, the current injected into the feedback terminal FB is sensed by the PFC controller, and the PFC output voltage is controlled inversely to this injected current. This is similar to the voltage version described above.

[0094] In the protection mode, the control circuit 130 also includes a second voltage detection circuit 133. The second voltage detection circuit 133 is configured to detect the voltage of the offset signal as the second output signal S2. In the illustrated example, the second voltage detection circuit has a direct connection to the second output interface 122 or the second output capacitor C2, and therefore the voltage of the offset signal directly represents the second output signal S2.

[0095] The control circuit 130 also includes a second signal conversion circuit 134 connected between the second voltage detection circuit 133 and the feedback terminal FB. The second signal conversion circuit 134 is configured to convert the second output signal S2 with the other of a positive gain and an inverting gain (i.e., the opposite polarity to that of the first signal conversion circuit) for the feedback terminal FB.

[0096] The second signal conversion circuit 134 may include, for example, a trigger circuit R3, Q1. The trigger circuit is coupled to the second output interface 122 and adapted to detect the voltage of the offset signal as the second output signal. In this case, the trigger circuit pulls the feedback terminal to a high voltage when the second output signal is at or exceeds a predetermined threshold.

[0097] The trigger circuit reuses the first transistor Q1 and further comprises a second control resistor R3 connecting the emitter of the first transistor to the second output interface 122 or to the second output capacitor C2.

[0098] As explained earlier, if there is an open fault in the load or if the load is disconnected, the sense resistor R S is zero. Since the switched mode power supply uses a constant current regulation technique to control the offset signal, this will increase the voltage of the offset signal V(C2) until, for example, the output voltage is equal to the input voltage of the switched mode power supply.

[0099] The second control resistor R3 is configured so that the voltage potential at the emitter of the first transistor Q1 reaches the voltage potential at the base of the first transistor Q1 when (and only when) the voltage of the offset signal V(C2) reaches a predetermined threshold, which switches the first transistor Q1 off.

[0100] In that case, the feedback terminal is pulled up to a high voltage by resistor devices R1, R2. The high voltage may be the voltage of the load power supply signal or a voltage-divided version of the voltage of the load power supply signal. This high voltage may be much higher than the voltage present during normal mode of operation of the feedback terminal (the voltage provided by the first control signal S1).

[0101] The PFC converter is configured so that the voltage of the PFC output signal decreases with increasing voltage at the feedback terminal, so that raising the voltage at the feedback terminal FB to a high voltage automatically decreases the PFC output signal, effectively clamping the PFC output signal to a maximum value. In this manner, the control circuit can limit the maximum power of the PFC output signal in response to the second output signal S1 being at and / or exceeding a predetermined threshold.

[0102] Thus, overvoltage protection is provided using a control circuit while taking advantage of the natural or normal operation of the PFC converter and / or switched mode power supply.

[0103] For better understanding of the concept, FIG. 3 illustrates the various voltages at the drive device 100 for three different scenarios t1, t2, and t3.

[0104] For each scenario, three waveforms are shown. The first waveform, V(C2), illustrates the voltage of the offset signal. The second waveform, V(FB), illustrates the voltage at the feedback terminal. The third waveform, V(b,E), illustrates the voltage between the base (b) and emitter (E) of the first transistor, Q1, i.e., the base-emitter voltage.

[0105] The first scenario t1 is when the offset signal is less than a predetermined threshold V TH This shows a situation where the load is an LED load with a small forward voltage.

[0106] The second scenario t2 occurs when the offset signal is greater than, but still below, the predetermined threshold V TH The base-emitter voltage V(b,E) and the feedback voltage V FB Both of the and are reduced. It may be that the load is changed to an LED load with a larger forward voltage.

[0107] The third scenario t3 is when the load is open and the offset signal V(C2) is even larger and falls below the predetermined threshold V TH In this scenario, the base voltage of the first transistor is less than the emitter voltage, i.e., the base-emitter voltage is negative, turning off the first transistor Q1. This means that the feedback voltage V FB This results in a PFC output signal with a reduced voltage, thereby providing overvoltage protection.

[0108] Returning to FIG. 2, a further optional feature of control circuit 130 is illustrated.

[0109] As an example, the control circuit may further include an RC filter 135 coupled between the first voltage sensing circuit 131 and the first signal converting circuit 132. This may help to filter out high frequency signals present in the first output signal S1.

[0110] Other circuit components R10, D2, Q1, and D3 of the control circuit 130 act as a buffer and / or amplifier for the first output signal generated by the voltage divider 131.

[0111] There is also proposed an electronic device 10 comprising any of the driver devices 100 described herein and a load 150 configured to be powered by a load power signal generated by such a driver device, the load therefore being connected to the first output interface 112 and the second output interface 122 of the driver device.

[0112] The load may, for example, comprise one or more light emitting diodes or light emitting diode devices. Other suitable loads will be apparent to those skilled in the art.

[0113] Those skilled in the art can understand and effect variations to the disclosed embodiments in practicing the claimed invention, from a study of the drawings, the specification and the appended claims. In the claims, the word "comprises" does not exclude other elements or steps, and the singular does not exclude a plurality.

[0114] The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage.

[0115] It should be noted that when the term "adapted to" is used in the claims or the specification, the term "adapted to" is intended to be equivalent to the term "configured to." It should be noted that when the term "configuration" is used in the claims or the specification, the term "configuration" is intended to be equivalent to the term "system," and vice versa.

[0116] Any reference signs in the claims should not be construed as limiting the scope.

Claims

1. 1. A PFC converter including an input interface and a first output interface, receiving AC mains power at the input interface; converting the AC mains power to a PFC output signal having a ripple corresponding to the AC mains power; a PFC converter adapted to provide the PFC output signal at the first output interface; a switched mode power supply including a second output interface connected in series with the first output interface, the switched mode power supply being configured to superimpose an offset signal on the PFC output signal to compensate for the ripple corresponding to the AC mains power, thereby generating the offset signal in series with the PFC output signal to generate a load supply signal; A control circuit comprising: the control circuit is configured to sense a first output signal responsive to a voltage of one of the offset signal and the load supply signal, and the control circuit is configured to control the PFC converter in a positive feedback loop to increase the PFC output signal in response to an increase in the voltage of one of the offset signal and the load supply signal as indicated by the first output signal; a control circuit configured to detect a second output signal responsive to a voltage of one of the PFC output signal, the offset signal, and the load power supply signal, and configured to disable the positive feedback loop and enter a protection mode in response to the second output signal being at and / or exceeding a predetermined threshold to control the PFC converter to limit the power of the PFC output signal.

2. The control circuit by limiting the maximum power of the PFC output signal; or 2. The driver apparatus of claim 1, configured to limit a power of the PFC output signal by causing the PFC converter to stop outputting the PFC output signal in response to the second output signal being at or exceeding the predetermined threshold.

3. 2. The driver device according to claim 1, wherein the predetermined threshold value is a value caused by an open circuit fault in a load powered by the load power supply signal.

4. The control circuit is configured to control the PFC converter to operate in the positive feedback loop in response to the second output signal being less than the predetermined threshold voltage, wherein the positive feedback loop includes: calculating a ratio of the PFC output signal to the load delivery signal; 2. The driver apparatus of claim 1, wherein the PFC output signal increases as the first output signal increases so that the percentage of the PFC output signal in the load power supply signal is equal to or greater than the predetermined percentage by increasing the PFC output signal when the percentage is less than a predetermined percentage and decreasing the PFC output signal when the percentage is greater than the predetermined percentage.

5. The switch mode power supply Detecting a current in the load power supply signal; comparing the current to a current reference; 2. The driver device of claim 1, further comprising a current control loop adapted to control the switched-mode power supply to adjust the offset signal in a manner that increases the offset signal when the current is less than the current reference and decreases the offset signal when the current is greater than the current reference, so that the sensed current follows the current reference, which is constant.

6. The control circuit outputs, as the first output signal: the voltage of the load supply signal; or 2. The driver device according to claim 1, further comprising a first voltage detection circuit for detecting any one of the voltages of the offset signals.

7. The control circuit outputs the second output signal as the voltage of the load power supply signal; the voltage of the PFC output signal; or 7. The driver device according to claim 6, further comprising a second voltage detection circuit for detecting any one of the voltages of the offset signals.

8. the PFC converter has a feedback terminal, the PFC converter configured to modify the PFC output signal in response to a signal at the feedback terminal; The control circuit is configured to modify the signal at the feedback terminal, the control circuit comprising: a first signal conversion circuit between the first voltage sensing circuit and the feedback terminal, the first signal conversion circuit adapted to convert the first output signal for the feedback terminal with one of a positive gain and an inverting gain; 8. The driver device of claim 7, further comprising: a second signal conversion circuit between the second voltage detection circuit and the feedback terminal, the second signal conversion circuit being adapted to convert the second output signal with the other of the positive gain and the inverting gain for the feedback terminal.

9. 9. The driver device of claim 8, wherein the first voltage detection circuit comprises a voltage divider connected across a connection between the first output interface and the second output interface, the voltage divider being configured to detect the voltage of the load power supply signal as the first output signal.

10. the first signal conversion circuit includes a voltage inverting circuit connected between the voltage divider and the feedback terminal and configured to generate a voltage at the feedback terminal that is reduced as the voltage of the load supply signal increases and that is increased as the voltage of the load supply signal decreases; 10. Driver apparatus according to claim 9, wherein the PFC converter is adapted to increase the PFC output signal as the voltage at the feedback terminal decreases and therefore as the first output signal increases.

11. the second signal converting circuit has a trigger circuit coupled to the second output interface, the trigger circuit being adapted to detect a voltage of the offset signal as the second output signal, and to pull the feedback terminal to a high voltage when the second output signal is at or exceeds the predetermined threshold; 9. The driver apparatus of claim 8, wherein the PFC converter is configured to limit the PFC output signal when the voltage at the feedback terminal is the high voltage.

12. 2. The driver apparatus of claim 1, wherein the switched-mode power supply is adapted to enter a protection mode in response to the voltage of the offset signal reaching a predetermined voltage threshold and clamp the voltage of the offset signal at the predetermined voltage threshold.

13. A driver device according to any one of claims 1 to 12; a load connected to the first output interface and the second output interface and configured to be powered by the load power supply signal.

14. 14. The electronic device of claim 13, wherein the load comprises one or more light emitting diodes.

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