low noise amplifier circuit
The low-noise amplifier circuit with capacitors stabilizes the gate-source voltage, addressing the limitations of conventional designs by enhancing output power and reducing distortion without degrading noise performance.
Patent Information
- Application Number
- JP2021187218
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2021-11-17
- Publication Date
- 2025-10-28
- Estimated Expiration
- 2041-11-17
AI Technical Summary
Conventional low-noise amplifier circuits fail to meet the requirements of low noise, high output, and low distortion due to inductance components generated by wires or bumps connecting semiconductor chips, hindering performance.
A low-noise amplifier circuit design featuring cascode-connected field-effect transistors with a grounded source and gate, incorporating a first and second capacitor element to stabilize the gate-source voltage, preventing negative values and reducing distortion.
The design achieves high output power and low distortion while maintaining low noise figures, as demonstrated by improved output power and reduced third-order intermodulation distortion.
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Abstract
Description
[Technical Field]
[0001] The present invention relates to a low noise amplifier circuit. [Background technology]
[0002] Conventionally, a low-noise amplifier circuit for amplifying high-frequency signals has been proposed, for example, as shown in Patent Document 1. As shown in FIG. 8, the low-noise amplifier circuit 10 of Patent Document 1 includes cascode-connected field-effect transistors 2 and 3. The source of field-effect transistor 2 is grounded, forming a so-called source-grounded amplifier. The gate of field-effect transistor 3 is grounded, forming a so-called gate-grounded amplifier.
[0003] Low noise amplifier circuits used in mobile communication base stations are required to have low noise, high output, and low distortion. Low noise is particularly important, and amplifier circuits with extremely low noise, with a noise figure of 1.0 dB or less in the frequency band from 3.2 GHz to 4.7 GHz, which corresponds to the so-called 5th generation communication standard, are required.
[0004] However, conventional low-noise amplifier circuits have a problem in that they cannot satisfy all of the requirements for low noise, high output, and low distortion. In a semiconductor device in which a semiconductor chip equipped with a low-noise amplifier circuit 10 is connected to external terminals by wires or bumps, when the gate of the field-effect transistor 3 constituting the gate-grounded amplifier shown in Fig. 8 is grounded, an inductance component L is generated by the wires or bumps. This inductance component L hinders the achievement of high output and low distortion. [Prior art documents] [Patent documents]
[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2011-199338 Summary of the Invention [Problem to be solved by the invention]
[0006] The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a low-noise amplifier circuit that achieves low noise, high output, and low distortion. [Means for solving the problem]
[0007] In order to achieve the above-mentioned object, the low noise amplifier circuit according to the present invention is characterized by the following [1]. [1] A low-noise amplifier circuit for amplifying high-frequency signals mounted on a semiconductor chip whose external terminals are connected to wires or bumps, a first transistor having a grounded source or emitter; an input terminal connected to the gate or the base of the first transistor and receiving the high-frequency signal; a first capacitor element; a second transistor having a source or an emitter connected to the drain or the collector of the first transistor and a gate or a base grounded via the first capacitor element; an output terminal connected to the drain or collector of the second transistor and from which the amplified high-frequency signal is output; One end is directly connected to the drain or collector of the second transistor, and the other end is directly connected to the gate or base of the second transistor. a second capacitor element; It must be a low-noise amplifier circuit. [Effects of the Invention]
[0008] According to the present invention, it is possible to provide a low-noise amplifier circuit that achieves low noise, high output, and low distortion.
[0009] The present invention has been briefly described above. The details of the present invention will become clearer by reading the following detailed description of the invention (hereinafter referred to as "embodiments") with reference to the accompanying drawings. [Brief explanation of the drawings]
[0010] [Figure 1]FIG. 1 is a circuit diagram showing an embodiment of a low-noise amplifier circuit according to the present invention. [Figure 2] FIG. 2 is a graph showing the results of measuring the time variation of the gate-source voltage VGS of the field-effect transistor 3 in the vicinity of the input power at which the output saturates, for the product of the present invention and a conventional product. [Figure 3] FIG. 3 is a graph showing the output power (dBm) versus the input power (dBm) of a conventional product. [Figure 4] FIG. 4 is a graph showing the output power (dBm) versus the input power (dBm) of the product of the present invention. [Figure 5] FIG. 5 is a graph showing the output power (dBm) and third-order intermodulation distortion (dBm) versus the input power (dBm) of the conventional product. [Figure 6] FIG. 6 is a graph showing the output power (dBm) and third-order intermodulation distortion (dBm) relative to the input power (dBm) of the product of the present invention. [Figure 7] FIG. 7 is a graph showing the frequency characteristics of the noise figure of the product of the present invention and the conventional product. [Figure 8] FIG. 8 is a circuit diagram showing an example of a conventional low-noise amplifier circuit. DETAILED DESCRIPTION OF THE INVENTION
[0011] Specific embodiments of the present invention will be described below with reference to the accompanying drawings.
[0012] The low-noise amplifier circuit 1 of this embodiment is a circuit that amplifies high-frequency signals. The low-noise amplifier circuit 1 shown in FIG. 1 includes cascode-connected field-effect transistors 2 and 3. The source of the field-effect transistor 2 (first transistor) is grounded, constituting a so-called source-grounded amplifier. An input terminal 4 for inputting a high-frequency signal is connected to the gate of the field-effect transistor 2. The drain of the field-effect transistor 2 is connected to one end of a resistor R via the source and drain of a field-effect transistor 3, which will be described later. A power supply voltage VDD is supplied to the other end of the resistor R.
[0013] The field-effect transistor 3 (second transistor) has a grounded gate, constituting a so-called gate-grounded amplifier. A bias terminal 5 for inputting a bias voltage is connected to the gate of the field-effect transistor 3. The gate of the field-effect transistor 3 is also grounded via a capacitor C1 and an inductance component L such as a wire or bump. The source of the field-effect transistor 3 is connected to the drain of the field-effect transistor 2, and the drain is connected to one end of the resistor R and to an output terminal 6 that outputs an amplified high-frequency signal.
[0014] The operation of the low-noise amplifier circuit 1 configured as described above will now be briefly explained. When the voltage of the high-frequency signal input to the input terminal 4 increases, the current I flowing through the field-effect transistors 2 and 3 and the resistor R increases, causing the source potential of the field-effect transistor 3 to decrease. When the source potential of the field-effect transistor 3 decreases, the gate-source voltage VGS of the field-effect transistor 3 increases, further increasing the current I flowing through the field-effect transistors 2 and 3 and the resistor R, causing the output voltage output from the output terminal 6 to decrease significantly.
[0015] On the other hand, when the voltage of the high frequency signal input to input terminal 4 decreases, the current I flowing through field effect transistors 2 and 3 and resistor R decreases, and the source potential of field effect transistor 3 increases. When the source potential of field effect transistor 3 increases, the gate-source voltage VGS of field effect transistor 3 decreases, further reducing the current I flowing through field effect transistors 2 and 3 and resistor R, and the output voltage output from output terminal 6 increases significantly. As a result, a signal that is an inverted and amplified version of the high frequency signal is output from output terminal 6.
[0016] As described above, a voltage corresponding to a high-frequency signal is applied to the gate-source voltage VGS of the field-effect transistor 3, and a drain-source current (= current I) corresponding to the applied gate-source voltage VGS flows. However, when the gate-source voltage VGS falls below the so-called threshold voltage, the drain-source current becomes less likely to flow and no longer uniformly follows changes in the gate-source voltage. Therefore, when the voltage input as the gate-source voltage VGS of the field-effect transistor 3 approaches the so-called threshold voltage, the output of the amplified high-frequency signal saturates and becomes different from the input high-frequency signal, and this difference becomes a distortion component of the amplified high-frequency signal.
[0017] Therefore, in this embodiment, a capacitor C2 is connected between the gate and drain of the field-effect transistor 3. By connecting the capacitor C2, part of the amplified high-frequency signal output from the output terminal 6 is applied to the gate of the field-effect transistor 3 via the capacitor C2. This increases the source potential of the field-effect transistor 3 and raises the gate potential so that the gate-source voltage VGS does not become negative, thereby preventing the gate-source voltage VGS from decreasing and achieving low distortion.
[0018] Next, to confirm the above-mentioned effects, the inventors fabricated the low-noise amplifier circuit 1 of the present invention shown in Figure 1, as well as a conventional low-noise amplifier circuit in which capacitor C2 was removed from the low-noise amplifier circuit 1 of Figure 1. Then, for the present invention and the conventional low-noise amplifier circuit, the time variation of the gate-source voltage VGS of the field-effect transistor 3 was measured near the input power at which the output saturates. The results are shown in Figure 2.
[0019] As shown in the figure, the gate-source voltage VGS oscillates due to the capacitor C1 and the inductance component L. In the conventional product without capacitor C2, the source potential is higher than the gate potential, as shown by the dotted line, and the gate-source voltage VGS of the field-effect transistor 3 becomes a negative value. In contrast, in the product of the present invention with capacitor C2, the amplitude of the gate-source voltage VGS is smaller than in the conventional product, as shown by the solid line. In other words, it was found that the product of the present invention can prevent the gate-source voltage VGS from becoming lower (negative).
[0020] Next, the inventor measured the output power (dBm) relative to the input power (dBm) for the above-mentioned conventional product and the present invention. The results are shown in Figures 3 and 4. As shown in the figures, the output power at 1 dB gain compression, which is the output power (dBm) that is 1 dB lower than the linear relationship, is 13.3 dBm for the conventional product and 15.8 dBm for the product of the present invention, demonstrating that higher output can be achieved.
[0021] The inventors also measured the output power (dBm) and third-order intermodulation distortion relative to the input power (dBm) for the above-mentioned conventional product and the present invention. The results are shown in Figures 5 and 6. As shown in the figures, the output third-order intercept point was 20.5 dBm for the conventional product, while it was 25.2 dBm for the product of the present invention, demonstrating that the product of the present invention has lower distortion than the conventional product.
[0022] The inventors also measured the frequency characteristics of the noise figure (dB) for the above-mentioned conventional product and the product of the present invention. The results are shown in Figure 7. As shown in the figure, it was found that the noise figure characteristics were the same for both the conventional product and the product of the present invention.
[0023] That is, according to this embodiment, by connecting the capacitor C2, the gate-source voltage VGS of the field-effect transistor 3 is prevented from becoming low (negative), and as a result, it is possible to achieve both high output and low distortion without degrading the noise figure.
[0024] The present invention is not limited to the above-described embodiments, and can be appropriately modified, improved, etc. Furthermore, the material, shape, size, number, location, etc. of each component in the above-described embodiments are arbitrary and not limited as long as they can achieve the present invention.
[0025] In the above-described embodiment, the first and second transistors are field-effect transistors 2 and 3, but this is not limiting. Bipolar transistors with equivalent performance characteristics may be used as the first and second transistors. In this case, the above description can be explained by replacing the gate with the base, the source with the emitter, and the drain with the collector. [Explanation of symbols]
[0026] 1 Low noise amplifier circuit 2. Field-effect transistor (first transistor) 3 Field-effect transistor (second transistor) 4 input terminals 6 Output terminals C1 Capacitor (first capacitor element) C2 Capacitor (second capacitor element)
Claims
[Claim 1] A low-noise amplifier circuit for amplifying high-frequency signals mounted on a semiconductor chip whose external terminals are connected to wires or bumps, a first transistor having a grounded source or emitter; an input terminal connected to the gate or the base of the first transistor and receiving the high-frequency signal; a first capacitor element; a second transistor having a source or an emitter connected to the drain or the collector of the first transistor and a gate or a base grounded via the first capacitor element; an output terminal connected to the drain or collector of the second transistor and from which the amplified high-frequency signal is output; a second capacitor element having one end directly connected to the drain or collector of the second transistor and the other end directly connected to the gate or base of the second transistor; Low noise amplifier circuit.
Citation Information
Patent Citations
High-frequency amplifier
JP2002359530A
amplifier
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Amplifier circuit
JP2019180059A
Power amplifier
JP2020155974A