Plasma processing equipment

The plasma processing apparatus addresses the challenge of heater arrangement by using film-shaped heaters with integrated return and power paths, facilitating efficient and cost-effective multi-zone temperature control for improved semiconductor wafer processing.

JP7761728B2Active Publication Date: 2025-10-28HITACHI HIGH TECH CORP
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Patent Information

Application Number
JP2024171915
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2024-10-01
Publication Date
2025-10-28
Estimated Expiration
2042-06-23

AI Technical Summary

Technical Problem

Conventional plasma processing apparatuses face challenges in efficiently and cost-effectively arranging multiple heaters for temperature control due to the need for numerous holes for power supply and current return, which complicates fabrication and increases costs.

Method used

A plasma processing apparatus with a cylindrical sample stage featuring a first heater layer comprising film-shaped heaters in rectangular regions, each connected to a return path and power supply path, allowing for multi-zone temperature control with tungsten via wiring connections.

Benefits of technology

Facilitates the safe, easy, and cost-effective production of multi-zone heater layers, enabling precise temperature adjustment for improved processing accuracy and reduced variability in semiconductor wafer etching.

✦ Generated by Eureka AI based on patent content.

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Abstract

To provide a plasma processing device which forms an electrode of a multizone heater layer (heater wire) safely, at low cost and easily.SOLUTION: A plasma processing device comprises: a processing chamber; a cylindrical sample table where a wafer is mounted on a top face thereof; a first heater layer disposed inside of a dielectric film, which covers the top face of a substrate having a disc shape of the sample table, and including a plurality of film-like heaters 801 disposed in a plurality of regions CH1-CH4 each having a rectangular shape; and a plurality of temperature sensors disposed inside of the substrate at a lower side of the regions. The plurality of regions are disposed corresponding to a semiconductor circuit pattern and includes four regions disposed while making one side of the rectangular shape oppose the adjacent region. The plasma processing device comprises: four feeding paths 601 which are electrically connected to one location and supply power from a DC power source while defining the film-like heaters as one aggregate; and one returning path 701 which is electrically connected to the other location of each film-like heater and in which power is fed back to the DC power source.SELECTED DRAWING: Figure 7
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Description

[Technical Field]

[0001] The present disclosure relates to a plasma processing apparatus in which a substrate-like sample such as a semiconductor wafer is placed on the upper surface of a sample stage in a processing chamber inside a vacuum vessel, and the sample is processed using plasma formed by supplying a processing gas into the processing chamber, and in particular to a plasma processing apparatus in which a plurality of film-like heaters are provided in a dielectric film covering the upper surface of the sample stage, and the heaters are used to adjust the temperature of the sample while processing it. [Background technology]

[0002] In plasma processing equipment, in order to shorten the time required to etch a so-called multilayer film, which is a film stack formed on the surface of a plate-shaped sample such as a semiconductor wafer (hereinafter simply referred to as a wafer), adjacent films are processed vertically in the same processing chamber without removing the wafer from the processing chamber between the processing of each of these films.

[0003] In such processes, it is important to adjust the temperature of the sample stage placed in the processing chamber to an appropriate temperature for processing the wafer. For this reason, a heater is built into the sample stage of the plasma processing equipment, and when processing the wafer, the temperature is adjusted to an appropriate temperature for processing, thereby improving processing accuracy.

[0004] One example of such a plasma processing apparatus is disclosed in Japanese Patent Laid-Open No. 2007-67036 (Patent Document 1). This prior art discloses a plasma processing apparatus that has a metal disc or cylindrical base material constituting a sample stage arranged in a processing chamber inside a vacuum vessel, with multiple concentric coolant flow paths through which a coolant flows, and a ring-shaped heater film formed by thermal spraying on the top of the metal disc or cylindrical base material, making it possible to change the temperature distribution within the wafer surface according to the etching conditions.

[0005] Another example of such a conventional plasma processing apparatus is disclosed in Japanese Patent Laid-Open No. 2017-157855 (Patent Document 2). This conventional technology discloses a plasma processing apparatus including a metal disc or cylindrical substrate constituting a sample stage disposed within a processing chamber inside a vacuum vessel, with multiple concentric coolant channels through which a coolant flows, and a metal disc or cylindrical substrate having a first concentric heater element and a second heater element with more divisions than the first heater element and a lower heat output, disposed above the substrate. This conventional technology allows processing of semiconductor wafers placed on the sample stage while controlling their temperature. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Japanese Patent Application Laid-Open No. 2007-67036 [Patent Document 2] Japanese Patent Application Publication No. 2017-157855 Summary of the Invention [Problem to be solved by the invention]

[0007] In conventional technology, the following problem arises when considering placing multiple heaters to control the temperature of the electrodes. A total of two holes are required for each zone, one for power supply and one for current return, and arranging the holes becomes difficult as the number of zones increases. Even if it were possible to arrange the holes, drilling a large number of holes would be expensive and difficult to process.

[0008] The present disclosure provides a technology for safely, easily fabricating electrodes for a multi-zone heater layer (heater wire) at low cost. [Means for solving the problem]

[0009] A plasma processing apparatus according to one aspect of the present disclosure includes: a processing chamber disposed within the vacuum vessel, in which a wafer to be processed is placed and plasma is generated; a cylindrical sample stage disposed within the processing chamber and on whose upper surface the wafer is placed; a first heater layer disposed inside a dielectric film covering an upper surface of the disk-shaped substrate of the sample stage, the first heater layer including a plurality of film-shaped heaters disposed in each of a plurality of rectangular regions; The aforementioned a plurality of temperature sensors disposed within the substrate below the rectangular-shaped region of the first heater layer; the plurality of regions are arranged corresponding to circuit patterns of a plurality of semiconductor devices formed on the upper surface of the wafer, and each of the plurality of regions includes four regions arranged such that one side of the rectangular shape faces an adjacent region; The film heaters arranged in each of the four regions are grouped together. a return path electrically connected to one location of the film heater in each of the four regions included in the group and through which power supplied from a DC power source returns to the DC power source; and four power supply paths electrically connected to another location of each of the film heaters and supplying the power from the DC power source; Equipped with.

[0010] Specifically, a via hole is drilled on the substrate and the heater layer and substrate are connected by a tungsten via wiring, which allows the heater return current to be collected in the substrate. [Effects of the Invention]

[0011] According to a plasma processing apparatus according to one aspect of the present disclosure, electrodes for a multi-zone heater layer (heater wire) can be produced safely, easily, and at low cost. [Brief explanation of the drawings]

[0012] [Figure 1] 1 is a vertical cross-sectional view showing an outline of the configuration of a plasma processing apparatus according to an embodiment; [Figure 2] 2 is a cross-sectional view schematically showing a part of the configuration of the sample stage of the plasma processing apparatus shown in FIG. 1. FIG. [Figure 3] 3 is a partially enlarged cross-sectional view schematically showing a part of the configuration of the sample stage of the plasma processing apparatus shown in FIG. 2. FIG. [Figure 4]FIG. 10 is a diagram showing an example of a second heater located inside the sample stage. [Figure 5] FIG. 10 is a diagram showing an example of a first heater in the sample stage. [Figure 6] FIG. 1 is a layout diagram of a power supply section and a return section of a grid heater. [Figure 7] A close-up view of a set of four grid heaters. [Figure 8] FIG. 10 is a diagram showing an example of polarity reversal in four grid heaters and their power supply sections. [Figure 9] This is a schematic diagram showing the relationship between the four corners (first corner cna, second corner cnb, third corner cnc, fourth corner cnd) and four sides (first side SL1, second side SL2, third side SL3, fourth side SL4) of the rectangular area 501 described in Figure 5 and the four areas (first area CH1, second area CH2, third area CH3, fourth area CH4) of Figure 7. DETAILED DESCRIPTION OF THE INVENTION

[0013] An embodiment of the present disclosure will be described with reference to the drawings. Hereinafter, embodiments of the present disclosure will be described with reference to Fig. 1 to Fig. 8. Fig. 1 is a cross-sectional view that schematically illustrates the configuration of a plasma processing apparatus according to an embodiment. In particular, Fig. 1 illustrates a plasma etching apparatus that uses a microwave electric field as an electric field for forming plasma, generates ECR (Electron Cyclotron Resonance) between the microwave electric field and magnetic field to form plasma, and uses the plasma to etch a substrate-like sample such as a semiconductor wafer. A plasma etching apparatus (plasma processing apparatus) 100 shown in Fig. 1 will now be described. Plasma etching apparatus 100 has a vacuum vessel 101 equipped with a processing chamber 104 therein in which plasma is generated. Vacuum vessel 101 has a cylindrical shape and an open top, on which a dielectric window 103 (made of quartz, for example) for introducing microwaves is arranged as a cover member, forming processing chamber 104 with the inside and outside airtightly separated. A vacuum exhaust port 110 is disposed at the bottom of the vacuum vessel 101, and is connected to a vacuum exhaust device (not shown) disposed below and connected to the vacuum vessel 101. A shower plate 102, which forms the ceiling surface of a processing chamber 104, is provided below the lower surface of a dielectric window 103 that constitutes the upper cover member of the vacuum vessel 101. The shower plate 102 has a plurality of gas inlet holes 102a disposed in the center, and etching process gas is introduced into the processing chamber 104 through these gas inlet holes 102a. The shower plate 102 is a circular plate made of a dielectric material such as quartz.

[0014] An electric field and magnetic field generating unit 160 is disposed above the exterior of the vacuum vessel 101, generating an electric field and a magnetic field for generating the plasma 116. The electric field and magnetic field generating unit 160 is provided in the plasma etching apparatus 100 and includes the following components. Specifically, the electric field and magnetic field generating unit 160 includes a waveguide 105 disposed above the dielectric window 103, through which an electric field is transmitted to supply a high-frequency electric field of a predetermined frequency for generating the plasma 116 into the processing chamber 104. The electric field transmitted through the waveguide 105 is generated by oscillation in an electric field generating power supply 106. The frequency of the electric field is not particularly limited, but in this embodiment, microwaves of 2.45 GHz are used. Furthermore, magnetic field generating coils 107 for generating a magnetic field are disposed above the dielectric window 103 of the processing chamber 104, on the sidewall of the vacuum vessel 101 constituting the cylindrical portion of the processing chamber 104, and on the outer periphery of the lower end of the waveguide 105, surrounding these. The electric field of the microwaves generated by the electric field generating power supply 106 propagates through the inside of the waveguide 105, passes through the dielectric window 103 and the shower plate 102, and is supplied to the processing chamber 104 from above. Furthermore, the magnetic field generated by the magnetic field generating coil 107 interacts with the magnetic field supplied into the processing chamber 104, thereby generating electron cyclotron resonance (ECR). Then, atoms or molecules of the processing gas introduced into the processing chamber 104 through the gas introduction holes 102a of the shower plate 102 are excited and dissociated, thereby generating high-density plasma 116 in the processing chamber 104.

[0015] Further, a wafer-mounting electrode (first electrode) 120 constituting a sample stage is provided in the lower part of the processing chamber 104, below the space in which the plasma 116 is generated. The wafer-mounting electrode 120 has a mounting surface 120a on which a semiconductor wafer (hereinafter simply referred to as a wafer) 109, which is a sample (a processing object), is mounted. The wafer-mounting electrode 120 is disposed so that the mounting surface 120a faces the shower plate 102 or the dielectric window 103. The wafer-mounting electrode 120 has an upper surface 120b covered with a dielectric film 140 constituting the mounting surface 120a. A plurality of conductive films (electrostatic attraction electrodes) 111 for electrostatic attraction are disposed inside the dielectric film 140, and are connected to a DC power supply 126 via a high-frequency filter 125 shown in FIG. 1 . Here, the conductive film 111 constitutes the mounting surface 120a of the sample stage and is a film-like electrode for electrostatic attraction to which DC power for electrostatically attracting a semiconductor wafer is supplied. In this case, the conductive film 111 may be bipolar, in which one of the multiple film-like electrodes is given a different polarity from the other, or may be unipolar, in which the same polarity is given, but in this embodiment it is shown as unipolar.

[0016] Furthermore, a high-frequency power supply (first high-frequency power supply) 124 and a matching box 129 are disposed closer to the electrostatic attraction electrode (conductive film 111) than the high-frequency filter 125, and these high-frequency power supply 124 and matching box 129 are connected to a circular or cylindrical electrode substrate 108 made of a conductive material and disposed inside the wafer-holding electrode 120. The high-frequency power supply 124 is connected to the ground 112. High-frequency power (first high-frequency power) of a predetermined frequency is supplied from the high-frequency power supply 124 to the electrode substrate 108, and a bias potential is formed above the wafer 109 attracted and held on the upper surface of the wafer-holding electrode 120 during processing of the wafer 109. In other words, the sample stage has the wafer-holding electrode (first electrode) 120 to which high-frequency power (first high-frequency power) is supplied from the high-frequency power supply 124 while the plasma 116 is being generated.

[0017] Inside the electrode base material 108, in order to remove the transferred heat and cool the wafer mounting electrode 120, multiple coolant flow paths 152 are arranged spirally or concentrically around the central axis in the vertical direction of the electrode base material 108 or the wafer mounting electrode 120. A cooling coolant for cooling the electrode base material 108 flows through these coolant flow paths 152.

[0018] Furthermore, a recess 120d is disposed on the outer periphery of the upper portion of the wafer mounting electrode 120, surrounding the upper portion on the outer periphery of the mounting surface 120a. A susceptor ring 113, which is a ring-shaped member made of a dielectric material such as quartz or ceramics such as alumina, is placed on the ring-shaped upper surface of this recess 120d, which is formed lower than the mounting surface 120a of the sample stage. When the upper surface of the susceptor ring 113 is placed on the recess 120d, the upper surface of the susceptor ring 113 has a dimension such that it is higher than the mounting surface 120a of the wafer mounting electrode 120. The susceptor ring 113 is disposed on the outer periphery of the mounting surface 120a of the wafer mounting electrode (sample stage) 120, and covers the surface of the wafer mounting electrode 120. Specifically, the susceptor ring 113 is configured to cover the upper surface and cylindrical side wall surface of the recess 120d, as well as the cylindrical side wall surface of the wafer mounting electrode (sample stage) 120 below the recess 120d.

[0019] In the plasma etching apparatus 100, an unprocessed wafer 109 is placed on the tip of an arm of a wafer transfer robot disposed in a vacuum transfer chamber, which is a separate vacuum chamber connected to the side wall of the vacuum chamber 101 and whose pressure has been reduced to the same level as that of a processing chamber 104 inside the vacuum transfer chamber. A gate, which is a passage connecting the vacuum transfer chamber and the processing chamber 104, is opened by operating a valve disposed in the vacuum transfer chamber, and the unprocessed wafer 109 placed on the tip of the arm of the robot is transferred into the processing chamber 104. The wafer 109 is then transferred to above a mounting surface 120a of a wafer mounting electrode 120 in the processing chamber 104. The wafer 109 is then transferred onto the lift pins by vertical movement of the lift pins, and is then placed on the mounting surface. The wafer is then attracted to and held on the mounting surface 120a of the wafer mounting electrode 120 by electrostatic force generated by DC power applied from a DC power supply 126.

[0020] In this state, the flow rate or speed of the etching gas is adjusted by a mass flow controller (not shown) and introduced into the space between the dielectric window 103 and the quartz shower plate 102. After diffusing in this space, the gas is introduced into the processing chamber 104 through the gas inlet holes 102a of the shower plate 102. Thereafter, the vacuum exhaust device is operated to exhaust gas and particles from the processing chamber 104 through the vacuum exhaust port 110. Depending on the balance between the amount of gas supplied from the gas inlet holes 102a of the shower plate 102 and the amount of gas exhausted from the vacuum exhaust port 110, the pressure inside the processing chamber 104 is adjusted to a predetermined value within a range suitable for processing the wafer 109.

[0021] Furthermore, while the wafer 109 is being held by suction, a heat-conductive gas such as He (helium) is supplied from an opening (not shown) on the top surface of the dielectric film 140 to the gap between the wafer 109 and the top surface of the dielectric film 140, which is the mounting surface 120a of the wafer mounting electrode 120, thereby promoting heat transfer between the wafer 109 and the wafer mounting electrode 120. A coolant adjusted to a predetermined temperature range circulates through a coolant flow path 152 disposed in the electrode base material 108 of the wafer mounting electrode 120, thereby adjusting the temperature of the wafer mounting electrode 120 or the electrode base material 108 before the wafer 109 is mounted thereon. Therefore, by heat transfer between the wafer mounting electrode 120 or the electrode base material 108, which have large heat capacities, the temperature of the wafer 109 is adjusted to be close to these temperatures before processing, and heat is transferred from the wafer 109 to adjust the temperature of the wafer 109 even after processing has begun.

[0022] In this state, a microwave electric field and magnetic field are supplied into the processing chamber 104, generating plasma 116 using the gas. When plasma 116 is formed, radio frequency (RF) bias power is supplied from a radio frequency power supply 124 to the electrode substrate 108, forming a bias potential above the upper surface of the wafer 109, and charged particles such as ions in the plasma 116 are attracted to the upper surface of the wafer 109 in accordance with the potential difference between the potential and the potential of the plasma 116. Furthermore, the charged particles collide with a mask previously placed on the upper surface of the wafer 109 and the surface of the film layer to be processed in a film structure including the film layer to be processed, thereby performing an etching process. During the etching process, the processing gas introduced into the processing chamber 104 and particles of reaction products generated during the process are exhausted from a vacuum exhaust port 110. In the plasma etching apparatus 100 of this embodiment, during plasma processing, a second high-frequency power is supplied from a high-frequency power supply (second high-frequency power supply) 127 to a conductor ring (second electrode) 131 arranged on the outer periphery of the sample stage via a power supply connector 161 (described later) that is provided on the sample stage and has an elastic conductive member.

[0023] In the wafer-mounting electrode 120 of this embodiment, a high AC voltage generated by a high-frequency power supply (second high-frequency power supply) 127 is introduced into a conductor ring (second electrode) 131 made of a conductive material and disposed within the susceptor ring 113 via a load matching box 128 and a load impedance variable box 130. This configuration, combined with the load impedance variable box 130, which is adjusted to a suitable impedance value, and a relatively high-impedance portion disposed above the susceptor ring 113, relatively reduces the impedance value for high-frequency power from the high-frequency power supply 127 through the electrode substrate 108 to the outer periphery of the wafer 109. This effectively supplies high-frequency power to the outer periphery and outer periphery of the wafer 109, thereby reducing the concentration of the electric field at the outer periphery and outer periphery, thereby attracting charged particles such as ions in the plasma to the upper surface of the wafer 109 in the desired direction. The high-frequency power supply 127 is connected to the ground 112. The frequency of the high-frequency power supply 127 in this embodiment is preferably set to the same frequency as that of the high-frequency power supply 124 or a constant multiple thereof.

[0024] Next, the configuration of the sample stage 120 according to this embodiment will be described in detail with reference to Figures 1, 2 and 3. Figure 2 is a cross-sectional view that schematically shows part of the configuration of the sample stage of the plasma processing apparatus shown in Figure 1. FIG. 3 is a partially enlarged cross-sectional view schematically showing a part of the configuration of the sample stage of the plasma processing apparatus shown in FIG.

[0025] In this embodiment, the disk- or cylindrical-shaped substrate 108, which is disposed inside the sample stage 120 shown in FIG. 2, is made of a metal material such as titanium, aluminum, or a compound thereof. It is electrically connected to the ground electrode S and is conductively connected to the wall of the vacuum chamber 100 shown in FIG. 1, thereby being fixed at ground potential. The substrate 108 has a central convex portion on which the wafer 109 is placed, and a recessed portion that is arranged in a ring shape around the outer periphery of the convex portion, surrounding the convex portion and having a lowered upper surface. A step portion is provided between the convex portion and the recessed portion, forming a sidewall around the outer periphery of the convex portion. As described above, a susceptor ring 113 made of a ceramic material is placed in the ring-shaped recessed portion.

[0026] A dielectric film 201, which is a film made of a dielectric material such as ceramics, is disposed on the flat upper surface of the convex portion of the substrate 108. Furthermore, above the film layer of this dielectric film 201, a plurality of first heater films (also referred to as first heater layers) 202, which are film-like electrodes made of a conductive material and generate heat when supplied with DC power, are disposed so as to cover a plurality of regions on the upper surface of the substrate 108. In other words, the dielectric film 201 is disposed on the upper surface of the substrate 108, and further above this dielectric film 201, heater films 202, which are film-like heaters, are formed.

[0027] The heater film 202 is further covered by an upper dielectric film 203, and the periphery of the heater film 202 is surrounded by a dielectric member (dielectric film 203). In the sample stage 120 of this embodiment, a plurality of second heater films (also referred to as second heater layers) 204, which are film-like electrodes made of a conductive material and have the same structure as above and generate heat when supplied with DC power, are arranged on the upper layer of the dielectric film 203 that covers the heater film 202 arranged on the top of the dielectric film 201, covering multiple regions on the top surface of the substrate 108. Furthermore, a dielectric film 205 is arranged so as to cover the heater films. In other words, a first heater film 202 surrounded by dielectric films 201 and 203 is arranged on the top surface of the substrate 108, and a second heater film 204 surrounded by dielectric films 203 and 205 in the same manner as above is arranged on the top surface of the first heater film 202.

[0028] Each of the plurality of heater films 202, 204 is connected to DC power supplies 314, 315, whose operation is adjusted in response to a command signal from a controller, via power supply cables (power supply lines, power supply paths) 316, 317, so that DC power can be supplied from the DC power supplies 314, 315. That is, the power supply cables 316, 317 are cables that electrically connect the heater films 202, 204 to the DC power supplies 314, 315 that supply DC power to the heater films 202, 204. However, the power supply cables 316, 317 do not include a filter for high-frequency power. As described above, the inside of the dielectric film 201 arranged on the upper surface of the sample stage 120 in this embodiment is configured to include a plurality of first heater films 202 (referred to as multi-zone heaters) that can adjust the heat generation amount and therefore the temperature of the upper surface of the dielectric film 201 for each region (zone) and a plurality of second heater films 204 above them that can adjust the temperature of the upper surface.

[0029] In the sample stage 120 of this embodiment, a first heater film 202 surrounded by dielectric films 201 and 203 is disposed on the upper surface of a substrate 108, and a second heater film 204 surrounded by dielectric films 203 and 205 is disposed on the upper surface of the first heater film 202, as described above. A shielding film 206, which is a film-like conductive member, is disposed on the upper surface of the dielectric film 205, surrounding the upper and peripheral edges of the film, resulting in a structure in which the heater films 202 and 204 are surrounded (covered) by the shielding film 206. In other words, the structure in which the heater films 202 and 204 are surrounded by the shielding film (conductor film) 206 is encapsulated in the dielectric material that constitutes part of the dielectric films 201, 203, and 205. The shielding film 206 is electrically connected to the substrate 108, which fixes the shielding film 206 to the ground potential, just like the substrate 108. As a result, the inflow of high-frequency waves into the heater films 202 and 205 can be suppressed.

[0030] Furthermore, a dielectric film 207 is disposed on the upper surface of the shielding film 206, and an electrode film 208, which is an electrode for electrostatic attraction and an electrode to which high-frequency power for generating a high-frequency bias is supplied, is disposed on top of this dielectric material member. In other words, the electrode film 208 is a film made of a conductive material, and is electrically connected to a high-frequency bias power supply 313 that supplies high-frequency power of a predetermined frequency. The electrode film 204 is also electrically connected to a DC power supply 312, and by applying a DC voltage, the wafer 109 placed on the mounting surface of the sample stage 120 can be attracted by static electricity.

[0031] Moreover, above the upper surface of the electrode film 208, a dielectric film (electrostatic adsorption member) 209 made of a ceramic material that forms the top surface of the sample stage 120 and the mounting surface on which the wafer 108 is placed is disposed so as to cover the top surfaces of the convex portions, the surrounding concave portions, and the stepped portions that are the side walls of the convex portions. That is, on the top surface of the sample stage 120, there is disposed a dielectric film 209 that includes an electrode film (electrode) 208 that adsorbs the wafer 109 by electrostatic force and is disposed on top of the shielding film 206.

[0032] The sample stage 120 also has a plurality of through-holes that penetrate between the top surface of the dielectric film 209 on the convex portion and the bottom surface of the substrate 108. These through-holes include a plurality of lift pin through-holes 302 that house lift pins (pins) 311 that move up and down to support the wafer 109 from below and move it above the top surface of the sample stage 120, and a heat transfer gas supply hole 301 through which a heat transfer gas such as He flows to be supplied to the gap between the top surface of the dielectric film 209 and the back surface of the wafer 109 placed thereon. Lift pins 3011 arranged in the lift pin through-holes 302 raise and lower the wafer 109 above the top surface of the dielectric film 209. Here, the plurality of lift pin through-holes 302 open to the top surface of the dielectric film 209 and penetrate the dielectric films 201, 203, 205, and 206. The sample stage 120 includes an electrostatic attraction power supply hole 303 in which a power supply cable and a connector for applying power to the electrode film 208 are disposed, a first grip Do form A heater power supply hole 305 is provided inside which a power supply cable and a connector are arranged to supply power to the first ring-shaped heater film 202, and a heater power supply hole 304 is provided inside which a power supply cable and a connector are arranged to supply power to the second ring-shaped heater film 204.

[0033] The inner peripheral wall surfaces of the holes that penetrate the substrate 108 are provided with insulating bosses 306, 307, 308, 309, and 310, which are cylindrical members made of a dielectric material or an insulating material. That is, the substrate 108 of the sample stage 120 is provided with insulating bosses 306, 307, 308, 309, and 310, which are cylindrical members made of an insulating material and disposed inside each of the multiple through-holes, and which form the inner peripheral wall surface of the substrate 108 within the substrate 108. These insulating bosses 306, 307, 308, 309, and 310 can suppress discharges in the spaces inside the holes that are exposed to an electric field due to high-frequency power during processing of the wafer 109. The insulating bosses 306, 307, 308, 309, and 310 can be made of ceramic materials such as alumina and yttria, or resin materials.

[0034] In this embodiment, the devices for controlling the operation of the plasma etching apparatus 100, including the electric field generating power supply 106, the magnetic field generating coil 117, the high frequency power supply 124, the high frequency filter 125, the DC power supply 126, the high frequency power supply 127, the matching boxes 128 and 129, the load impedance variable box 130, and other electric field / magnetic field control systems, as well as the DC power supplies 314 and 315 that supply power to the first heater film 202 and the second heater film 204 inside the dielectric film 201, and devices constituting a pressure control system such as a vacuum exhaust device and a mass flow controller that controls the gas supply amount, as described below, each have a detector that detects the operating state such as output, flow rate, pressure, etc., or a plurality of temperature sensors arranged inside the base material 108 of the wafer mounting electrode 120, and are connected to the control unit 170 via wired or wireless communication.

[0035] When a signal indicating the state of operation output from the detector provided in each of these devices is transmitted to the control unit 170, the arithmetic unit of the control unit 170 reads out software stored in the internal storage device of the control unit 170, detects the amount of the state from the signal received from the detector based on the algorithm, calculates and transmits a command signal to adjust it to an appropriate value. The devices included in the electric field / magnetic field adjustment system or pressure adjustment system that receive the command signal adjust their operation in accordance with the command signal.

[0036] 4 is a diagram showing an example of a second heater film inside the sample stage. The heater arrangement 401 is an example of the configuration of multiple ring-shaped second heater films 204 inside the sample stage 120. Each heater film 204 has a heater wire inside, and its purpose is to control the temperature of the wafer 109 during plasma processing in accordance with the distribution of reaction products and plasma density distribution.

[0037] The second heater layer 204 includes a plurality of film-like heater portions 401H (401H0, 401H1, 401H2, 401H3). The film-like heater portions 401H (401H0, 401H1, 401H2, 401H3) are disposed inside the dielectric film (dielectric films 203, 205) above the first heater layer 202, on a plurality of radii in the radial direction from the center (108C) of the upper surface of the substrate 108 of the sample stage 120 toward the outer periphery (108P), in three or more radial regions (4R0, 4R1, 4R2, 4R3) including circular regions concentrically disposed around the center and ring-shaped regions surrounding the outer periphery of the circular regions.

[0038] 5 is a diagram showing an example of the arrangement of a first heater film provided on the sample stage of the plasma processing apparatus according to this embodiment. The film-like first heater film 202 of this embodiment is a metal film-like heater arranged inside the dielectric film 140 that covers the circular upper surface of the substrate 108 in multiple layers, and is arranged in multiple regions 501 corresponding to each of the circuit patterns of multiple semiconductor devices that are pre-formed on the upper surface of the wafer 109 placed on the upper surface of the dielectric film 209 when viewed from above. In the substrate 108 of the circular sample stage 120, the region 501 is not a perfect rectangle at the outer periphery of the upper surface of the dielectric film 201, but has a partially arc-shaped ARC.

[0039] The first heater film 202 is provided to adjust the temperature of each circuit pattern (also called a die or chip area) of a semiconductor device formed on the wafer 109 during plasma processing.

[0040] 5, the first heater film 202 has, in the rectangular region 501, a rectangular outer-frame wiring portion 501CL and an internal wiring portion 801 formed inside the outer-frame wiring portion 501CL. The internal wiring portion 801 is connected, for example, between a pair of opposing corners (cna, cnc) at the four corners (first corner cna, second corner cnb, third corner cnc, and fourth corner cnd) of the outer-frame wiring portion 501CL. The pair of corners (cna, cnc) are diagonally opposite corners. The internal wiring portion 801 is a film-like heater wire, and is formed, for example, by a meandering heater wiring (also referred to as a meander wiring) between a pair of opposing corners (RLC1, RLC2) of the outer-frame wiring portion 501CL so as to be able to heat the entire region inside the outer-frame wiring portion 501CL. The outer frame wiring portion 501CL has a first side SL1 provided between the first corner portion cna and the second corner portion cnb, a second side SL2 provided between the second corner portion cnb and the third corner portion cnc, a third side SL3 provided between the third corner portion cnc and the fourth corner portion cnd, and a fourth side SL4 provided between the fourth corner portion cnd and the first corner portion cna. The first side SL1 and the third side SL3 are provided opposite each other, a second side SL2 is provided between the first side SL1 and the third side SL3, and the fourth side SL4 is provided opposite the second side SL2.

[0041] The outer frame wiring portion 501CL of the first heater film 202 has a rectangular shape inside each of a plurality of rectangular regions 501 partitioned into a grid shape on the upper surface of the dielectric film 201 in accordance with the shape of the die of the semiconductor device by a plurality of first line segments (RL) extending parallel to each other at equal intervals in the front-rear direction and a plurality of second line segments (CL) extending perpendicular to the plurality of first line segments (RL) at equal intervals in the front-rear direction, and has a rectangular shape that matches the outer shape of each region 501 when viewed from above. Note that at the outer periphery of the upper surface of the dielectric film 201, the region 501 is not a perfect rectangle but has a part with an arc-shaped ARC, so that the outer frame wiring portion 501CL has a shape that matches the outer shape of the region 501 with the arc-shaped ARC (see FIG. 6 for this).

[0042] The number of regions 501 of the first heater film 202 in this embodiment is greater than the number of regions 401 of the multiple ring-shaped second heater film 204 shown in Fig. 4. While the number of regions 401 is 3 to 40, the number of regions 501 can be 10 to 200. Inside each region 501, a rectangular film-like heater wire (801) is arranged, in which a thin metal film constituting the first heater layer 202 is folded back horizontally multiple times along the sides of the rectangular outer shape.

[0043] In this embodiment, by adjusting the power supplied to each of the plurality of film heaters (801) formed along the shape of the region 501 corresponding to the die of the semiconductor device during plasma processing, the temperature of the wafer 109 can be accurately adjusted at each location on the upper surface of the wafer 109 corresponding to each die of the semiconductor device on the wafer 109. In particular, by adjusting the temperature according to each die of the semiconductor device being manufactured, it is possible to reduce variations in the results of the etching process on the wafer 109. Here, the film thickness of the plurality of film heaters formed by the second heater layer 204 is configured to be larger (thicker) than the film thickness of the plurality of film heaters 801 formed by the first heater layer 202.

[0044] 5, a plurality of temperature sensors TS are arranged inside the substrate 108 below each heater zone (501) of the first heater film 202 corresponding to the die of the semiconductor device on the wafer 109. The plurality of temperature sensors TS are electrically connected to the control unit 170 by, for example, metal wiring, and the temperature values ​​measured and detected by the plurality of temperature sensors TS are transmitted to the control unit 170 via the metal wiring.

[0045] The control unit 170 receives the output from the temperature sensors TS and detects the temperature of the upper surface of the substrate 108 or the surface of the dielectric film 201 corresponding to each zone (501) in accordance with a software algorithm stored in an internal storage device. The control unit 170 then adjusts the amount of DC power supplied to the heater wire (801) of each zone (501) in accordance with the software algorithm read out in the same way, based on the detected temperature, to adjust the heat generation amount of the heater wire (801) of each zone (501) or the heat generation amount on the substrate 108. In other words, the control unit 170 is configured to perform feedback control based on the detected temperatures corresponding to the outputs from the multiple temperature sensors TS so that the heat generation amount of the film-like heater wire (801) constituting the first heater layer (202) of each zone (region 501) or the heat generation amount on the substrate 108 becomes the desired heat generation amount or desired heat generation amount.

[0046] In this embodiment, the heater wire (801) that is feedback-controlled is the first heater film 202. The second heater film 204 maintains a predetermined amount of power supply to the heater in each ring-shaped zone (4R0, 4R1, 4R2, 4R3) of connected circular or arc-shaped regions shown in FIG. 4 for each wafer 109 or for each type of film structure on the upper surface of the wafer 109, or for each batch (lot) of a predetermined number of wafers 109. That is, in plasma processing of any wafer 109, the amount of heat generated by the second heater film 204 is fixed, and the temperature of the first heater film 202 (heater wire 801) is adjusted according to the temperature obtained as an output from the temperature sensor TS. In other words, the control unit 170 adjusts the output of the film-shaped heater 801 arranged within one of the rectangular regions (region 501, CH1-CH4 in Figures 7 and 8) of the first heater layer 202, while maintaining the output of the heater of the second heater layer 204 located above one of the rectangular regions (region 501, CH1-CH4 in Figures 7 and 8) corresponding to the die of the semiconductor device, in accordance with the outputs from the multiple temperature sensors TS.

[0047] Next, the arrangement of the current supply section (601, hereinafter also referred to as the power supply section) and return section (701, hereinafter also referred to as the current return section) of the first grid-shaped heater (first heater film 202) of this embodiment will be described with reference to Figure 6. Figure 6 is a top view that schematically shows the arrangement of second heaters arranged in areas on multiple grids on the sample stage of this embodiment shown in Figure 5, as well as the power supply section (601) and current return section (701) for each heater. Figure 6 shows an example of the arrangement of the grid heater (first heater film 202) and the power supply section (601) and current return section (701).

[0048] The features of this arrangement method are as follows:

[0049] 1) The connector parts of either the supply section (601) or the feedback point (701) are arranged at the two diagonal corners of each rectangular grid (white circle ○: connection area of ​​the feedback point (701), black circle ●: connection area of ​​the supply section (601)).

[0050] 2) A set of four grid-shaped regions 501, each of which is adjacent to two other regions 501 in the set, with one side of the rectangle facing each other in the front-to-back direction (up-and-down direction in the figure) and the left-to-right direction (left-to-right direction in the same figure), is defined as one set (SET1), and each set (SET1) is provided with one current return section 701 and four power supply sections (also referred to as power supply paths) 601. That is, the four grid-shaped regions 501 are formed by two regions 501 connected together in the front-to-back and left-to-right directions to form a rectangular region as a whole, and the current return sections (also referred to as return paths) 701 are arranged at the corners of each of the four grid-shaped regions 501, which are in the center of the entire region, and the power supply sections 601 of each region 501 are arranged at the corners diagonally opposite the corners where the current return sections 701 are arranged. That is, in one set (SET1) including four grids (one grid corresponds to an area 501), a current return section (701) is arranged in the center and power supply sections (601) are arranged at the four corners. In other words, four film heaters 801 arranged in each of the four areas (CH1-CH4) are treated as one group, and four power supply paths (power supply sections 601) are provided that are electrically connected to one location (A, B, C, D) of each of the film heaters 801 in this group and supply power from a DC power source, and one return path (701) is electrically connected to another location (G) of each film heater and returns the power to the DC power source.

[0051] 3) For this reason, in the first heater 202 in each region 501 of this embodiment, a current flows from a point connected to the connector of the power supply unit 601 arranged at the corner of each of the four regions 501 toward the center or center of the entire region (SET1) consisting of the four regions 501. In other words, as shown by the arrows in Fig. 6, the current is configured to flow from the four corners (corners where the power supply units 601 are arranged) toward the center (portion where the current return unit 701 is arranged), or from the corners (power supply units 601) toward the center (current return unit 701), or from the center (current return unit 701) toward the corners (power supply units 601).

[0052] 4) The connector portions of the power supply section 601 and the connector portions of the current return section 701 are arranged alternately at the boundaries (corners) of the two areas 501 on the boundaries of the grid in the front-to-back and left-to-right directions that divide the areas 501 arranged in a grid pattern.

[0053] 5) In this embodiment, each of the boundaries dividing the grid-shaped regions 501 in the front-to-back and left-to-right directions is arranged through the center of the circular substrate 108 or the top surface of the dielectric film 203. However, at the outer periphery of the circular dielectric film 203, four adjacent rectangular regions 501 cannot be configured as a single group, so three grid-shaped regions 501 are arranged as a set. Such a group of regions 501 or second heater film 202 at the outer periphery may consist of two or three. In other words, at the outer periphery of the heater where a set (SET1) of four grids cannot be formed, the connector portion of the supply unit 601 and the connector portion of the current return unit 701 are arranged in a set (SET2) of three grids.

[0054] 6) The connector portion of the current return section (701) is made of a conductive material and is connected to the substrate 108, which is grounded and electrically held at ground potential, by tungsten via wiring. With this configuration, the current supplied to the first heater film 202 flows through the current return section 701 to the substrate 108, which is held at a constant voltage (ground potential). This reduces the number of through-holes (holes) for accommodating cables that form a return path for returning the current supplied to the first heater film 202 to the power supply, thereby reducing the number of steps and costs required to manufacture the sample stage 120 or the plasma processing apparatus. In other words, because the return current flows through the substrate 108, the number of holes required to be drilled in the substrate 108 for the return current can be reduced. By drilling vias in the substrate 108 and connecting the first heater layer 202 and the substrate 108 with tungsten via wiring, the return current of the heater wire 801 can be collected in the substrate 108.

[0055] Next, a configuration for reversing the polarity of the power supply section 601 of the film-like heater wire 801 constituting the first heater film 202 inside the set (SET1) of four regions 501 will be described with reference to FIGS. 7 and 8. FIG. 7 is a top view schematically illustrating the outline of the configuration of the first heater film 202 of the set (SET1) of four regions on the sample stage 120 shown in FIG. 6. It shows an enlarged view of the heater wire (801) of the first heater 202 in each region 501. FIG. 8 is a diagram schematically illustrating the current flowing through the first heater film 202 between the power supply section 601 and the current return section 701 in the set (SET1) of four regions shown in FIG. 7. FIG. 8 is an equivalent circuit diagram in which the four heater wires 801 shown in FIG. 7 are redrawn as four resistor elements (R1, R2, R3, R4). 8 also shows the relative magnitude of the potential of the power supply part 601 with respect to the potential of the current return part 701 (ground potential in this embodiment) as positive and negative polarities. The positive and negative signs (+, -) and arrangement in Fig. 8 indicate the potential of the power supply part (601) higher than the potential of the return part 701 with "+" and lower with "-".

[0056] As shown in Figures 7 and 8, one set (SET1) is composed of four grids, and the four grids are composed of four regions (CH1, CH2, CH3, CH4) corresponding to four dies of a semiconductor device. One set (SET1) is rectangular in plan view and has four corners (A, B, C, D) and a center point (G). The four corners (A, B, C, D) are arranged clockwise in plan view in the order of a first corner A, a second corner B, a third corner C, and a fourth corner D. Here, the first corner A and the third corner C correspond to a pair of opposing corners. The second corner B and the fourth corner D correspond to another pair of opposing corners.

[0057] The first region CH1 is disposed in a rectangular portion between a first corner A and a center point (G). A power supply part 601 is disposed at the first corner A, and a current return part 701 is disposed at the center point (G). A heater wire (801) is connected between the power supply part 601 at the first corner A and the current return part 701 at the center point (G).

[0058] The second region CH2 is disposed in the rectangular portion between the second corner B and the center point (G). A power supply part 601 is disposed in the second corner B. A heater wire (801) is connected between the power supply part 601 at the second corner B and the current return part 701 at the center point (G).

[0059] The third region CH3 is located in the rectangular portion between the third corner C and the center point (G). A power supply part 601 is located in the third corner C. A heater wire (801) is connected between the power supply part 601 at the third corner C and the current return part 701 at the center point (G).

[0060] The fourth region CH4 is Part D and the center point (G). A power supply part 601 is placed at the fourth corner D. A heater wire (801) is connected between the power supply part 601 at the fourth corner D and the current return part 701 at the center point (G).

[0061] The first region CH1 and the second region CH2 are arranged rotationally symmetrically about the center point (G). Similarly, the first region CH1 and the third region CH3, and the first region CH1 and the fourth region CH4 are also arranged rotationally symmetrically about the center point (G). In other words, the four first to fourth regions (CH1-CH4) are arranged with one side of each rectangle facing the adjacent region.

[0062] In other words, when viewed from above, the current return section 701, which is a return path, is arranged at the point (G) where the four corners of each of the four adjacent rectangular regions (CH1-CH4) are adjacent to each other. Then, in each of the four rectangular regions (CH1-CH4), the power supply section (601), which is a power supply path, is connected to the corners (A, B, C, D) diagonally opposite the corner to which the return path (701) is connected.

[0063] Figure 9 is a schematic diagram showing the relationship between the four corners (first corner cna, second corner cnb, third corner cnc, fourth corner cnd) and four sides (first side SL1, second side SL2, third side SL3, fourth side SL4) of the rectangular region 501 described in Figure 5 and the four regions (first region CH1, second region CH2, third region CH3, fourth region CH4) of Figure 7.

[0064] The second area CH2 is arranged by rotating the first area CH1 by 90 degrees to the right with respect to the center point (G) or the third corner cnc. Therefore, the second side SL2 of the first area CH1 and the second area C H2 Similarly, the third region CH3 is arranged by rotating the second region CH2 by 90 degrees to the right with respect to the center point (G). H2 The second side SL2 of the third region CH3 overlaps with the third side SL3 of the third region CH3. The fourth region CH4 is arranged by rotating the third region CH3 by 90 degrees to the right with respect to the center point (G). H3 The second side SL2 and the fourth area C H4 The third side SL3 of the fourth region overlaps with the Area C H4 The second side SL2 and the first area C H1 The third side SL3 of the first side SL1 overlaps with the third side SL2 of the second side SL2.

[0065] That is, the four first to fourth regions (CH1-CH4) are arranged with one side of each rectangle (second side SL2 and third side SL3) facing the adjacent region (first region CH1 and second region CH2, second region CH2 and third region CH3, third region CH3 and fourth region CH4, fourth region CH4 and first region CH1). The center point (G) is adjacent to the third corners cnc of the four regions (first region CH1, second region CH2, third region CH3, fourth region CH4).

[0066] As shown in Fig. 8, the potential of at least one of the connector portions of the power supply unit 601 located at the diagonally opposite corners (B, D) of the corners (A, B, C, D) of each of the four regions 501 in which the current return unit 701 is disposed is set to a negative potential (-) with respect to the connector portion of the current return unit 701 set to a ground potential (0V). In this embodiment, the polarity of the potential of the connector portion set to a positive potential (+) in two of the power supply units 601 is set to an inverted negative potential (-) in the other two of the power supply units 601. In other words, the potential of at least one location (A, B, C, or D) where each film heater (801) is connected to each of the four power supply units (601) that form the power supply paths is set to be lower (negative potential (-)) than the potential (0V: ground potential) at the location (G) where each film heater (801) is connected to one return path (701).

[0067] As a result, in the set (SET1) of four grids, the currents (I1, I3) flowing from the power supply unit 601, which is set to a positive potential (+), through the first heater film 202 (heater wire 801: resistive elements R1, R3) to the current return unit 701 and the currents (I2, I4) flowing from the current return unit 701 through the first heater film 202 (heater wire 801: resistive elements R2, R4) to the power supply unit 601, which is set to a negative potential (-), are at least partially canceled out. This makes it possible to reduce the current flowing through the return path from the current return unit 701 to the power supply. This reduces the size of the return path, and suppresses an increase in the volume of the sample stage 120.

[0068] Next, a case where the number of power supply parts (601) whose polarity is reversed (the number of power supply parts with a low negative potential (-) relative to the current return part 701) is equal to the number of power supply parts (601) whose polarity is not reversed (the number of power supply parts with a high positive potential (+) relative to the current return part 701) within a set (SET1) of four grid regions 501 will be described using FIGS. 6 and 8. In FIGS. 6 and 8, the direction of the arrow ARM indicates the direction of current flow, and the symbols for electrical resistance have been omitted as appropriate in FIG. 6. In the example of FIGS. 7 and 8, in the set (SET1) of four regions 501, the number of power supply parts 601 with a high potential (+) relative to the current return part 701 (two) is the same as the number of power supply parts 601 with a low potential (0-) (two).

[0069] In such a configuration, it is possible to reduce the return current of the current return section (701) under processing conditions in which the distribution of temperature values ​​during processing in the areas of the die of the semiconductor device on the wafer 109 corresponding to each grid-like area 501 shown in Figures 5 and 6 has rotational symmetry with respect to the center point 108C of the substrate 108.

[0070] This is because, when the temperature conditions during processing of the wafer 109 have rotational symmetry, the heat generation amount of the first heater film 202, which is adjusted for each region 501, also needs to have rotational symmetry in order to heat the wafer 109 and achieve the temperature distribution. Furthermore, when the thermal resistivity of the heater wire 801 of the first heater film 202 is equal or close enough to be considered equal between the regions 501, the current flowing through the first heater 202 in each region 501 also needs to have similar rotational symmetry.

[0071] That is, the set (SET1) of four grid-like regions 501 is arranged with rotational symmetry about the center (G). In this configuration, if the number of power supply units 601 (the number of positive potentials (+)) is equal to the number of power supply units 601 that are not reversed (the number of negative potentials (-)), the magnitudes of the currents (I1, I2, I3, I4) flowing through the heater wires 801 located at positions that are line-symmetric or point-symmetric about the center point G (current return unit 701) are equal, and it is guaranteed that the apparent current flowing through the electrode substrate 108 is half that in the case where the polarity is not reversed.

[0072] Furthermore, the electrode substrate Under conditions where the surface temperature of 108 is uniform over the entire surface (hereinafter referred to as flat temperature conditions), the currents flowing within the set of four grids (SET1) are uniform, and no current flows through the current return section 701.

[0073] Furthermore, in the outer peripheral edge 108P, even in the heater wires 801 at the edge of the electrode where three current return portions 701 are common, the temperatures of the heater wires 801 become almost equal under flat temperature conditions or temperature conditions where the temperature near the center of the electrode is high. In this case, it is expected that the return current of the current return portion 701 can be reduced to about one-third compared to when the polarity is not reversed.

[0074] If polarity reversal is not performed, the current flowing through the electrode substrate 108 increases as the number of heater wires 801 increases. Joule heat is generated in the substrate 108 in proportion to the square of the magnitude of the current flowing through the substrate 108, affecting the temperature control of the wafer 109. Alternatively, a large amount of current flowing through the substrate 108 may pose a risk of electric shock. [Explanation of symbols]

[0075] 101: Vacuum container 104: Processing room 108: Base material 109: Wafer (sample) 120: Sample stage 140: Dielectric film 202: First heater layer 202 501, CH1, CH2, CH3, CH4: Area 601: Power supply unit (power supply path) 701: Current return section (return path) 801: Film heater TS: Temperature sensor SET1: Set of regions A, B, C, D: corner G: Center point

Claims

1. a processing chamber disposed within the vacuum vessel, in which a wafer to be processed is placed and plasma is generated; a cylindrical sample stage disposed within the processing chamber and on whose upper surface the wafer is placed; a first heater layer disposed inside a dielectric film covering an upper surface of the disk-shaped substrate of the sample stage, the first heater layer including a plurality of film-shaped heaters disposed in each of a plurality of rectangular regions; a plurality of temperature sensors disposed within the substrate below the rectangular shaped region of the first heater layer; Equipped with the plurality of regions includes four regions each arranged with one side of the rectangular shape facing an adjacent region, A plasma processing apparatus comprising a plurality of groups, each group consisting of the film-shaped heaters arranged in each of the four regions, one return path arranged in the center of each group and electrically connected to one point on the film-shaped heaters in each of the four regions included in the group, through which power supplied from a DC power source returns to the DC power source, and four power supply paths electrically connected to different points on each of the film-shaped heaters and supplying the power from the DC power source.

2. 2. The plasma processing apparatus according to claim 1, a second heater layer; The second heater layer is provided with a plurality of film-shaped heaters arranged inside the dielectric film above the first heater layer, in each of a plurality of radial regions including a circular region arranged concentrically around the center on a plurality of radii extending from the center of the top surface of the substrate of the sample stage toward the outer periphery, and a ring-shaped region surrounding the outer periphery of the circular region.

3. 3. The plasma processing apparatus according to claim 1, The plasma processing apparatus is configured such that the return path is made of a conductive material and is connected to the substrate, which is at ground potential.

4. 4. The plasma processing apparatus according to claim 3, the return paths are arranged at locations where four corners of the four adjacent regions are adjacent to each other when viewed from above, In each of the four regions, the power supply path is connected to a corner diagonally opposite to the corner to which the return path is connected.

5. 3. The plasma processing apparatus according to claim 1, a control unit that adjusts the output of the film-like heater that constitutes the first heater layer in accordance with outputs from the plurality of temperature sensors;

6. 3. The plasma processing apparatus according to claim 1, a control unit that adjusts outputs of the film-like heaters that constitute the first heater layer in response to outputs from the temperature sensors; A plasma processing apparatus in which the potential at at least one point where each of the film heaters is connected to each of four power supply paths is lower than the potential at a point where each of the film heaters is connected to one return path.

7. 3. The plasma processing apparatus according to claim 2, A plasma processing apparatus comprising: a control unit that adjusts the output of the film heater located within one of the rectangular regions of the first heater layer while maintaining the output of the heater of the second heater layer located above one of the rectangular regions in accordance with the outputs from the plurality of temperature sensors.

8. 3. The plasma processing apparatus according to claim 2, A plasma processing apparatus, wherein the thickness of the plurality of film-shaped heaters in the second heater layer is greater than the thickness of the plurality of film-shaped heaters in the first heater layer.

Citation Information

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