Antenna-assisted ReRAM formation

Abstract

The memory structure comprises a ReRAM module embedded in a substrate. An insulating layer is formed on the substrate. A first electrode is disposed on the insulating layer. The first electrode is proximate and connected to a first end of the ReRAM module and comprises a first surface area. A second electrode is disposed on the insulating layer. The second electrode is proximate and connected to a second end of the ReRAM module. The second electrode comprises a second surface area, a plasma-interactive component, and a resistive component. The resistive component is disposed between the plasma-interactive component and the ReRAM module. A ratio of the first surface area to the second surface area generates a voltage between the first electrode and the second electrode when the first surface area and the second surface area are exposed to an application of plasma. The voltage forms a conductive filament within the ReRAM module.

Description

[Technical Field]

[0001] The present disclosure relates to memory modules, and more particularly to forming ReRAM modules. [Background technology]

[0002] Random access memory (referred to herein as "RAM") is a class of memory used in computer storage systems. RAM comes in several forms, many of which are useful for fast access of information in and out of the processor cache. Thus, some types of RAM reside on system boards, such as the motherboard. These types of RAM can store information in different ways, depending on the RAM format. Some types store a single bit of information (e.g., a "1" or a "0"), for example, by changing the state of a transistor-capacitor pair within a RAM cell. Other types store a single bit of information by changing the state of electrical resistance across a RAM cell. Summary of the Invention

[0003] Some embodiments of the present disclosure can be exemplified as a method for forming a ReRAM conductive filament. The method includes exposing a first electrode to an applied plasma. The first electrode is connected proximate to a first end of a ReRAM module. The method further includes exposing a second electrode to the applied plasma. The second electrode is connected proximate to a second end of the ReRAM module. The second electrode comprises a plasma-interacting component and a resistive component disposed between the plasma-interacting component and the ReRAM module. Exposing the first and second electrodes to the applied plasma generates a voltage between the first and second electrodes, which generates a conductive filament in the ReRAM module.

[0004] Some embodiments of the present disclosure can be exemplified as a memory structure. The memory structure includes a ReRAM module embedded in a substrate. The memory structure also includes an insulating layer on a surface of the substrate. The memory structure also includes a first electrode on the surface of the insulating layer. The first electrode is connected proximate to a first end of the ReRAM module and includes a first surface area. The memory structure also includes a second electrode on the surface of the insulating layer. The second electrode is connected proximate to a second end of the ReRAM module. The second electrode includes a second surface area, a plasma-interactive component, and a resistive component disposed between the plasma-interactive component and the ReRAM module. A ratio between the first surface area and the second surface area generates a voltage between the first electrode and the second electrode when the first surface area and the second surface area are exposed to an applied plasma. The voltage forms a conductive filament within the ReRAM module.

[0005] Some embodiments of the present disclosure may be exemplified as a memory structure including a ReRAM module having first and second ends. The memory structure also includes a substrate. The memory structure also includes a recess in an insulating layer. The recess defines a contour of a first antenna electrode and a contour of a second antenna electrode.

[0006] The above summary is not intended to describe each illustrated embodiment or every implementation of the present disclosure.

[0007] The drawings included in this application are incorporated into and form a part of this specification. These drawings illustrate embodiments of the present disclosure and, together with the description, serve to explain the principles of the disclosure. The drawings are merely illustrative of particular embodiments and are not intended to limit the disclosure. [Brief explanation of the drawings]

[0008] [Figure 1A] FIG. 1 is a first side view of an antenna structure that can be used to form a conductive filament in a ReRAM module, according to an embodiment of the present disclosure. [Figure 1B] 1 is a top view of an antenna structure that can be used to form conductive filaments in a ReRAM module, according to an embodiment of the present disclosure. FIG. [Figure 1C] FIG. 10 is a second side view of the antenna structure during formation of the conductive filament in the ReRAM module according to an embodiment of the present disclosure. [Figure 1D] FIG. 10 is a third side view of the antenna structure after forming a conductive filament in a ReRAM module and removing the antenna electrode according to an embodiment of the present disclosure. [Figure 1E] FIG. 1B is a top view of a memory structure after removing an antenna electrode, according to an embodiment of the present disclosure. [Figure 2] 1 is a method of using an antenna structure to form a conductive filament in a ReRAM module according to an embodiment of the present disclosure. [Figure 3] 1 is a method of forming an antenna structure that can be used to form conductive filaments in a ReRAM module, according to an embodiment of the present disclosure. [Figure 4A] 1 is a side view of a first stage of forming an antenna structure that can be used to form conductive filaments in a ReRAM module, according to an embodiment of the present disclosure. FIG. [Figure 4B] FIG. 10 is a side view of a second stage of forming an antenna structure that can be used to form conductive filaments in a ReRAM module, according to an embodiment of the present disclosure. [Figure 4C] FIG. 10 is a side view of a third stage of forming an antenna structure that can be used to form conductive filaments in a ReRAM module, according to an embodiment of the present disclosure. [Figure 4D] FIG. 10 is a side view of a fourth stage of forming an antenna structure that can be used to form conductive filaments in a ReRAM module, according to an embodiment of the present disclosure. [Figure 4E] FIG. 10 is a side view of a fifth stage of forming an antenna structure that can be used to form conductive filaments in a ReRAM module, according to an embodiment of the present disclosure. [Figure 5] FIG. 1B is a top view of an insulating layer overlain by a recess displaying the jagged shape of a resistive component, according to an embodiment of the present disclosure. [Figure 6] FIG. 1B is a top view of an insulating layer overlain by a recess displaying the spiral-shaped outline of a resistive component, according to an embodiment of the present disclosure. [Figure 7] 1 is a block diagram of exemplary major components of a computer system that may be used in accordance with an embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0009] While the invention is susceptible to various modifications and alternative forms, specifics thereof have been shown by way of example in the drawings and will be described in detail. It is to be understood, however, that it is not intended to limit the invention to the particular embodiments described. On the contrary, it is intended to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention.

[0010] Aspects of the present disclosure relate to memory modules, and more particularly to forming ReRAM modules. The present disclosure is not necessarily limited to such applications, but various aspects of the present disclosure may be understood through a discussion of various examples using this context.

[0011] Random access memory (referred to herein as "RAM") is a form of computer memory that can store information for rapid retrieval by another computer component, such as a processor. For example, RAM is found in the cache memory of many processors and is used as the main memory in many computer systems. The structure of RAM and the process by which it stores information differ based on the form of RAM used. For example, RAM used in processor cache may take the form of a six-transistor memory cell, while RAM used for system memory may take the form of a transistor-capacitor cell. In a typical RAM format, the cell can store one bit of information, and the state of the cell (e.g., charged or uncharged) can be used to set the bit on or off (also known as setting the bit to "true" or "false," "1" or "0," etc.).

[0012] For example, in resistive random access memory (referred to herein as "ReRAM"), the memory cell takes the form of a dielectric solid material, sometimes referred to as a "memristor." For example, a ReRAM module may take the form of an oxide layer disposed between two electrodes in a memory stack. While typically non-conductive, the formation of oxide defects in this oxide layer can change the material's resistance and make it conductive. These oxide defects, sometimes called "oxygen vacancies," represent locations of oxide bonds where oxygen has been removed (typically migrating to other parts of the oxide layer). When these defects form in a continuous path (sometimes called a "filament") between the two ends of a memristor, the electrical resistance between these two ends can be significantly reduced. Furthermore, when an electric field of a certain voltage is subsequently applied to the memristor, the oxygen previously removed from the oxide bond location (i.e., the oxygen vacancy location) can migrate back to the oxide bond location. When this occurs, the "filament" deforms, and the electrical resistance across the memristor again significantly increases. This process is reversible. Thus, by applying an electric field of a particular voltage to the memristor, the memristor can be switched between a high resistance state and a low resistance state.

[0013] Thus, in ReRAM, an electrical charge can be applied to a memory module to switch the electrical resistance of the module between a first resistance value (sometimes called "high resistance") and a second resistance value (sometimes called "low resistance"). The state of the module can be used to store information. For example, the state of its memristor can be used to store a bit of information by setting each state to either 1 or 0 (e.g., a high resistance state is set to "1" and a low resistance state is set to "0").

[0014] Unlike some other types of RAM, ReRAM is considered non-volatile, meaning that it does not lose its stored information even when power is removed. In other words, ReRAM's state (high or low resistance) is stable when power is removed from a computer system. This gives ReRAM potential advantages in longer-term storage, such as replacing (or complementing) hard disk drives and solid-state drives. If successfully applied to long-term storage, ReRAM could significantly improve computer system storage due to ReRAM's low read latency and high write speed compared to other long-term storage solutions.

[0015] However, difficulties in forming ReRAM can make its use in storage systems difficult, if not entirely impossible. For example, as explained, for ReRAM to form, a voltage sufficient to form a continuous path of oxide defects (i.e., a conductive filament) must be applied across the ReRAM module. This "sufficient voltage" is sometimes referred to as the formation voltage.

[0016] Unfortunately, the formation voltage of a typical ReRAM module is often significantly higher than the voltage required to switch the ReRAM between resistance states after the conductive filaments have formed. For example, a typical ReRAM module may be designed to operate at a voltage similar to other memory systems (e.g., 1.2 volts). However, forming the conductive filaments in such a ReRAM module may require applying a voltage (i.e., the formation voltage) of more than 4 volts to the ReRAM module. Furthermore, applying this formation voltage typically requires applying the voltage through the same paths (e.g., through the bit lines and word lines) that will switch the ReRAM between states when used in a system. In other words, the formation voltage must, in some applications, be applied through the ReRAM module's final circuit design and associated connections to the system.

[0017] Unfortunately, applying a forming voltage (e.g., 4 V) through circuitry designed only to handle the memory's switching voltage (e.g., 1.2 V) can cause damage to the circuit. For example, in a typical complementary metal-oxide-semiconductor (sometimes called "CMOS") system, applying a voltage significantly higher than the voltage for which the circuit is designed can create a short circuit across the conductive channel between the gate and the conductive channel, or between the source and drain. In cutting-edge systems with very small components, high voltages can also damage contacts and wires. Therefore, incorporating ReRAM modules into memory circuits often requires efforts to mitigate these adverse effects.

[0018] For example, one way to mitigate the potential damage caused by high voltages is to design memory circuits to be more robust. This typically involves, for example, including thicker wires, thicker insulating layers, and wider gate pitches. In other words, it may be possible to make the components of the memory circuit larger. Unfortunately, most modern systems attempt to utilize small, narrow-gate circuits due to the performance advantages and increased component density they offer. For this reason, using larger circuits in high-performance devices is often less desirable, and the benefits of ReRAM may be offset by the drawbacks of designing circuits large enough and robust enough to withstand ReRAM's formation voltages.

[0019] Another method to mitigate potential damage from the formation voltage is to include an "oxygen vacancy" reservoir within the ReRAM module near the intended conductive filament. Such a reservoir can generate a strong diffusion force, rapidly directing oxygen vacancies to the location of the conductive filament when the formation voltage is applied. In other words, a reservoir of oxygen vacancies (i.e., the location of the oxide bond where oxygen has been removed) can rapidly direct oxygen from the intended location of the conductive filament to the reservoir when a voltage is applied. Unfortunately, this method can be difficult to control the formation of the filament, resulting in several drawbacks.

[0020] First, the reservoir can rapidly form a channel, potentially lowering the resistance of the conductive filament and increasing the voltage required to "close" the filament when using the ReRAM. In other words, the conductive filament can form quickly and widely enough that very high voltages may be required to switch the ReRAM's state during normal operation. In some cases, the conductive filament can form wide enough that the switching voltage becomes high enough to damage other components in the system. This not only renders the ReRAM unusable in normal systems, but also defeats the purpose of the oxygen vacancy reservoir.

[0021] Furthermore, even if the filament is formed correctly, the oxygen vacancy reservoir typically remains in place after formation. Therefore, diffusion forces that reduce the effort required to form the conductive filament are often still present during normal operation of a ReRAM module. As a result, when a switching voltage is applied to the ReRAM to change the memory state, more oxygen diffuses into the oxygen vacancy reservoir than when the conductive filament was initially formed, potentially forming new defects in the conductive filament. In other words, the presence of oxygen vacancy reservoirs can cause the ReRAM's conductive filament to widen during memory operation. This can be caused by normal operation of the ReRAM, but it can be significantly worse if a voltage slightly greater than the ReRAM's switching voltage is accidentally applied. For example, if the ReRAM's switching voltage is 1.2 V, applying a voltage of 1.200 V can cause the conductive filament to widen slightly. However, accidentally applying 1.21 V (due to power supply fluctuations, for example) can cause the conductive filament to widen more significantly. Therefore, the presence of oxygen vacancies can not only cause ReRAM modules to fail after repeated use, but also makes the ReRAM module more susceptible to high voltages.

[0022] Unfortunately, as the conductive filament widens, it also becomes more susceptible to the current carrying the switching voltage. As a result, as the conductive filament widens, it becomes more likely to widen again when the switching voltage is reapplied. This can result in a feedback loop where the filament widens at an increasingly faster rate as the ReRAM is used, eventually widening to the point where switching the ReRAM requires a voltage high enough to damage the circuit.

[0023] For these reasons, a mechanism is desired that can apply formation voltages to ReRAM modules without relying on more robust (i.e., larger) circuit components than necessary for circuit operation and without relying on oxygen vacancy reservoirs to reduce switching voltages.

[0024] To address the above issues, some embodiments of the present disclosure utilize an antenna system to form conductive filaments within the ReRAM module during the formation of the RAM stack, rather than after formation. In some embodiments, the voltage applied through the antenna can be higher than the voltage the rest of the circuitry is designed to withstand, allowing high formation voltages to be applied to the ReRAM module without risking damage to the rest of the circuitry. In some embodiments, the antenna system can be removed after the formation of the conductive filaments, preventing the antenna's persistent effects from affecting the ReRAM module during normal operation.

[0025] In some embodiments, for example, two electrodes are formed on an insulating layer on a substrate in which (or under) the ReRAM module is embedded. Each electrode may be electrically connected to opposite ends of the ReRAM module. The two electrodes may be unequal in size on the surface of the insulating layer, resulting in uneven exposed surface areas when the structure is viewed from above. In some embodiments, the electrodes may be exposed to a plasma from above. As a result, one electrode may be more exposed to the plasma than the other, creating a voltage between the two electrodes. Because the electrodes are connected to opposite ends of the ReRAM module, this voltage can cause a current to flow through the ReRAM module between the two ends, thereby displacing oxygen in the oxide bonds away from the voltage path. In other words, oxygen vacancy defects may form throughout the ReRAM module, potentially creating conductive filaments.

[0026] Unfortunately, the current generated by applying plasma can be difficult to control. Unlike electronically generated current, the current generated by the collision of plasma with two electrodes is not naturally limited. At the beginning of the process, a very small current may flow between the electrodes due to the high resistance of the ReRAM module. However, as defects accumulate within the ReRAM module, the resistance decreases, allowing a higher current to flow at the generated voltage. This higher current causes oxygen vacancy defects to form more quickly, and the resistance of the ReRAM module also increases more rapidly. Therefore, the uncontrolled current generated by applying plasma can result in a positive feedback loop, which can rapidly increase the current within the ReRAM module and cause the conductive filament to become undesirably large.

[0027] For this reason, some embodiments of the present disclosure include a resistive component in the design of the electrodes that interact with the plasma application. For example, in some embodiments of the present disclosure, the first electrode is designed with a larger surface area than the second electrode, thereby allowing current to flow from the first electrode to the second electrode. In some embodiments, the second electrode includes a plasma-interactive component and a resistive component. In these embodiments, the resistive component may be disposed between the ReRAM module and the plasma-interactive component so that the current generated by the application of plasma to the plasma-interactive component passes through the resistive component. Furthermore, since the ratio of the surface area of ​​the first electrode to the surface area of ​​the second electrode can be kept constant during plasma application, the voltage generated during application can be kept constant if the intensity of the plasma application is kept constant. In this way, the voltage of the current and the resistance of the resistive component can be kept constant, thereby limiting the current flowing through the ReRAM module to a maximum value. If this maximum value is sufficiently low, a positive feedback loop during the formation of the conductive filament can be prevented.

[0028] In some embodiments, the resistive component may take the form of a thin winding portion of the electrode. For example, the resistive component may resemble a metal wire (e.g., stripline wire) that follows a circuitous path on the surface of an insulating layer between the plasma-interactive component of the electrode and a contact connecting the electrode to the interior of the substrate. In some embodiments, this contact may be formed on the surface of the substrate and considered part of the electrode; in other embodiments, the contact may be formed before the electrode. For example, the contact may be embedded in an oxide layer on which the electrode is formed, or may take the form of a conductive via plug connecting the electrode to the interior of the substrate.

[0029] In some embodiments, the dimensions of the resistive component may be manipulated to achieve a desired resistance value. For example, the length of the resistive component may be increased to increase the component's resistance. In other words, the resistance of the resistive component may be increased by increasing the amount of resistive component through which current must flow. This can be likened to making a wire longer. Similarly, the resistance of the resistive component may be increased by decreasing the average (or minimum) width of the resistive component over its length. This can be likened to making a wire thinner. Finally, the resistance of the resistive component may be increased by decreasing the height of the resistive component (i.e., the distance between the insulating layer and the top of the resistive component). This can also be likened to making a wire thinner. These three dimensions can be varied to adjust the resistance of the resistive component, while also preventing the surface area of ​​the insulating layer required for the resistive component from negatively limiting the surface area available for the first and second electrodes.

[0030] In some embodiments, manipulating the dimensions of the resistive element as described can result in a resistive element that takes the form of a circuitous path between the plasma-interactive component and the contact connecting the electrode to the interior of the substrate. For example, the resistive element can take the form of a serpentine shape that runs back and forth over the surface of the substrate, a jazzed "zigzag" shape, a spiral shape, a curve, etc. In most embodiments, the exact shape of the resistive element may not be important, provided that the dimensions of the resistive element result in the desired resistance value.

[0031] In some embodiments, once the conductive filament is formed, the two electrodes of the antenna may be removed from the insulating layer. For example, a chemical etching process can be used to remove the metal of the two electrodes without removing the surface of the insulating layer. Once these electrodes are removed, the remainder of the RAM structure can be constructed (e.g., including adding substrate layers and electrical connections between the ReRAM module and the bit lines and word lines). By removing the antenna before completing the RAM structure, any adverse effects (e.g., capacitance effects) that the antenna structure may have on the completed structure can be avoided. Thus, embodiments of the present disclosure may include incorporating antenna structures as large and complex as necessary to generate the conductive filament without concern that the antenna structure may adversely affect the memory module after formation.

[0032] 1A shows a first side view of an antenna structure that can be used to form conductive filaments in a ReRAM module according to an embodiment of the present disclosure. FIG. 1A shows a view of a memory structure 100 (e.g., a RAM stack) during construction of the structure, which may be before all layers of the structure have been added.

[0033] Memory structure 100 includes two substrate layers, layers 102 and 104. Substrate layers 102 and 104 may be composed of an insulating material such as, for example, a fiberglass-resin composite. Substrate layer 102 is separated from substrate layer 104 by insulating layer 106, which may have embedded therein electrical contacts between the two layers. Substrate 104 includes insulating layer 108 formed thereon. Like insulating layer 106, insulating layer 108 may include embedded electrical contacts therein. Insulating layers 106 and 108 may take the form of, for example, silicon dioxide layers.

[0034] The memory structure 100 also includes a ReRAM module 110. The ReRAM module 110 may take the form of a memristor, for example, an oxide layer buried in the substrate 104. Thus, before oxide vacancy defects form in the ReRAM module 110, the ReRAM module 110 may be highly resistant to electrical current.

[0035] The memory structure also includes electrodes 112 and 114 electrically connected to the ReRAM module 110. Electrode 112 includes a single component, while electrode 114 includes three components, as shown: a plasma-interacting component 116, a resistive component 118, and a contact component 120. In some embodiments, all components of electrodes 112 and 114 may be constructed of the same metallic material and may be formed by etching away a pattern from a single sheet of that metallic material. Furthermore, although plasma-interacting component 116 is illustrated in FIG. 1A as including two portions, these are actually two regions of the same component that appear separate in FIG. 1A due to the cross-sectional nature of FIG. 1A. This is presented more clearly in FIG. 1B.

[0036] The electrode 112 is proximally connected to the top end of the ReRAM module 110 as shown. As used herein, the term "proximally connected" describes a connection between two components in relation to the rest of one of those components. For example, the electrode 112 can be described as being proximally connected to the top end of the ReRAM module 110 compared to the bottom end of the ReRAM module 110 because the electrode 112 is more directly connected to the top end of the ReRAM module 110 than to the bottom end. Thus, even though the electrode 112 may have electrical connections to both the top and bottom ends of the ReRAM module 110 (especially after formation of the conductive filament), the electrode 112 is electrically connected more directly to the top end than to the bottom end. Therefore, for this reason, the electrode 114 is proximally connected to the bottom end of the ReRAM module 110 as shown.

[0037] The connection between the electrode 112 and the ReRAM module 110 is via a contact pad 122 and a conductive plug 124. The connection between the electrode 114 and the ReRAM module 110 is via a contact component 120, a contact pad 126, a conductive plug 128, a contact pad 130, a wire 132, and a contact pad 134. Note that these connection details are not intended to be limiting. Rather, in various embodiments and implementations, these connection paths may include fewer or more components, depending on the implementation. For example, while a contact pad 130 is illustrated in the memory structure 100, in some embodiments, the contact pad 130 may be omitted and the conductive plug 128 may span the entire distance between the contact pad 126 and the wire 132.

[0038] FIG. 1B illustrates a top view of the memory structure 100, showing an antenna structure that can be used to form conductive filaments in a ReRAM module, according to an embodiment of the present disclosure. As shown in FIG. 1B, the electrode 112 includes a surface area significantly smaller than that of the electrode 114. Furthermore, because the electrodes 112 and 114 do not contact each other on the insulating layer 108, electrical connection between the electrodes 112 and 114 is via connecting components (including the ReRAM 110) embedded within and below the insulating layer 108. For these reasons, when both the electrodes 112 and 114 are exposed to the application of plasma from "above," a current can flow from the electrode 114 to the electrode 112 through those connecting components. The voltage of this current may be primarily determined by the ratio of the surface areas of the electrodes 112 and 114 exposed to the application of plasma.

[0039] As such, electrodes 112 and 114 are designed to have different surface areas. Specifically, electrode 114 comprises a surface area significantly greater than that of electrode 112. Furthermore, while resistive component 118 and contact component 120 contribute to the surface area of ​​electrode 114, the majority of the surface area comprised by electrode 114 is found in plasma-interactive component 116. As such, the ratio of the surface area of ​​electrode 112 to that of electrode 114 is significantly affected by the relative sizes of electrode 112 and plasma-interactive component 116. Thus, the effect of plasma application on plasma-interactive component 116 contributes significantly more to the generation of voltage between electrodes 112 and 114 than the effect of plasma application on resistive component 118 and contact component 120. For this reason, plasma-interactive component 116 is specifically referred to as "plasma-interactive," even though resistive component 118 and contact component 120 also interact with the plasma application.

[0040] As mentioned above, the current flowing between the electrodes 112 and 114, unlike the current originating from a power source, can be difficult to control. For this reason, a resistive component 118 is disposed between the plasma-interacting component 116 and the ReRAM module 110. The resistive component 118 can take the form of a circuitous path (similar to a serpentine wire) between the plasma-interacting component 116 and the contact component 120. As a result, the current flowing from the plasma-interacting component 116 to the ReRAM module 110 is limited by the resistance of the resistive component 118. Therefore, in embodiments in which the majority of the current flowing through the ReRAM module 110 comes from the plasma-interacting component 116 (i.e., embodiments in which the plasma-interacting component 116 is significantly larger than the resistive component 118, the contact component 120, and the electrode 112), the resistive component 118 can be used to set the maximum value of the current reaching the ReRAM module 110. For this reason, some embodiments of the present disclosure can attempt to minimize the surface area of ​​the resistive component 118 and the contact component 120 relative to the plasma-interacting component 116. This can prevent a positive feedback loop from occurring during the formation of the conductive filament in the ReRAM module 110.

[0041] FIG. 1C shows a second side view of the memory structure 100 during the formation of conductive filaments in the ReRAM module 110 according to an embodiment of the present disclosure. In FIG. 1C, the top surface of the memory structure 100 is exposed to the application of plasma 136. The plasma 136 strikes the electrodes 112 and 114, causing a current to flow between the two electrodes at a specific voltage. This current is illustrated by flow lines 138 extending from the plasma-interacting component 116 to the electrode 112. The voltage of this current may be determined by the intensity of the plasma 136 and the ratio of the surface area of ​​the electrode 114 exposed to the plasma to the surface area of ​​the electrode 112 exposed to the plasma. Specifically, as the intensity of the plasma increases, the voltage tends to increase. Similarly, as the ratio of the surface area of ​​the electrode 114 to the surface area of ​​the electrode 112 increases, the voltage increases. However, the current generated by exposure to the plasma 136 may be limited by the resistive component 118. Specifically, the current may be approximately the voltage of the current divided by the resistance of resistive component 118 .

[0042] In some examples, the desired resistance value (i.e., low resistance state) of the ReRAM module 110 when the conductive filament is formed can be known before the filament is formed. For example, experimental testing may suggest that a ReRAM module of a particular resistance can be easily switched by applying an electric field, while a ReRAM module having a resistance lower than the particular resistance may be difficult or impossible to switch. In these examples, this desired resistance value (sometimes referred to as a “target resistance value”) may be used as a reference for setting the resistance of the resistive component 118. In other words, the resistive component 118 may be designed to include a resistance of at least the target resistance value. If the resistance value of the resistive component 118 exceeds the target resistance value, the current flowing through the ReRAM module 110 should be small enough so that the resistance of the ReRAM module 110 is equal to or greater than the target resistance value. Thus, some embodiments may include designing the resistive component with dimensions such that, at a voltage generated by application of the plasma 136, the resistive component 118 includes a resistance at least as great as the target resistance value.

[0043] 1C also discloses that the oxygen vacancy defects 140 partially form conductive filaments in the ReRAM module 110. As shown, the oxygen vacancy defects 140 do not yet span the entire distance between the top end of the ReRAM module 110 and the bottom end of the ReRAM module 110. However, if the plasma 136 continues to be applied, the oxygen vacancy defects 140 will continue to spread within the ReRAM module 110 along the path of the flow lines 138 until the resistance of the ReRAM module 110 through the conductive filaments is approximately equal to the resistance of the resistive component 118.

[0044] 1D shows a third side view of the memory structure 100 after forming conductive filaments in the ReRAM module 110 and removing the antenna electrodes 112 and 114, according to an embodiment of the present disclosure. As shown, the oxygen vacancy defects 140 now span the entire distance between the top and bottom ends of the ReRAM module 110. Furthermore, the width of the area covered by the oxygen vacancy defects 140 and the concentration of defects within that area are sufficiently high that the resistance of the ReRAM module 110 in its current state has reached a target resistance value (i.e., a value at which it is feasible to switch the ReRAM module 110 between a high resistance state and a low resistance state).

[0045] Once the resistance of the ReRAM module 110 reaches this state, the resistance of the ReRAM module 110 and the resistance of the resistive component 118 become approximately equal, limiting further growth of the conductive filament (i.e., limiting new oxygen vacancy defects), and therefore, the application of the plasma may be terminated at that point.

[0046] 1D , electrodes 112 and 114 have been removed, but contact pads 122 and 126 are shown as still embedded within insulating layer 108. Contact pads 122 and 126 may not be necessary for the formation or operation of memory structure 100 after the formation of the conductive filaments within ReRAM module 110. However, in some embodiments, contact pads 122 and 126 may be retained because retaining contact pads 122 and 126 within memory structure 100 is unlikely to significantly affect the operation of memory structure 100 after it is fully formed. Furthermore, because contact 122 is connected proximate to the top end of ReRAM module 110 relative to the bottom end, because contact 126 is connected proximate to the bottom end of ReRAM module 110 relative to the top end, and because both contact 122 and contact 126 are embedded within the same insulating layer 108, the unique "U" shaped design between contact 122, conductive plug 124, ReRAM module 110, contact pad 134, wire 132, contact pad 130, conductive plug 128, and contact 126 may also be retained in the final formation of memory structure 100.

[0047] Furthermore, because some areas of insulating layer 108 were not covered by electrodes 112 and 114 during the application of plasma 136 and the etching of electrodes 112 and 114, these areas of insulating layer 108 were similarly exposed to plasma 136 and etching. Either or both of these exposures may cause damage or corrosion of insulating layer 108. As a result, insulating layer 108 contains depressions in these areas. In FIG. 1D , this is illustrated by depression location 142. While these appear to be multiple depressions, as illustrated in FIG. 1E , they are actually all located on the same depression. Because this depression arises from the portion of insulating layer 108 not covered by electrodes 112 and 114, depression 142 assumes the contours of the shape of the first electrode and the contours of the shape of the second electrode. Indeed, by comparing FIGS. 1D and 1C , it becomes clear that depression 142 occurs in the gap between electrodes 112 and 114 and at the location of resistive element 118 (as shown).

[0048] FIG. 1E shows a top view of memory structure 100 after removal of the antenna electrode. Accordingly, FIG. 1E illustrates overall recesses 142 in insulating layer 108, which may result from one or more of exposure to plasma 136 in FIG. 1C and exposure to the etching process between FIGS. 1C and 1D. As can be seen by comparing FIG. 1E with FIG. 1B, the portions of insulating layer 108 that were covered by electrodes 112 and 114 are not exposed and are not recessed. However, the exposed portions of insulating layer 108 that were visible in FIGS. 1A-1C are illustrated as recesses 142 in FIG. 1E. Therefore, recesses 142 exhibit the contours of the shapes of electrodes 112 and 114. Notably, the contours of the shape of electrode 114 include the contours of the shape of resistive element 118, which are illustrated here as contour 144. Contour 144 indicates the shape of resistive element 118 before etching. Contour 144 takes the form of the contour of a circuitous path between the non-recessed majority of insulating layer 108 and contact 126. As shown, this circuitous path moves back and forth across the recess, although other patterns of circuitous paths are possible and consistent with embodiments of the present disclosure.

[0049] 1E also shows a top view of contacts 122 and 126 recessed within portions of insulating layer 108 that were covered by electrodes 112 and 114. Note that, like contacts 122 and 126, recess 142 is unlikely to significantly affect the operation of memory structure 100 once fully formed. As such, recess 142 may be retained within insulating layer 108 in the final form of memory structure 100.

[0050] Once the resistance of the ReRAM module reaches a target resistance value, the ReRAM module may be implemented into a functioning memory structure, which may include, for example, connecting a first end of the ReRAM module to a memory cell transistor.

[0051] As shown in FIG. 1D , electrodes 112 and 114 are etched away from oxide layer 108. This may be done by a chemical etching process. As a result, memory structure 100 can be incorporated into larger memory structures without concern that electrodes 112 and 114 may cause capacitance issues within memory structure 100. This may be beneficial to avoid signal degradation and overshoot due to electrode capacitance. Thus, although removing electrodes 112 and 114 may be an extra process that requires time, is expensive, and may introduce potential errors, removing the electrodes may be beneficial overall.

[0052] 2 illustrates a method 200 of using an antenna structure to form conductive filaments in a ReRAM module according to an embodiment of the present disclosure. An understanding of method 200 may be useful in understanding the embodiments disclosed with respect to FIGS. 1A-1D.

[0053] Method 200 begins at block 202, where an electrode antenna is formed. In some embodiments, for example, this can include applying a metal foil to the surface of a substrate (or stack of substrates) or an insulating layer disposed thereon, and etching away any metal not covered by the protective layer. The layer of metal remaining after etching can include a first electrode that connects proximate to a first end of the ReRAM module and a second electrode that connects proximate to a second end of the ReRAM module. One of the electrodes can also include a resistive component, which can take the form of a wound metal wire between a majority of the electrode and the ReRAM module. This resistive component can also be formed during the etching process.

[0054] In block 204, the electrodes are exposed to the application of a plasma. In some embodiments, the application of the plasma can generate a current that flows between the two electrodes and through the internal ReRAM module. The voltage of the current may depend on the intensity of the plasma application and the relative surface areas of the two electrodes. The current itself can be limited by a resistive component in one of the electrodes, preventing a positive feedback loop while a conductive filament is formed.

[0055] In block 206, the system monitoring method 200 determines whether a target resistance for the ReRAM module has been reached. This can be done in several ways, but may include testing the current flowing through the ReRAM module. If the system determines that the resistance of the ReRAM module is too low, the system may return to block 204. However, if the system determines that the ReRAM module has reached the target resistance, the system may stop applying the plasma in block 208. At this point, a conductive filament should be formed between the first and second ends of the ReRAM module with a conductive resistance that switches the state of the ReRAM module (i.e., from high resistance to low resistance).

[0056] Once the plasma application is stopped in block 208, the electrode antenna is removed in block 210. In some instances, removing the electrode antenna prevents undesirable capacitive effects in the memory structure after the memory structure is completed. However, block 210 represents additional processing that may not be necessary or beneficial in all instances, and therefore, in some implementations of method 200, block 210 may be omitted.

[0057] At this point, the ReRAM module may include conductive filaments that, in the low resistance state, still exhibit a high enough resistance to easily switch between low and high resistances. The ReRAM module may then be ready to be incorporated into a functioning memory structure. This may include, for example, connecting the end of the ReRAM module contacting the first electrode to a memory cell transistor in the memory structure.

[0058] FIG. 3 illustrates a method 300 for forming an antenna structure that can be used to form conductive filaments in a ReRAM module according to an embodiment of the present disclosure. Method 300 begins at block 302, where a ReRAM module is integrated into a memory structure (e.g., into a substrate of the memory structure). Method 300 also includes, at block 304, forming a connection between the ReRAM module and a first contact. In some embodiments, this first contact may be embedded in an insulating layer (e.g., an oxide layer) formed on the substrate on which the ReRAM module is integrated. In some embodiments, a via plug may span the distance within the substrate between the first contact and the ReRAM module. In some embodiments, the first contact may be in close proximity to a first end of the ReRAM module.

[0059] The method 300 also includes forming an electrical connection between the ReRAM module and a second contact at block 306. Like the first contact, the second contact may be embedded in an insulating layer formed over the substrate. In some embodiments, a set of contacts, wires, and via plugs may be used to form the electrical connection between the ReRAM and the second contact. In some embodiments, the second contact may be proximate to a second end of the ReRAM module.

[0060] Once the connections between the ReRAM module and the first and second contacts are formed, a metal layer can be deposited in block 308 on the insulating layer in which the first and second contacts are embedded. Thus, the metal layer can be electrically connected to both the first and second contacts. At this point, in block 310, the metal layer can be selectively etched to form an electrode pattern that results in an antenna structure, such as the antenna structure illustrated in FIGS. 1A-1D. In other words, a pattern can be etched from the metal layer to provide a first electrode that electrically connects with the first contact and a second electrode that electrically connects with the second contact. In some embodiments, one electrode can be significantly larger than the other electrode, creating a larger surface area. Thus, when the two electrodes are exposed to an applied plasma, a current of a particular voltage can be generated.

[0061] In some embodiments, one of the electrodes may also include a resistive component. The resistive component may resemble a wire that connects most of the electrodes to their respective contacts in a circuitous manner. In these embodiments, the resistance of the resistive component may limit the current that can flow between the electrodes, which may also limit the current that can flow from one end of the ReRAM module to the other. In some embodiments, the dimensions of the resistive component may be designed so that the resistance of the resistive component is equal to or greater than the target resistance of the ReRAM module.

[0062] To aid in understanding, FIGS. 4A-4E disclose the formation of an antenna structure in a memory structure 400. FIG. 4A shows a side view of a first stage in forming an antenna structure that can be used, for example, to form conductive filaments in a ReRAM module according to an embodiment of the present disclosure. At this stage, the memory structure 100 includes a first substrate layer 402 having wires 404 embedded therein. An insulating layer 406 is formed over the substrate layer 402, and contacts 408 are embedded within the insulating layer such that the contacts 408 are in electrical communication with the wires 404.

[0063] 4B shows a side view of a second stage in forming an antenna structure that can be used to form conductive filaments in a ReRAM module, according to an embodiment of the present disclosure. In FIG. 4B, a second substrate layer 410 is formed on top of the insulating layer 406. A memristor 412 is embedded within the substrate layer 410 such that the memristor 412 forms an electrical connection with the contact 408. The memristor 412 can take the form of a typically insulating component, such as an oxide layer.

[0064] 4C illustrates a side view of a third stage in forming an antenna structure that can be used to form conductive filaments in a ReRAM module, according to an embodiment of the present disclosure. In FIG. 4C, two vias have been drilled in a substrate layer 410 and filled with conductive plugs 414 and 416. The conductive plug 414 extends from the top of the substrate layer 410, through the insulating layer 406, and to the wire 404, as shown. The conductive plug 414 is thus electrically connected to the wire 404. Meanwhile, the conductive plug 416 extends from the top of the substrate layer 410 to the top edge of the memristor 412. The conductive plug 416 is thus electrically connected to the memristor 412.

[0065] 4C also shows a second insulating layer 418 formed on the substrate layer 410. The insulating layer may take the form of, for example, a thin oxide layer. Contacts 420 and 422 are embedded within the insulating layer 418. Contact 420 forms an electrical connection with, for example, conductive plug 414, and contact 422 forms an electrical connection with conductive plug 416.

[0066] 4D shows a side view of a fourth stage in forming an antenna structure that can be used to form conductive filaments in a ReRAM module, according to an embodiment of the present disclosure. In FIG. 4D, a metal layer 424 is deposited on top of the insulating layer 418. For example, the metal layer 424 can take the form of a metal foil adhered to the insulating layer 418 with a thin layer of resin. Because the metal layer 424 is not etched, it forms an electrical connection with both the contact 420 and the contact 422.

[0067] FIG. 4E shows a side view of a fifth stage in forming an antenna structure that can be used to form conductive filaments in a ReRAM module, according to an embodiment of the present disclosure. In FIG. 4E, metal layer 424 has been selectively etched to create a pair of electrodes 426 and 428. Electrode 426 electrically connects with contact 422, while electrode 428 includes a plasma-interacting component 430, a resistive component 432, and a contact component 434. Contact component 434 forms a connection with contact 420. Resistive component 432 connects plasma-interacting component 430 to contact component 434. Dimensions of resistive component 432 can be such that the resistive component has a resistance equal to or greater than a target resistance of memristor 412.

[0068] 4E, electrodes 426 and 428 can be exposed to an applied plasma to generate a voltage between them. Electrode 426 is etched to have a first surface area, and electrode 428 is etched to have a second surface area. Electrodes 426 and 428 can be designed such that the ratio of the second surface area to the first surface area results in a voltage generated by exposure to a plasma at a particular intensity that is high enough to create oxygen vacancy defects within memristor 412.

[0069] As described in connection with FIGS. 1D and 1E, the shape of the antenna electrode on the insulating layer can expose a portion of the surface of the insulating layer to a plasma or etching process during removal of the antenna electrode. This can result in the insulating layer having a recess that conforms to the contour of the electrode. In some embodiments, the contour of one of the antenna electrodes can include the contour of the shape of a resistive component of the antenna electrode. This contour can take the form of a bypass circuit, as illustrated in FIG. 1E. While the exact shape of this bypass circuit may not significantly affect the effectiveness of embodiments of the present disclosure, the dimensions of the resistive component that provides this bypass circuit can be manipulated to produce a target resistance value.

[0070] 5 shows a top view of an insulating layer 500 overlying a recess 502 displaying the jagged contours of a resistive component, according to an embodiment of the present disclosure. The recess 502 exhibits the contours of a first antenna electrode shape 504 and a second antenna electrode shape 506. Notably, the insulating layer 500 is not shown as including the actual antenna electrode, but rather as including the non-recessed contours of the antenna electrode that remain after the antenna electrode is removed by an etching process.

[0071] The outline of the second antenna electrode shape 506 includes the outline of the resistive component shape 508 of the second antenna electrode. As shown, the outline of the resistive component shape 508 takes the form of a jagged circuitous path without a distinct pattern. However, other shapes of circuitous paths may be possible, such as a curve or a round trip path as illustrated in FIG. 1E.

[0072] 6 shows a top view of an insulating layer 600 overlying a recess 602 displaying the outline of a straight spiral shape of a resistive component, according to an embodiment of the present disclosure. The recess 602 assumes a first antenna electrode outline shape 604 and a second antenna electrode outline shape 606. The outline of the second antenna electrode shape 606 includes the outline of the resistive component shape 608 of the second antenna electrode. Contacts 610 and 612 are also shown in FIG. 6.

[0073] As shown, the contour of resistive element shape 608 takes the form of a spiral circuitous path that spirals around both contacts 610 and 612 and again spirals around contact 612. As such, the total surface area of ​​recess 602 is significantly reduced compared to recess 502 of FIG. 5 or recess 142 of FIG. 1E. This can advantageously avoid excessive damage to insulating layer 600 due to application of plasma during the formation of the conductive filaments or due to etching during the removal of the antenna electrode.

[0074] FIG. 7 illustrates representative major components of an exemplary computer system 701 that can be used in accordance with embodiments of the present disclosure. The specific components illustrated are presented for illustrative purposes only and are not necessarily limited to such variations. The computer system 701 can include a processor 710, memory 720, an input / output interface (also referred to herein as I / O or I / O interface) 730, and a main bus 740. The main bus 740 can provide a communication path to other components of the computer system 701. In some embodiments, the main bus 740 can be connected to other components, such as a dedicated digital signal processor (not shown).

[0075] The processor 710 of the computer system 701 may include one or more CPUs 712. The processor 710 may further include one or more memory buffers or caches (not shown) that provide temporary storage of instructions and data for the CPU 712. The CPU 712 may execute instructions on input provided from the cache or memory 720 and output results to the cache or memory 720. The CPU 712 may include one or more circuits configured to perform one or more methods consistent with embodiments of the present disclosure. In some embodiments, the computer system 701 may include multiple processors 710, as is typical of relatively large systems. However, in other embodiments, the computer system 701 may be a single processor with a single CPU 712.

[0076] The memory 720 of the computer system 701 may include a memory controller 722 and one or more memory modules (not shown) for temporary or persistent storage of data. In some embodiments, the memory 720 may include random-access semiconductor memory, storage devices, or storage media (either volatile or non-volatile) for storing data and programs. The memory controller 722 may communicate with the processor 710 to facilitate storage and retrieval of information in the memory modules. The memory controller 722 may communicate with the I / O interface 730 to facilitate storage and retrieval of input or output in the memory modules. In some embodiments, the memory modules may be dual-in-line memory modules.

[0077] The I / O interface 730 may include an I / O bus 750, a terminal interface 752, a storage interface 754, an I / O device interface 756, and a network interface 758. The I / O interface 730 may connect the main bus 740 to the I / O bus 750. The I / O interface 730 may direct instructions and data from the processor 710 and memory 720 to the various interfaces of the I / O bus 750. The I / O interface 730 may also direct instructions and data from the various interfaces of the I / O bus 750 to the processor 710 and memory 720. The various interfaces may include the terminal interface 752, the storage interface 754, the I / O device interface 756, and the network interface 758. In some embodiments, the various interfaces may include a subset of the aforementioned interfaces (e.g., an embedded computer system for industrial applications may not include the terminal interface 752 and the storage interface 754).

[0078] Logical modules throughout computer system 701, including but not limited to memory 720, processor 710, and I / O interface 730, can communicate faults and changes to one or more components to a hypervisor or operating system (not shown). The hypervisor or operating system can allocate the various resources available to computer system 701 and track the location of data in memory 720 and the locations of processes assigned to the various CPUs 712. In embodiments that combine or rearrange elements, aspects of the capabilities of the logical modules can be combined or reallocated. These variations will be apparent to those skilled in the art.

[0079] The present invention may be a system, method, or computer program product, or a combination thereof, at any possible level of technical detail integration. The computer program product may include a computer-readable storage medium having computer-readable program instructions for causing a processor to perform aspects of the present invention.

[0080] A computer-readable storage medium may be any tangible device capable of retaining and storing instructions for use by an instruction-execution device. A computer-readable storage medium may be, for example, but not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the foregoing. A non-exhaustive list of more specific examples of computer-readable storage media includes portable computer diskettes, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), portable compact disk read-only memory (CD-ROM), digital versatile disk (DVD), memory sticks, floppy disks, punch cards, or mechanically encoded devices such as ridge structures in grooves with instructions recorded thereon, and any suitable combination of the foregoing. Computer-readable storage media, as used herein, should not be construed as being ephemeral signals per se, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through a waveguide or other transmission medium (e.g., light pulses passing through fiber optic cable), or electrical signals transmitted through wires.

[0081] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to each computing / processing device or to an external computer or storage device via a network, such as the Internet, a local area network, a wide area network, or a wireless network, or a combination thereof. The network can include copper transmission cables, fiber optic transmission cables, wireless transmissions, routers, firewalls, switches, gateway computers, or edge servers, or a combination thereof. A network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards the computer-readable program instructions to a computer-readable storage medium within the respective computing / processing device for storage.

[0082] Computer-readable program instructions for carrying out the operations of the present invention may be either source or object code written in any combination of one or more programming languages, including assembler instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, integrated circuit configuration data, or object-oriented programming languages ​​such as Smalltalk®, C++, and procedural programming languages ​​such as the "C" programming language or similar programming languages. The computer-readable program instructions may execute entirely on the user's computer, partly on the user's computer as a standalone software package, partly on the user's computer and partly on a remote computer, or entirely on a remote computer or server. In the latter scenario, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection may be to an external computer (e.g., via the Internet using an Internet Service Provider). In some embodiments, electronic circuitry including, for example, a programmable logic circuit, a field programmable gate array (FPGA), or a programmable logic array (PLA) may execute computer readable program instructions by utilizing state information of the computer readable program instructions to personalize the electronic circuitry to perform aspects of the present invention.

[0083] Aspects of the present invention are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer-readable program instructions.

[0084] These computer-readable program instructions may be provided to a processor of a computer or other programmable data processing apparatus to manufacture a machine such that the instructions, executed by the processor of the computer or other programmable data processing apparatus, generate means for performing the functions / acts specified in the blocks of the flowcharts and / or block diagrams. These computer-readable program instructions may be stored on a computer-readable storage medium that can direct a computer, programmable data processing apparatus, or other device, or combination thereof, to function in a particular manner, such that the computer-readable storage medium having instructions stored therein comprises an article of manufacture containing instructions that perform aspects of the functions / acts specified in the blocks of the flowcharts and / or block diagrams.

[0085] The computer-readable program instructions may also be loaded into a computer, other programmable data processing apparatus, or other device and cause a series of operational steps to be performed on the computer, other programmable apparatus, or other device, such that the instructions, which execute on the computer, other programmable apparatus, or other device, perform the functions / acts specified in the blocks of the flowcharts and / or block diagrams, to create a computer-implemented process.

[0086] The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in the flowcharts or block diagrams may represent a module, segment, or portion of instructions, comprising one or more executable instructions for implementing specified logical functions. In some alternative implementations, the functions shown in the blocks may occur out of the order shown in the figures. For example, two blocks shown in succession may actually be performed as a single step, or may be executed concurrently, substantially concurrently, partially, or fully in a time-overlapping manner, or the blocks may sometimes be executed in the reverse order, depending on the functionality involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented by a dedicated hardware-based system that performs the specified functions or acts or executes a combination of dedicated hardware and computer instructions.

[0087] The description of various embodiments of the present disclosure has been presented for illustrative purposes, but is not intended to be exhaustive or limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein has been selected to explain the principles of the embodiments, practical applications or technical improvements to technology found in the market, or to enable those skilled in the art to understand the embodiments disclosed herein.

Claims

1. 1. A method for forming a conductive filament in a ReRAM module, comprising: exposing a first electrode and a second electrode to an application of plasma, the first electrode being connected proximate to a first end of a ReRAM module and the second electrode being connected proximate to a second end of the ReRAM module; and the second electrode comprises: a plasma-interactive component; and a resistive component disposed between the plasma-interactive component and the ReRAM module; exposing the first and second electrodes to the application of the plasma to generate a voltage between the first electrode and the second electrode, the voltage generating the conductive filament within the ReRAM module; further comprising etching away the first electrode after applying the plasma. method.

2. The method of claim 1 , further comprising etching away the second electrode after applying the plasma.

3. The method of claim 1 , wherein the resistive component and the plasma-interactive component are composed of the same material, and the resistance of the resistive component arises primarily from the length, width, and height of the resistive component.

4. The method of claim 3 , wherein the resistance of the resistive component is less than or equal to a target resistance of the conductive filament.

5. 2. The method of claim 1, further comprising connecting at least one of the first end and the second end of the ReRAM module to a memory cell transistor in a memory structure.

6. determining that the resistance of the ReRAM module has reached a target resistance value; terminating the exposure to application of the plasma in response to the determining; and The method of claim 1 further comprising:

7. Integrating the ReRAM module into a substrate; forming an electrical connection between the first end of the ReRAM module and a first contact, the first contact being embedded in an insulating layer; forming an electrical connection between the second end of the ReRAM module and a second contact, the second contact being embedded in the insulating layer; depositing a layer of metal on the insulating layer; Etching a pattern in the layer of metal to obtain the first electrode attached to the first contact and the second electrode attached to the second contact; The method of claim 1 further comprising:

8. a ReRAM module embedded in the substrate; an insulating layer on a surface of the substrate; a first electrode on a surface of the insulating layer, the first electrode being proximate to and connected to a first end of the ReRAM module, the first electrode having an entire surface with a first surface area; a second electrode on the surface of the insulating layer, the second electrode being proximate to and connected to a second end of the ReRAM module; the entire surface being a second surface area; a plasma-interactive component on a surface of the insulating layer; a resistive component disposed on the surface of the insulating layer between the plasma-interactive component and the ReRAM module; the second electrode comprising: Equipped with a ratio of the first surface area to the second surface area that generates a forming voltage between the first electrode and the second electrode when the first surface area and the second surface area are exposed to an application of a plasma during formation of a conductive filament; Memory structures.

9. 9. The memory structure of claim 8, wherein said first electrode and second electrode are comprised of a material that can be chemically etched away from said insulating layer.

10. 9. The memory structure of claim 8 wherein said first electrode is comprised of a material that can be chemically etched away from said insulating layer.

11. 9. The memory structure of claim 8 wherein said second electrode is comprised of a material that can be chemically etched away from said insulating layer.

12. 9. The memory structure of claim 8, wherein said conductive filament has a target resistance.

13. 13. The memory structure of claim 12, wherein said resistive component provides a first resistance between said first electrode and said second electrode, said first resistance being less than or equal to said target resistance value.

14. 9. The memory structure of claim 8, wherein at least one of the first end and the second end of the ReRAM module is connected to a memory cell transistor within the memory structure.

15. A recess in the insulating layer, the recess having a contour of the shape of the first electrode and a contour of the shape of the second electrode; 15. A memory structure according to any one of claims 8 to 14, comprising:

16. a first contact and a second contact on the surface of the substrate, the first contact being connected to the second end proximate to the first end and the second contact being connected to the first end proximate to the second end; 16. The memory structure of claim 15 further comprising:

17. 16. The memory structure of claim 15 wherein said outline of said shape of said second electrode comprises an outline of a shape of a resistive element.

18. 20. The memory structure of claim 17, wherein the contour of the shape of the resistive element takes the form of a contour of a circuitous path.

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