Display panel
The display panel enhances efficiency and lifespan by employing organic and inorganic charge generation layers and quantum dots in its light-emitting elements, addressing the limitations of existing technologies.
Patent Information
- Application Number
- JP2021190304
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2020-12-15
- Filing Date
- 2021-11-24
- Publication Date
- 2025-11-07
- Estimated Expiration
- 2041-11-24
AI Technical Summary
Existing display panels face challenges in achieving improved efficiency and lifespan of light-emitting devices.
The display panel incorporates a structure with multiple light-emitting elements, each comprising specific charge generation layers with organic and inorganic dopants, and quantum dots for light conversion, along with a bank arrangement to enhance luminous efficiency and lifespan.
The solution results in improved luminous efficiency and extended lifespan of the display panel by optimizing the light-emitting elements through the use of organic and inorganic charge generation layers and quantum dots.
Smart Images

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Abstract
Description
[Technical Field]
[0001] The present invention relates to a display panel, and more particularly to a display panel including a light emitting device having improved lifespan and luminous efficiency. [Background technology]
[0002] A variety of display devices have been developed for use in multimedia devices such as televisions, mobile phones, tablet computers, navigation systems, game consoles, etc. These display devices utilize so-called self-emissive display devices that realize display by emitting light from a light-emitting material.
[0003] Specifically, the light emitting device generates excitons by recombining holes and electrons injected from the first electrode and the second electrode in the light emitting layer, and then emits light by causing the generated excitons to fall to the ground state.
[0004] A tandem organic light emitting device has a structure consisting of two or more stacks of hole injection layer / hole transport layer / light emitting layer / electron transport layer / electron injection layer between an anode electrode and a cathode electrode, and a charge generation layer that helps generate and move charges is present between each stack. [Prior art documents] [Patent documents]
[0005] [Patent Document 1] Korean Patent Publication No. 10-2020-0014045 [Patent Document 2] US Patent Application Publication No. 2016 / 0254323 [Patent Document 3] Korean Patent Publication No. 10-2016-0061718 Summary of the Invention [Problem to be solved by the invention]
[0006] SUMMARY OF THE INVENTION An object of the present invention is to provide a display panel including a light-emitting element with improved efficiency and lifetime. [Means for solving the problem]
[0007] In one embodiment, a display panel is provided, the display panel including: an upper display substrate including a first pixel region emitting a first light, a second pixel region emitting a second light different from the first light, and a third pixel region emitting a third light different from the first light and the second light; and a lower display substrate including a first light-emitting element overlapping the first pixel region, a second light-emitting element overlapping the second pixel region, and a third light-emitting element overlapping the third pixel region, wherein the first light-emitting element and the second light-emitting element each include one or more first stack units including a first light-emitting layer emitting the second light and one or more first charge generation layers, the third light-emitting element includes one or more second stack units including a second light-emitting layer emitting the third light, and one or more second charge generation layers, the first charge generation layer including an organic dopant, and the second charge generation layer including an inorganic dopant.
[0008] The first charge generation layer includes a p-type first charge generation layer and an n-type first charge generation layer, the second charge generation layer includes a p-type second charge generation layer and an n-type second charge generation layer, the p-type first charge generation layer includes the organic dopant, and the p-type second charge generation layer includes the inorganic dopant.
[0009] The organic dopant includes at least one of 4-[[2,3-bis[cyano-(4-cyano-2,3,5,6-tetrafluorophenyl)methylidene]cyclopyropyridene]-cyanomethyl]-2,3,5,6-tetrafluorobenzonitrile (NDP9), 1,4,5,8,9,11-hexaazatriphenylene-hexacarbonitrile (HAT-CN), 2,3,5,6-tetrafluoro-7,7,8,8-tetracyanoquinodimethane (FA-TCNQ), and tetracyanoquinodimethane (TCNQ).
[0010] The inorganic dopant includes at least one of a post-transition metal, a semi-metal, a compound of a post-transition metal and a semi-metal, and a compound of a transition metal and a halogen.
[0011] The first stack portion further includes a first hole transport region disposed below the first light-emitting layer and a first electron transport region disposed above the first light-emitting layer, and the second stack portion further includes a second hole transport region disposed below the second light-emitting layer and a second electron transport region disposed above the second light-emitting layer.
[0012] The lower display substrate further includes a bank disposed between the second light emitting element and the third light emitting element, and the bank is not disposed between the first light emitting element and the second light emitting element.
[0013] The upper display substrate further includes non-pixel regions adjacent to the first to third pixel regions, the lower display substrate further includes a pixel defining layer overlapping the non-pixel regions, and the bank overlaps the pixel defining layer.
[0014] The first stack portion of the first light emitting element and the first stack portion of the second light emitting element have an integral shape.
[0015] The first light emitting element and the second light emitting element further include one or more of the second stack unit and the second charge generation layer, respectively.
[0016] The upper display substrate includes a first light control unit overlapping the first pixel region and including first quantum dots, a second light control unit overlapping the second pixel region and transmitting the second light, and a third light control unit overlapping the third pixel region and transmitting the third light, and the first quantum dots convert the second light into the first light.
[0017] The upper display substrate includes a first light control unit overlapping the first pixel region and including first quantum dots, a second light control unit overlapping the second pixel region and including second quantum dots, and a third light control unit overlapping the third pixel region and transmitting the third light, wherein the first quantum dots convert the second light or the third light into the first light, and the second quantum dots convert the third light into the second light.
[0018] The second stack portion of the first light emitting element and the second stack portion of the second light emitting element are integral with at least one of the second stack portions of the third light emitting element.
[0019] The third light emitting element does not include the first stack unit.
[0020] The first light emitting element and the second light emitting element have the same structure.
[0021] The first light is red light, the second light is green light, and the third light is blue light.
[0022] In one embodiment, a display panel is provided that includes an upper display substrate including a first pixel region, a second pixel region, and a third pixel region arranged adjacent to each other in a first direction, and a lower display substrate including a first light-emitting element overlapping the first pixel region, a second light-emitting element overlapping the second pixel region, a third light-emitting element overlapping the third pixel region, and a bank arranged between the second light-emitting element and the third light-emitting element, wherein the first light-emitting element and the second light-emitting element each include one or more first stack units including a first light-emitting layer that emits second light, and the third light-emitting element includes two or more second stack units including a second light-emitting layer that emits third light different from the second light, and the display panel does not include the first stack unit.
[0023] The lower display substrate further includes a p-type first charge generation layer disposed below the first light-emitting layer and a p-type second charge generation layer disposed below the second light-emitting layer, the p-type first charge generation layer including an organic dopant, and the p-type second charge generation layer including an inorganic dopant.
[0024] The lower display substrate further includes a first n-type charge generation layer disposed on the first light emitting layer, and a second n-type charge generation layer disposed on the second light emitting layer.
[0025] Each of the first to third light-emitting elements includes a first to third stack that are sequentially stacked in a second direction perpendicular to the first direction, and the first to third stacks of the first light-emitting element and the second light-emitting element each include a first stack portion having an integral shape, and the first to third stacks of the third light-emitting element each include a second stack portion.
[0026] Each of the first to third light-emitting elements includes a first to third stack that are sequentially stacked in a second direction perpendicular to the first direction, and includes a second stack portion in at least one layer of the first to third stacks of the first light-emitting element and the second light-emitting element, and includes a first stack portion in the remaining layers, and each of the first to third stacks of the third light-emitting element includes a second stack portion. [Effects of the Invention]
[0027] A display device according to an embodiment of the present invention has improved luminous efficiency and life span. [Brief explanation of the drawings]
[0028] [Figure 1] 1 is a perspective view of a display panel according to an embodiment of the present invention; [Figure 2] 1 is a cross-sectional view of a display panel according to an embodiment of the present invention. [Figure 3] 1 is a plan view of a display area of a display panel according to an embodiment of the present invention; [Figure 4] 1 is a cross-sectional view of a display panel according to an embodiment. [Figure 5] 1 is a cross-sectional view of a light emitting device according to an embodiment. [Figure 6] 1 is a cross-sectional view of a light emitting device according to an embodiment. [Figure 7]1 is a cross-sectional view of a display panel according to an embodiment. [Figure 8] 1 is a cross-sectional view of a light emitting device according to an embodiment. DETAILED DESCRIPTION OF THE INVENTION
[0029] Because the present invention can be modified in various ways and can take various forms, specific embodiments are shown by way of example in the drawings and described in detail herein, but it is not intended to limit the invention to the particular forms disclosed, and it should be understood that the invention includes all modifications, equivalents, and alternatives falling within the spirit and scope of the present invention.
[0030] Throughout the drawings, like reference numerals are used to refer to like elements. In the accompanying drawings, the dimensions of structures are exaggerated for clarity. Terms such as "first," "second," etc. are used to describe various elements, but the elements are not limited to these terms. These terms are used only to distinguish one structural element from another. For example, a first element may be designated as a "second element," and similarly, a second element may be designated as a "first element," without departing from the scope of the present invention. The singular term "a" includes the plural term unless the context clearly dictates otherwise.
[0031] "And / or" includes all combinations of one or more of the associated constructs.
[0032] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those skilled in the art to which the present invention belongs. Furthermore, terms defined in commonly used dictionaries should be interpreted as having the same meaning as in the context of the relevant art, and should not be interpreted in an idealized or overly formal sense unless explicitly defined.
[0033] In this application, the terms "comprise" or "have" and the like are intended to specify the presence of any feature, numeral, step, operation, component, part, or combination thereof set forth in the specification above, but are to be understood as not precluding the possible presence or addition of one or more other features, numerals, steps, operations, components, parts, or combinations thereof.
[0034] In this application, when a layer, film, region, plate, or other portion is described as being "on" or "above" another portion, this includes not only the case where it is "directly above" the other portion, but also the case where there is another portion between them. Conversely, when a layer, film, region, plate, or other portion is described as being "below" or "below" another portion, this includes not only the case where it is "directly below" the other portion, but also the case where there is another portion between them. Also, in this application, being "located above" includes not only the case where it is located above, but also the case where it is located below.
[0035] On the other hand, in this application, "directly contact" may mean that there is no additional layer, film, region, plate, etc. between one layer, film, region, plate, etc. and another portion. For example, "directly contact" may mean that two layers or two members are disposed without using an additional member such as an adhesive member between them.
[0036] A display panel according to an embodiment of the present invention will now be described with reference to the accompanying drawings.
[0037] 1 and 2 are perspective and cross-sectional views of a display panel DP according to an embodiment of the present invention.
[0038] 1 and 2, the display panel DP includes a lower display substrate 100 and an upper display substrate 200 facing and spaced apart from the lower display substrate 100. A filler layer BFL is filled between the lower display substrate 100 and the upper display substrate 200. Although not shown, in an embodiment of the display panel DP, the filler layer BFL may be omitted, and a predetermined cell gap may be provided between the lower display substrate 100 and the upper display substrate 200.
[0039] Although not shown separately, the display panel DP may further include a chassis member or a molding member, and may further include a backlight unit depending on the type of the display panel DP.
[0040] The display panel DP according to an embodiment includes a sealant SLM that bonds the lower display substrate 100 and the upper display substrate 200 in the non-display area NDA. The sealant SLM includes an organic adhesive material or an inorganic adhesive material. The sealant SLM includes a frit. However, the present invention is not limited thereto, and the sealant SLM may be omitted.
[0041] The display panel 100 displays an image via a display surface DP-IS. The display surface DP-IS is parallel to a plane defined by a first directional axis DR1 and a second directional axis DR2. The display surface DP-IS includes a display area DA and a non-display area NDA. Pixels PX are arranged in the display area DA. The non-display area NDA is defined along the edge of the display surface DP-IS. The display area DA is surrounded by the non-display area NDA.
[0042] The normal direction of the display surface DP-IS, i.e., the thickness direction of the display panel DP, is the third direction DR3. The front (or upper surface) and rear (or lower surface) of each layer or unit described below are separated by the third direction DR3. However, in this embodiment, the first to third directions DR1, DR2, and DR3 shown in the drawings are merely examples.
[0043] Although the display panel DP has a flat display surface DP-IS in one embodiment of the present invention, it is not limited to this. The display panel DP may also include a curved display surface or a stereoscopic display surface. The stereoscopic display surface may include multiple display areas pointing in different directions.
[0044] The display panel DP may be any one of, but is not limited to, a liquid crystal display panel, an electrophoretic display panel, a micro electro mechanical system (MEMS) display panel, an electrowetting display panel, an organic light emitting display panel, a micro LED display panel, a quantum dot display panel, and a quantum rod display panel.
[0045] Fig. 3 is a plan view of a display area DA of a display panel DP according to an embodiment of the present invention. Fig. 4 is a cross-sectional view of the display panel DP according to an embodiment. Fig. 4 is a cross-sectional view showing a portion corresponding to line II' in Fig. 3.
[0046] 3, the display area DA of the display panel DP includes a non-pixel area NPXA and pixel areas PXA-R, PXA-G, and PXA-B. While the pixel areas PXA-R, PXA-G, and PXA-B are shown alternately arranged in a striped pattern, the arrangement of the pixel areas PXA-R, PXA-G, and PXA-B is not limited thereto and may take various other forms. In one embodiment, the pixel areas PXA-R, PXA-G, and PXA-B may have a diamond or pentile arrangement.
[0047] The pixel regions PXA-R, PXA-G, and PXA-B include a first pixel region PXA-R, a second pixel region PXA-G, and a third pixel region PXA-B that are spaced apart from one another. While the first, second, and third pixel regions PXA-R, PXA-G, and PXA-B are shown as rectangular in plan view in FIG. 3, they are not limited to this. In plan view, the first, second, and third pixel regions PXA-R, PXA-G, and PXA-B may have other polygonal shapes, or may be regular polygons with rounded corners.
[0048] A non-display area NPXA is disposed around the first to third pixel areas PXA-R, PXA-G, and PXA-B. The non-pixel area NPXA defines the boundaries between the first to third pixel areas PXA-R, PXA-G, and PXA-B and prevents color mixing between the first to third pixel areas PXA-R, PXA-G, and PXA-B. The non-pixel area NPXA also blocks the light source so that it is not visible to the user.
[0049] 4, the lower display substrate 100 of the display panel DP includes a base layer BS, a circuit layer DP-CL provided on the base layer BS, and a display element layer DP-ED. The display element layer DP-ED includes a pixel defining layer PDL and light emitting elements ED1, ED2, and ED3 arranged to overlap openings OH provided in the pixel defining layer PDL.
[0050] The pixel defining layer PDL divides the pixel regions PXA-R, PXA-G, and PXA-B. The non-pixel region NPXA is a region between the adjacent pixel regions PXA-R, PXA-G, and PXA-B, and corresponds to the pixel defining layer PDL.
[0051] The light-emitting elements ED1, ED2, and ED3 are arranged to overlap the pixel regions PXA-R, PXA-G, and PXA-B, respectively. The pixel regions PXA-R, PXA-G, and PXA-B are regions from which light generated by the light-emitting elements ED1, ED2, and ED3 is emitted.
[0052] For example, the display panel DP may include a first pixel region PXA-R, a second pixel region PXA-G, and a third pixel region PXA-B arranged at a distance from each other, and may include a first light-emitting element ED1 overlapping the first pixel region PXA-R, a second light-emitting element ED2 overlapping the second pixel region PXA-G, and a third light-emitting element ED3 overlapping the third pixel region PXA-R.
[0053] In one embodiment, the first pixel region PXA-R is a pixel region for red light. Red light corresponds to light in the wavelength range of 625 nm to 675 nm. The second pixel region PXA-G is a pixel region for green light. Green light corresponds to light in the wavelength range of 500 nm to 570 nm. The third pixel region PXA-B is a pixel region for blue light. Blue light corresponds to light having a wavelength of 410 nm to 480 nm.
[0054] In one embodiment of the display device DD, the first light-emitting element ED1 and the second light-emitting element ED2 emit light in the same wavelength region, and the third light-emitting element ED3 emits light in a wavelength region different from that of the first light-emitting element ED1 and the second light-emitting element ED2. For example, the first light-emitting element ED1 and the second light-emitting element ED2 may emit green light, and the third light-emitting element ED3 may emit blue light. However, this is not limited thereto, and the first light-emitting element ED1 and the second light-emitting element ED2 may emit green light and blue light.
[0055] 3 and 4, the areas of the pixel regions PXA-R, PXA-G, and PXA-B are shown as being similar, but this is not limited to this embodiment, and the areas of the pixel regions PXA-R, PXA-G, and PXA-B may differ depending on the wavelength range of the emitted light. Meanwhile, the areas of the pixel regions PXA-R, PXA-G, and PXA-B refer to the areas when viewed from a plane defined by the first direction DR1 and the second direction DR2.
[0056] The base layer BS is a member that provides a base surface on which the display element layers EP-ED are disposed. The base layer BS may be a glass substrate, a metal substrate, a plastic substrate, etc. However, embodiments are not limited thereto, and the base layer BS may be an inorganic layer, an organic layer, or a composite material layer.
[0057] In one embodiment, the circuit layer DP-CL is disposed on the base layer BS and includes a plurality of transistors (not shown). Each of the transistors (not shown) includes a control electrode, an input electrode, and an output electrode. For example, the circuit layer DP-CL may include switching transistors and driving transistors for driving the first to third light emitting elements ED1, ED2, and ED3.
[0058] A pixel defining layer PDL is disposed on the circuit layer DP-CL. The pixel defining layer PDL is made of a polymer resin. For example, the pixel defining layer PDL may be formed to include a polyacrylate resin or a polyimide resin. The pixel defining layer PDL may also be formed to include an inorganic material in addition to the polymer resin. The pixel defining layer PDL may also be formed to include a light absorbing material, or a black pigment or a black dye. A pixel defining layer PDL formed to include a black pigment or a black dye implements a black pixel defining layer. When forming the pixel defining layer PDL, carbon black or the like may be used as the black pigment or black dye, but embodiments are not limited thereto.
[0059] The pixel definition film PDL is made of an inorganic material. For example, the pixel definition film PDL is made of silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y ) may be formed.
[0060] The first to third light emitting elements ED1, ED2, and ED3 are separated by the pixel defining layer PDL.
[0061] Each of the first to third light-emitting elements ED1, ED2, and ED3 includes a first electrode EL1 and a second electrode EL2 facing each other, and a plurality of stack layers SF1, SF2, and SF3 stacked in the third direction DR3 between the first electrode EL1 and the second electrode EL2. Each of the plurality of stack layers SF1, SF2, and SF3 includes a hole transport region HTR (FIG. 5), an emitting layer EML (FIG. 5), and an electron transport region ETR (FIG. 5). In other words, the light-emitting element included in the display panel DP of the embodiment is a light-emitting element having a tandem structure including a plurality of light-emitting layers. Meanwhile, while FIG. 4 illustrates a configuration in which each of the first to third light-emitting elements ED1, ED2, and ED3 includes a first stack layer SF1, a second stack layer SF2, and a third stack layer SF3, the present invention is not limited to this.
[0062] In one embodiment, the stack layers SF1, SF2, and SF3 included in the first and second light emitting elements ED1 and ED2 have the same structure and materials, while the third light emitting element ED3 includes one or more stack layers SF1, SF2, and SF3 having different structures and / or materials than the stack layers SF1, SF2, and SF3 included in the first and second light emitting elements ED1 and ED2, as will be described in more detail below with reference to FIGS.
[0063] A bank BK is disposed at the boundary with the third light-emitting element ED3. For example, a bank BK may be disposed between the first light-emitting element ED1 and the third light-emitting element ED3. A bank BK may be disposed between the second light-emitting element ED2 and the third light-emitting element ED3. The third light-emitting element ED3 includes stack layers SF1, SF2, and SF3 that are separated from the first light-emitting element ED1 and the second light-emitting element ED2 by the bank BK.
[0064] In one embodiment, the bank BK is disposed on the pixel definition layer PDL and overlaps the pixel definition layer PDL. The bank BK may contain the same material as the pixel definition layer PDL or a different material. For example, the bank BK may contain a liquid-repellent material. The bank BK may be a layer distinct from the pixel definition layer PDL or may have an integral shape with the pixel definition layer PDL.
[0065] An encapsulating layer TFE is disposed on the first to third light-emitting elements ED1, ED2, and ED3. The encapsulating layer TFE covers the first to third light-emitting elements ED1, ED2, and ED3. The encapsulating layer TFE seals the display element layer DP-ED. The encapsulating layer TFE is a thin film encapsulating layer. The encapsulating layer TFE has one or more laminated layers. The encapsulating layer TFE includes at least one insulating layer. The encapsulating layer TFE according to one embodiment includes at least one inorganic film (hereinafter, encapsulating inorganic film). Furthermore, the encapsulating layer TFE according to one embodiment includes at least one organic film (hereinafter, encapsulating organic film) and at least one encapsulating inorganic film.
[0066] The inorganic encapsulation film protects the display element layer DP-ED from moisture / oxygen, and the organic encapsulation film protects the display element layer DP-ED from foreign substances such as dust particles. The inorganic encapsulation film may include, but is not limited to, silicon nitride, silicon oxynitride, silicon oxide, titanium oxide, or aluminum oxide. The organic encapsulation film may include, but is not limited to, an acrylic compound or an epoxy compound. The organic encapsulation film may include, but is not limited to, a photopolymerizable organic material.
[0067] A first filler layer BFL1 is disposed on the encapsulation layer TFE. The first filler layer BFL1 is disposed between the lower display substrate 100 and the upper display substrate 200 to prevent components such as the light control layer CCL included in the upper display substrate 200 from contacting the encapsulation layer TFE of the lower display substrate 100, thereby improving the light extraction effect of the display panel DP. The first filler layer BFL1 covers the upper surface of the encapsulation layer TFE.
[0068] 4 illustrates a configuration in which the first filler layer BFL1 is filled between the lower display substrate 100 and the upper display substrate 200, but is not limited to this, and the first filler layer BFL1 may be omitted in the display panel DP according to an embodiment of the present invention. In this case, a predetermined cell gap may be provided between the lower display substrate 100 and the upper display substrate 200.
[0069] The upper display substrate 200 of the display panel DP includes a base substrate BL, a color filter layer CFL, and a light control layer CCL, and is disposed on the encapsulation layer TFE.
[0070] The light control layer CCL is disposed on the lower display substrate 100. The light control layer CCL includes a light converter. The light converter is, for example, a quantum dot or a phosphor. The light converter converts the wavelength of the provided light and then emits it. That is, the light control layer CCL is a layer including quantum dots or a layer including a phosphor.
[0071] In one embodiment, the quantum dot comprises a II-VI compound, a III-VI compound, a I-III-VI, a III-V compound, a III-II-V compound, a IV-VI compound, a Group IV element, a Group IV compound, and combinations thereof as a core.
[0072] II-VI compounds include binary compounds selected from the group consisting of CdSe, CdTe, CdS, ZnS, ZnSe, ZnTe, ZnO, HgS, HgSe, HgTe, MgSe, MgS, and mixtures thereof, CdSeS, CdSeTe, CdSTe, ZnSeS, ZnSeTe, ZnSTe, HgSeS, HgSeTe, HgSTe, CdZnS, CdZnSe, CdZnTe, CdHgS, CdHgSe, CdHgT ternary compounds selected from the group consisting of HgZnS, HeZnSe, HeZnTe, MgZnSe, MgZnS, and mixtures thereof, and quaternary compounds selected from the group consisting of HgZnTeS, CdZnSeS, CdZnSeTe, CdZnSTe, CdHgSeS, CdHgSeTe, CdHgSTe, HgZnSeS, HgZnSeTe, HgZnSTe, and mixtures thereof.
[0073] III-VI compounds include binary compounds such as In2S3, In2Se3, etc., ternary compounds such as InGaS3, InGaSe3, etc., or any combination thereof.
[0074] The I-III-VI compound is selected from ternary compounds selected from the group consisting of AgInS, AgInS2, CuInS, CuInS2, AgGaS2, CuGaS2, CuGaO2, AgGaO2, AgAlO2, and mixtures thereof, or quaternary compounds such as AgInGaS2, CuInGaS2.
[0075] The III-V compound is selected from the group consisting of binary compounds selected from the group consisting of GaN, GaP, GaAs, GaSb, AlN, AlP, AlAs, AlSb, InN, InP, InAs, InSb, and mixtures thereof, ternary compounds selected from the group consisting of GaNP, GaNAs, GaNSb, GaPAs, GaPSb, AlNPs, AlNAs, AlNSb, AlPAs, AlPSb, InGaP, InAlP, InNPs, InNAs, InNSb, InPAs, InPSb, and mixtures thereof, and quaternary compounds selected from the group consisting of GaAlNPs, GaAlNAs, GaAlNSb, GaAlPAs, GaAlPSb, GaInNPs, GaInNAs, GaInNSb, GaInPAs, GaInPSb, InAlNPs, InAlNAs, InAlNSb, InAlPAs, InAlPSb, and mixtures thereof, while the III-V compound further comprises a group II metal. For example, InZnP, InGaZnP, InAlZnP, etc. may be selected as III-II-V compounds.
[0076] The group IV-VI compounds are selected from the group consisting of binary compounds selected from the group consisting of SnS, SnSe, SnTe, PbS, PbSe, PbTe, and mixtures thereof; ternary compounds selected from the group consisting of SnSeS, SnSeTe, SnSTe, PbSeS, PbSeTe, PbSTe, SnPbS, SnPbSe, SnPbTe, and mixtures thereof; and quaternary compounds selected from the group consisting of SnPbSSe, SnPbSeTe, SnPbSTe, and mixtures thereof. The group IV element is selected from the group consisting of Si, Ge, and mixtures thereof. The group IV compound is a binary compound selected from the group consisting of SiC, SiGe, and mixtures thereof.
[0077] In this case, the two-element compound, three-element compound, or four-element compound may exist in a particle at a uniform concentration or may exist in the same particle with partially different concentration distributions. Also, quantum dots may have a core / shell structure in which one quantum dot surrounds another. In the core / shell structure, the concentration of the element present in the shell decreases toward the core, creating a concentration gradient.
[0078] The quantum dot shell serves as a protective layer to prevent chemical modification of the core and maintain its semiconducting properties, and / or as a charging layer to impart electrophoretic properties to the quantum dot. The shell may be a single layer or multiple layers. Examples of the quantum dot shell include metal or nonmetal oxides, semiconductor compounds, or combinations thereof.
[0079] For example, the metal or non-metal oxide may be a binary compound such as SiO2, Al2O3, TiO2, ZnO, MnO, Mn2O3, Mn3O4, CuO, FeO, Fe2O3, Fe3O4, CoO, Co3O4, or NiO, or a ternary compound such as MgAl2O4, CoFe2O4, NiFe2O4, or CoMn2O4, but the present invention is not limited thereto.
[0080] Examples of the semiconductor compound include CdS, CdSe, CdTe, ZnS, ZnSe, ZnTe, ZnSeS, ZnTeS, GaAs, GaP, GaSb, HgS, HgSe, HgTe, InAs, InP, InGaP, InSb, AlAs, AlP, and AlSb, but the present invention is not limited to these.
[0081] Quantum dots have an emission wavelength spectrum full width at half maximum (FWHM) of about 45 nm or less, preferably about 40 nm or less, and more preferably about 30 nm or less, which can improve color purity and color reproducibility. Furthermore, light emitted through such quantum dots is emitted in all directions, improving the light viewing angle.
[0082] The shape of the quantum dots is not particularly limited and may be any shape commonly used in the art. More specifically, shapes such as spherical, pyramidal, multi-arm, and cubic nanoparticles, nanotubes, nanowires, nanofibers, and nanoplate-like particles may be used.
[0083] Quantum dots adjust the color of the light they emit depending on the size of the particle, and as a result, quantum dots emit a variety of colors, including red, green, and blue.
[0084] The light control layer CCL includes scatterers SP. The scatterers SP scatter light and may be, for example, inorganic particles. In one embodiment, the scatterers SP include at least one of TiO2, ZnO, Al2O3, SiO2, and hollow silica. The scatterers SP include any one of TiO2, ZnO, Al2O3, SiO2, and hollow silica, or a mixture of two or more materials selected from TiO2, ZnO, Al2O3, SiO2, and hollow silica. In other embodiments of the present invention, the scatterers SP may be omitted.
[0085] The light control layer CCL includes base resins BR1, BR2, and BR3 in which quantum dots and scatterers SP are dispersed. The base resins BR1, BR2, and BR3 are media in which the quantum dots and scatterers SP are dispersed, and are generally made of various resin compositions called binders. For example, the base resins BR1, BR2, and BR3 may be acrylic resins, urethane resins, silicone resins, epoxy resins, etc. The base resins BR1, BR2, and BR3 are transparent resins. In one embodiment, the first base resin BR1, the second base resin BR2, and the third base resin BR3 may be the same or different from each other.
[0086] The light control layer CCL includes a plurality of light control units CCP1, CCP2, and CCP3. The light control units CCP1, CCP2, and CCP3 are spaced apart from one another. As shown in the figure, division patterns BMP are arranged between the spaced-apart light control units CCP1, CCP2, and CCP3, but this is not a limitation of the embodiment. Although the division patterns BMP are shown not to overlap with the light control units CCP1, CCP2, and CCP3, edges of the light control units CCP1, CCP2, and CCP3 may at least partially overlap with the division patterns BMP.
[0087] The light control layer CCL includes a first light controller CCP1, a second light controller CCP2, and a third light controller CCP3 that transmit or convert light provided from the lower display substrate 100. For example, the first light may be red light, the second light may be green light, and the third light may be blue light.
[0088] 4, the first light controller CCP1 converts the second light or the third light into the first light. The first light controller CCP1 includes first quantum dots QD1 and scatterers SP dispersed in a first base resin BR1. The first quantum dots QD1 convert the second light or the third light into the first light. For example, the first quantum dots QD1 included in the first light controller CCP1 may be red quantum dots.
[0089] The second light control part CCP2 transmits the second light. The second light control part CCP2 includes scatterers SP dispersed in the second base resin BR2, but does not include a light converter.
[0090] The third light control part CCP3 transmits the third light. The third light control part CCP3 includes the scatterers SP dispersed in the third base resin BR3, but does not include the light converter.
[0091] However, the embodiment of the light control layer CCL is not limited to this, and the second light control unit CCP2 and / or the third light control unit CCP3 may include quantum dots.
[0092] The upper display substrate 200 includes a second filler layer BFL2. The second filler layer BFL2 is disposed between the light control units CCP1, CCP2, and CCP3 and the color filter units CF1, CF2, and CF3. The second filler layer BFL2 serves to prevent the penetration of moisture and / or oxygen (hereinafter referred to as "moisture / oxygen").
[0093] Meanwhile, although not shown, the optical control units CCP1, CCP2, and CCP3 may further include a barrier layer disposed below the optical control units CCP1, CCP2, and CCP3. The barrier layer covers the optical control units CCP1, CCP2, and CCP3 and prevents the optical control units CCP1, CCP2, and CCP3 from being exposed to moisture / oxygen.
[0094] The color filter layer CFL is disposed on the light control layer CCL. For example, the color filter layer CFL may be disposed directly on the color control layer CCL. In this case, the second filler layer BFL2 is omitted.
[0095] The color filter layer CFL includes a light-shielding portion BM and color filter portions CF1, CF2, and CF3. Specifically, the color filter CFL includes a first color filter CF1 that transmits a first light, a second color filter CF2 that transmits a second light, and a third color filter CF3 that transmits a third light. For example, the first color filter CF1 may be a red color filter, the second color filter CF2 may be a green color filter, and the third color filter CF3 may be a blue color filter.
[0096] Each of the first to third color filters CF1, CF2, and CF3 includes a polymer photosensitive resin and a pigment or dye. The first color filter CF1 includes a red pigment or dye, the second color filter CF2 includes a green pigment or dye, and the third color filter CF3 includes a blue pigment or dye. However, embodiments are not limited thereto. For example, the third color filter CF3 may not include a pigment or dye. The third color filter CF3 may include a polymer photosensitive resin and not include a pigment or dye.
[0097] The light-shielding portion BM is a black matrix. The light-shielding portion BM is formed of an organic or inorganic light-shielding material containing a black pigment or black dye. The light-shielding portion BM prevents light leakage and distinguishes the boundaries between adjacent color filters CF1, CF2, and CF3. In one embodiment, the light-shielding portion BM is formed of a blue filter.
[0098] The first to third color filters CF1, CF2, and CF3 are arranged corresponding to the first pixel region PXA-R, the second pixel region PXA-G, and the third pixel region PXA-B, respectively.
[0099] The base substrate BL provides a base surface on which the color filter layer CFL and the light control layer CCL are disposed. The base substrate BL may be a glass substrate, a metal substrate, a plastic substrate, or the like. However, embodiments are not limited thereto, and the base substrate BL may be an inorganic layer, an organic layer, or a composite material layer. Also, unlike the illustration, in one embodiment, the base substrate BL may be omitted. When the base substrate BL is omitted, the light control layer CCL and the color filter layer CFL are stacked in this order on the lower display substrate 100.
[0100] However, the configuration of the upper display substrate 200 is not limited thereto, and for example, the upper display substrate 200 may further include a polarizing layer or may omit the color filter layer CFL. The polarizing layer blocks external light incident on the display panel DP from the outside.
[0101] 5 is a cross-sectional view schematically illustrating a light emitting device ED according to an embodiment. Each of the first to third light emitting devices ED1, ED2, and ED3 according to an embodiment has the structure of the light emitting device ED shown in the figure.
[0102] 5, the light-emitting element ED includes a first electrode EL1, a second electrode EL2, and n stack layers SF1, SFn disposed between the first electrode EL1 and the second electrode EL2, where n is an integer greater than or equal to 2. That is, the light-emitting element ED includes at least two or more stack layers, but may also include, for example, two stack layers, three stack layers, or four or more stack layers.
[0103] Each of the stacks SF1 and SFn includes a hole transport region HTR, an emitting layer EML, and an electron transport region ETR. A charge generation layer CGL is disposed between adjacent stacks SF1 and SFn. The charge generation layer CGL includes a p-type charge generation layer and / or an n-type charge generation layer. The charge generation layer CGL promotes the movement of holes and / or charges.
[0104] The first electrode EL1 is conductive. The first electrode EL1 is made of a metal material, a metal alloy, or a conductive compound. The first electrode EL1 is an anode or a cathode. However, embodiments are not limited thereto. The first electrode EL1 is also a pixel electrode. The first electrode EL1 is a transmissive electrode, a semi-transmissive electrode, or a reflective electrode. If the first electrode EL1 is a transmissive electrode, the first electrode EL1 includes a transparent metal oxide, such as ITO (indium tin oxide), IZO (indium zinc oxide), ZnO (zinc oxide), or ITZO (indium tin zinc oxide). If the first electrode EL1 is a semi-transmissive or reflective electrode, it may contain Ag, Mg, Cu, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, Ca, LiF / Ca, LiF / Al, Mo, Ti, W, or a compound or mixture thereof (e.g., a mixture of Ag and Mg). Alternatively, the first electrode EL1 may have a multi-layer structure including a reflective or semi-transmissive film made of the above materials and a transparent conductive film made of ITO, IZO, ZnO, ITZO, or the like. For example, the first electrode EL1 may have a triple-layer structure of ITO / Ag / ITO, but is not limited thereto. Furthermore, the embodiment is not limited thereto, and the first electrode EL1 may contain the above-mentioned metal materials, a combination of two or more metal materials selected from the above-mentioned metal materials, or oxides of the above-mentioned metal materials. The thickness of the first electrode EL1 is between about 700 Å and about 10,000 Å. For example, the thickness of the first electrode EL1 may be about 1000 Å or more and about 3000 Å or less.
[0105] The hole transport region HTR is provided on the first electrode EL1. The hole transport region HTR includes at least one of a hole transport layer HTL and an electron blocking layer EBL. However, embodiments are not limited thereto, and the hole transport region HTR may further include a hole injection layer (not shown), a buffer layer (not shown), or an emission auxiliary layer (not shown). The thickness of the hole transport region HTR may be, for example, from about 50 Å to about 15,000 Å.
[0106] The hole transport region HTR may have a single layer made of a single material, a single layer made of a plurality of different materials, or a multilayer structure having a plurality of layers made of a plurality of different materials.
[0107] For example, the hole transport region HTR may have a single layer structure of a hole injection layer or a hole transport layer, or a single layer structure of a hole injection material and a hole transport material. The hole transport region HTR may also have a single layer structure of multiple different materials, or a structure of a hole injection layer / hole transport layer, a hole injection layer / hole transport layer / buffer layer, a hole injection layer / buffer layer, a hole injection layer / buffer layer, a hole injection layer / buffer layer, a hole transport layer / buffer layer, or a hole injection layer / hole transport layer / electron blocking layer stacked in order from the first electrode EL1, but embodiments are not limited thereto.
[0108] The hole transport region HTR can be formed using various methods such as vacuum deposition, spin coating, casting, Langmuir-Blodgett (LB) method, inkjet printing, laser printing, and laser induced thermal imaging (LITI).
[0109] As described above, the hole transport region HTR includes at least one of a buffer layer and an electron blocking layer in addition to the hole injection layer and the hole transport layer. The buffer layer compensates for the resonance distance depending on the wavelength of light emitted from the emission layer EML to increase light emission efficiency. The buffer layer uses a material that can be used in the hole transport region HTR. The electron blocking layer serves to prevent electrons from being injected from the electron transport region ETR into the hole transport region HTR.
[0110] The emitting layer EML is provided on the hole transport region HTR. The emitting layer EML has a thickness of, for example, about 100 Å to about 1000 Å, or about 100 Å to about 300 Å. The emitting layer EML has a single layer made of a single material, a single layer made of multiple different materials, or a multilayer structure having multiple layers made of multiple different materials.
[0111] The emission layer EML includes a low molecular weight organic material or a high molecular weight organic material as an emission material. The emission layer EML includes a host material and a dopant material. The emission layer EML is formed by adding a phosphorescent or fluorescent material as a dopant to the host material. The emission layer EML is formed by adding a thermally activated delayed fluorescence (TADF) dopant to the host material.
[0112] The light-emitting layer EML includes an anthracene derivative, a pyrene derivative, a fluoranthene derivative, a chrysene derivative, a dihydrobenzanthracene derivative, or a triphenylene derivative. Specifically, the light-emitting layer EML may include an anthracene derivative or a pyrene derivative.
[0113] The light-emitting layer MEL may be formed of a styryl derivative (e.g., 1,4-bis[2-(3-N-ethylcarbazolyl)vinyl]benzene (BCzVB), 4-(di-p-tolylamino)-4'-[(di-p-tolylamino)styryl]stilbene (DPAVB), N-(4-((E)-2-(6-((E)-4-(diphenylamino)styryl)naphthalen-2-yl)vinyl)phenyl)-N-phenylbenzyl). The compound may include azeotropic alkyl ethers such as benzophenone (N-BDAVBi), perylene and its derivatives (e.g., 2,5,8,11-tetra-t-butylperylene (TBP)), pyrene and its derivatives (e.g., 1,1-dipyrene, 1,4-dipyrenylbenzene, 1,4-bis(N,N-diphenylamino)pyrene), N1,N6-di(naphthalen-2-yl)-N1,N6-diphenylpyrene-1,6-diamine), etc. However, the compound is not limited to these, and may contain known substances as needed.
[0114] The stacks SF1 and SFn each include an emitting layer EML that emits different light. For example, the emitting layer EML included in the first stack SF1 and the emitting layer EML included in the n-th stack SFn may emit different light. However, this is not a limitation. All the emitting layers EML included in the stacks SF1 and SFn may emit the same light, or the emitting layers EML included in some of the stacks may emit the same light.
[0115] The electron transport region ETR is disposed on the light-emitting layer EML. The hole transport region HTR includes at least one of an electron transport layer ETL and a hole blocking layer HBL. However, the embodiment is not limited thereto, and the electron transport region ETR may further include an electron injection layer, a buffer layer (not shown), or an emission auxiliary layer (not shown).
[0116] The electron transport region ETR has a single layer made of a single material, a single layer made of a plurality of different materials, or a multilayer structure having a plurality of layers made of a plurality of different materials.
[0117] For example, the electron transport region ETR may have a single layer structure of an electron injection layer or an electron transport layer ETL, or a single layer structure consisting of an electron injection material and an electron transport material. The electron transport region ETR may also have a single layer structure consisting of multiple different materials, or a structure of an electron transport layer / electron injection layer or a hole blocking layer / electron transport layer / electron injection layer stacked in order from the light emitting layer EML, but is not limited to these.
[0118] The electron transport region ETR can be formed using various methods such as vacuum deposition, spin coating, LB method, inkjet printing, laser printing, laser thermal transfer (LITI), and the like.
[0119] The light-emitting element ED according to one embodiment includes an electron injection layer EIL below the second electrode EL2. However, the embodiment is not limited thereto, and an electron injection layer may be disposed in the electron transport region ETR included in each of the plurality of stack layers SF1 and SFn.
[0120] The electron injection layer EIL includes a lanthanum group metal such as Yb. However, embodiments are not limited thereto, and the electron injection layer EIL may include metal halides such as LiF, NaCl, CsF, RbCl, and RbI, metal oxides such as LiO and BaO, or lithium quinolate (LiQ). The electron injection layer EIL may also include a mixture of an electron transport material and an insulating organometallic salt. The organometallic salt has an energy band gap of about 4 eV or more. For example, the organometallic salt may include metal acetate, metal benzoate, metal acetoacetate, metal acetylacetonate, or metal stearate.
[0121] The second electrode EL2 is a common electrode. The second electrode EL2 may be a cathode or an anode, but this is not a limitation. For example, if the first electrode EL1 is an anode, the second electrode may be a cathode, and if the first electrode EL1 is a cathode, the second electrode may be an anode.
[0122] The second electrode EL2 is a transmissive electrode, a semi-transmissive electrode, or a reflective electrode. If the second electrode EL2 is a transmissive electrode, the second electrode EL2 is made of a transparent metal oxide such as ITO, IZO, ZnO, or ITZO.
[0123] If the second electrode EL2 is a semi-transmissive electrode or a reflective electrode, the second electrode EL2 contains Ag, Mg, Cu, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, Ca, LiF / Ca, LiF / Al, Mo, Ti, Yb, W, or a compound or mixture containing any of these (e.g., AgMg, AgYb, or MgAg). Alternatively, the second electrode EL2 has a multi-layer structure including a reflective film or semi-transmissive film made of the above-mentioned material and a transparent conductive film made of ITO, IZO, ZnO, ITZO, or the like. For example, the second electrode EL2 may contain any of the above-mentioned metal materials, a combination of two or more metal materials selected from the above-mentioned metal materials, or oxides of the above-mentioned metal materials.
[0124] Although not shown, the second electrode EL2 is connected to an auxiliary electrode, which can reduce the resistance of the second electrode EL2.
[0125] 6 is a cross-sectional view schematically illustrating the light emitting devices ED1, ED2, and ED3 according to an embodiment, specifically illustrating the structure of the light emitting devices ED1, ED2, and ED3 shown in FIG.
[0126] 6, in one embodiment, the first to third light-emitting elements ED1, ED2, and ED3 each include three stack layers. More specifically, the first to third light-emitting elements ED1, ED2, and ED3 each include three stack layers corresponding to the first to third stack layers SF1, SF2, and SF3 described in FIG. 4. However, the embodiment is not limited thereto, and for example, the first to third light-emitting elements ED1, ED2, and ED3 each may include two stack layers or four or more stack layers.
[0127] In one embodiment, the first light-emitting element ED1 and the second light-emitting element ED2 each include the first stack portion ST-G as the first layer stack SF1 described in Fig. 4, the second layer stack SF2 includes the first stack portion ST-G, and the third layer stack SF3 includes the first stack portion ST-G. That is, each of the multiple stack layers included in the first light-emitting element ED1 and the second light-emitting element ED2 includes the first stack portion ST-G.
[0128] As a result, the first stack portion ST-G of the first layer stack SF1 included in each of the first light-emitting element ED1 and the second light-emitting element ED2 has a uniform shape, the first stack portion ST-G of the second layer stack SF2 has a uniform shape, and the first stack portion ST-G of the third layer stack SF3 has a uniform shape, but is not limited thereto.
[0129] In one embodiment, the third light-emitting element ED3 has a different structure from the first light-emitting element ED1 and the second light-emitting element ED2. For example, the third light-emitting element ED3 may include three second stack units ST-B. More specifically, in the third light-emitting element ED3, the first to third stack units SF1, SF2, and SF3 are all second stack units ST-B.
[0130] The first stack unit ST-G emits a second light, and the second stack unit ST-B emits a third light, for example, the first stack unit ST-G may emit green light, and the second stack unit ST-B may emit blue light.
[0131] The second stack unit ST-B of each layer included in the third light emitting element ED3 is not integral with the first stack unit ST-G of each layer included in the first light emitting element ED1 and the second light emitting element ED2. That is, the second stack unit ST-B of the third light emitting element ED3 is separated from the first stack unit ST-G of the first light emitting element ED1 and the second light emitting element ED2 by a bank BK. Meanwhile, by disposing the bank BK at the boundary of the third light emitting element ED3, the hole transport region HTR, the emission layer EML, the electron transport region ETR, etc. included in the second stack unit ST-B of each stack layer of the third light emitting element ED3 are provided by being patterned using an inkjet printing method.
[0132] 6, the pixel definition layer PDL and the bank BK are shown as having separate shapes, but are not limited thereto, and the pixel definition layer PDL and the bank BK may have an integrated shape. For example, the pixel definition layer PDL and the bank BK may include the same material.
[0133] Each of the first stack unit ST-G and the second stack unit ST-B includes the hole transport region, the light-emitting layer, and the electron transport region described above. Fig. 6 shows a simplified configuration in which the hole transport region includes electron transport layers ETL1 and ETL2, and the hole transport region includes hole transport layers HTL1 and HTL2.
[0134] For example, the first stack unit ST-G may include a first hole-transporting layer HTL1, a first light-emitting layer EML-G, and a first electron-transporting layer ETL1. The first light-emitting layer EML-G emits the second light.
[0135] For example, the second stack unit ST-B may include a second hole-transporting layer HTL2, a second light-emitting layer EML-B, and a second electron-transporting layer ETL2. The second light-emitting layer EML-B emits a third light.
[0136] However, the embodiment is not limited to this, and each of the first stack unit ST-G and the second stack unit ST-B may further include an electron injection layer, a hole blocking layer, a hole injection layer, an electron blocking layer, a buffer layer, etc.
[0137] The first light emitting element ED1 includes only the first stack unit ST-G and emits the second light. Referring to FIG. 4, the first light control unit CCP1 overlapping the first light emitting element ED1 includes the first quantum dot QD1 and converts the second light into the first light.
[0138] The second light emitting element ED2 includes only the first stack unit ST-G and emits the second light. Referring to Fig. 4, the second light control unit CCP2 overlapping the second light emitting element ED2 does not include a light converter and transmits the second light.
[0139] The third light emitting element ED3 includes only the second stack unit ST-B and emits the third light. Referring to Fig. 4, the third light control unit CCP3 overlapping the third light emitting element ED3 does not include a light converter and transmits the third light.
[0140] A charge generation layer is disposed between the stack units ST-G and ST-B. The charge generation layer includes p-type charge generation layers P-CGL1 and P-CGL2 and n-type charge generation layers N-CGL1 and N-CGL2, and promotes the movement of holes and / or charges between the stack units ST-G and ST-B. Each of the charge generation layers P-CGL1, P-CGL2, N-CGL1, and N-CGL2 is disposed in contact with one of the stack units ST-G and ST-B.
[0141] In one embodiment, first charge generation layers N-CGL1 and P-CGL1 are stacked and disposed between the first stack units ST-G, and second charge generation layers N-CGL2 and P-CGL2 are stacked and disposed between the second stack units ST-B.
[0142] Specifically, an n-type first charge generation layer N-CGL1 is disposed above the first stack portion ST-G of the first layer stack SF1 to provide electrons to the first stack portion ST-G of the first layer stack SF1. A p-type first charge generation layer P-CGL1 is disposed below the first stack portion ST-G of the second layer stack SF2 to provide holes to the first stack portion ST-G of the second layer stack SF2. An n-type second charge generation layer N-CGL2 is disposed above the second stack portion ST-B of the first layer stack SF1 to provide electrons to the second stack portion ST-B of the first layer stack SF1. A p-type second charge generation layer P-CGL2 is disposed below the second stack portion ST-B of the second layer stack SF2 to provide holes to the second stack portion ST-B of the second layer stack SF2.
[0143] On the other hand, when sequentially stacked stack layers include different stack portions, the n-type charge generation layer and the p-type charge generation layer are determined according to the type of the stack portion that directly contacts them. More specifically, referring to FIG. 8, a first n-type charge generation layer N-CGL1 is disposed on the first stack portion ST-G of the second layer stack SF2, and a second p-type charge generation layer P-CGL2 is disposed under the second stack portion ST-B of the third layer stack SF3.
[0144] The first p-type charge generation layer P-CGL1 and the first n-type charge generation layer N-CGL1, and the second p-type charge generation layer P-CGL2 and the second n-type charge generation layer N-CGL2, may contain different materials. By using different materials for each charge generation layer, the characteristics of the charge generation layer can be adjusted, but this is not limiting.
[0145] In one embodiment, the p-type second charge generation layer P-CGL2 has higher charge generation characteristics than the p-type first charge generation layer P-CGL1. For example, the material contained in the p-type second charge generation layer P-CGL2 may have higher charge generation characteristics than the material contained in the p-type first charge generation layer P-CGL1.
[0146] The p-type first charge generation layer P-CGL1 includes an organic dopant. The organic dopant may be, for example, a p-type dopant. Specifically, the p-type dopant may include at least one of 4-[[2,3-bis[cyano-(4-cyano-2,3,5,6-tetrafluorophenyl)methylidene]cyclopyropyridene]-cyanomethyl]-2,3,5,6-tetrafluorobenzonitrile (hereinafter referred to as NDP9), 1,4,5,8,9,11-hexaazatriphenylene-hexacarbonitrile (HAT-CN), 2,3,5,6-tetrafluoro-7,7,8,8-tetracyanoquinodimethane (FA-TCNQ), and tetracyanoquinodimethane (TCNQ). In one embodiment, the doping concentration of the organic dopant included in the p-type first charge generation layer P-CGL1 is 0.5% or more and 30% or less.
[0147] The p-type second charge generation layer P-CGL2 includes an inorganic dopant, such as a post-transition metal such as Al, Ga, In, Tl, Sn, Pb, Fl, Bi, or Po; a semimetal such as B, Si, Ge, As, Sb, Te, or At; Bi2Te3; Bi x Te y , Sb2Te3, In2Te3, Ga2Te2, Al2Te3, Tl2Te3, As2Te3, GeSbTe, SnTe, PbTe, SiTe, GeTe, FlTe, SiGe, AlInSb, AlGaSb, AlAsSb, GaAs, InSb, AlSb, AlAs, Al x In x Sb, Al x In (1-x) The p-type second charge generation layer P-CGL2 may include at least one of compounds thereof such as Sb, AlSb, GaSb, AlInGaAs, etc., and transition metal and halide compounds such as CuI, AgI, AuI, CoI2, NiI2, PtI2, CuCl, CuBr, AgCl, AgBr, etc. In one embodiment, the doping concentration of the inorganic dopant contained in the p-type second charge generation layer P-CGL2 is 0.5% or more and 30% or less.
[0148] 6, the electron injection layer EIL is shown to overlap the first to third pixel regions PXA-R, PXA-G, and PXA-B and to have an integral shape, but this is not a limitation, and the electron injection layer EIL may contain different materials or have different concentrations of materials depending on the pixel regions it overlaps.
[0149] In one embodiment, a capping layer CPL is further disposed on the first to third light emitting elements ED1, ED2, and ED3. The capping layer CPL may include a multilayer or a single layer. In one embodiment, the capping layer CPL is an organic layer or an inorganic layer. For example, when the capping layer CPL includes an inorganic material, the inorganic material may be an alkali metal compound such as LiF, an alkaline earth compound such as MgF2, SiON, SiN x , SiO y It may also include the following.
[0150] For example, when the capping layer CPL includes an organic material, the organic material may include α-NPD, NPB, TPD, m-MTDATA, Alq, CuPc, TPD15 (N,N,N',N'-tetra(biphenyl-4-yl)biphenyl-4,4'-diamine), TCTA (4,4',4"-tris(carbazolesol-9-yl)triphenylamine), or the like, or may include an epoxy resin, or an acrylate such as a methacrylate.
[0151] However, the embodiment is not limited to this, and the capping layer CPL may be omitted.
[0152] Figure 7 is a cross-sectional view of a display panel DP according to one embodiment. Figure 8 is a cross-sectional view of light-emitting elements ED1, ED2, and ED3 according to the embodiment of Figure 7. Hereinafter, in Figures 7 and 8, the same reference numerals are used for the configurations described above, and their description will be omitted, and differences will be mainly described.
[0153] In one embodiment, the first light-emitting element ED1 includes a first stack portion ST-G as the first layer stack SF1 described in FIG. 4, a first stack portion ST-G as the second layer stack SF2, and a second stack portion ST-B as the third layer stack SF3. That is, the first light-emitting element ED1 includes two first stack portions ST-G and one second stack portion ST-B. However, the stacking order of the first stack portion ST-G and the second stack portion ST-B is not limited to this. For example, the second stack portion ST-B may be the first layer stack SF1 or the second layer stack SF2. Furthermore, the configuration of the first light-emitting element ED1 is not limited to this. For example, the first light-emitting element ED1 may include four stack portions, or may include, for example, three second stack portions ST-B and one first stack portion ST-G.
[0154] In one embodiment, the second light emitting element ED2 has the same structure as the first light emitting element ED1. For example, the second light emitting element ED2 includes a first stack portion ST-G as the first layer stack SF1 described in FIG. 4, a first stack portion ST-G as the second layer stack SF2, and a second stack portion ST-B as the third layer stack SF3. However, the stacking order and structure are not limited thereto, and the second light emitting element ED2 may have various stacking orders and structures, as with the first light emitting element ED1.
[0155] In one embodiment, the third light-emitting element ED3 has a different structure from the first light-emitting element ED1 and the second light-emitting element ED2. For example, the third light-emitting element ED3 may include three second stack units ST-B. More specifically, in the third light-emitting element ED3, the first to third stack units SF1, SF2, and SF3 are all third stack units ST-B.
[0156] 7 and 8, the third-layer stack SF3 of the first to third light-emitting elements ED1, ED2, and ED3 is the second stack section ST-B, so that the third-layer stack SF3 of the first to third light-emitting elements ED1, ED2, and ED3 has an integral shape. If some of the stack layers are configured as an integral shape, the process is simplified.
[0157] On the other hand, the bank BK disposed on the pixel definition film PDL overlaps the first layer stack SF1 and the second layer stack SF2 of the third light-emitting element ED3 in the third direction DR3, but does not overlap the third layer stack SF3. In other words, the bank BK is not disposed between the third layer stacks having an integral shape. However, the embodiment is not limited to this.
[0158] The first light emitting element ED1 includes both the first stack part ST-G and the second stack part ST-B and emits the second light and the third light. Referring to Fig. 7, the first light control part CCP1 overlapping the first light emitting element ED1 includes the first quantum dot QD1 and converts the second light and the third light into the first light.
[0159] The second light emitting element ED2 includes both the first stack unit ST-G and the second stack unit ST-B and emits the second light and the third light. Referring to Fig. 7, the second light controller CCP2 overlapping the second light emitting element ED2 transmits the second light. The second light controller CCP2 also includes second quantum dots QD2 that convert the third light into the second light. For example, the second quantum dots QD2 included in the second light controller CCP2 may be green quantum dots that convert the third light into the second light.
[0160] In the display panel DP of the present invention, the first light-emitting element ED1 and the second light-emitting element ED2 include the first stack portion ST-G including the first light-emitting layer EML-G, thereby improving the luminous efficiency of the display panel DP.
[0161] Specifically, in the display panel of the present invention, the light-emitting layer emits both green and blue light, thereby improving the light conversion rate of green light in the light control layer CCL, and thereby increasing the amount of light having a central wavelength of 500 nm to 550 nm by 60% or more compared to a display panel in which the light-emitting layer emits only blue light.
[0162] Hereinafter, the results of evaluating the characteristics of the display panel of the present invention will be described with reference to specific examples, but the present invention is not limited to the following examples.
[0163] (Display panel production and evaluation)
[0164] Display panels of Examples 1 to 5 and Comparative Example 1 including first to third light-emitting elements as shown in FIG. 6 were fabricated by varying only the inorganic material and doping concentration of the p-type second charge generation layer P-CGL2 as shown in Table 1 and maintaining all other configurations the same.
[0165] [Table 1]
[0166] Referring to Table 1, Examples 1 to 5 each have a p-type second charge generation layer formed by doping with an inorganic material, while Comparative Example 1 has a p-type second charge generation layer formed by doping with the same organic material as the p-type first charge generation layer.
[0167] Table 2 shows the measured driving voltage of the display panel manufactured according to Table 1. The driving voltage shown in Table 2 is 10 mA / cm 2 The voltage values measured based on the current density are shown.
[0168] [Table 2]
[0169] Referring to Table 2, it can be seen that the light-emitting elements of Examples 1 to 5 achieve lower voltage, higher efficiency, and longer life than the comparative example.
[0170] As a result, it has been confirmed that the display panel of one embodiment of the present invention adjusts the charge generation characteristics of the p-type charge generation layer by the light-emitting layer, and in particular, adjusts the charge generation characteristics of the second p-type charge generation layer to be higher than that of the first p-type charge generation layer, thereby reducing the driving voltage when the device is driven, thereby improving efficiency and lifespan.
[0171] The display panel DP of the present invention includes a first stack unit ST-G and a second stack unit ST-B that emit different colors from each other, and the p-type second charge generation layer arranged between the second stack unit ST-B that emits blue light has a higher charge generation rate than the p-type second charge generation layer arranged between the first stack unit ST-G that emits green light, thereby improving the efficiency and lifespan of the element.
[0172] Although the present invention has been described above with reference to preferred embodiments, it will be understood by those skilled in the art or those with ordinary knowledge in the art that various modifications and variations of the present invention can be made without departing from the spirit and technical scope of the present invention as set forth in the claims below.
[0173] Therefore, the technical scope of the present invention should be determined by the claims, not by the contents of the detailed description of the specification. [Explanation of symbols]
[0174] EL1: first electrode; EL2: second electrode; ED1, ED2, ED3: first to third light emitting elements; ST-G: first stack section; ST-B: second stack section; SF1, SF2, SF3: first to third stack layers
Claims
1. an upper display substrate including a first pixel region emitting a first light, a second pixel region emitting a second light different from the first light, and a third pixel region emitting a third light different from the first light and the second light; a lower display substrate including a first light emitting element overlapping the first pixel region, a second light emitting element overlapping the second pixel region, and a third light emitting element overlapping the third pixel region; the first light emitting element and the second light emitting element each include one or more of a first stack unit including a first light emitting layer that emits the second light and a first charge generation layer; the third light emitting element includes at least one of a second stack unit including a second light emitting layer that emits the third light and a second charge generation layer; the first charge generation layer comprises an organic dopant; The display panel, wherein the second charge generating layer includes an inorganic dopant.
2. the first charge generation layer includes a p-type first charge generation layer and an n-type first charge generation layer; the second charge generation layer includes a p-type second charge generation layer and an n-type second charge generation layer; the p-type first charge generation layer includes the organic dopant; The display panel of claim 1 , wherein the second p-type charge generation layer includes the inorganic dopant.
3. 2. The display panel of claim 1, wherein the organic dopant includes at least one of 4-[[2,3-bis[cyano-(4-cyano-2,3,5,6-tetrafluorophenyl)methylidene]cyclopyropyridene]-cyanomethyl]-2,3,5,6-tetrafluorobenzonitrile (NDP9), 1,4,5,8,9,11-hexaazatriphenylene-hexacarbonitrile (HAT-CN), 2,3,5,6-tetrafluoro-7,7,8,8-tetracyanoquinodimethane (FA-TCNQ), and tetracyanoquinodimethane (TCNQ).
4. 2. The display panel of claim 1, wherein the inorganic dopant includes at least one of a post-transition metal, a semi-metal, a compound of a post-transition metal and a semi-metal, and a compound of a transition metal and a halogen.
5. the first stack unit further includes a first hole transport region disposed below the first light-emitting layer and a first electron transport region disposed above the first light-emitting layer; The display panel of claim 1 , wherein the second stack unit further comprises a second hole transport region disposed below the second light emitting layer and a second electron transport region disposed above the second light emitting layer.
6. the lower display substrate further includes a bank disposed between the second light emitting element and the third light emitting element, The display panel according to claim 1 , wherein the bank is not disposed between the first light-emitting element and the second light-emitting element.
7. the upper display substrate further includes non-pixel regions adjacent to the first pixel region, the second pixel region, and the third pixel region; the lower display substrate further includes a pixel defining layer overlapping the non-pixel region, The display panel of claim 6 , wherein the bank overlaps the pixel defining film.
8. The display panel of claim 1 , wherein the first stack portion of the first light-emitting element and the first stack portion of the second light-emitting element have an integral shape.
9. The display panel of claim 1 , wherein the first light emitting element and the second light emitting element further include one or more of the second stack unit and the second charge generation layer, respectively.
10. The upper display substrate is a first light control unit overlapping the first pixel region and including first quantum dots; a second light control unit that overlaps the second pixel region and transmits the second light; a third light control unit that overlaps the third pixel region and transmits the third light, The display panel of claim 1 , wherein the first quantum dots convert the second light into the first light.
11. The upper display substrate is a first light control unit overlapping the first pixel region and including first quantum dots; a second light control unit overlapping the second pixel region and including second quantum dots; a third light control unit that overlaps the third pixel region and transmits the third light, the first quantum dot converts the second light or the third light into the first light; The display panel of claim 9 , wherein the second quantum dots convert the third light into the second light.
12. The display panel of claim 9 , wherein the second stack portion of the first light emitting element and the second stack portion of the second light emitting element are integral with at least one of the second stack portions of the third light emitting element.
13. The display panel according to claim 1 , wherein the third light emitting element does not include the first stack portion.
14. The display panel according to claim 1 , wherein the first light-emitting element and the second light-emitting element have the same structure.
15. 2. The display panel according to claim 1, wherein the first light is red light, the second light is green light, and the third light is blue light.
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