Information processing device and control method

Abstract

To enable easily performing cause analysis when a failure occurs at start-up.SOLUTION: An information processing apparatus comprises: a first processor that performs POST (Power On Self Test) processing based on BIOS (Basic Input Output System) at start-up, and updates a POST code depending on performing each processing at the POST processing; and a second processor that acquires the POST code updated by the first processor to store in a memory when an operation instructing forced termination based on hardware is detected. The first processor acquires the POST code stored by the second processor from the memory to output, by performing processing based on a specific application program after reactivation.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to an information processing device and a control method. [Background technology]

[0002] BACKGROUND ART Information processing devices such as PCs (Personal Computers) execute a power-on self-test (POST) process by a basic input output system (BIOS) after being powered on and before an operating system (OS) starts up (see, for example, Patent Document 1).

[0003] This POST process includes multiple tasks, such as initializing the motherboard and connected devices, updating the BIOS settings on the hardware and OS, and preparing to start the OS, and each task outputs a different POST code value to a register (I / O Port 80h). During the product development stage, for example, by connecting a special debugging device externally, if a problem such as a system hang-up occurs during the POST process, it is possible to obtain the POST code at the time of the occurrence and analyze and estimate the location and cause of the hang-up. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2014-010492 Summary of the Invention [Problem to be solved by the invention]

[0005] However, even after the product is delivered to the user, there are rare cases where a system hang-up or other problem occurs depending on the type of connected device or the type of program being executed. Once the product is delivered to the user, it is not connected to any special devices like in the development stage, so the POST code at the time of the problem cannot be obtained in real time. Even if the product is handed over from the user to analyze the cause of a hang-up, if the problem occurs infrequently, it is often difficult to reproduce it. Even if the problem is reproduced, there is no guarantee that the reproduced issue is actually the same as the issue that occurred when the user was using the product. This has led to problems such as the analysis of the cause being difficult, taking a long time, and increasing the burden on the development department.

[0006] The present invention has been made in consideration of the above-mentioned circumstances, and one of its objects is to provide an information processing device and a control method that can easily analyze the cause of a failure that occurs during startup. [Means for solving the problem]

[0007] The present invention has been made to solve the above-mentioned problems, and an information processing device according to a first aspect of the present invention comprises a first processor that executes a POST (Power On Self Test) process using a BIOS (Basic Input Output System) at startup and updates a POST code in accordance with the execution of each process in the POST process, and a second processor that, when an operation instructing a forced termination by hardware is detected, acquires the POST code updated by the first processor and stores it in memory, and after restarting, the first processor acquires and outputs the POST code stored by the second processor from the memory through processing by a specific application program.

[0008] In the above information processing device, the first processor may start an OS (Operating System) after the POST processing after rebooting, execute the specific application program on the OS, and obtain a POST code from the memory using an interface that the OS has through processing by the specific application program.

[0009] In the information processing device, the first processor may store, in a storage device, the POST code acquired from the memory by processing of the specific application program after rebooting.

[0010] In the above information processing device, when the second processor stores the POST code updated by the first processor in the memory, it may associate and store the POST code with date and time information corresponding to startup, and after restarting, the first processor may retrieve the POST code and date and time information stored by the second processor from the memory through processing by the specific application program and save them in a storage device.

[0011] In the information processing device, the operation for instructing a forced shutdown by the hardware may be provided as an operation for a user to forcibly terminate a state in which the system is hung up.

[0012] In the information processing device, the operation for instructing the forced shutdown by the hardware may be a long press operation of pressing the power button for a certain period of time or more.

[0013] In the above-mentioned information processing device, the first processor may, at startup, set a POST code in a specific register in response to executing a process in the POST processing, and update the POST code set in the register in response to executing the next process in the POST processing.

[0014] Furthermore, a control method in an information processing device according to a second aspect of the present invention includes the steps of: a first processor executing a POST (Power On Self Test) process by a BIOS (Basic Input Output System) at startup and updating a POST code in accordance with the execution of each process in the POST process; a second processor, when detecting an operation instructing a forced termination by hardware, retrieving the POST code updated by the first processor and storing it in memory; and, after rebooting, the first processor retrieving and outputting the POST code stored by the second processor from the memory through processing by a specific application program. [Effects of the Invention]

[0015] According to the above aspect of the present invention, when a failure occurs during startup, the cause of the failure can be easily analyzed. [Brief explanation of the drawings]

[0016] [Figure 1] FIG. 1 is a perspective view showing the appearance of an information processing apparatus according to an embodiment. [Figure 2] FIG. 1 is a block diagram showing an example of a hardware configuration of an information processing apparatus according to an embodiment. [Figure 3] FIG. 1 is a block diagram showing an example of the functional configuration of an information processing apparatus according to an embodiment. [Figure 4] 10 is a flowchart showing an example of a POST code acquisition process according to the embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0017] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a perspective view showing the appearance of an information processing device according to this embodiment. The illustrated information processing device 1 is a clamshell-type notebook PC (Personal Computer). The information processing device 1 includes a first housing 101, a second housing 102, and a hinge mechanism 103. The first housing 101 and the second housing 102 are substantially rectangular, plate-shaped (e.g., flat) housings. One side of the first housing 101 and one side of the second housing 102 are coupled (connected) via the hinge mechanism 103, and the first housing 101 and the second housing 102 are relatively rotatable around a rotation axis formed by the hinge mechanism 103. A state in which the first housing 101 and the second housing 102 overlap and are closed (referred to as a "closed state") is when the opening angle θ between the first housing 101 and the second housing 102 around the rotation axis is substantially 0°. In the closed state, the surfaces of first housing 101 and second housing 102 that face each other are referred to as the "inner surfaces," and the surfaces opposite the inner surfaces are referred to as the "outer surfaces." The opening angle θ can also be said to be the angle formed between the inner surfaces of first housing 101 and second housing 102. A state in which first housing 101 and second housing 102 are open relative to the closed state is referred to as the "open state." The open state is a state in which first housing 101 and second housing 102 have been rotated relative to each other until the opening angle θ becomes larger than a preset threshold value (for example, 10°).

[0018] A display unit 14 is provided on the inner surface of the first housing 101. A keyboard 33 is provided on the inner surface of the second housing 102. In the example shown in the figure, the keyboard 33 is a physical keyboard. The keyboard 33 may include a touchpad or may be a software keyboard. In the case of a software keyboard, a display unit is also provided on the inner surface of the second housing 102, for example.

[0019] Furthermore, an external interface such as a USB connector 26, a power button 34, and the like are arranged on the side surface of the second housing 102. Note that these arrangements are merely examples, and the power button 34 may be arranged on the inner surface of the second housing 102, for example.

[0020] In the closed state, the display unit 14 cannot be seen and the keyboard 33 cannot be operated. On the other hand, in the open state, the display unit 14 can be seen and the keyboard can be operated (i.e., the information processing device 1 can be used). In a typical usage mode when a user uses the information processing device 1, the information processing device 1 is often in the open state, for example, within the range of 90°≦open angle θ≦180°.

[0021] When the user closes the information processing device 1 and then presses the power button 34, the information processing device 1 starts up its system and transitions to a usable state. For example, when the user presses the power button 34, the information processing device 1 executes a power-on self-test (POST) process by a basic input output system (BIOS), and then starts up an operating system (OS).

[0022] During POST processing, the BIOS outputs a different POST code value for each task to a register (for example, I / O Port 80h) and updates the POST code value. If a system hangs up during POST processing and the POST process stops, the last POST code output will remain set in the register. If this POST code could be obtained, it would be possible to analyze the location and cause of the hang-up, but the POST code cannot be obtained while the system is hung up.

[0023] Furthermore, an operation for instructing a hardware forced shutdown is provided as an operation for the user to forcibly terminate a hung-up state. An example of an operation for instructing a hardware forced shutdown is a long press of the power button 34 for a certain period of time (e.g., 10 seconds or more). For example, if the user performs a hardware forced shutdown by long pressing of the power button 34 to escape from a hung-up state and then restarts the computer, the POST code value that was set in the register due to the forced shutdown has been lost, and so the POST code cannot be obtained in this case either.

[0024] Therefore, when the information processing device 1 detects an operation instructing a forced shutdown by hardware (for example, a long press of the power button 34), it acquires the POST code set in the register and stores it so that it can be acquired after restarting even if the device is forced to shut down. As a result, even if a failure such as a hang-up that occurs infrequently and is difficult to reproduce occurs at startup in the user's usage environment, the information processing device 1 can acquire the POST code that was last set when the failure occurred after restarting, making it easy to analyze the cause. The configuration of the information processing device 1 will be described in detail below.

[0025] [Hardware configuration of information processing device] 2 is a schematic block diagram showing an example of the main hardware configuration of an information processing device according to this embodiment, in which components corresponding to those in FIG. 1 are given the same reference numerals.

[0026] As shown in FIG. 2, the information processing device 1 includes a CPU 11, a main memory 12, a video subsystem 13, a display unit 14, a chipset 21, a BIOS memory 22, a storage 23, an audio system 24, a communication unit 25, a USB connector 26, an EC (Embedded Controller) 31, an EC memory 32, a keyboard 33, a power button 34, and a power circuit 35.

[0027] In this embodiment, the CPU 11 and the chipset 21 correspond to the main control unit 10. The main control unit 10 is an example of a processor (first processor) that executes BIOS and OS programs. The main control unit 10 may be configured as an SoC (System on a Chip).

[0028] The CPU (Central Processing Unit) 11 executes various arithmetic processes under program control and controls the entire information processing device 1. For example, the CPU 11 loads a BIOS program from the BIOS memory 22 into the main memory 12 and executes BIOS processing (POST processing, etc.). The CPU 11 also loads an OS, various drivers, various services / utilities, application programs, etc. from the storage 23 into the main memory 12 and executes the respective processing.

[0029] The main memory 12 is a writable memory used as a read area for programs executed by the CPU 11 or as a work area for writing processing data for the programs being executed. The main memory 12 is configured, for example, with multiple DRAM (Dynamic Random Access Memory) chips. The executable programs include the BIOS, the OS, various drivers for operating peripheral devices, various service / utilities, application programs, etc.

[0030] Video subsystem 13 is a subsystem for realizing functions related to image display, and includes a video controller. This video controller processes drawing commands from CPU 11, writes the processed drawing information to a video memory, and also reads the drawing information from the video memory and outputs it to display unit 14 as drawing data (display data).

[0031] The display unit 14 is configured to include, for example, a liquid crystal display, an organic EL display, etc. The display unit 14 displays a display screen based on drawing data (display data) output from the video subsystem 13.

[0032] The chipset 21 includes controllers for a USB (Universal Serial Bus), a Serial ATA (AT Attachment), an SPI (Serial Peripheral Interface) bus, a PCI (Peripheral Component Interconnect) bus, a PCI-Express bus, and an LPC (Low Pin Count) bus, and is connected to a plurality of devices. In FIG. 2, a BIOS memory 22, a storage 23, an audio system 24, a communication unit 25, and a USB connector 26 are connected to the chipset 21 as examples of devices.

[0033] The BIOS memory 22 is configured by an electrically rewritable nonvolatile memory such as an EEPROM (Electrically Erasable Programmable Read Only Memory) or a flash ROM, etc. The BIOS memory 22 stores the BIOS, system firmware for controlling the EC 31, etc.

[0034] The storage 23 includes a nonvolatile storage device such as a hard disk drive (HDD), a solid state drive (SSD), etc. For example, the storage 23 stores an OS, various drivers, various services / utilities, application programs, various data, etc.

[0035] The audio system 24 records, plays back, and outputs sound data. The communication unit 25 connects to a communication network via a wireless LAN (Local Area Network) or a wired LAN, and performs data communication.

[0036] The USB connector 26 is a connector for connecting peripheral devices that use USB. For example, the USB connector 26 has multiple connectors so that it can be connected to multiple peripheral devices. The USB connector 26 may include either or both of a USB Type-A or USB Type-C connector.

[0037] The EC 31 (an example of a second processor) is a one-chip microcomputer that monitors and controls various devices (peripheral devices, sensors, etc.) regardless of the operating state of the system of the information processing device 1. The EC 31 is connected to, for example, an EC memory 32, a keyboard 33, a power button 34, and a power circuit 35, and controls the operations of these devices.

[0038] The EC memory 32 is, for example, a non-volatile memory (for example, NVRAM: Non-Volatile RAM) and stores various data under the control of the EC 31. For example, when the EC 31 detects an operation to instruct a forced shutdown by hardware (for example, a long press of the power button 34), it acquires a POST code set in a register (for example, I / O Port 80h) and stores it in the EC memory 32. The EC memory 32 may be built into the EC 31.

[0039] As described above, the keyboard 33 is, for example, a physical keyboard. The keyboard 33 may include a touchpad or may be a software keyboard. When the user operates the keyboard 33 (typing operation), the keyboard 33 transmits an operation signal indicating the operated key to the EC 31. Based on the operation signal transmitted from the keyboard 33, the EC 31 executes processing corresponding to the key operated by the user.

[0040] The power button 34 is an operator that allows a user to instruct power on or power off. When operated by a user, the power button 34 transmits an operation signal corresponding to the operation to the EC 31. The EC 31 detects an operation on the power button 34 based on the operation signal transmitted from the power button 34. For example, when the EC 31 receives an operation signal from the power button 34 while the system is in a stopped state or a standby state (standby, sleep, etc.), the EC 31 detects this as an operation instructing startup (power on) of the system from the stopped state or the standby state (standby, sleep, etc.). Furthermore, when the EC 31 receives an operation signal from the power button 34 corresponding to a long press operation of pressing the button for a certain period of time (e.g., 10 seconds) or longer, the EC 31 detects this as an operation instructing a forced shutdown (power off) by hardware.

[0041] The power supply circuit 35 includes, for example, a DC / DC converter, a charge / discharge unit, a battery unit, an AC / DC adapter, etc., and converts a DC voltage supplied from the AC / DC adapter or the battery unit into a plurality of voltages required to operate the information processing device 1. The power supply circuit 35 also controls the supply of power to each part of the information processing device 1 based on the power-on or power-off control from the EC 31.

[0042] [Functional configuration of information processing device] Next, a functional configuration will be described in which the information processing device 1 stores the POST code at startup when it detects an operation instructing a forced termination by hardware (for example, a long press of the power button 34) and retrieves it after restarting.

[0043] 3 is a block diagram showing an example of the functional configuration of the information processing device 1 according to this embodiment. In this figure, components corresponding to those in FIGS. 1 and 2 are given the same reference numerals.

[0044] The main control unit 10 executes the POST process by the BIOS. The main control unit 10 outputs and updates the POST code to a register (e.g., I / O Port 80h) in response to the execution of each task (process) in the POST process by the BIOS. For example, if a system hang-up occurs during the POST process, the last updated POST code before the hang-up occurs is set in the register.

[0045] When the EC 31 detects an operation instructing a forced shutdown by hardware (for example, a long press of the power button 34), it obtains the POST code updated by the main control unit 10 (BIOS) (for example, the POST code last updated before a hang-up occurred) from a register (for example, I / O Port 80h) and stores it in the EC memory 32. Furthermore, in response to detecting an operation instructing a forced shutdown by hardware (for example, a long press of the power button 34), the EC 31 executes a forced shutdown process by hardware to turn off the power.

[0046] Thereafter, when the EC 31 detects an operation to instruct power-on (for example, pressing the power button 34), it controls the power to be turned on and instructs the main control unit 10 to start up (restart). The main control unit 10 executes POST processing by the BIOS, and starts up the OS if no hang-up occurs. Furthermore, when the main control unit 10 starts up the OS, it executes a specific application (application program) that has a function to acquire a POST code from the EC memory 32. This specific application will be referred to below as the "log application."

[0047] The main control unit 10 acquires the POST code from the EC memory 32 through processing by the log application. For example, the main control unit 10 acquires the POST code from the EC memory 32 through processing by the log application, using an ACPI (Advanced Configuration and Power Interface) object of the OS. The main control unit 10 outputs the POST code acquired through processing by the log application to the storage 23 and stores it.

[0048] [POST code acquisition process] Next, the operation of the POST code acquisition process in which the information processing device 1 stores the POST code at startup when it detects an operation instructing a forced termination by hardware (for example, a long press of the power button 34) and acquires it after restarting will be described. 4 is a flowchart showing an example of a POST code acquisition process according to this embodiment. When the power button 34 is pressed, the following POST code acquisition process starts.

[0049] (Step S101) When the EC 31 detects that the power button 34 has been pressed, it controls the power to be turned on and instructs the main control unit 10 to start up. The main control unit 10 starts the POST processing by the BIOS. The main control unit 10 outputs and updates the POST code to a register (for example, I / O Port 80h) in response to the execution of each task (process) in the POST processing by the BIOS. Then, the process proceeds to step S103.

[0050] (Step S103) The EC 31 determines whether or not a system hang-up has occurred during the POST process. If the EC 31 determines that a system hang-up has occurred (YES), the EC 31 proceeds to the process of step S105.

[0051] (Step S105) In the state where the system is hung up, the EC 31 determines whether or not an operation instructing a forced shutdown by hardware (for example, a long press of the power button 34) has been detected. If the EC 31 determines that an operation instructing a forced shutdown by hardware has not been detected (NO), the state where the system is hung up continues, and the process of step S105 is performed again. On the other hand, if the EC 31 determines that an operation instructing a forced shutdown by hardware has been detected (YES), the process proceeds to step S107.

[0052] (Step S107) The EC 31 acquires the POST code updated by the main control unit 10 (BIOS) from a register (for example, I / O Port 80h) and stores it in the EC memory 32. Then, the process proceeds to step S109.

[0053] (Step S109) The EC 31 executes a forced shutdown process by hardware to turn off the power, and then proceeds to the process of step S111.

[0054] (Step S111) The EC31 determines whether or not an operation to instruct power-on (for example, pressing the power button 34) has been detected. If the EC31 determines that an operation to instruct power-on (for example, pressing the power button 34) has not been detected (NO), the power-off state continues, and the process of step S111 is performed again. On the other hand, if the EC31 determines that an operation to instruct power-on (for example, pressing the power button 34) has been detected (YES), the process returns to step S101.

[0055] (Step S101) The EC 31 controls to turn on the power and instructs the main control unit 10 to restart. The main control unit 10 starts the POST process by the BIOS, and the process proceeds to step S103.

[0056] (Step S103) The EC 31 determines whether or not a system hang-up has occurred during the POST process. If the EC 31 determines that a system hang-up has not occurred (NO), the EC 31 proceeds to the process of step S201 because the system hang-up has not occurred again.

[0057] (Step S201) The main control unit 10 starts up the OS and executes the log application, and then proceeds to the processing of step S203.

[0058] (Step S203) The main control unit 10 (log application) determines whether the value of the POST code in the EC memory 32 is different from its initial value. The initial value is a value that is preset at the time of shipment. When an operation instructing a forced shutdown by hardware (for example, a long press of the power button 34) is detected, the value of the POST code in the EC memory 32 is changed from its initial value. Therefore, depending on whether the value is different from the initial value, it can be determined whether it is necessary to acquire the POST code from the EC memory 32. If the value of the POST code in the EC memory 32 is the initial value (NO), the main control unit 10 (log application) ends this process without acquiring the POST code from the EC memory 32. On the other hand, if the main control unit 10 (log application) determines that the value of the POST code in the EC memory 32 is different from the initial value (YES), the process proceeds to step S205.

[0059] (Step S205) The main control unit 10 (log application) acquires the POST code from the EC memory 32. For example, the main control unit 10 (log application) acquires the POST code from the EC memory 32 using an ACPI object. Furthermore, when the main control unit 10 (log application) acquires the POST code from the EC memory 32, it changes the value of the POST code in the EC memory 32 to an initial value. Then, the main control unit 10 (log application) outputs the acquired POST code to the storage 23 and stores it.

[0060] The main control unit 10 may associate the POST code acquired by processing by the log application with date and time information and output the code to the storage 23 for storage. For example, when the EC 31 acquires the POST code updated by the main control unit 10 (BIOS) and stores it in the EC memory 32, it may associate the code with date and time information corresponding to startup and store the code in the EC memory 32. The date and time information corresponding to startup is, for example, the date and time information at startup (for example, when the power button 34 is pressed). When acquiring the POST code from the EC memory 32 by processing by the log application, the main control unit 10 also acquires the date and time information associated with the POST code, and outputs the POST code and the date and time information to the storage 23 for storage. This allows the approximate date and time when the hang-up occurred to be determined.

[0061] As described above, the information processing device 1 according to this embodiment includes the main control unit 10 (an example of a first processor) and the EC 31 (an example of a second processor). The main control unit 10 executes a POST process by BIOS at startup and updates a POST code in response to the execution of each task (process) in the POST process. When the EC 31 detects an operation instructing a forced shutdown by hardware (for example, a long press of the power button 34), the EC 31 acquires the POST code updated by the main control unit 10 and stores it in the EC memory 32 (an example of memory). After rebooting, the main control unit 10 acquires the POST code stored by the EC 31 from the EC memory 32 and outputs it through processing by a log application (an example of a specific application program).

[0062] As a result, if the information processing device 1 experiences a system hang-up during POST processing at startup, for example, it can perform a hardware-based shutdown and restart, and then obtain the POST code of the last process executed before the system hang-up, making it easy to analyze the cause of a failure that occurs at startup.

[0063] For example, the main control unit 10 starts the OS after the POST process after rebooting and executes the log application on the OS. Then, the main control unit 10 acquires the POST code from the EC memory 32 by processing the log application using an ACPI object (an example of an interface that the OS has).

[0064] As a result, in the information processing device 1, the log application acquires the POST code from the EC memory 32 using the ACPI object, so that a platform-independent log application can be designed.

[0065] After the main control unit 10 is restarted, the main control unit 10 stores the POST code acquired from the EC memory 32 by the processing of the log application in the storage 23 (an example of a storage device).

[0066] As a result, if the information processing device 1 experiences a system hang-up during POST processing, for example, it can perform a hardware-based forced shutdown and restart, and then obtain from the storage 23 the POST code of the last process executed before the system hang-up, making it easy to analyze the cause of a failure that occurs during startup.

[0067] When storing the POST code updated by the main control unit 10 in the EC memory 32, the EC 31 may store the POST code in association with date and time information according to the start-up. After restarting, the main control unit 10 may obtain the POST code and date and time information stored by the EC 31 from the EC memory 32 and store them in the storage 23 through processing by the specific application program.

[0068] As a result, if the information processing device 1 experiences multiple system hang-ups during POST processing at startup, for example, it can obtain a log that associates the POST code of the last process executed before each system hang-up with date and time information, making it easy to analyze the cause of a failure that occurs during startup.

[0069] An operation to instruct a forced termination by hardware is provided as an operation that allows the user to forcibly terminate a system that is hung up.

[0070] This allows the user to forcibly terminate the system hang-up state in the case where the information processing device 1 has a system hang-up.

[0071] The operation for instructing a forced shutdown by hardware is a long press of the power button 34 for a certain period of time (for example, 10 seconds) or more.

[0072] This allows the user to forcibly end the system hang-up state of the information processing device 1 with a simple operation when the system hangs up.

[0073] At startup, the main control unit 10 sets a POST code in a specific register (e.g., I / O Port 80h) in response to the execution of a task (process) in the POST process, and updates the POST code set in the specific register in response to the execution of the next task (process) in the POST process.

[0074] This allows the information processing device 1 to notify the progress of the POST process in real time using the POST code. Furthermore, if a system hang-up occurs during the POST process, for example, the information processing device 1 stops updating at the POST code of the process last executed before the system hang-up, which can be used to analyze the cause of a failure that occurs during startup.

[0075] In addition, the control method in the information processing device 1 of this embodiment includes the steps of the main control unit 10 (an example of a first processor) executing POST processing by BIOS at startup and updating the POST code in accordance with the execution of each task (processing) in the POST processing, the steps of EC31 (an example of a second processor) acquiring the POST code updated by the main control unit 10 and storing it in the EC memory 32 (an example of memory) when it detects an operation instructing a forced shutdown by hardware (for example, a long press of the power button 34), and the steps of the main control unit 10 acquiring and outputting the POST code stored by EC31 from the EC memory 32 through processing by a log application (an example of a specific application program) after rebooting.

[0076] As a result, if the information processing device 1 experiences a system hang-up during POST processing at startup, for example, it can perform a hardware-based shutdown and restart, and then obtain the POST code of the last process executed before the system hang-up, making it easy to analyze the cause of a failure that occurs at startup.

[0077] Furthermore, according to this embodiment, since the cause of a failure such as a system hang-up that occurs in the user's usage environment (in the market) can be easily analyzed after receiving the product from the user, the tendency of failures such as a system hang-up that occurs in the market can be analyzed using an application, etc. Furthermore, based on the analysis results, it is also possible to propose a workaround to the user. Furthermore, system hang-ups can be predicted using AI (Artificial Intelligence) and big data, etc.

[0078] Although each embodiment of the present invention has been described above in detail with reference to the drawings, the specific configuration is not limited to the above-described embodiments, and the present invention also includes designs that do not deviate from the gist of the present invention. For example, the configurations described in the above-described embodiments can be combined in any manner.

[0079] In the above embodiment, a long press of the power button 34 has been described as an example of an operation for instructing a forced shutdown by hardware, but this is not limiting. For example, an operation for instructing a forced shutdown by hardware may be an operation of simultaneously pressing a plurality of specific keys arranged on the keyboard 33. Alternatively, a dedicated operation button (operator) for instructing a forced shutdown by hardware may be provided.

[0080] Furthermore, in the above-described embodiment, a system hang-up refers to a situation in which a program stops operating normally and enters a stopped state in which operations are not accepted (a frozen state in which operation does not return). However, the information processing device 1 is not necessarily limited to a failure in which operation does not return permanently, and even in the case of a failure in which processing is taking an abnormally long time, it is possible to acquire a POST code after rebooting by performing an operation to instruct a forced termination by hardware.

[0081] The information processing device 1 described above also includes an internal computer system. A program for implementing the functions of each component of the information processing device 1 may be recorded on a computer-readable recording medium, and the program may be loaded into a computer system and executed to perform processing in each component of the information processing device 1. Here, "loading a program recorded on a recording medium into a computer system and executing it" includes installing the program into a computer system. The term "computer system" here includes hardware such as an OS and peripheral devices. The term "computer system" may also include multiple computer devices connected via a network, including the Internet, a WAN, a LAN, a dedicated line, or other communication lines. The term "computer-readable recording medium" refers to portable media such as a flexible disk, a magneto-optical disk, a ROM, or a CD-ROM, as well as storage devices such as a hard disk built into a computer system. In this way, the recording medium storing the program may also be a non-transitory recording medium such as a CD-ROM.

[0082] The recording medium also includes internal or external recording media accessible from a distribution server for distributing the program. The program may be divided into multiple parts, downloaded at different times, and then combined by the components of the information processing device 1, or each divided program may be distributed by a different distribution server. Furthermore, the term "computer-readable recording medium" also includes a medium that stores a program for a certain period of time, such as volatile memory within a computer system that serves as a server or client when a program is transmitted over a network. The program may also be a medium that realizes part of the above-described functions. Furthermore, the program may be a so-called differential file (differential program) that can realize the above-described functions in combination with a program already stored in the computer system.

[0083] Furthermore, some or all of the functions of the information processing device 1 in the above-described embodiment may be realized as an integrated circuit such as an LSI (Large Scale Integration). Each function may be individually implemented as a processor, or some or all of the functions may be integrated into a processor. The integrated circuit method is not limited to LSI, and may be implemented using a dedicated circuit or a general-purpose processor. Furthermore, if an integrated circuit technology that can replace LSI emerges due to advances in semiconductor technology, an integrated circuit based on that technology may be used.

[0084] Furthermore, the information processing device 1 of the above embodiment is not limited to a notebook PC, but may be a desktop PC, a tablet PC, or the like. [Explanation of symbols]

[0085] 1 Information processing device, 10 Main control unit, 11 CPU, 12 Main memory, 13 Video subsystem, 14 Display unit, 21 Chipset, 22 BIOS memory, 23 Storage, 24 Audio system, 25 Communication unit, 26 USB connector, 31 EC, 32 EC memory, 33 Keyboard, 34 Power button, 35 Power circuit

Claims

1. a first processor that executes a POST (Power On Self Test) process by a BIOS (Basic Input Output System) at startup and updates a POST code in response to execution of each process in the POST process; a second processor that, when detecting an operation instructing a forced termination by hardware, acquires the POST code updated by the first processor and stores it in a memory; Equipped with The first processor After the restart, the POST code stored by the second processor is retrieved from the memory and output by processing a specific application program. Information processing device.

2. The first processor After the POST process is completed after the reboot, an OS (Operating System) is started and the specific application program is executed on the OS. The specific application program executes a process to obtain a POST code from the memory using an interface of the OS. The information processing device according to claim 1 .

3. The first processor After the restart, the POST code obtained from the memory through processing by the specific application program is stored in a storage device. The information processing device according to claim 1 .

4. The second processor When storing the POST code updated by the first processor in the memory, the POST code is stored in association with date and time information according to the start-up of the first processor; The first processor After the restart, the POST code and date and time information stored by the second processor are retrieved from the memory by processing of the specific application program, and are stored in a storage device. The information processing device according to claim 1 .

5. The operation to instruct the hardware-based forced shutdown is a long press of the power button for a certain period of time or more. The information processing device according to claim 1 .

6. The first processor At the time of startup, a POST code is set in a specific register in response to execution of a process in the POST process, and the POST code set in the register is updated in response to execution of the next process in the POST process. The information processing device according to claim 1 .

7. A control method for an information processing device, comprising: a step in which the first processor executes a POST (Power On Self Test) process by a BIOS (Basic Input Output System) at startup, and updates a POST code in response to execution of each process in the POST process; When a second processor detects an operation instructing a forced termination by hardware, the second processor acquires the POST code updated by the first processor and stores it in a memory; a step in which the first processor, after restarting, retrieves the POST code stored by the second processor from the memory and outputs the POST code by processing a specific application program; A control method comprising:

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