METHOD AND APPARATUS FOR VIDEO CODING - Patent application

Abstract

To reduce redundant information in an input video signal through compression.SOLUTION: A device of the present disclosure includes a processing circuit for decoding prediction information of a coding unit in a video bitstream. The processing circuit: determines whether or not a luma block and a chroma block associated with the coding unit have different partitioning trees on the basis of the prediction information; when the luma block and the chroma block have different partitioning trees, determines whether or not the luminance block is coded in an intra block copy (IBC) mode on the basis of a first IBC flag included in the prediction information; determines whether or not the chroma block is coded in the IBC mode on the basis of one of the first IBC flag, a second IBC flag included in the prediction information, and a default mode; and reconstructs the coding unit on the basis of the luma block and the chroma block.SELECTED DRAWING: Figure 4

Description

[Technical Field]

[0001] [CROSS-REFERENCE TO RELATED APPLICATIONS] This application claims priority to U.S. Patent Application No. 17 / 464,255, entitled "Method and Apparatus for Video Coding," filed September 1, 2021, which claims priority to U.S. Provisional Application No. 63 / 126,425, entitled "Harmonization Scheme Between SDP and IntraBC," filed December 16, 2020. The entire disclosures of the prior applications are incorporated herein by reference in their entirety.

[0002] [Technical field] This disclosure generally describes embodiments related to video coding. [Background technology]

[0003] The background art discussion provided herein is intended to provide an overall context for the present disclosure. The extent of the work of the currently signed inventors described in this background art section and in each aspect of this specification has not been shown as prior art at the time of the filing of this disclosure, and is not expressly or impliedly admitted as prior art to the present disclosure.

[0004] Video encoding and decoding can be performed using interframe image prediction with motion compensation. Uncompressed digital video can include a series of images, each with spatial dimensions of, for example, 1920 x 1080 luma samples and associated chroma samples. The series can have a fixed or variable image rate (informally known as the frame rate), for example, 60 images per second or 60 hertz (Hz). Uncompressed video has significant bitrate requirements. For example, 1080p60 4:2:0 video (1920 x 1080 luma sample resolution at a 60 Hz frame rate) with 8 bits per sample requires close to 1.5 Gbit / s of bandwidth. Such video requires more than 600 GB of storage space per hour.

[0005] One goal of video encoding and decoding is to reduce redundant information in an input video signal through compression. Compression can help reduce the bandwidth or storage requirements, in some cases by more than two orders of magnitude. Both lossless and lossy compression, as well as a combination of both, can be used. Lossless compression refers to a technique in which an exact copy of the original signal can be reconstructed from a compressed version of the original signal. When lossy compression is used, the reconstructed signal may not be identical to the original signal, but the distortion between the original and reconstructed signal is small enough that it can be used in applications where a reconstructed signal is expected. For video, lossy compression is widely used. The amount of acceptable distortion depends on the application; for example, a user consuming a streaming application can tolerate higher distortion than a user of a television distribution application. The achievable compression ratio reflects the fact that a higher allowable / tolerable distortion can produce a higher compression ratio.

[0006] Video encoders and decoders can utilize techniques from several broad categories, including, for example, motion compensation, transform, quantization, and entropy coding.

[0007] Video encoding / decoding techniques can include a technique known as intraframe coding. In intraframe coding, sample values ​​are represented without reference to samples or other data from a previously reconstructed reference image. In some video codecs, an image is spatially subdivided into sample blocks. If all sample blocks are coded in intraframe mode, the image can be an intraframe image. Intraframe images and their derivatives, such as independent decoder refresh images, can be used to reset the decoder state and, therefore, can be used as the first image or still image in a coded video bitstream and video session. Samples in intraframe blocks are used in a transform, and the transform coefficients can be quantized before entropy coding. Intraframe prediction can be a technique that minimizes sample values ​​in the pre-transform domain. In some cases, the smaller the DC value and AC coefficients after the transform, the fewer bits required for a given quantization step size to represent the block after entropy coding.

[0008] Conventional intraframe coding, such as that known from MPEG-2 coding techniques, does not use intraframe prediction. However, some newer video compression techniques include techniques that attempt to derive data blocks from surrounding sample data and / or metadata, for example, obtained during the encoding and / or decoding of spatially adjacent blocks and prior to the decoding order. Such techniques are hereinafter referred to as "intraframe prediction" techniques. It should be noted that, at least in some cases, intraframe prediction does not use reference data from a reference picture, but only reference data from the current picture being reconstructed.

[0009] Many different forms of intra-frame prediction can exist. If a given video coding technique can use two or more of these techniques, the technique in use can perform coding in intra-frame prediction mode. In some cases, modes may have sub-modes and / or parameters, and these modes may be coded alone or included in a mode codeword. This may also be the case for the entropy coding technique used to convert codewords into a bitstream, as which codewords are used for a given mode, sub-mode, and / or parameter combination affects the coding efficiency gains from intra-frame prediction.

[0010] Certain modes of intraframe prediction were introduced in H.264, improved in H.265, and further improved in modern encoding / decoding techniques such as the joint exploration model (JEM), versatile video coding (VVC), and benchmark set (BMS). A prediction block can be formed using neighboring sample values ​​belonging to already available samples. The sample values ​​of the neighboring samples are copied into the prediction block according to a certain direction. A reference to the direction in use may be coded in the bitstream or may itself be predicted.

[0011] Referring to FIG. 1A, the bottom right corner depicts a subset of nine known prediction directions from the 33 possible prediction directions (corresponding to the 33 angular modes of the 35 intraframe modes) in H.265. The point where the arrows converge (101) represents the sample being predicted. The arrows represent the direction from which the sample is predicted. For example, arrow (102) indicates that sample (101) is predicted from one or more samples to the upper right, which are at a 45-degree angle from horizontal. Similarly, arrow (103) indicates that sample (101) is predicted from one or more samples to the lower left of sample (101), which are at a 22.5-degree angle from horizontal.

[0012] Continuing with FIG. 1A , a square block (104) of 4×4 samples is depicted in the upper left (indicated by a thick dashed line). The square block (104) contains 16 samples, each labeled with “S” and its position in the Y dimension (e.g., row index) and its position in the X dimension (e.g., column index). For example, sample S21 is the second sample in the Y dimension (from the top) and the first sample in the X dimension (from the left). Similarly, sample S44 is the fourth sample in block (104) in both the Y and X dimensions. Because this block is a 4×4 sized sample, S44 is located in the lower right. Also shown are reference samples that follow a similar numbering scheme. The reference samples are labeled with “R” and their Y position (e.g., row index) and X position (e.g., column index) relative to block (104). In both H.264 and H.265, since the predicted samples are adjacent to the block being reconstructed, negative values ​​do not need to be used.

[0013] Intraframe prediction can work by copying reference sample values ​​from neighboring samples according to a signaled prediction direction. For example, assume that the coded video bitstream includes signaling indicating, for this block, the prediction direction consistent with arrow (102), i.e., that the samples are predicted from one or more prediction samples in the upper right corner at a 45-degree angle with the horizontal. In this case, samples S41, S32, S23, and S14 are predicted from the same reference sample R05. And sample S44 is predicted from reference sample R08.

[0014] In some cases, the values ​​of multiple reference samples can be combined, for example through interpolation, to calculate the reference sample, particularly if the orientation is not evenly divisible by 45 degrees.

[0015] As video coding technology has evolved, the number of possible directions has increased. H.264 (2003) could represent nine different directions. This increased to 33 in H.265 (2013), and JEM / VVC / BMS can support up to 65 directions at the time of publication. Experiments have been conducted to identify the most likely directions, and some techniques in entropy coding are used to represent these likely directions with a small number of bits, at the expense of less likely directions. Furthermore, the direction itself may be predictable from neighboring directions used in neighboring already decoded blocks.

[0016] FIG. 1B shows a schematic diagram (105) depicting 65 intra-frame prediction directions according to JEM to illustrate the increasing number of prediction directions over time.

[0017] The mapping from intra-frame prediction directions to bits representing directions in the coded video bitstream can vary between video coding techniques and can range, for example, from a simple direct mapping to prediction directions to complex adaptation schemes involving intra-frame prediction modes, codewords, most likely modes, and similar techniques. However, in all cases, there may be certain directions that are statistically less likely to occur in the video content than certain other directions. Because the goal of video compression is to reduce redundancy, these less likely directions are represented with more bits than more likely directions in a well-performing video coding technique.

[0018] Motion compensation may be a lossy compression technique and may involve the use of sample data blocks from a previously reconstructed image or portion thereof (reference image) to predict a newly reconstructed image or image portion after spatially shifting the blocks in a direction indicated by a motion vector (hereinafter referred to as MV). In some cases, the reference image may be the same as the image currently being reconstructed. The MV may have two dimensions, X and Y, or it may have three dimensions, with the third dimension being an indication of the reference image in use (the latter may indirectly be the temporal dimension).

[0019] In some video compression techniques, the MV applicable to a particular region of sample data can be predicted from other MVs, for example, from an MV associated with another sample data region that is spatially adjacent to the region being reconstructed and precedes that MV in decoding order. Doing so can significantly reduce the amount of data required to code the MV, thereby eliminating redundancy and improving compression ratios. MV prediction can work effectively; for example, when coding an input video signal derived from a video camera (called natural video), there is a statistical possibility that regions larger than the region to which a single MV is applicable move in a similar direction. Therefore, in some cases, a similar MV derived from the MV of a neighboring region can be used for prediction. As a result, the MV found for a given region is similar or identical to the MV predicted from the surrounding MVs, and after entropy coding, can be represented using fewer bits than would be used to code the MV directly. In some cases, MV prediction can be an example of lossless compression of a signal (i.e., an MV) derived from the original signal (i.e., a sample stream). In other cases, the MV prediction itself may be a lossy compression, for example due to rounding errors in computing the predictor from several surrounding MVs.

[0020] Various MV prediction mechanisms are described in H.265 / HEVC (ITU-T Rec. H.265, "High Efficiency Video Coding", December 2016). Among the many MV prediction mechanisms provided by H.265, the one described in this specification is a technique hereinafter referred to as "spatial merging".

[0021] Referring to Figure 1C, the current block (111) may contain samples discovered by the encoder during the motion search process, which may be predicted from a spatially shifted previous block of the same size. Instead of coding the MV directly, the MV may be derived from metadata associated with one or more reference pictures, e.g., from the nearest (in decoding order) reference picture using the MV associated with any of five surrounding samples, denoted A0, A1, and B0, B1, B2 (112-116, respectively). In H.265, MV prediction may use predictors from the same reference picture used by neighboring blocks. Summary of the Invention [Means for solving the problem]

[0022] An aspect of the present disclosure provides an apparatus for video encoding / decoding. The apparatus includes a processing circuit that decodes prediction information of a coding unit in a current image that is part of a video bitstream. The processing circuit determines, based on the prediction information, whether luma blocks and chroma blocks associated with the coding unit have different partitioning trees. If the luma blocks and chroma blocks associated with the coding unit have different partitioning trees, the processing circuit determines, based on a first IBC flag included in the prediction information, whether the luma blocks are coded in intra-frame block copy (IBC) mode. The processing circuit determines, based on one of the first IBC flag, a second IBC flag, and a default mode included in the prediction information, whether the chroma blocks are coded in IBC mode. The processing circuit reconstructs the current coding unit based on the luma blocks and chroma blocks.

[0023] In one embodiment, the processing circuit determines whether the luma block and the chroma block associated with a coding unit are coded in IBC mode based on a first IBC flag included in prediction information in response to the luma block and the chroma block having the same partitioning tree, and determines that the luma block and the chroma block have the same block vector based on the luma block and the chroma block being coded in IBC mode.

[0024] In one embodiment, the processing circuit determines that the chroma block is not coded in IBC mode based on a default mode indicating that IBC mode is disabled for chroma blocks having a different partitioning tree than the luma block.

[0025] In one embodiment, the processing circuit determines whether a luma block and a chroma block have the same partition size, and in response to the luma block and the chroma block having the same partition size, determines whether the chroma block is coded in IBC mode based on a first IBC flag.

[0026] In one embodiment, a block size of the luma block is larger than a block size of the chroma block, and the processing circuit determines whether the luma block and the chroma block are coded in IBC mode based on a first IBC flag. In response to the luma block and the chroma block being coded in IBC mode, the processing circuit determines that the luma block and the chroma block have the same block vector.

[0027] In one embodiment, a first subset of samples of a chroma block is co-located with a first luma block coded in IBC mode and a second subset of samples of the chroma block is co-located with a second luma block coded in a first intraframe prediction mode, and the processing circuit determines that the first subset of samples of the chroma block is coded in IBC mode, and determines that the second subset of samples of the chroma block is coded in one of the first and second intraframe prediction modes included in the prediction information.

[0028] In one embodiment, the first subset of samples of the chrominance block and the first luma block may have the same block vector.

[0029] An aspect of the present disclosure provides a video encoding / decoding method. The method decodes prediction information of a coding unit in a current image that is part of a video bitstream. Based on the prediction information, the method determines whether a luma block and a chroma block associated with the coding unit have different partitioning trees. If the luma block and the chroma block associated with the coding unit have different partitioning trees, the method determines whether the luma block is coded in intra-frame block copy (IBC) mode based on a first IBC flag included in the prediction information. Based on one of the first IBC flag, a second IBC flag, and a default mode included in the prediction information, the method determines whether the chroma block is coded in IBC mode. The method reconstructs the current coding unit based on the luma block and the chroma block.

[0030] Aspects of the present disclosure also provide a non-transitory computer-readable medium having stored thereon instructions that, when executed by at least one processor, cause the at least one processor to perform any one or combination of methods for video decoding.

[0031] Further features, nature and various advantages of the disclosed subject matter will become more apparent from the following detailed description and accompanying drawings. [Brief explanation of the drawings]

[0032] [Figure 1A] FIG. 2 is a schematic diagram of an exemplary subset of intra-frame prediction modes. [Figure 1B] FIG. 2 is a schematic diagram of an exemplary intra-frame prediction direction. [Figure 1C] FIG. 1 is a schematic diagram of a current block and its surrounding spatial merge candidates in one example. [Figure 2] FIG. 1 is a schematic diagram of a simplified block diagram of a communication system according to one embodiment. [Figure 3] FIG. 1 is a schematic diagram of a simplified block diagram of a communication system according to one embodiment. [Figure 4] FIG. 2 is a schematic diagram of a simplified block diagram of a decoder according to one embodiment. [Figure 5] FIG. 2 is a schematic diagram of a simplified block diagram of an encoder according to one embodiment. [Figure 6] FIG. 10 shows a block diagram of an encoder according to another embodiment. [Figure 7] FIG. 10 shows a block diagram of a decoder according to another embodiment. [Figure 8] FIG. 2 illustrates example block partitions according to some embodiments of the present disclosure. [Figure 9] FIG. 2 illustrates an example block partition according to some embodiments of the present disclosure. [Figure 10] 1 illustrates an example block partition according to some embodiments of the present disclosure. [Figure 11] FIG. 1 illustrates an example quadtree with a nested multi-type tree coding block structure according to one embodiment of the present disclosure. [Figure 12]FIG. 1 illustrates an exemplary block partitioning using a half-reduced-combining tree scheme according to one embodiment of the present disclosure. [Figure 13] FIG. 1 illustrates an exemplary L-shaped (or L-type) partition according to one embodiment of the present disclosure. [Figure 14] 1A-1C illustrate four examples of L-shaped partitions according to some embodiments of the present disclosure. [Figure 15] FIG. 1 illustrates an exemplary flowchart according to one embodiment. [Figure 16] FIG. 1 is a schematic diagram of a computer system according to one embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0033] I. Video Decoder and Encoder Systems

[0034] FIG. 2 is a simplified block diagram of a communication system (200) according to an embodiment of the present disclosure. The communication system (200) includes multiple terminal devices that can communicate with each other, for example, via a network (250). For example, the communication system (200) includes a first pair of terminal devices (210) and (220) interconnected via the network (250). In the example of FIG. 2, the first pair of terminal devices (210) and (220) perform unidirectional data transmission. For example, the terminal device (210) can code video data (e.g., a video image stream captured by the terminal device (210)) for transmission to another terminal device (220) via the network (250). The encoded video data can be transmitted in the form of one or more coded video bitstreams. The terminal device (220) can receive the coded video data from the network (250), decode the coded video data to reconstruct the video image, and display the video image based on the reconstructed video data. Unidirectional data transmission is common in media serving applications and the like.

[0035] In another example, the communication system (200) includes a second pair of terminal devices (230) and (240) performing bidirectional transmission of coded video data, such as may occur during a video conference. For bidirectional transmission of data, in one example, each of the terminal devices (230) and (240) can code video data (e.g., a video image stream captured by the terminal device) for transmission to the other of the terminal devices (230) and (240) over the network (250). Each of the terminal devices (230) and (240) can also receive coded video data transmitted by the other of the terminal devices (230) and (240), decode the coded video data to reconstruct the video image, and display the video image on an accessible display device based on the reconstructed video data.

[0036] In the example of FIG. 2, the terminal devices 210, 220, 230, and 240 may be depicted as a server, a personal computer, and a smartphone, although the principles of the present disclosure are not limited thereto. Embodiments of the present disclosure find application with laptop computers, tablet computers, media players, and / or dedicated videoconferencing equipment. Network 250 represents any number of networks transmitting coded video data between the terminal devices 210, 220, 230, and 240, including wired and / or wireless communication networks. The communication network 250 may exchange data over circuit-switched and / or packet-switched channels. Exemplary networks include telecommunications networks, local area networks, wide area networks, and / or the Internet. For purposes of this disclosure, the architecture and topology of network 250 may not be important to the operation of the present disclosure, unless otherwise described herein.

[0037] 3 illustrates the arrangement of a video encoder and a video decoder in a streaming environment as an example application for the disclosed subject matter. The disclosed subject matter is equally applicable to other video-supported applications, including, for example, storage of compressed video on digital media including CDs, DVDs, memory sticks, video conferencing, digital TV, etc.

[0038] The streaming system may include a capture subsystem (313), which may include a video source (301), such as a digital camera, that creates an uncompressed video image stream (302). In one example, the video image stream (302) includes samples captured by the digital camera. The video image stream (302), depicted with thick lines to emphasize its high data volume when compared to the encoded video data (304) (or coded video bitstream), may be processed by an electronic device (320) that includes a video encoder (303) coupled to the video source (301). The video encoder (303) may include hardware, software, or a combination thereof to enable or implement various aspects of the disclosed subject matter, as described in more detail below. The encoded video data (304) (or coded video bitstream (304)), depicted with thin lines to emphasize its lower data volume when compared to the video image stream (302), may be stored on a streaming server (305) for future use. One or more streaming client subsystems, such as the client subsystems (306) and (308) of Figure 3, can access the streaming server (305) to retrieve copies (307) and (309) of the encoded video data (304). The client subsystem (306) may include, for example, a video decoder (310) in an electronic device (330). The video decoder (310) decodes the incoming copy of the encoded video data (307) to generate an outgoing video image stream (311), which can be displayed on a display (312) (e.g., a display screen) or other rendering device (not shown). In some streaming systems, the encoded video data (304), (307), and (309) (e.g., a video bitstream) may be encoded according to a particular video coding / compression standard.Examples of these standards include ITU-T Recommendation H.265. In one example, a video coding standard under development is informally referred to as Next Generation Video Coding (VVC). The disclosed subject matter can be used in the context of VVC.

[0039] It should be noted that the electronic devices (320) and (330) may include other components (not shown). For example, the electronic device (320) may include a video decoder (not shown), and the electronic device (330) may similarly include a video encoder (not shown).

[0040] 4 shows a block diagram of a video decoder (410) according to an embodiment of the present disclosure. The video decoder (410) can be included in an electronic device (430). The electronic device (430) can include a receiver (431) (e.g., a receiving circuit). The video decoder (410) can be used in place of the video decoder (310) in the example of FIG. 3.

[0041] The receiver (431) can receive one or more coded video sequences to be decoded by the video decoder (410), and in the same or another embodiment, can receive one coded video sequence at a time, where the decoding of each coded video sequence is independent of the other coded video sequences. The coded video sequences can be received from a channel (401), which can be a hardware / software link to a storage device that stores the coded video data. The receiver (431) can receive the coded video data along with other data, such as coded audio data and / or auxiliary data streams, that can be transmitted to respective using entities (not shown). The receiver (431) can separate the coded video sequences from other data. To prevent network jitter, a buffer memory (415) can be coupled between the receiver (431) and the entropy decoder / parser (420) (hereinafter "parser (420)"). In some applications, the buffer memory (415) is part of the video decoder (410). In other cases, the buffer memory (415) may be located external to the video decoder (410) (not shown). In still other cases, there may be a buffer memory (not shown) external to the video decoder (410), for example, to prevent network jitter, and there may be another buffer memory (415) internal to the video decoder (410), for example, to handle playback timing. If the receiver (431) receives data from a store-and-forward device with sufficient bandwidth and controllability or from an isochronous network, the buffer memory (415) may not be necessary or may be small.For use in best-effort packet networks such as the Internet, the buffer memory (415) may be necessary and may be relatively large, advantageously of adaptive size, and may be implemented at least in part in an operating system or similar element (not shown) external to the video decoder (410).

[0042] The video decoder (410) may include a parser (420) for reconstructing symbols (421) from the coded video sequence. These symbol categories include information used to manage the operation of the video decoder (410) and potential information for controlling a rendering device, such as a rendering device (412) (e.g., a display screen) that is not an integral part of the electronic device (430) but may be coupled to the electronic device (430) as shown in FIG. 4. The rendering device control information may be in the form of a supplemental enhancement information (SEI) message or a visual usability information (VUI) parameter set fragment (not shown). The parser (420) may perform parsing / entropy decoding on the received coded video sequence. The coding of the coded video sequence may follow a video coding technique or standard and may follow various principles, including variable length coding, Huffman coding, arithmetic coding with or without context sensitivity, etc. The analyzer (420) can extract from the coded video sequence a set of subgroup parameters for at least one of the subgroups of pixels in the video decoder based on at least one parameter corresponding to the group. The subgroups can include groups of pictures (GOPs), images, tiles, slices, macroblocks, coding units (CUs), blocks, transform units (TUs), prediction units (PUs), etc. The analyzer (420) can also extract information such as transform coefficients, quantizer parameter values, MVs, etc. from the coded video sequence.

[0043] The analyzer (420) can perform entropy decoding / analysis operations on the video sequence received from the buffer memory (415) to produce symbols (421).

[0044] The reconstruction of the symbols (421) can be associated with several different units, depending on the type of coded video image or portion thereof (e.g., inter-frame and intra-frame images, inter-frame and intra-frame blocks) and other factors. Which units are associated with and how can be controlled by subgroup control information parsed from the coded video sequence by the analyzer (420). The flow of such subgroup control information between the analyzer (420) and the following units is not shown for clarity.

[0045] In addition to the functional blocks already mentioned, the video decoder (410) may be conceptually subdivided into several functional units, as described below. In an actual embodiment operating within commercial constraints, many of these units may interact closely with each other and may be at least partially integrated with each other. However, for purposes of describing the disclosed subject matter, the following conceptual subdivision into functional units is appropriate.

[0046] The first unit is a scalar / inverse transform unit (451), which receives quantized transform coefficients and control information from the analyzer (420) as symbols (421), including information on what transform to use, block size, quantization factors, quantization scaling matrices, etc. The scalar / inverse transform unit (451) can output blocks containing sample values ​​that can be input to an aggregator (455).

[0047] In some cases, the output samples of the scalar / inverse transform unit (451) may belong to intra-coded blocks, i.e., blocks that do not use prediction information from a previously reconstructed image but can use prediction information from a previously reconstructed portion of the current image. Such prediction information may be provided by an intra-frame image prediction unit (452). In some cases, the intra-frame image prediction unit (452) generates blocks of the same size and shape as the block being reconstructed using surrounding, already reconstructed information extracted from a current image buffer (458). The current image buffer (458), for example, buffers a partially reconstructed current image and / or a fully reconstructed current image. The aggregator (455), in some cases, adds the prediction information generated by the intra-frame prediction unit (452) to the output sample information provided by the scalar / inverse transform unit (451) on a sample-by-sample basis.

[0048] In other cases, the output samples of the scalar / inverse transform unit (451) may belong to an inter-coded block and potentially a motion-compensated block. In such cases, the motion-compensated prediction unit (453) may access a reference image memory (457) to extract samples used for prediction. After the extracted samples are motion-compensated based on the symbols (421) associated with the block, these samples may be added by an aggregator (455) to the output of the scalar / inverse transform unit (451) (in this case, referred to as residual samples or residual signals) to generate output sample information. The addresses in the reference image memory (457) from which the motion-compensated prediction unit (453) extracts prediction samples may be controlled by MVs available to the motion-compensated prediction unit (453), for example, in the form of symbols (421) that may have X, Y, and reference image components. Motion compensation may also include interpolation of sample values ​​extracted from the reference image memory (457), MV prediction mechanisms, etc., when sub-sample accurate motion vectors are in use.

[0049] The output samples of the aggregator (455) may be subjected to various loop filtering techniques in a loop filter unit (456). Video compression techniques may include in-loop filtering techniques controlled by parameters contained in the coded video sequence (also called a coded video bitstream) and made available to the loop filter unit (456) as symbols (421) from the analyzer (420), or may be responsive to meta-information obtained during decoding of a coded image or previous portions of the coded video sequence (in decoding order), and may be responsive to previously reconstructed loop-filtered sample values.

[0050] The output of the loop filter unit (456) can be a sample stream that can be output to a rendering device (412) and stored in a reference image memory (457) for use in future inter-frame image prediction.

[0051] Once a particular coded picture is fully reconstructed, it can be used as a reference picture for future predictions. For example, once a coded picture corresponding to a current picture is fully reconstructed and the coded picture is identified as a reference picture (e.g., by the analyzer (420)), the current picture buffer (458) can become part of the reference picture memory (457), and a new current picture buffer can be reallocated before beginning reconstruction of a subsequent coded picture.

[0052] The video decoder (410) can perform decoding operations according to a predetermined video compression technique in a standard, such as ITU-T Rec. H.265. The coded video sequence can conform to the syntax specified by the video compression technique or standard being used, in the sense that the coded video sequence conforms to both the syntax of the video compression technique or standard and the profile of the video compression technique or standard as its document. Specifically, the profile can select some tools from all tools available in the video compression technique or standard as the only tools available for that profile. Compliance also requires that the complexity of the coded video sequence be within a range defined by the tier of the video compression technique or standard. In some cases, the tier limits the maximum picture size, maximum frame rate, maximum reconstruction sample rate (e.g., measured in mega samples per second), maximum reference picture size, etc. The limits set by the tier can, in some cases, be further constrained by a Hypthetical Reference Decoder (HRD) specification and HRD buffer management metadata signaled in the coded video sequence.

[0053] In one embodiment, the receiver (431) can receive additional (redundant) data along with the coded video. The additional data can be included as part of the coded video sequence. The additional data can be used by the video decoder (410) to properly decode the data and / or more accurately reconstruct the original video data. The additional data can be in forms such as, for example, temporal, spatial, or signal-to-noise ratio (SNR) enhancement layers, redundant slices, redundant pictures, forward error correction codes, etc.

[0054] 5 shows a block diagram of a video encoder (503) according to one embodiment of the present disclosure. The video encoder (503) is included in an electronic device (520). The electronic device (520) includes a transmitter (540) (e.g., a transmission circuit). The video encoder (503) can be used in place of the video encoder (303) in the example of FIG. 3.

[0055] The video encoder (503) can receive video samples from a video source (501) (not part of the electronic device (520) in the example of FIG. 5) that captures video images that are coded by the video encoder (503). In another example, the video source (501) is part of the electronic device (520).

[0056] The video source (501) can provide a source video sequence coded by the video encoder (503) in the form of a digital video sample stream, which can have any suitable bit depth (e.g., 8-bit, 10-bit, 12-bit, etc.), any suitable color space (e.g., BT.601 Y CrCB, RGB, etc.), and any suitable sampling structure (e.g., Y CrCb 4:2:0, Y CrCb 4:4:4). In a media services system, the video source (501) can be a storage device that stores previously prepared video. In a video conferencing system, the video source (501) can be a camera that captures local image information as a video sequence. The video data can be provided as multiple individual images that, when viewed in sequence, create motion. The images themselves can be organized as a spatial pixel array, where each pixel can contain one or more samples, depending on the sampling structure, color space, etc., in use. Those skilled in the art can easily understand the relationship between pixels and samples. The following description focuses on samples.

[0057] According to one embodiment, the video encoder (503) can code and compress images of a source video sequence into a coded video sequence (543) in real time or under any other time constraint required by the application. Enforcing the appropriate coding rate is one function of the controller (550). In some embodiments, the controller (550) controls and is operatively coupled to other functional units, as described below. Such coupling is not shown for clarity. Parameters set by the controller (550) can include rate control-related parameters (picture skip, quantizer, lambda value for rate-distortion optimization techniques, etc.), picture size, group of pictures (GOP) layout, maximum MV allowed reference area, etc. The controller (550) can be configured with other appropriate functions associated with the video encoder (503) optimized for a particular system design.

[0058] In some embodiments, the video encoder (503) is configured to operate in a coding loop. As an overly simplified explanation, in one example, the coding loop can include a source coder (530) (e.g., responsible for creating symbols, such as a symbol stream, based on an input image to be coded and a reference image) and a (local) decoder (533) embedded in the video encoder (503). The decoder (533) reconstructs the symbols to create sample data in a manner similar to how a (remote) decoder creates sample data (because the video compression techniques contemplated in the disclosed subject matter ensure that any compression between the symbols and the coded video bitstream is lossless). The reconstructed sample stream (sample data) is input to a reference image memory (534). Decoding the symbol stream produces bit-exact results regardless of the location (local or remote) of the decoder, so the contents of the reference image memory (534) correspond bit-exactly between the local and remote encoders. In other words, the reference picture samples "seen" by the prediction part of the encoder are exactly the same sample values ​​"seen" by the decoder when it uses the prediction during decoding. This basic principle of reference picture synchrony (and the drift that occurs when synchrony is not maintained, e.g., due to channel errors) is also used in several related technologies.

[0059] The operation of the "local" decoder (533) may be the same as the operation of a "remote" decoder, such as the video decoder (410), already described in detail above in connection with Figure 4. However, with further brief reference to Figure 4, because symbols are available and the encoding / decoding of symbols into the coded video sequence by the entropy coder (545) and parser (420) can be lossless, the entropy decoding portion of the video decoder (410), including the buffer memory (415) and parser (420), may not be performed entirely in the local decoder (533).

[0060] At this point, it is observed that any decoder technique other than analysis / entropy decoding present in the decoder must necessarily be present in a corresponding encoder in substantially identical functional form. For this reason, the disclosed subject matter focuses on decoder operation. A description of the encoder technique can be omitted, since it is the reverse of the decoder technique described generically. Only in certain areas is a more detailed description necessary, which is provided below.

[0061] During operation, in some embodiments, the source coder (530) can perform motion-compensated predictive coding, which predictively codes an input image with reference to one or more previously coded images from a video sequence designated as “reference images.” In this manner, the coding engine (532) codes differences between pixel blocks of the input image and pixel blocks of reference images that can be selected as predictive references for the input image.

[0062] The local video decoder (533) can decode the coded video data of an image that can be designated as a reference image based on the symbols generated by the source coder (530). The operation of the coding engine (532) can advantageously be a lossy process. When the coded video data is decoded by a video decoder (not shown in FIG. 5), the reconstructed video sequence can be a replica of the source video sequence, typically with some errors. The local video decoder (533) can copy the decoding process that can be performed by the video decoder on the reference image and store the reconstructed reference image in a reference image cache (534). In this way, the video encoder (503) can locally store copies of reconstructed reference images that have content in common with reconstructed reference images obtained by a far-end video decoder (in the absence of transmission errors).

[0063] The predictor (535) can perform a prediction search for the coding engine (532). That is, for a new image to be coded, the predictor (535) can search the reference image memory (534) for sample data (as candidate reference pixel blocks) or specific metadata, such as reference image MV, block shape, etc., that serve as suitable prediction references for the new image. The predictor (535) can operate on a pixel block-by-pixel block basis to find suitable prediction references. In some cases, as determined by the search results obtained by the predictor (535), the input image can have prediction references drawn from multiple reference images stored in the reference image memory (534).

[0064] The controller (550) can manage the coding operations of the source coder (530), including, for example, setting the parameters and subgroup parameters used to encode the video data.

[0065] The output of all of the above functional units can be entropy coded by an entropy coder (545), which converts the symbols produced by the various functional units into a coded video sequence by losslessly compressing the symbols according to techniques such as Huffman coding, variable length coding, arithmetic coding, etc.

[0066] The transmitter (540) can buffer the coded video sequence produced by the entropy coder (545) for transmission over a communication channel (560), which can be a hardware / software link to a storage device that stores the coded video data. The transmitter (540) can merge the coded video data from the video coder (503) with other data to be transmitted, such as coded audio data and / or auxiliary data streams (sources not shown).

[0067] A controller (550) can manage the operation of the video encoder (503). During coding, the controller (550) can assign each coded picture a particular coded picture type, which can affect the coding technique that can be applied to each picture. For example, pictures are often assigned as one of the following picture types:

[0068] That is, an intraframe picture (I-picture) may be one that can be coded and decoded without using any other picture in the sequence as a source of prediction. Some video codecs allow for different types of intraframe pictures, such as Independent Decoder Refresh ("IDR") pictures. Those skilled in the art understand the variants of I-pictures and their applications and functions.

[0069] A predicted image (P-image) may be one that can be coded and decoded using intra-frame or inter-frame prediction, which predicts the sample values ​​of each block using at most one MV and reference index.

[0070] Bidirectionally predicted images (B-images) may be encoded and decoded using intra-frame or inter-frame prediction, which uses at most two MVs and reference indices to predict the sample values ​​of each block. Similarly, multiple predicted images may use more than one reference image and associated metadata to reconstruct a single block.

[0071] A source image is typically spatially subdivided into multiple sample blocks (e.g., blocks of 4x4, 8x8, 4x8, or 16x16 samples each) and can be coded block by block. These blocks can be predictively coded with reference to other (already coded) blocks, as determined by the coding assignment applied to each image of the block. For example, blocks of an I image can be non-predictively coded, or they can be predictively coded with reference to already coded blocks of the same image (spatial prediction or intraframe prediction). Pixel blocks of a P image can be predictively coded via spatial prediction or temporal prediction with reference to a reference image coded one or two images earlier. Blocks of a B image can be predictively coded via spatial prediction or temporal prediction with reference to a reference image coded one or two images earlier.

[0072] The video encoder (503) may perform coding operations in accordance with a predetermined video coding technique or standard, such as ITU-T H.265, etc. In doing so, the video encoder (503) may perform various compression operations, including predictive coding operations that exploit temporal and spatial redundancy in the input video sequence. Thus, the coded video data may conform to a syntax specified by the video coding technique or standard used.

[0073] In one embodiment, the transmitter (540) can transmit additional data along with the coded video. The source coder (530) can include such data as part of the coded video sequence. The additional data can include temporal / spatial / SNR enhancement layers, other forms of redundant data such as redundant pictures or slices, SEI messages, VUI parameter set fragments, etc.

[0074] Video can be captured as multiple source images (video images) in a time sequence. Intraframe image prediction (often abbreviated as intraframe prediction) exploits spatial correlation in a given image, while interframe image prediction exploits correlation (temporal or otherwise) between images. In one example, a particular image being encoded / decoded, called the current image, is partitioned into blocks. If a block of the current image is similar to a reference block in a previously coded and still buffered reference image in the video, the block of the current image can be coded by a vector called a MV. The MV refers to a reference block in the reference image and can have a third dimension that identifies the reference image if multiple reference images are used.

[0075] In some embodiments, bidirectional prediction techniques can be used for inter-frame image prediction. Bidirectional prediction techniques use two reference images, such as a first reference image and a second reference image, both of which precede the current image in video in decoding order (but may be past and future, respectively, in display order). A block in the current image can be coded by a first MV that points to a first reference block in the first reference image and a second MV that points to a second reference block in the second reference image. A block can be predicted by a combination of the first and second reference blocks.

[0076] Furthermore, to improve coding efficiency, merge mode techniques can be used in inter-frame image prediction.

[0077] According to some embodiments of the present disclosure, prediction, such as inter-frame image prediction or intra-frame image prediction, is performed in units of blocks. For example, according to the HEVC standard, images in a sequence of video images are partitioned into coding tree units (CTUs) for compression, and the CTUs in an image have the same size, for example, 64x64 pixels, 32x32 pixels, or 16x16 pixels. Typically, a CTU includes three coding tree blocks (CTBs), one luma CTB and two chroma CTBs. Each CTU may be recursively divided into one or more coding units (CUs) in a quadtree. For example, a 64x64 pixel CTU can be divided into one 64x64 pixel CU, four 32x32 pixel CUs, or sixteen 16x16 pixel CUs. In one example, each CU is analyzed to determine a prediction type for the CU, such as an inter-frame prediction type or an intra-frame prediction type. A CU is divided into one or more prediction units (PUs) according to temporal and / or spatial predictability. Typically, each PU includes a luma prediction block (PB) and two chroma PBs. In one embodiment, prediction operations in coding (encoding / decoding) are performed in units of prediction blocks. Using a luma prediction block as an example of a prediction block, the prediction block includes a matrix of pixel values ​​(e.g., luma values), such as 8x8 pixels, 16x16 pixels, 8x16 pixels, 16x8 pixels, etc.

[0078] 6 shows a diagram of a video encoder (603) according to another embodiment of the present disclosure. The video encoder (603) is configured to receive a processed block of sample values ​​(e.g., a predictive block) in a current video image in a video image sequence and encode the processed block into a coded image that is part of the coded video sequence. In one example, the video encoder (603) is used in place of the video encoder (303) in the example of FIG. 3.

[0079] In an HEVC example, the video encoder (603) receives a matrix of sample values ​​for a processing block, such as a predictive block of 8x8 samples. The video encoder (603) determines, using rate-distortion optimization, whether to code the processing block using intra-frame mode, inter-frame mode, or bidirectional prediction mode. If the processing block is coded in intra-frame mode, the video encoder (603) can encode the processing block into a coded image using intra-frame prediction techniques. If the processing block is coded in inter-frame mode or bidirectional prediction mode, the video encoder (603) can encode the processing block into a coded image using inter-frame prediction or bidirectional prediction techniques, respectively. In certain video coding techniques, the merge mode can be an inter-frame image prediction submode in which MVs are derived from one or more MV predictors when not taking advantage of coded MV components other than the predictors. In certain other video coding techniques, there may be MV components applicable to the subject block. In one example, the video encoder (603) includes other components, such as a mode decision module (not shown) for determining the mode of the processing block.

[0080] In the example of FIG. 6, the video encoder (603) includes an inter-frame encoder (630), an intra-frame encoder (622), a residual calculator (623), a switch (626), a residual encoder (624), a general controller (621), and an entropy encoder (625), coupled together as shown in FIG. 6.

[0081] The inter-frame encoder (630) is configured to receive samples of a current block (e.g., a processing block), compare the block with one or more reference blocks in reference images (e.g., blocks in previous and subsequent images), generate inter-frame prediction information (e.g., redundant information description from inter-frame coding techniques, MV, merge mode information), and calculate an inter-frame prediction result (e.g., a prediction block) based on the inter-frame prediction information using any suitable technique. In some examples, the reference image is a decoded reference image that is decoded based on the coded video information.

[0082] The intra-frame encoder (622) is configured to receive samples of a current block (e.g., a processing block), in some cases compare the block with previously coded blocks in the same image, generate transformed and quantized coefficients, and in some cases generate intra-frame prediction information (e.g., intra-frame prediction direction information according to one or more intra-frame coding techniques). In one example, the intra-frame encoder (622) also calculates intra-frame prediction results (e.g., prediction blocks) based on the intra-frame prediction information and reference blocks in the same image.

[0083] The general-purpose controller (621) is configured to determine general-purpose control data and control other components of the video encoder (603) based on the general-purpose control data. In one example, the general-purpose controller (621) determines the mode of the block and provides a control signal to the switch (626) based on the mode. For example, if the mode is intra-frame mode, the general-purpose controller (621) controls the switch (626) to select the intra-frame mode result to be used by the residual calculator (623) and controls the entropy encoder (625) to select intra-frame prediction information and include the intra-frame prediction information in the codestream. Also, if the mode is inter-frame mode, the general-purpose controller (621) controls the switch (626) to select the inter-frame prediction result to be used by the residual calculator (623) and controls the entropy encoder (625) to select inter-frame prediction information and include the inter-frame prediction information in the codestream.

[0084] The residual calculator (623) is configured to calculate the difference (residual data) between the received block and a prediction result selected from the intra-frame encoder (622) or the inter-frame encoder (630). The residual encoder (624) is configured to operate on the residual data and encode the residual data to generate transform coefficients. In one example, the residual encoder (624) is configured to transform the residual data from the spatial domain to the frequency domain to generate transform coefficients. The transform coefficients then undergo a quantization process to obtain quantized transform coefficients. In various embodiments, the video encoder (603) also includes a residual decoder (628). The residual decoder (628) is configured to perform an inverse transform and generate decoded residual data. The decoded residual data can be used by the intra-frame encoder (622) and the inter-frame encoder (630) as appropriate. For example, the inter-frame encoder (630) can generate decoded blocks based on the decoded residual data and inter-frame prediction information, and the intra-frame encoder (622) can generate decoded blocks based on the decoded residual data and intra-frame prediction information. The decoded blocks are processed appropriately to generate a decoded image, and in some examples, the decoded image can be buffered in a memory circuit (not shown) and used as a reference image.

[0085] The entropy encoder (625) is configured to format the bitstream to include the encoded blocks. The entropy encoder (625) is configured to include various information in accordance with an appropriate standard, such as HEVC. In one example, the entropy encoder (625) is configured to include general control data, selected prediction information (e.g., intra-frame prediction information or inter-frame prediction information), residual information, and other appropriate information in the bitstream. Note that, according to the disclosed subject matter, there is no residual information when coding blocks in inter-frame mode or merged sub-mode of bi-predictive mode.

[0086] 7 shows a diagram of a video decoder (710) according to another embodiment of the present disclosure. The video decoder (710) is configured to receive coded images that are part of a coded video sequence and decode the coded images to generate reconstructed images. In one example, the video decoder (710) is used in place of the video decoder (310) in the example of FIG. 3.

[0087] In the example of FIG. 7, the video decoder (710) includes an entropy decoder (771), an inter-frame decoder (780), a residual decoder (773), a reconstruction module (774), and an intra-frame decoder (772), coupled together as shown in FIG. 8.

[0088] The entropy decoder (771) can be configured to reconstruct, from the coded image, specific symbols representing syntax elements that make up the coded image. Such symbols include, for example, a mode for coding the block (e.g., intra mode, inter mode, bidirectional prediction mode, a merged submode of the latter two, or another submode), prediction information (e.g., intra prediction information or inter prediction information) that can identify specific samples or metadata used for prediction by the intra decoder (772) or the inter decoder (780), respectively, and residual information, for example, in the form of quantized transform coefficients. In one example, if the prediction mode is an inter prediction mode or a bidirectional prediction mode, the inter prediction information is provided to the inter decoder (780). And, if the prediction type is an intra prediction type, the intra prediction information is provided to the intra decoder (772). The residual information can undergo inverse quantization and be provided to the residual decoder (773).

[0089] The inter-frame decoder (780) is configured to receive the inter-frame prediction information and to generate an inter-frame prediction result based on the inter-frame prediction information.

[0090] The intraframe decoder (772) is configured to receive intraframe prediction information and generate a prediction result based on the intraframe prediction information.

[0091] The residual decoder (773) is configured to perform inverse quantization to extract dequantized transform coefficients and process the dequantized transform coefficients to transform the residual from the frequency domain to the spatial domain. The residual decoder (773) may also require certain control information (to include quantizer parameters (QP)), which may be provided by the entropy decoder (771) (data path not shown as this is only low volume control information).

[0092] The reconstruction module (774) is configured to combine, in the spatial domain, the residual as output by the residual decoder (773) and the prediction result (as output by an inter-frame prediction module or an intra-frame prediction module, as the case may be), to form a reconstructed block, which may be part of a reconstructed image, which may then be part of the reconstructed video. It should be noted that it may perform other appropriate operations, such as a deblocking operation, to improve visual quality.

[0093] It should be noted that the video encoders (303), (503), and (603) and the video decoders (310), (410), and (710) may be realized using any suitable technology. In one embodiment, the video encoders (303), (503), and (603) and the video decoders (310), (410), and (710) may be realized using one or more integrated circuits. In another embodiment, the video encoders (303), (503), and (603) and the video decoders (310), (410), and (710) may be implemented using one or more processors executing software instructions.

[0094] II. Block Partition

[0095] FIG. 8 illustrates an example block partition according to some embodiments of the present disclosure. In one embodiment, the example block partition in FIG. 8 may be used in VP9, ​​proposed by the Alliance for Open Media (AOMedia). As shown in FIG. 8, a 4-way partitioning tree may be used, starting at the 64x64 level, continuing down to the 4x4 level, with some additional restrictions on 8x8 blocks. Note that a partition designated as R may be referred to as a recursive partition. That is, the same partitioning tree may be repeated at lower scales until the lowest 4x4 level is reached.

[0096] FIG. 9 illustrates an example block partition according to some embodiments of the present disclosure. In one embodiment, the example block partition in FIG. 9 may be used in AV1 proposed by Aomedia. As shown in FIG. 9, the partition tree may be expanded to a 10-way structure, and the maximum coding block size (called a superblock in VP9 / AV1 terminology) may be increased to start at 128×128. Note that the 4:1 / 1:4 rectangular partition in the first row of FIG. 9 does not exist in VP9. The partition type with three subpartitions in the second row of FIG. 9 is called a T-type partition. Rectangular partitions cannot be further subdivided. In addition to the coding block size, a coding tree depth is defined to indicate the division depth from the root node. In one embodiment, the coding tree depth for a root node (e.g., 128×128) may be set to 0. After a coding block is further divided once, the coding tree depth is increased by 1.

[0097] Instead of being forced to use a fixed transform unit size as in VP9, ​​AV1 allows partitioning of luma coding blocks into transform units of multiple sizes, which can be represented by recursive partitions up to two levels down. To merge extended coding block partitions in AV1, square, 2:1 / 1:2, and 4:1 / 1:4 transform sizes from 4x4 to 64x64 are supported. For chroma coding blocks, only the largest possible transform unit is allowed.

[0098] In some related examples, such as HEVC, CTUs may be divided into CUs using a quadtree structure, represented as a coding tree, to accommodate various local features. The decision of whether to code an image region using inter-frame (temporal) prediction or intra-frame (spatial) prediction may be performed at the CU level. Each CU may be further divided into one, two, or four PUs depending on the PU partition type. The same prediction process may be applied within one PU, and related information may be transmitted to the decoder on a PU-by-PU basis. After obtaining residual blocks by applying the prediction process based on the PU partition type, the CUs may be partitioned into TUs according to another quadtree structure, such as a coding tree for CUs. One important feature of the HEVC structure is the concept of multi-partitions, including CUs, PUs, and TUs. In HEVC, CUs or TUs can only be square in shape, while PUs may be square or rectangular in shape for inter-frame predicted blocks. In HEVC, one coding block may be further divided into four square sub-blocks, and a transform process may be performed on each sub-block, i.e., TU. Each TU may be further recursively divided into smaller TUs (e.g., using quadtree partitioning). The quadtree partitioning may be referred to as a residual quadtree (RQT).

[0099] At image boundaries, HEVC employs implicit quadtree partitioning, whereby a block may undergo successive quadtree partitioning until its size fits into the image boundary.

[0100] In some related examples, such as VVC, a quad tree with nested multitype trees using binary and ternary segmentation structures can replace the concept of multipartition unit types. That is, the separation of the CU, PU, ​​and TU concepts is eliminated, as long as the size of the CU is not too large relative to the maximum transform length. Therefore, these examples can support more flexibility for CU partition shapes. In the VVC coding tree structure, CUs can have either square or rectangular shapes. CTUs can be first partitioned by a quaternary tree (or quad tree) structure. Then, the leaf nodes of the quaternary tree can be further partitioned by a multitype tree structure.

[0101] FIG. 10 illustrates an example block partition for a multitype tree partitioning mode according to some embodiments of the present disclosure. In one embodiment, the example block partition in FIG. 10 may be used in VVC. As shown in FIG. 10, the multitype tree structure has four partition types: vertical binary partition (SPLIT_BT_VER), horizontal binary partition (SPLIT_BT_HOR), vertical ternary partition (SPLIT_TT_VER), and horizontal ternary partition (SPLIT_TT_HOR). The leaf nodes of the multitype tree are called CUs. As long as the CU is not too large relative to the maximum transform length, the multitype tree structure can be used for prediction and transform processes without requiring further partitioning. This means that in most cases, CUs, PUs, and TUs can have the same block size in a quad tree with a nested multitype tree coding block structure. However, one exception may occur when the maximum supported transform length is smaller than the width or height of the color components of the CU.

[0102] FIG. 11 illustrates an example quadtree with a nested multi-type tree coding block structure according to one embodiment of the present disclosure.

[0103] In some relevant examples, such as VVC, the maximum supported luma transform size is 64 x 64, and the maximum supported chroma transform size is 32 x 32. If the width or height of the CB is larger than the maximum transform width or height, the CB may be automatically split along the horizontal and / or vertical direction to meet the transform size limit in that direction.

[0104] In some related examples, such as VTM7, the coding tree scheme can support luma CTB and chroma CTB in one CTU with a separate block tree structure. For example, for P slices and B slices, the luma CTB and chroma CTB in one CTU share the same coding tree structure. However, for I slices, the luma CTB and chroma CTB in one CTU can have a separate block tree structure. When the separate block tree mode is applied, the luma CTB is partitioned into CUs by one coding tree structure, and the chroma CTB is partitioned into chroma CUs by another coding tree structure. This means that a CU in an I slice can include one luma component coding block or two chroma component coding blocks, and a CU in a P or B slice can always include coding blocks for all three chroma components unless the video is monochrome.

[0105] Some related examples employ a semi-decoupled tree (SDT) scheme, also known as a semi-separate tree (SST) or flexible block partitioning for chrominance components. In SDT, luma blocks and chrominance blocks within a superblock (SB) can have the same or different block partitioning, depending on the block size or luma tree depth of the luma coding block. For example, if the block size of the luma block is greater than a threshold T1 or the coding tree partitioning depth of the luma block is less than or equal to a threshold T2, the chrominance blocks associated with the luma block can use the same coding tree structure as the luma block. Otherwise, if the block size of the luma block is less than or equal to T1 or the luma partitioning depth of the luma block is greater than T2, the associated chrominance blocks can have different coding block partitioning from the luma block. Therefore, this scheme is referred to as flexible block partitioning for chrominance components. T1 is a positive integer such as 128 or 256. T2 is a positive integer such as 1 or 2. An example of block tree partitioning is shown in FIG. 12, where T2 is set to 1.

[0106] In some related examples, an improved semi-decoupled partitioning (SDP) scheme is adopted, in which luma and chroma blocks can share a partial tree structure from the root node of the superblock, and the conditions for when luma and chroma blocks start separate tree partitioning depend on the partitioning information of the luma block or advanced syntax from the bitstream.

[0107] Some related examples employ an L-type block partitioning tree scheme: instead of using rectangular block partitions, in L-type partitioning, a block may be divided into one or more L-shaped partitions and one or more rectangular partitions.

[0108] 13 shows an exemplary L-shaped (or L-type) partition. In this disclosure, a rotated L-shaped partition is also considered an L-shaped partition. As shown in FIG. 13, several terms are associated with the L-shaped partition, including width, height, short width, and short height.

[0109] 14 shows four examples of L-type partitioning trees according to some embodiments of the present disclosure. A block may be partitioned into two partitions, including one L-shaped partition (Partition 1) and one rectangular partition (Partition 0).

[0110] III. Intra-frame block copy

[0111] Intra-frame block copy (IntraBC or IBC) is a coding tool similar to inter-frame image prediction. The main difference is that in IntraBC, the predicted block is formed from reconstructed samples of the current image (e.g., before in-loop filtering is applied). Therefore, IntraBC can be considered as "motion compensation" within the current image.

[0112] A block vector (BV) can be coded to identify the position of a prediction block. The precision of the BV can be an integer. The BV can be signaled in the bit stream to identify the position of a predictor. For the current block, a flag (e.g., the IBC flag) indicating whether the current block is coded in the IntraBC mode is first transmitted in the bit stream. Next, if the current block is coded in the IntraBC mode, the BV difference (diff) is obtained by subtracting the reference BV from the current BV, and then the diff can be classified into one of four types according to the diff values of the horizontal and vertical components. The type information can be transmitted in the bit stream. Next, the diff of the two components can be signaled based on the type information.

[0113] In some related examples such as screen content coding, IntraBC is an effective tool. However, IntraBC may also pose difficulties to hardware design. To facilitate hardware design, the following changes can be adopted.

[0114] (1) When IntraBC is permitted, loop filters such as the deblocking filter, the constrained directional enhancement filter (CDEF), and the loop restoration filter are disabled. Thereby, the image buffer of the reconstructed samples can be shared between IntraBC and inter-frame prediction.

[0115] (2) To facilitate parallel decoding, prediction cannot exceed a limited area. For one superblock, if the coordinates of the upper left position are (x0, y0), IntraBC can access the prediction at the position (x, y) if y < y0 and x < x0 + 2 * (y0 - y).

[0116] (3) To enable the delay of hardware writeback, access to the region immediately reconstructed by IntraBC prediction is not allowed. The limited immediately reconstructed region may be within the range of 1 to n superblocks. Therefore, in addition to the modification (2), if the coordinates of the upper left position of one superblock are (x0, y0), IntraBC can access the prediction at the position (x, y) if y < y0 and x < x0 + 2 * (y0 - y) - D, where D represents the limited immediately reconstructed region.

[0117] IV. Improved IBC Prediction

[0118] In some related examples such as AV1, the luminance block and the chrominance block can share the same partitioning tree, and also the luminance block and the associated chrominance block can share the same IntraBC flag, which means that the IntraBC mode can be enabled or disabled for both the luminance block and the chrominance block. However, in some cases such as SDP, the luminance block and the chrominance block can share the same partitioning tree or have different partitioning trees. Therefore, in some cases such as SDP, always sharing the IntraBC flag between the luminance block and the chrominance block may not be optimal.

[0119] In this disclosure, block size may refer to various size attributes of a block, such as block width, block height, maximum width and height, minimum width and height, area size of a block (width * height), or aspect ratio (width:height or height:width). Superblock may refer to the largest coding unit (LCU), for example, a 128x128 block in AV1. SDP may also be referred to as SDT. IntraBC flag is a block-level flag that indicates whether IntraBC is applied to the current block.

[0120] This disclosure includes a method for determining whether to apply IntraBC mode to a coding unit in which, for example, a luma block and an associated chroma block can share a partial tree structure if the coding unit uses SDP. Thus, this method can be applied when SDP is enabled for the coding unit.

[0121] According to aspects of the present disclosure, if a luma block and an associated chroma block share (or have) the same partition structure (or tree), the IntraBC flags of the luma block and the chroma block are the same. Otherwise, if the luma block and the associated chroma block have different partitioning trees, the IntraBC flags of the luma block and the chroma block may be different.

[0122] In one embodiment, if a luma block and an associated chroma block share the same partition structure (or tree), the IntraBC flags and BV of both the luma block and the chroma block are the same.

[0123] In one embodiment, if a luma block and an associated chroma block share the same partition structure (or tree), the IntraBC flags of the luma block and the chroma block are the same. Otherwise, if the luma block and the associated chroma block have different partitioning trees, the IntraBC flag may be signaled in the bitstream only for the luma block, and the IntraBC flag may always be set to zero (or false, disabled) for the chroma block.

[0124] In one embodiment, if a luma block and an associated chroma block share the same partition structure (or tree), the IntraBC flags for the luma block and the associated chroma block are the same. Otherwise, if the luma block and the associated chroma block have different partitioning trees, the IntraBC flags for the luma block and the associated chroma block may be signaled separately in the bitstream.

[0125] According to aspects of the present disclosure, if the luma block and the chroma block have different partitioning tree structures, the luma block and the associated chroma block may share the same IntraBC flag.

[0126] In one embodiment, if a luma block and an associated chroma block have different partitioning tree structures and the same partition size, the luma block and the associated chroma block can share the same IntraBC flag and / or BV. For example, in the YUV420 format, if the block size of the luma block is 64x32 and the block size of the associated chroma block is 32x16, the luma block and the associated chroma block have the same partition size. Therefore, the luma block and the associated chroma block can share the same IntraBC flag and / or BV.

[0127] In one embodiment, if a luma block and an associated chroma block have different partitioning tree structures and the difference in size between the luma block and the chroma block is less than or equal to a threshold, the luma block and the associated chroma block can share the same IntraBC flag and / or BV. For example, if the block size of the associated chroma block is less than or equal to K times the block size of the luma block and the block size of the associated chroma block is greater than or equal to 1 / K times the block size of the luma block, the luma block and the associated chroma block can share the same IntraBC flag and / or BV. In one example, K is set to 2 or 4.

[0128] According to aspects of the present disclosure, if a co-located luma block is coded using a larger block size than the current chroma block, the chroma IntraBC flags and associated BVs may be inherited from the co-located luma block.

[0129] According to aspects of the present disclosure, a chroma block may be associated with multiple co-located luma blocks, and the chroma block and the multiple co-located luma blocks may have different partitioning trees. The multiple co-located luma blocks may be coded partially or fully in IntraBC mode.

[0130] In one embodiment, if the multiple co-located luma blocks are coded completely in IntraBC mode, all of the multiple co-located luma blocks are coded in IntraBC mode, and the chroma blocks are coded in IntraBC mode, the BVs of the chroma blocks may be derived based on the BVs associated with the center samples of the multiple co-located luma blocks or the BVs associated with the corner samples of the multiple co-located luma blocks.

[0131] In one embodiment, when the co-located luma blocks are partially coded in IntraBC mode, a first subset of the co-located luma blocks is coded in IntraBC mode, and a second subset of the co-located luma blocks is coded using intra prediction. A first plurality of chroma samples of chroma blocks associated with the first subset of the co-located luma blocks are coded in IntraBC mode. BVs of the first plurality of chroma samples may be derived based on BVs associated with center samples of the first subset of the co-located luma blocks or BVs associated with corner samples of the first subset of the co-located luma blocks. A second plurality of chroma samples of chroma blocks associated with the second subset of the co-located luma blocks are coded using intra prediction. An intra prediction mode of the second plurality of chroma samples may be signaled in the bitstream or derived based on the intra prediction mode of the second subset of the co-located luma blocks. A prediction block of the chroma blocks may then be generated based on the first plurality of chroma samples and the second plurality of chroma samples.

[0132] V. Flowchart

[0133] 15 shows a flowchart outlining an exemplary process (1500) according to one embodiment of the present disclosure. In various embodiments, the process (1500) is performed by processing circuitry, such as processing circuitry in the terminal devices (210), (220), (230), and (240), a processing circuitry performing the functions of the video encoder (303), a processing circuitry performing the functions of the video decoder (310), a processing circuitry performing the functions of the video decoder (410), a processing circuitry performing the functions of the intra-frame prediction module (452), a processing circuitry performing the functions of the video encoder (503), a processing circuitry performing the functions of the predictor (535), a processing circuitry performing the functions of the intra-frame encoder (622), a processing circuitry performing the functions of the intra-frame decoder (772), etc. In some embodiments, the process (1500) is implemented with software instructions, and thus, when the processing circuitry executes the software instructions, the processing circuitry performs the process (1500).

[0134] The process (1500) may generally begin at step (S1510), in which the process (1500) decodes prediction information for a coding unit in a current image that is part of a video bitstream. The process (1500) then proceeds to step (S1520).

[0135] In step (S1520), the process (1500) determines, based on the prediction information, whether the luma blocks and chroma blocks associated with the coding unit have different partitioning trees. If the luma blocks and chroma blocks associated with the coding unit have different partitioning trees, the process (1500) proceeds to step (S1530).

[0136] In step S1530, the process 1500 determines whether the luminance block is coded in IBC mode based on the first IBC flag included in the prediction information. Then, the process 1500 proceeds to step S1540.

[0137] In step S1540, the process 1500 determines whether the chrominance block is coded in IBC mode based on one of the first IBC flag, the second IBC flag, and the default mode included in the prediction information. Then, the process 1500 proceeds to step S1550.

[0138] In step S1550, the process 1500 reconstructs the coding unit based on the luma and chroma blocks, and then the process 1500 ends.

[0139] In one embodiment, the process (1500) determines whether the luma block and the chroma block associated with the coding unit are coded in IBC mode based on a first IBC flag included in the prediction information in response to the luma block and the chroma block having the same partitioning tree. The process (1500) determines that the luma block and the chroma block have the same block vector based on the luma block and the chroma block being coded in IBC mode.

[0140] In one embodiment, the process (1500) determines that the chroma blocks are not coded in IBC mode based on a default mode that indicates that IBC mode is disabled for chroma blocks that have a different partitioning tree than the luma blocks.

[0141] In one embodiment, the process (1500) determines whether the luma block and the chroma block have the same partition size. In response to the luma block and the chroma block having the same partition size, the process (1500) determines whether the chroma block is coded in IBC mode based on the first IBC flag.

[0142] In one embodiment, the block size of the luma block is larger than the block size of the chroma block, and the process (1500) determines whether the luma block and the chroma block are coded in IBC mode based on the first IBC flag. In response to the luma block and the chroma block being coded in IBC mode, the process (1500) determines that the luma block and the chroma block have the same block vector.

[0143] In one embodiment, a first subset of samples of the chroma block is co-located with a first luma block coded in IBC mode and a second subset of samples of the chroma block is co-located with a second luma block coded in a first intraframe prediction mode, and the process (1500) determines that the first subset of samples of the chroma block is coded in IBC mode. The process (1500) also determines that the second subset of samples of the chroma block is coded in one of the first and second intraframe prediction modes included in the prediction information.

[0144] In one embodiment, the first subset of samples of the chrominance block and the first luma block may have the same block vector.

[0145] VI. Computer Systems

[0146] The techniques described above can be implemented as computer software using computer-readable instructions and physically stored on one or more computer-readable media. For example, Figure 16 illustrates a computer system (1600) suitable for implementing certain embodiments of the disclosed subject matter.

[0147] Computer software may be coded using any suitable machine code or computer language and may undergo assembly, compilation, linking, or similar mechanisms to create code comprising instructions, which may be executed directly by one or more computer central processing units (CPUs), graphics processing units (GPUs), etc., or may be executed via code interpretation, microcode execution, etc.

[0148] The instructions may be executed by various types of computers or components thereof, including, for example, personal computers, tablet computers, servers, smartphones, gaming devices, internet of things devices, and the like.

[0149] The components of the computer system (1600) illustrated in Figure 16 are exemplary in nature and are not intended to suggest any limitation on the scope of use or functionality of the computer software implementing the embodiments of the present disclosure. The arrangement of components should not be interpreted as having any dependency or requirement relating to any one or combination of components illustrated in the exemplary embodiment of the computer system (1600).

[0150] The computer system (1600) may include several human interface input devices. Such human interface input devices may respond to input by one or more users via tactile input (e.g., keystrokes, swipes, data glove movements, etc.), audio input (e.g., voice, clapping, etc.), visual input (e.g., gestures, etc.), and olfactory input (not shown). The human interface devices may also be used to capture certain media not necessarily directly associated with conscious human input, such as audio (e.g., voice, music, ambient sounds, etc.), images (e.g., scanned images, photographic images obtained from a still image camera, etc.), and video (e.g., two-dimensional video, three-dimensional video including stereoscopic vision, etc.).

[0151] The human interface input devices may include one or more of a keyboard (1601), a mouse (1602), a trackpad (1603), a touchscreen (1610), a data glove (not shown), a joystick (1605), a microphone (1606), a scanner (1607), and a camera (1608) (only one of each is shown).

[0152] The computer system (1600) may also include several human interface output devices that may stimulate one or more of the user's senses, for example, through tactile output, sound, light, and smell / taste. Such human interface output devices include haptic output devices (e.g., a touchscreen (1610), haptic feedback via a data glove (not shown), or a joystick (1605), but may also be haptic feedback devices that do not act as input devices), audio output devices (e.g., speakers (1609), headphones (not shown)), and visual output devices (e.g., a screen (1610), including a CRT screen, an LCD screen, a plasma screen, and an OLED screen, each of which may or may not have touchscreen input capability, and each of which may or may not have haptic feedback capability, some of which may output two-dimensional visual output or three or more dimensional visual output, such as via stereographic output, virtual reality glasses (not shown), holographic displays and smoke tanks (not shown), and printers (not shown). These visual output devices (e.g., the screen (1610)) may be connected to the system bus (1648) via a graphics adapter (1650).

[0153] The computer system (1600) may include human-accessible storage devices and their associated media, such as optical media or similar media (1621), including CD / DVD ROM / RW (1620) with CDs / DVDs, thumb drives (1622), removable hard drives or solid-state drives (1623), legacy magnetic media such as tape and floppy disks (not shown), specialized ROM / ASIC / PLD-based devices such as security dongles (not shown), and the like.

[0154] Those skilled in the art should also understand that the term "computer-readable medium" as used in connection with the subject matter disclosed herein does not encompass transmission media, carrier waves, or other transitory signals.

[0155] The computer system 1600 may also include a network interface 1654 to one or more communication networks 1655. The one or more communication networks 1655 may be, for example, wireless, wired, or optical. The one or more communication networks 1655 may further include local area networks, wide area networks, metropolitan area networks, vehicular and industrial networks, real-time networks, delay-tolerant networks, etc. Examples of the one or more communication networks 1655 include LANs such as Ethernet, wireless LANs, cellular networks (e.g., GSM, 3G, 4G, 5G, LTE), television cable or wireless wide area digital networks (including cable television, satellite television, and terrestrial broadcast television), vehicular and industrial networks (including CANBus), etc. Some networks typically require an external network interface adapter connected to some general-purpose data port or peripheral bus (1649) (e.g., a USB port on the computer system (1600)), while others are typically integrated into the core of the computer system (1600) by connecting to a system bus as described below (e.g., an Ethernet interface to a PC computer system, or a cellular network interface to a smartphone computer system). Using any of these networks, the computer system (1600) can communicate with other entities. Such communication may be unidirectional receive-only (e.g., broadcast TV), unidirectional transmit-only (e.g., from a Canbus to a specific Canbus device), or bidirectional, e.g., to another computer system using a local or wide-area digital network. As discussed above, specific protocols and protocol stacks may be used with each of these networks and network interfaces.

[0156] The human-machine interface devices, human-accessible storage devices, and network interfaces can be connected to the core (1640) of the computer system (1600).

[0157] The core (1640) may include one or more central processing units (CPUs) (1641), graphics processing units (GPUs) (1642), dedicated programmable processing units in the form of field programmable gate arrays (FPGAs) (1643), hardware accelerators for specific tasks (1644), graphics adapters (1650), etc. These devices may be connected via a system bus (1648), along with read-only memory (ROM) (1645), random access memory (RAM) (1646), internal mass storage (1647), such as an internal non-user-accessible hard disk drive or SSD, etc. In some computer systems, the system bus (1648) may be accessible in the form of one or more physical plugs to allow expansion with additional CPUs, GPUs, etc. Peripheral devices may be connected directly to the core's system bus (1648) or via a peripheral bus (1649). In one example, a screen (1610) may be connected to the graphics adapter (1650). Peripheral bus architectures include Peripheral Controller Interface (PCI), Universal Serial Bus (USB), and the like.

[0158] The CPU (1641), GPU (1642), FPGA (1643), and accelerator (1644) can execute several instructions, which can be combined to form the above-mentioned computer code. The computer code can be stored in ROM (1645) or RAM (1646). Temporary data can be stored in RAM (1646), while permanent data can be stored in, for example, internal mass storage (1647). The use of cache memory, which can be closely associated with one or more CPUs (1641), GPUs (1642), mass storage (1647), ROM (1645), RAM (1646), etc., enables fast storage and retrieval of data from any memory device.

[0159] The computer-readable medium can have computer code thereon for performing various computer-implemented operations. The medium and computer code may be those specially designed and constructed for the purposes of the present disclosure, or they may be any medium and code known and available to those skilled in the computer software arts.

[0160] By way of example and not limitation, the architecture (1600), and in particular a computer system having a core (1640), can provide functionality as a processor (including a CPU, GPU, FPGA, accelerator, etc.) executing software embodied in one or more tangible, computer-readable media. Such computer-readable media may be media related to the user-accessible mass storage discussed above, and may be specific storage with the core (1640), such as the core's internal mass storage (1647) or ROM (1645), which may be non-volatile. Software implementing various embodiments of the present disclosure may be stored in such devices and executed by the core (1640). The computer-readable media may include one or more memory devices or chips, depending on particular needs. This software may cause the core (1640), and in particular the processor (including a CPU, GPU, FPGA, etc.) therein, to perform particular processes or particular portions of particular processes described herein, including defining data structures stored in RAM (1646) and modifying such data structures according to software-defined processes. Additionally or alternatively, a computer system may provide functionality due to logic hardwired or otherwise incorporated into circuitry (e.g., accelerator (1644)) that operates in place of or together with software to perform particular processes or portions of particular processes described herein. Where appropriate, references to software may include logic, and vice versa. Where appropriate, references to computer-readable media may include circuitry (such as an integrated circuit (IC)) that stores software to be executed, circuitry embodying the logic to be executed, or both. The present disclosure encompasses any appropriate combination of hardware and software.

[0161] Appendix A: Acronyms ALF: Adaptive Loop Filter AMVP: Advanced Motion Vector Prediction APS: Adaptation Parameter Set ASIC: Application-Specific Integrated Circuit ATMVP: Alternative / Advanced Temporal Motion Vector Prediction AV1:AOMedia Video 1 AV2:AOMedia Video 2 BMS:Benchmark Set BV: Block Vector CANBus: Controller Area Network Bus CB: Coding Block CC-ALF: Cross-Component Adaptive Loop Filter CD: Compact Disc CDEF: Constrained Directional Enhancement Filter CPR: Current Picture Referencing CPU: Central Processing Unit CRT:Cathode Ray Tube CTB: Coding Tree Block CTU: Coding Tree Unit CU: Coding Unit DPB: Decoder Picture Buffer DPCM: Differential Pulse-Code Modulation DPS: Decoding Parameter Set DVD: Digital Video Disc FPGA: Field Programmable Gate Area JCCR: Joint CbCr Residual Coding JVET: Joint Video Exploration Team GOP::Groups of Pictures, image groups GPU: Graphics Processing Unit GSM: Global System for Mobile communications HDR: High Dynamic Range HEVC: High Efficiency Video Coding HRD: Hypothetical Reference Decoder IBC: Intra Block Copy, intra-frame block copy IC: Integrated Circuit ISP: Intra Sub-Partitions, intra-frame sub-partitions JEM: Joint Exploration Model LAN: Local Area Network LCD: Liquid-Crystal Display LR: Loop Restoration Filter LRU: Loop Restoration Unit LTE:Long-Term Evolution, long-term evolution MPM: Most Probable Mode MV: Motion Vector OLED: Organic Light-Emitting Diode PBs: Prediction Blocks PCI: Peripheral Component Interconnect, external controller interface PDPC: Position Dependent Prediction Combination PLD: Programmable Logic Device PPS: Picture Parameter Set PU: Prediction Unit RAM: Random Access Memory ROM: Read-Only Memory SAO: Sample Adaptive Offset SCC: Screen Content Coding SDR: Standard Dynamic Range SEI: Supplementary Enhancement Information SNR: Signal Noise Ratio SPS: Sequence Parameter Set SSD: Solid-state drive TU: Transform Unit USB: Universal Serial Bus VPS:Video Parameter Set VUI: Visual Usability Information VVC: Versatile Video Coding WAIP: Wide-Angle Intra Prediction

[0162] While this disclosure has described several exemplary embodiments, there are modifications, arrangements, and various equivalent substitutions that fall within the scope of this disclosure. It should therefore be understood that those skilled in the art will be able to design various systems and methods that, although not explicitly shown or described herein, embody the principles of this disclosure and are therefore within the spirit and scope of this disclosure. [Explanation of symbols]

[0163] 200 Communication Systems 210,220,230,240 Terminal Devices 250 Network 300 Streaming Environment 301 Video Sources 302 Video Image Stream 303 Video Encoder 304 Encoded Video Data 305 Streaming Server 306 Client Subsystem 307 Copying Encoded Video Data 308 Client Subsystem 309 Copying Encoded Video Data 310 Video Decoder 311 Video Image Stream 312 Display 313 Acquisition Subsystem 320 Electronic Devices 401 Channel 410 Video Decoder 412 Rendering Devices 415 Buffer Memory 420 Entropy Decoder / Analyzer 421 Symbol 430 Electronic Devices 431 Receiver 451 Scaler / Descaler Unit 452 Intraframe Image Prediction Unit 453 Motion Compensation Prediction Unit 455 Aggregator 456 Loop Filter Unit 457 Reference Image Memory 458 Current Image Buffer 501 source video sequences 550 controller 530 Source Encoder 535 predictor 532 encoding engine 534 reference image memory 533 decoder 545 Entropy Encoder 540 Transmitter 560 channels block data 621 General-purpose Controller General control data intra prediction result 622 Intra Encoder 630 Interencoder reference pictures 624 Residual Encoder Inter prediction information 628 Residual Decoder inter prediction result Inter prediction information 625 Entropy Encoder coded video sequence 710 Video Decoder 771 Entropy Decoder 772 Intraframe Decoder 773 Residual Decoder 774 Reconstruction Module 780 Interframe Decoder 1600 Computer Systems 1601 keyboard 1602 Mouse 1603 Trackpad 1605 Joystick 1606 Microphone 1607 Scanner 1608 Camera 1609 Speaker 1610 screen, touch screen 1620 CD / DVD ROM / RW 1621 Optical media 1622 thumb drive 1623 Removable Drive 1640 cores 1641 Central Processing Unit (CPU) 1642 Graphics Processing Unit (GPU) 1643 Field Programmable Gate Array (FPGA) 1644 Hardware Accelerator 1645 Read-Only Memory (ROM) 1646 Random Access Memory (RAM) 1647 Internal Mass Storage 1648 system bus 1649 Peripheral Bus 1650 graphics adapter 1654 network interface 1655 Communication Network

Claims

1. A method for encoding a video bitstream, comprising: signaling prediction information of a coding unit in a current picture that is part of the video bitstream with a first IBC flag; if the luma blocks and chroma blocks associated with the coding unit have different partitioning trees, encoding the luminance block in an intra-frame block copy (IBC) mode based on the first IBC flag; If the luma blocks and the chroma blocks associated with the coding unit have different partitioning trees and the same partition size, encoding the chrominance block in the IBC mode based on the first IBC flag. A method characterized by:

2. In response to the luma block and the chroma block associated with the coding unit having the same partitioning tree, encoding the luma block and the chroma block in IBC mode based on the first IBC flag; and constructing the same block vector for the luma block and the chroma block based on the luma block and the chroma block being coded in the IBC mode.

2. The method of claim 1 .

3. comprising a step of refraining from encoding the chrominance block in the IBC mode based on a default mode indicating that the IBC mode is disabled for the chrominance block having a partitioning tree different from that of the luma block.

2. The method of claim 1 .

4. The method according to claim 1, wherein a block size of the luma block is greater than a block size of the chroma block, the method comprising: encoding the luma block and the chroma block in the IBC mode based on the first IBC flag; constructing the same block vector for the luma block and the chroma block.

2. The method of claim 1 .

5. A method comprising: co-locating a first subset of samples of the chrominance block with a first luminance block coded in the IBC mode; and co-locating a second subset of samples of the chrominance block with a second luminance block coded in a first intraframe prediction mode; encoding a first subset of samples of the chrominance block in the IBC mode; encoding a second subset of samples of the chrominance block in one of the first and second intra-frame prediction modes included in the prediction information.

2. The method of claim 1 .

6. The method of claim 5, wherein a first subset of samples of the chrominance block and the first luma block are configured to have the same block vector.

6. The method of claim 5.

7. An apparatus including a processing circuit, the processing circuit comprising: configured to carry out the method of any one of claims 1 to 6, An apparatus characterized in that

8. A non-transitory computer-readable storage medium having stored thereon instructions, the instructions, when executed by at least one processor, causing the at least one processor to: Implementing the method according to any one of claims 1 to 6, A storage medium characterized by: