Battery monitoring device

Abstract

A battery monitoring device (10) comprises: a substrate (70 or the like); a monitoring IC (30 or the like) that monitors the respective states of unit batteries (B1-B7); a plurality of detection paths (L1-L8 or the like) that electrically connect the monitoring IC and the unit batteries; resistors (51-58, 81A-88A, 81B-88B, or the like) that are respectively provided in the detection paths; and a discharge switch (SW1-SW7) provided closer to the monitoring IC side than the resistor in each of the detection paths. The detection paths extend from the monitoring IC to an end of the substrate. The center position of the resistor provided in one of at least two detection paths adjacent to each other among the detection paths is displaced with respect to the central position of the resistor provided in the other in a specific direction from the monitoring IC toward the end of the substrate.

Description

[Technical Field]

[0001] The present disclosure relates to a battery monitoring device. [Background technology]

[0002] Conventionally, as described in Patent Document 1, for example, a battery monitoring device that monitors the status of multiple unit cells connected in series has been known. The battery monitoring device includes a circuit board, a monitoring IC mounted on the circuit board, and a detection path mounted on the circuit board. The monitoring IC monitors the status of each unit cell. A plurality of detection paths are provided to electrically connect the monitoring IC to each unit cell. Each detection path is provided with a resistor. Each detection path is provided with a discharge switch connecting adjacent detection paths on the monitoring IC side of the resistor. To equalize the capacity of each unit cell, the discharge switch corresponding to the unit cell to be discharged is turned on. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2008-67460 Summary of the Invention

[0004] When the discharge switch is turned on, the discharge current of the battery flows through the resistor, which forms a closed circuit with the discharge switch and the battery. When the discharge current flows through the resistor, the resistor heats up. For this reason, a battery monitoring device is needed that can prevent heat damage to the monitoring IC, which is sensitive to heat.

[0005] A primary object of the present disclosure is to provide a battery monitoring device that can prevent heat damage to a monitoring IC that is sensitive to heat.

[0006] The present disclosure provides a battery monitoring device that monitors the state of a plurality of unit batteries connected in series, A substrate; a monitoring IC provided on the substrate for monitoring the state of each of the unit batteries; a plurality of detection paths provided on the substrate, the detection paths electrically connecting the monitoring IC and each of the unit batteries; a resistor provided in each of the detection paths; a discharge switch that is provided on the monitoring IC side of the resistor in each of the detection paths and connects adjacent detection paths; Equipped with each of the detection paths extending from the monitoring IC to an edge of the substrate; The center position of the resistor provided in one of at least two adjacent detection paths among the detection paths is shifted in a specific direction from the monitoring IC toward the end of the substrate with respect to the center position of the resistor provided in the other detection path.

[0007] In the substrate, a plurality of detection paths extend from the monitoring IC to the edge of the substrate to electrically connect the monitoring IC to each unit battery arranged outside the substrate. In this configuration, the center position of the resistor provided in one of at least two adjacent detection paths is offset in a specific direction from the monitoring IC to the edge of the substrate relative to the center position of the resistor provided in the other detection path. This allows the resistors provided in at least two adjacent detection paths to be positioned more uniformly on the substrate than in a configuration in which the center positions of the resistors provided in one and the other are the same in the specific direction. As a result, thermal damage to the heat-sensitive monitoring IC can be prevented. [Brief explanation of the drawings]

[0008] The above and other objects, features and advantages of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings, in which: [Figure 1] FIG. 1 is a diagram showing the overall configuration of a battery monitoring device according to a first embodiment; [Figure 2] FIG. 2 is a plan view showing the layout of electronic components constituting the battery monitoring device on a substrate; [Figure 3]FIG. 3 is a diagram illustrating the overall configuration of a battery monitoring device according to a second embodiment; [Figure 4] FIG. 4 is a plan view showing the layout of electronic components constituting the battery monitoring device on a substrate; [Figure 5] FIG. 5 is a plan view showing an arrangement of electronic components on a substrate that constitute a battery monitoring device according to a third embodiment; [Figure 6] FIG. 6 is a plan view showing an arrangement of electronic components on a substrate that constitute a battery monitoring device according to a fourth embodiment; [Figure 7] FIG. 7 is a time chart showing the transition of the on-permitted period of each discharge switch. [Figure 8] FIG. 8 is a plan view showing an arrangement of electronic components on a substrate that constitute a battery monitoring device according to a fifth embodiment; [Figure 9] FIG. 9 is a plan view showing an arrangement of electronic components on a substrate that constitute a battery monitoring device according to a sixth embodiment; [Figure 10] FIG. 10 is a plan view showing an arrangement of electronic components on a substrate that constitute a battery monitoring device according to a seventh embodiment; [Figure 11] FIG. 11 is a plan view showing an arrangement of electronic components on a substrate that constitute a battery monitoring device according to another embodiment; [Figure 12] FIG. 12 is a plan view showing an arrangement of electronic components on a substrate that constitute a battery monitoring device according to another embodiment; [Figure 13] FIG. 13 is a plan view showing an arrangement of electronic components on a substrate that constitute a battery monitoring device according to another embodiment; [Figure 14] FIG. 14 is a plan view showing the layout of electronic components on a substrate that constitute a battery monitoring device according to another embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0009] Several embodiments will be described with reference to the drawings. In several embodiments, functionally and / or structurally corresponding and / or associated parts may be assigned the same reference numerals or reference numerals that differ in the hundredth or more digit. For corresponding and / or associated parts, reference may be made to the descriptions of other embodiments.

[0010] First Embodiment A first embodiment of a battery monitoring device according to the present invention will be described below with reference to the drawings. The battery monitoring device according to this embodiment may be installed in a mobile object such as an electric vehicle, a railcar, an aircraft, or a ship, or in a stationary facility.

[0011] As shown in FIG. 1, the battery monitoring device 10 includes a monitoring IC 30 that monitors the states of the unit batteries B1 to B7 that make up the battery pack 20, and a control IC 40 that is a host IC of the monitoring IC 30. The battery pack 20 includes a series-connected body of unit batteries. FIG. 1 shows an example in which there are seven unit batteries. The first to seventh unit batteries B1 to B7 are each a single battery cell or a series-connected body of multiple battery cells. The battery cells are rechargeable storage batteries, such as lithium-ion storage batteries or nickel-metal hydride storage batteries.

[0012] The battery monitoring device 10 includes first to eighth detection paths L1 to L8 and a connection unit 31 as components for electrically connecting the monitoring IC 30 and each of the unit batteries B1 to B7. The connection unit 31 is, for example, a connector. First ends of the first to eighth detection paths L1 to L8 are connected to the monitoring IC 30, and second ends of the first to eighth detection paths L1 to L8 are connected to the connection unit 31.

[0013] The monitoring IC has first to eighth terminals T1 to T8. The (i+1)th terminal Ti+1 of the monitoring IC 30 is connected to the positive terminal of the ith unit battery Bi (i=1, 2, ..., 7) via the connection part 31 and the (i+1)th detection path Li+1. The (i+1)th terminal Ti of the monitoring IC 30 is connected to the negative terminal of the ith unit battery Bi via the connection part 31 and the ith detection path Li. In other words, with the exception of the first and eighth detection paths L1 and L8, the detection path on the negative terminal side of the unit battery with a higher potential and the detection path on the positive terminal side of the unit battery with a lower potential are shared.

[0014] The first to eighth detection paths L1 to L8 are provided with first to eighth resistors 51 to 58. The first to eighth resistors 51 to 58 are, for example, chip resistors. In this embodiment, the resistance values ​​of the first to eighth resistors 51 to 58 are set to be equivalent (for example, the same) to one another. Taking the first detection path L1 as an example, the first detection path L1 is made up of the first resistor 51, a wiring pattern that electrically connects a first end of the first resistor 51 to the first terminal T1, and a wiring pattern that electrically connects a second end of the first resistor 51 to the connection portion 31. Each wiring pattern is provided on a substrate 70, which will be described later.

[0015] The battery monitoring device 10 includes first to seventh capacitors C1 to C7. The first to seventh capacitors C1 to C7 are, for example, chip capacitors. The capacitances of the first to seventh capacitors C1 to C7 are set to the same value (for example, the same value). The high-potential side terminal of the i-th capacitor Ci is connected to a portion of the i+1-th detection path Li+1 that is closer to the i+1-th terminal Ti+1 than the resistor. The low-potential side terminal of the i-th capacitor Ci is connected to a portion of the i-th detection path Li that is closer to the i-th terminal Ti than the resistor. In other words, the i-th capacitor Ci connects the i+1-th detection path Li+1 to the i-th detection path Li adjacent to the i+1-th detection path Li+1. Taking the first unit battery B1 as an example, the terminal voltage of the first unit battery B1 is input to the monitoring IC 30 via the first and second detection paths L1 and L2 and a low-pass filter formed by the first resistor 51 and the first capacitor C1. The low-pass filter is provided to remove high-frequency noise superimposed on the voltage signal and to improve the detection accuracy of the terminal voltage of the unit battery.

[0016] The battery monitoring device 10 includes first to seventh discharge switches SW1 to SW7 corresponding to the first to seventh unit batteries B1 to B7. The first to seventh discharge switches SW1 to SW7 are provided to equalize the capacities (e.g., SOC) of the first to seventh unit batteries B1 to B7. Each of the discharge switches SW1 to SW7 allows current to flow when turned on and blocks bidirectional current flow when turned off. In this embodiment, each of the discharge switches SW1 to SW7 is built into the monitoring IC 30. The ith discharge switch SWi connects the (i+1)th terminal Ti+1 and the ith terminal Ti. In other words, the ith discharge switch SWi electrically connects the (i+1)th detection path Li+1 and the ith detection path Li.

[0017] The control IC 40 is a main control unit that supervises the state monitoring control and capacity equalization control of each of the unit batteries B1 to B7, and transmits instructions to execute each control to the monitoring IC 30, which serves as a sub-control unit. The monitoring IC 30 transmits detected values ​​of the inter-terminal voltages of each of the unit batteries B1 to B7 to the control IC 40.

[0018] Based on instructions from the control IC 40, the monitoring IC 30 selects one of the unit batteries B1 to B7 to be discharged for capacity equalization and turns on the discharge switch corresponding to the selected unit battery for a predetermined period of time. For example, when the first discharge switch SW1 is turned on, a discharge current from the first unit battery B1 flows through a closed circuit including the first unit battery B1, the second detection path L2 including the second resistor 52, the first discharge switch SW1, and the first detection path L1 including the first resistor 51. As a result, the first and second resistors 51 and 52 generate heat. A technique for improving heat dissipation in this case will be described with reference to FIG. 2. FIG. 2 is a diagram showing the layout of electronic components on a circuit board 70.

[0019] As shown in Fig. 2, the battery monitoring device 10 includes a substrate 70. Electronic components such as the monitoring IC 30 and the resistors 51 to 58 are provided on the surface of the substrate 70. The substrate 70 is a printed circuit board, and in this embodiment, has a rectangular shape (specifically, a rectangular shape). The X direction shown in Fig. 2 is the direction in which the short sides of the substrate 70 extend, and the Y direction is the direction in which the long sides of the substrate 70 extend. The X direction and the Y direction are perpendicular to each other.

[0020] A connection portion 31 is provided at an end portion near a short side of the substrate 70. The connection portion 31 is provided so as to extend along the end portion of the substrate 70.

[0021] The control IC 40 is provided on a portion of the substrate 70 that is spaced apart from the connection portion 31 in the Y direction. The monitoring IC 30 is provided on the substrate 70 between the connection portion 31 and the control IC 40 in the Y direction. The monitoring IC 30 has a flat shape. The monitoring IC 30 has a rectangular shape in a plan view. The monitoring IC 30 of this embodiment has a rectangular parallelepiped shape that is long in the X direction.

[0022] The first to eighth terminals T1 to T8 of the monitoring IC 30 are provided on a portion of the monitoring IC 30 facing the connection portion 31, and are aligned in the X direction.

[0023] The first to eighth detection paths L1 to L8 extend from the first to eighth terminals T1 to T8 of the monitoring IC 30 to the connection portion 31 at the end of the substrate 70. In this embodiment, the first to eighth detection paths L1 to L8 extend linearly in the Y direction. The first to eighth detection paths L1 to L8 are arranged side by side at intervals in the X direction.

[0024] The first to seventh capacitors C1 to C7 are arranged side by side in the X direction in a portion of the substrate 70 closer to the connection portion 31 than the monitoring IC 30.

[0025] The first to eighth resistors 51 to 58 are elongated, specifically rectangular parallelepiped-shaped. The first to eighth resistors 51 to 58 are mounted on the substrate 70 so that their longitudinal directions coincide with the direction (Y direction) of the detection paths along which they are mounted. The first, third, fifth, and seventh resistors 51, 53, 55, and 57 are arranged side by side in the X direction. The second, fourth, sixth, and eighth resistors 52, 54, 56, and 58 are arranged side by side in the X direction at positions shifted toward the monitoring IC 30 from the positions of the first, third, fifth, and seventh resistors 51, 53, 55, and 57 in the Y direction.

[0026] In this embodiment, in each combination of two adjacent detection paths, the center position of the resistor provided in one detection path is shifted in the Y direction (corresponding to a "specific direction") relative to the center position of the resistor provided in the other detection path.

[0027] Specifically, taking the pair of adjacent first and second detection paths L1 and L2 as an example, the center position of the first resistor 51 provided on the first detection path L1 is offset in the Y direction from the center position of the second resistor 52 provided on the second detection path L2. In other words, the center position of the first resistor 51 is offset in the longitudinal direction (Y direction) of the first resistor 51 from the center position of the second resistor 52. The same applies to the pair of second and third detection paths L2 and L3, the pair of third and fourth detection paths L3 and L4, the pair of fourth and fifth detection paths L4 and L5, the pair of fifth and sixth detection paths L5 and L6, the pair of sixth and seventh detection paths L6 and L7, and the pair of seventh and eighth detection paths L7 and L8. This allows the positions of the resistors provided on the substrate 70 to be dispersed between adjacent two detection paths. As a result, it is possible to improve the heat dissipation properties of the first to eighth resistors 51 to 58. This makes it possible to suppress the influence of the heat generated by the first to eighth resistors 51 to 58 on the monitoring IC 30, and to suppress a decrease in the accuracy of voltage detection by the monitoring IC 30.

[0028] In particular, in this embodiment, in all combinations of two adjacent detection paths, the arrangement position of a resistor provided in one detection path does not overlap the arrangement position of a resistor provided in the other detection path in the X direction. Taking the pair of first and second detection paths L1 and L2 as an example, the arrangement position of the first resistor 51 provided in the first detection path L1 does not overlap the arrangement position of the second resistor 52 provided in the second detection path L2 in the X direction, and the end of the first resistor 51 on the monitoring IC 30 side and the end of the second resistor 52 on the connection portion 31 side are spaced apart in the Y direction. In other words, the arrangement position of the first resistor 51 and the arrangement position of the second resistor 52 do not overlap in the direction (X direction) along the surface of the substrate 70 and perpendicular to the longitudinal direction of the first resistor 51. The same applies to the set of the second and third detection paths L2 and L3, the set of the third and fourth detection paths L3 and L4, the set of the fourth and fifth detection paths L4 and L5, the set of the fifth and sixth detection paths L5 and L6, the set of the sixth and seventh detection paths L6 and L7, and the set of the seventh and eighth detection paths L7 and L8. This further improves the heat dissipation properties of the first to eighth resistors 51 to 58.

[0029] The first to eighth resistors 51 to 58 are provided on the edge of the substrate 70. Since the edge of the substrate 70 has high heat dissipation properties, the heat dissipation properties of the first to eighth resistors 51 to 58 can be improved.

[0030] Second Embodiment The second embodiment will be described below with reference to the drawings, focusing on the differences from the first embodiment. In this embodiment, as shown in Fig. 3, a plurality of resistors are provided in the first to eighth detection paths L1 to L8. In this embodiment, two resistors are provided. In each of the detection paths L1 to L8, the resistance value of each resistor is set to the same value (for example, the same value).

[0031] The first detection path L1 is provided with a 1A resistor 81A and a 1B resistor 81B. Similarly, the second to eighth detection paths L2 to L8 are provided with a 2A resistor 82A and a 2B resistor 82B, a 3A resistor 83A and a 3B resistor 83B, a 4A resistor 84A and a 4B resistor 84B, a 5A resistor 85A and a 5B resistor 85B, a 6A resistor 86A and a 6B resistor 86B, a 7A resistor 87A and a 7B resistor 87B, and an 8A resistor 88A and an 8B resistor 88B.

[0032] FIG. 4 is a diagram showing the layout of electronic components on the substrate 70. As shown in FIG.

[0033] Each of the resistors 81A, 81B to 88A, 88B has a rectangular parallelepiped shape and is provided on the substrate 70 with its longitudinal direction aligned with the Y direction. In the first detection path L1, the 1A resistor 81A is provided closer to the monitoring IC 30 than the 1B resistor 81B. The same is true for the second to eighth detection paths L2 to L8.

[0034] Taking the first detection path L1 as an example, the resistance value of each of the first-A resistor 81A and the first-B resistor 81B is set to half the resistance value of the first resistor 51 of the first embodiment. Therefore, the heat generated by each of the first-A resistor 81A and the first-B resistor 81B is smaller than the heat generated by the first resistor 51 of the first embodiment.

[0035] In this embodiment, in each pair of two adjacent detection paths, the positions of the two resistors provided in one detection path do not overlap with the positions of the two resistors provided in the other detection path in the Y direction. This also improves the heat dissipation of the resistors 81A, 81B to 88A, 88B in this embodiment. As a result, it is possible to prevent heat damage to the monitoring IC 30, which is sensitive to heat.

[0036] <Modification of the second embodiment> Three or more resistors may be provided in each of the detection paths L1 to L8.

[0037] <Third embodiment> The third embodiment will be described below with reference to the drawings, focusing on differences from the second embodiment. In the above-described embodiment, electronic components such as the monitoring IC 30, the control IC 40, the resistors, and the capacitors are provided on the same surface of the substrate 70. In this embodiment, as shown in Fig. 5, the control IC 40, the resistors 81A, 81B to 88A, and 88B, and the capacitors C1 to C7 are provided on a first surface of the substrate 70, and the monitoring IC 30 is provided on a second surface, which is the reverse side of the first surface of the substrate 70. Note that the detection paths L1 to L8 and the terminals T1 to T8 of the monitoring IC 30 may be electrically connected via vias formed in the substrate 70, for example.

[0038] In each of the detection paths L1 to L8, if multiple resistors are arranged along the detection path, the arrangement space for the resistors on the substrate 70 will increase in the Y direction. In this case, if the monitoring IC 30 is provided on the first surface, the resistors 81A to 88A and the monitoring IC 30 will be close to each other, which may increase the effect of heat generated by the resistors 81A to 88A on the monitoring IC 30.

[0039] In contrast, according to this embodiment, the monitoring IC 30 is less susceptible to the effects of heat, and a decrease in voltage detection accuracy can be suppressed. Furthermore, because the monitoring IC 30 is provided on the second surface of the substrate 70, the distance between two resistors in each of the detection paths L1 to L8 can be increased on the first surface of the substrate 70. As a result, the heat dissipation properties of each of the resistors 81A, 81B to 88A, 88B can be improved.

[0040] <Fourth embodiment> The fourth embodiment will be described below with reference to the drawings, focusing on the differences from the second embodiment. In this embodiment, as shown in Fig. 6, of the detection paths L1 to L8, the widths of the second to seventh detection paths L2 to L7 are larger than the widths of the first and eighth detection paths L1 and L8, which are the ends. This is a configuration for improving heat dissipation, taking into account the operation modes of the discharge switches SW1 to SW7.

[0041] As shown in FIG. 7, the monitoring IC 30 alternates between a first period during which the first, third, fifth and seventh discharge switches SW1, SW3, SW5 and SW7 corresponding to the odd-numbered first, third, fifth and seventh unit batteries B1, B3, B5 and B7 from the low potential side (or high potential side) of each unit potential B1 to B7 are permitted to be turned on, and a second period during which the second, fourth and sixth discharge switches SW2, SW4 and SW6 corresponding to the even-numbered second, fourth and sixth unit batteries B2, B4 and B6 are permitted to be turned on.

[0042] During the first period, the monitoring IC 30 selects a portion (e.g., one) of the first, third, fifth, and seventh unit batteries B1, B3, B5, and B7 that has a relatively high SOC and turns on the discharge switch corresponding to the selected unit battery. During the second period, the monitoring IC 30 selects a portion (e.g., one) of the second, fourth, and sixth unit batteries B2, B4, and B6 that has a relatively high SOC and turns on the discharge switch corresponding to the selected unit battery.

[0043] In this case, the detection paths through which current can flow during the first period are the detection paths L1 to L8. On the other hand, the detection paths through which current can flow during the second period are the second to seventh detection paths L2 to L7 among the detection paths L1 to L8. In other words, among the detection paths L1 to L8, the resistors in the second to seventh detection paths L2 to L7 generate heat more frequently than the resistors in the first and eighth detection paths L1 and L8. For this reason, the width dimensions are set to the above-mentioned values ​​in order to make the heat dissipation areas in the second to seventh detection paths L2 to L7 larger than those in the first and eighth detection paths L1 and L8. This improves the heat dissipation performance of the resistors.

[0044] The widths of the second to seventh detection paths L2 to L7 may be set to, for example, 1.5 to 2 times or 1.5 to 2.5 times the widths of the first and eighth detection paths L1 and L8.

[0045] Fifth Embodiment The fifth embodiment will be described below with reference to the drawings, focusing on differences from the first embodiment. In this embodiment, as shown in Fig. 8, among the resistors 51 to 58, the second, fourth, sixth, and eighth resistors 52, 54, 56, and 58 that are relatively close to the monitoring IC 30 in the Y direction have a resistance value R2 that is smaller than the resistance value R1 of the first, third, fifth, and seventh resistors 51, 53, 55, and 57 that are relatively far from the monitoring IC 30.

[0046] The smaller the resistance value of a resistor, the smaller the amount of heat generated by the resistor when a current flows through it. Therefore, by arranging resistors with low heat generation amounts closer to the monitoring IC 30, it is possible to suitably suppress the influence of the generated heat on the monitoring IC 30. Furthermore, by arranging the first, third, fifth, and seventh resistors 51, 53, 55, and 57, which generate relatively large amounts of heat, at the end of the substrate 70, which has high heat dissipation properties, it is also possible to suitably suppress the influence of the generated heat on the monitoring IC 30.

[0047] Sixth Embodiment The sixth embodiment will be described below with reference to the drawings, focusing on the differences from the second and fifth embodiments. This embodiment employs a configuration for making the characteristics of the low-pass filters corresponding to the unit batteries B1 to B7 equal to each other.

[0048] 9, among the resistors 81A, 81B to 88A, 88B, the resistance value R2 of each of the resistors 81A to 88A constituting the first resistor group that is relatively closer to the monitoring IC 30 in the Y direction is smaller than the resistance value R1 of each of the resistors 81B to 88B constituting the second resistor group that is relatively farther from the monitoring IC 30. Furthermore, the combined resistance value (R1+R2) of the two resistors in each of the detection paths L1 to L8 is set to a mutually equivalent value (for example, the same value). This makes it possible to equalize the characteristics of the low-pass filters determined by the combined resistance value and the capacitance of the capacitors.

[0049] <Modification of the Sixth Embodiment> Each of the detection paths L1 to L8 may be provided with three or more resistors. In this case, the resistors closer to the monitoring IC 30 in each of the detection paths L1 to L8 may have smaller resistance values.

[0050] As in the third embodiment, the monitoring IC 30 may be provided on the second surface of the substrate 70 .

[0051] At least two of the capacitors C1 to C8 may have different capacitances.

[0052] Seventh Embodiment The seventh embodiment will be described below with reference to the drawings, focusing on differences from the second, fifth, and sixth embodiments. In this embodiment, as shown in Fig. 10, the first to eighth resistors 81A to 88A are provided on a second surface, which is the reverse side of the first surface of the substrate 70.

[0053] In each of the detection paths L1 to L8, if multiple resistors are arranged along the detection path, the arrangement space for the resistors on the substrate 70 will increase in the Y direction. In this case, the first to eighth resistors 81A to 88A will be closer to the monitoring IC 30, which may increase the effect of heat generated by the first to eighth resistors 81A to 88A on the monitoring IC 30.

[0054] In contrast, according to this embodiment, the monitoring IC 30 is less susceptible to the effects of heat, and the deterioration of voltage detection accuracy can be suppressed.

[0055] <Other embodiments> The above-described embodiments may be modified as follows.

[0056] In FIG. 10 of the seventh embodiment, as described in the fourth embodiment, the width dimensions of the second to seventh detection paths L2 to L7 may be larger than the width dimensions of the endmost first and eighth detection paths L1 and L8.

[0057] In the configuration of the sixth embodiment shown in Fig. 9, in all combinations of two adjacent detection paths, the center position of the resistor provided in one detection path and the center position of the resistor provided in the other detection path may be the same in the X direction. The configuration in this case is shown in Fig. 11. Note that in the configuration shown in Fig. 11, the capacitances of at least two of the capacitors C1 to C8 may be different from each other.

[0058] As shown in FIG. 12, in each combination of two adjacent detection paths, a portion of a resistor provided in one detection path may overlap a portion of a resistor provided in the other detection path in the Y direction.

[0059] The detection paths are not limited to those extending linearly from the connection portion 31 toward the monitoring IC 30 as shown in FIG. 2, but may be, for example, detection paths M1 to M8 shown in FIG.

[0060] A plurality of monitoring ICs may be arranged side by side on the substrate. In this case, it is sufficient that the respective detection paths and resistors shown in FIG. 2 are provided on the substrate in correspondence with the respective monitoring ICs.

[0061] As shown in Fig. 14, a plurality of groups of detection paths may be connected to one monitoring IC 130. Note that, for convenience, the illustration of terminals of the monitoring IC 130 is omitted in the example shown in Fig. 14.

[0062] 14, a first surface of the substrate 170 is provided with a first group of detection paths N1 to N8 extending in the Y direction from the monitoring IC 130 to the connection portion 131, a second group of detection paths P1 to P5 extending from the monitoring IC 130 to a first end portion in the X direction of the substrate 170, and a third group of detection paths Q1 to Q5 extending from the monitoring IC 130 to a second end portion in the X direction of the substrate 170. Note that the second and third groups of detection paths are not shown in the drawing from their intermediate portions.

[0063] Corresponding to the first detection path groups N1 to N8, the substrate 170 is provided with 1A to 8A resistors 181A to 188A, 1B to 8B resistors 181B to 188B, and first to seventh capacitors C11 to C17. Corresponding to the second detection path groups P1 to P5, the substrate 170 is provided with 1A to 5A resistors 281A to 285A, 1B to 5B resistors 281B to 285B, and first to fourth capacitors C21 to C24. Corresponding to the third detection path groups Q1 to Q5, the substrate 170 is provided with 1A to 5A resistors 381A to 385A, 3B to 3B resistors 381B to 385B, and first to fourth capacitors C31 to C34.

[0064] In the above embodiments, in all combinations of two adjacent detection paths, the center position of the resistor provided in one detection path is offset from the center position of the resistor provided in the other detection path, but this is not limited to this. In some of all the above combinations, the center position of the resistor provided in one detection path may be offset from the center position of the resistor provided in the other detection path.

[0065] The control unit and the method described herein may be implemented by a special-purpose computer configured by configuring a processor and memory programmed to perform one or more functions embodied in a computer program. Alternatively, the control unit and the method described herein may be implemented by a special-purpose computer configured by configuring a processor with one or more dedicated hardware logic circuits. Alternatively, the control unit and the method described herein may be implemented by one or more special-purpose computers configured by combining a processor and memory programmed to perform one or more functions with a processor configured with one or more hardware logic circuits. Furthermore, the computer program may be stored as instructions executed by a computer on a computer-readable non-transitory tangible storage medium.

[0066] While the present disclosure has been described with reference to the embodiments, it is understood that the present disclosure is not limited to those embodiments or structures. The present disclosure also encompasses various modifications and equivalent modifications. In addition, various combinations and forms, including only one element, more than one element, or less than one element, are also within the scope and spirit of the present disclosure.

[0067] The following describes characteristic configurations extracted from the above-described embodiments. [Configuration 1] A battery monitoring device (10) that monitors the state of a plurality of unit batteries (B1 to B7) connected in series, a substrate (70, 170); a monitoring IC (30, 130) provided on the substrate and monitoring the state of each of the unit batteries; a plurality of detection paths (L1 to L8, M1 to M8, N1 to N8, P1 to P5, Q1 to Q5) provided on the substrate and electrically connecting the monitoring IC and each of the unit batteries; Resistors (51 to 58, 81A to 88A, 81B to 88B, 181A to 188A, 181B to 188B, 281A to 285A, 281B to 285B, 381A to 385A, 381B to 385B) provided in the respective detection paths; discharge switches (SW1 to SW7) that are provided on the monitoring IC side of the resistor in each of the detection paths and connect adjacent ones of the detection paths; Equipped with each of the detection paths extending from the monitoring IC to an edge of the substrate; A battery monitoring device in which the center position of the resistor provided in one of at least two adjacent detection paths among the detection paths is shifted in a specific direction from the monitoring IC toward the end of the substrate relative to the center position of the resistor provided in the other detection path. [Configuration 2] The battery monitoring device of configuration 1, wherein in each pair of two adjacent detection paths, the center position of the resistor provided in one of the detection paths is shifted in the specific direction relative to the center position of the resistor provided in the other detection path. [Configuration 3] A battery monitoring device as described in configuration 2, wherein in each pair of two adjacent detection paths, the placement position of the resistor provided in one of the detection paths and the placement position of the resistor provided in the other detection path do not overlap in a direction along the surface of the substrate and in a direction perpendicular to the specific direction. [Configuration 4] The battery monitoring device according to any one of configurations 1 to 3, wherein a plurality of the resistors (81A to 88A, 81B to 88B, 181A to 188A, 181B to 188B, 281A to 285A, 281B to 285B, 381A to 385A, 381B to 385B) are provided in each of the detection paths. [Configuration 5] A battery monitoring device as described in configuration 4, wherein, in each detection path, the resistance value of the resistors (81A to 88A) that are relatively close to the monitoring IC is smaller than the resistance value of the resistors (81B to 88B) that are relatively far from the monitoring IC. [Configuration 6] A battery monitoring device (10) that monitors the state of a plurality of unit batteries (B1 to B7) connected in series, A substrate (70); a monitoring IC (30) provided on the substrate for monitoring the state of each of the unit batteries; a plurality of detection paths (L1 to L8) provided on the substrate and electrically connecting the monitoring IC and each of the unit batteries; a plurality of resistors (81A to 88A, 81B to 88B) provided in each of the detection paths; discharge switches (SW1 to SW7) that are provided on the monitoring IC side of the resistors in each of the detection paths and connect the adjacent detection paths; Equipped with In the battery monitoring device, the resistance value of the resistors (81A to 88A) that are relatively close to the monitoring IC in each of the detection paths is smaller than the resistance value of the resistors (81B to 88B) that are relatively far from the monitoring IC. [Configuration 7] In each of the detection paths (L1 to L8), a resistor (81B to 88B) that is relatively far from the monitoring IC among the resistors (81A to 88A, 81B to 88B) is provided on a first surface of the substrate, and the monitoring IC is provided on the first surface of the substrate. A battery monitoring device described in any one of configurations 4 to 6, wherein in each detection path, among the resistors, the resistor (81A to 88A) that is relatively close to the monitoring IC is provided on a second surface, which is the reverse side of the first surface of the substrate. [Configuration 8] a capacitor (C1 to C7) provided between the resistor and the discharge switch in each of the detection paths, connecting adjacent detection paths; the combined resistance values ​​of the resistors in the respective detection paths are equal to each other; 8. The battery monitoring device according to any one of configurations 4 to 7, wherein the capacitors have the same capacitance. [Configuration 9] the resistors (81A to 88A, 81B to 88B) of the respective detection paths are provided on a first surface of the substrate, 7. The battery monitoring device according to any one of configurations 1 to 6, wherein the monitoring IC is provided on a second surface, which is the opposite surface to the first surface of the substrate. [Configuration 10] The resistors (51 to 58) are provided one for each of the detection paths, A battery monitoring device described in any one of configurations 1 to 3, wherein the resistance value of the resistors (52, 54, 56, 58) that are relatively close to the monitoring IC in the specific direction is smaller than the resistance value of the resistors (51, 53, 55, 57) that are relatively far from the monitoring IC. [Configuration 11] a period during which the discharge switches corresponding to odd-numbered unit batteries from the low potential side or the high potential side among the unit batteries are permitted to be turned on alternates with a period during which the discharge switches corresponding to even-numbered unit batteries are permitted to be turned on; A battery monitoring device described in any one of configurations 1 to 10, wherein the width dimensions of the detection paths (L2 to L7) other than the two endmost detection paths among the detection paths are larger than the width dimensions of the two endmost detection paths (L1, L8) among the detection paths.

Claims

1. A battery monitoring device (10) for monitoring the state of a plurality of unit batteries (B1 to B7) connected in series, a substrate (70, 170); a monitoring IC (30, 130) provided on the substrate and monitoring the state of each of the unit batteries; a plurality of detection paths (L1 to L8, M1 to M8, N1 to N8, P1 to P5, Q1 to Q5) provided on the substrate and electrically connecting the monitoring IC and each of the unit batteries; Resistors (51 to 58, 81A to 88A, 81B to 88B, 181A to 188A, 181B to 188B, 281A to 285A, 281B to 285B, 381A to 385A, 381B to 385B) provided in each of the detection paths; discharge switches (SW1 to SW7) that are provided on the monitoring IC side of the resistor in each of the detection paths and connect adjacent ones of the detection paths; Equipped with each detection path extends from the monitoring IC to an edge of the substrate; A battery monitoring device in which the center position of the resistor provided in one of at least two adjacent detection paths among the detection paths is shifted in a specific direction from the monitoring IC toward the end of the substrate relative to the center position of the resistor provided in the other detection path.

2. 2. The battery monitoring device according to claim 1, wherein in each pair of two adjacent detection paths, the center position of the resistor provided in one of the detection paths is shifted in the specific direction relative to the center position of the resistor provided in the other detection path.

3. 3. The battery monitoring device of claim 2, wherein in each pair of two adjacent detection paths, the position of the resistor provided in one of the detection paths does not overlap with the position of the resistor provided in the other of the detection paths in a direction along the surface of the substrate and perpendicular to the specific direction.

4. The battery monitoring device according to any one of claims 1 to 3, wherein the resistors (81A to 88A, 81B to 88B, 181A to 188A, 181B to 188B, 281A to 285A, 281B to 285B, 381A to 385A, 381B to 385B) are provided in multiple numbers on each detection path.

5. The battery monitoring device of claim 4, wherein in each detection path, the resistance value of the resistors (81A to 88A) that are relatively close to the monitoring IC is smaller than the resistance value of the resistors (81B to 88B) that are relatively far from the monitoring IC.

6. A battery monitoring device (10) for monitoring the state of a plurality of unit batteries (B1 to B7) connected in series, a substrate (70); a monitoring IC (30) provided on the substrate for monitoring the state of each of the unit batteries; a plurality of detection paths (L1 to L8) provided on the substrate and electrically connecting the monitoring IC and each of the unit batteries; a plurality of resistors (81A to 88A, 81B to 88B) provided in each of the detection paths; discharge switches (SW1 to SW7) that are provided on the monitoring IC side of the resistors in each of the detection paths and connect the adjacent detection paths; Equipped with A battery monitoring device in which, in each detection path, the resistance value of a resistor (81A to 88A) that is relatively close to the monitoring IC is smaller than the resistance value of a resistor (81B to 88B) that is relatively far from the monitoring IC.

7. In each of the detection paths (L1 to L8), a resistor (81B to 88B) that is relatively far from the monitoring IC among the resistors (81A to 88A, 81B to 88B) is provided on a first surface of the substrate, and the monitoring IC is provided on the first surface of the substrate. The battery monitoring device of claim 4, wherein in each detection path, the resistors (81A to 88A) that are relatively close to the monitoring IC are provided on a second surface, which is the reverse side of the first surface of the substrate.

8. a capacitor (C1 to C7) provided between the resistor and the discharge switch in each of the detection paths, connecting adjacent detection paths; the combined resistance values ​​of the resistors in the respective detection paths are equal to each other; 5. The battery monitoring device according to claim 4, wherein the capacitances of the capacitors are equal to each other.

9. The resistors (81A to 88A, 81B to 88B) of the respective detection paths are provided on a first surface of the substrate, 7. The battery monitoring device according to claim 1, wherein the monitoring IC is provided on a second surface of the substrate, which is the reverse side of the first surface.

10. The resistors (51 to 58) are provided one for each of the detection paths, A battery monitoring device as described in any one of claims 1 to 3, wherein the resistance value of the resistors (52, 54, 56, 58) that are relatively close to the monitoring IC in the specific direction is smaller than the resistance value of the resistors (51, 53, 55, 57) that are relatively far from the monitoring IC.

11. a period during which the discharge switches corresponding to odd-numbered unit batteries from the low potential side or the high potential side among the unit batteries are permitted to be turned on alternates with a period during which the discharge switches corresponding to even-numbered unit batteries are permitted to be turned on; A battery monitoring device as described in any one of claims 1 to 3, and 6, wherein the width dimensions of the detection paths (L2 to L7) other than the two endmost detection paths of each of the detection paths are larger than the width dimensions of the two endmost detection paths (L1, L8) of each of the detection paths.

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