Frame grabber, image acquisition method and image acquisition system
The frame grabber addresses data overflow and loss in industrial computers by decoding and caching image frames based on computing device efficiency, reducing resource consumption and ensuring aligned data transmission.
Patent Information
- Application Number
- JP2024536001
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2021-12-29
- Filing Date
- 2022-12-02
- Publication Date
- 2025-11-18
- Estimated Expiration
- 2042-12-02
AI Technical Summary
Industrial computers face data overflow and loss issues due to the increased amount of image data from high-resolution and high-frame-rate industrial cameras, as their network cards and switches have limited cache capacity and processing capabilities.
A frame grabber with Ethernet physical layer transceivers, image processing subsystems, and a memory system that decodes, caches, and transmits image frames based on the computing device's processing efficiency, performing data processing operations such as decompression and signal processing to match data transmission with the computing device's capacity.
The frame grabber reduces data overflow loss by offloading decoding and caching operations from the computing device, saving resources and ensuring data transmission aligns with processing capacity, thereby preventing data overflow and loss.
Smart Images

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Abstract
Description
[Technical Field]
[0001] [CROSS-REFERENCE TO RELATED APPLICATIONS] This application claims priority to a Chinese patent application filed on December 29, 2021, bearing application number 202111650739.3, the entire text of which is incorporated herein by reference. [Technical field] The present invention relates to the field of imaging technology, and more particularly to a frame grabber, an image acquisition method and an image acquisition system. [Background technology]
[0002] In some image acquisition scenarios, an industrial computer may be communicatively connected to multiple industrial cameras via a switch, or may be directly connected to the industrial cameras. The industrial computer acquires image data from the industrial cameras via a network card. The image data is, for example, network packets transmitted according to a transmission protocol such as GigE Vision. A processor in the industrial computer can perform operations on the image data according to the transmission protocol, such as decoding, packet loss detection, image framing, and lossless image decompression.
[0003] As the resolution, frame rate, line rate, and other indicators of industrial cameras improve, the amount of image data that industrial computers need to process also increases significantly. Summary of the Invention [Means for solving the problem]
[0004] According to one aspect of the present invention, there is provided a frame grabber including: an image processing device including at least one Ethernet physical layer transceiver, a communication bus, and at least one image processing subsystem, each of which communicates with a camera via the at least one Ethernet physical layer transceiver and with a computing device via the communication bus; and a memory coupled to the image processing device, wherein for each of the at least one image processing subsystem, the image processing subsystem is used to acquire network packets from the camera, including image packets obtained by the camera encapsulating image frames according to a predetermined image transmission protocol, decode the image packets according to the predetermined image transmission protocol, obtain the image frames, cache the image frames in the memory, and transmit the image frames stored in the memory to the computing device based on the image processing efficiency of the computing device.
[0005] In some embodiments, before transmitting the image frames stored in the memory to the computing device, the image processing subsystem is further used to perform data processing on the image frames, the data processing including at least one of decompression, digital gain, Bayer interpolation, color correction, gamma correction, color space conversion, and sharpness processing.
[0006] In some embodiments, the image processing device further includes a communication bus subsystem for communicating with the computing device via the communication bus, a scheduler for receiving data from the at least one image processing subsystem and transmitting the received data to the communication bus subsystem, the communication bus subsystem transmitting the data received from the scheduler to the computing device via the communication bus, a processor for setting registers of the at least one Ethernet physical layer transceiver, and a register setting unit for setting registers in the at least one image processing subsystem based on setting instructions from the computing device.
[0007] In some embodiments, the network packets further include control command packets, and the image processing subsystem includes a stream processing subsystem, a media access control unit for receiving a data stream of the at least one Ethernet physical layer transceiver and generating the network packets based on the data stream, a control command processing unit, a signal processing subsystem, a packet generation unit, and an arbitration unit for receiving network packets from the media access control unit, sending image packets in the network packets to the stream processing subsystem, and sending control command packets in the network packets to the control command processing unit, and the stream processing subsystem , is used to decode the image packets in the network packets to generate the image frames and store the image frames in the memory of the frame grabber, a control command processing unit is used to send the control command packets in the network packets to the computing device, the stream processing subsystem is further used to retrieve the image frames from the memory and transmit the image frames to the signal processing subsystem, the signal processing subsystem is used to send the image frames to the packet generation unit, and the packet generation unit is used to convert the image frames into transmission packets that conform to a communication bus transmission format and transmit the transmission packets to the computing device.
[0008] In some embodiments, the stream processing subsystem includes: a decoding unit for decoding the image packets in the network packets according to a predetermined image transmission protocol to obtain the image frames; a memory management unit for managing storage space in the memory of a frame grabber; an image direct memory write unit for obtaining the image frames from the decoding unit, requesting storage space in the memory from the memory management unit, and writing the image frames to the requested storage space; an image direct memory read unit for obtaining storage addresses of the image frames stored in the memory from the memory management unit and reading the image frames based on the storage addresses; and an image transmission unit for obtaining the image frames from the image direct memory read unit and transmitting the image frames to the signal processing subsystem.
[0009] In some embodiments, the signal processing subsystem includes a decompression unit, a bypass unit, an analysis unit for analyzing whether an image frame received from the stream processing subsystem is a compressed image frame, and if the received image frame is a compressed image frame, transmitting the compressed image frame to the decompression unit, and if the received image frame is an uncompressed image frame, transmitting the uncompressed image frame to the bypass unit, and a multiplexing unit for obtaining the image frame output by the decompression unit or the image frame output by the bypass unit, and transmitting the obtained image frame to the packet generation unit.
[0010] In some embodiments, the signal processing subsystem includes: a decompression unit for decoding compressed image frames received from the stream processing subsystem into uncompressed image frames; a bypass unit; a signal processing unit for performing image signal processing on the image frames, the image signal processing including at least one of digital gain, Bayer interpolation, color correction, gamma correction, color space conversion, and sharpness processing; an analysis unit for analyzing whether the image frames received from the stream processing subsystem are compressed image frames, and, if the received image frames are compressed, transmitting the compressed image frames to the decompression unit, and, if the received image frames are uncompressed image frames, transmitting the uncompressed image frames to one of the bypass unit and the signal processing unit based on configuration information, the configuration information being used to specify one of the bypass unit and the signal processing unit; and a multiplexing unit for obtaining the image frames output by the decompression unit, the image frames output by the bypass unit, or the image frames output by the signal processing unit, and transmitting the obtained image frames to the packet generation unit.
[0011] In some embodiments, the image processing device further includes a communication bus subsystem and a scheduler, wherein the image processing subsystem sends the image frames and the control instruction packets to the scheduler, the scheduler is used to transmit the image frames and the control instruction packets of the image processing subsystem to the communication bus subsystem, the communication bus subsystem is used to write the image frames and the control instruction packets of the image processing subsystem to a memory of the computing device and, after obtaining computer control instruction packets from the computing device, send the computer control instruction packets to the scheduler, the scheduler is used to send the computer control instruction packets from the computing device to the control instruction processing unit of the image processing subsystem, and the control instruction processing unit is used to send the computer control instruction packets from the computing device to the camera via the media access control unit.
[0012] In some embodiments, the image processing device further includes a communication bus subsystem, and the packet generation unit is further adapted to send a first interrupt instruction to the computing device via the communication bus subsystem, indicating that the computing device requests transmission of the image frame, such that the computing device returns an image storage address in the computing device to the communication bus subsystem in response to the first interrupt instruction; the packet generation unit transmits the image frame to the image storage address via the communication bus subsystem, such that the computing device processes the image frame in response to a second interrupt instruction; and, upon completion of transmission of the image frame, notify the computing device via the communication bus subsystem that transmission of the image frame has been completed. the control instruction processing unit transmits a second interrupt instruction indicating that the computing device has completed the transmission of the control instruction packet to the computing device via the communication bus subsystem, and the control instruction processing unit transmits a third interrupt instruction indicating that the computing device requests the transmission of a control instruction packet to the computing device via the communication bus subsystem, so that the computing device returns an instruction storage address in the computing device to the communication bus subsystem in response to the third interrupt instruction; the control instruction processing unit transmits the control instruction packet to the instruction storage address via the communication bus subsystem, so that the computing device processes the control instruction packet in response to a fourth interrupt instruction; and, upon completion of the transmission of the control instruction packet, transmits a fourth interrupt instruction indicating that the transmission of the control instruction packet has been completed to the computing device via the communication bus subsystem.
[0013] In some embodiments, the communication bus subsystem is further used to obtain a write instruction for a register in the image processing subsystem from the computing device and send the write instruction to a register setting unit of the image processing subsystem, the register setting unit in the image processing subsystem being used to set the register in the image processing subsystem based on the write instruction, and the communication bus subsystem is further used to obtain a state parameter of the register in the image processing subsystem from the register setting unit in the image processing subsystem and send the state parameter to the computing device.
[0014] The scheduler includes a scheduling write unit and a scheduling read unit, and the communication bus subsystem includes a bus controller, a PCIe direct memory write unit, a PCIe direct memory read unit, a register write unit, and a register read unit, and the scheduling write unit is used to transmit the image frame and the control instruction packet of the image processing subsystem to the PCIe direct memory write unit of the communication bus subsystem, and the bus controller instructs the PCIe direct memory write unit to write the image frame and the control instruction packet of the image processing subsystem to a memory of the computing device, and instructs the PCIe direct memory read unit to read the computer control instruction packet from the computing device after obtaining the computer control instruction packet from the computing device. instructing the register writing unit to obtain a write instruction for a register in the image processing subsystem from the computing device and send the write instruction to a register setting unit of the image processing subsystem, so that the register setting unit sets the register in the image processing subsystem based on the write instruction; and instructing the register reading unit to obtain a state parameter of the register in the image processing subsystem from the register setting unit and send the state parameter to the computing device, wherein the scheduling reading unit is used to send the computer control instruction packet from the computing device to the control instruction processing unit.
[0015] According to one aspect of the present invention, there is provided an image acquisition method applied to a frame grabber, the image acquisition method including the steps of: acquiring network packets from a camera, the image packets including image packets obtained by the camera encapsulating image frames according to a predetermined image transmission protocol; decoding the image packets according to the predetermined image transmission protocol to obtain the image frames; caching the image frames in a memory of the frame grabber; and transmitting the image frames stored in the memory to a computing device based on the image processing efficiency of the computing device.
[0016] In some embodiments, the step of transmitting the image frame stored in the memory to the computing device based on the image processing efficiency of the computing device includes the steps of: sending a first interrupt command to the computing device indicating a request for transmission of the image frame, so that the computing device returns an image storage address in the computing device in response to the first interrupt command; transmitting the image frame to the image storage address, so that the computing device processes the image frame in response to a second interrupt command; and, when transmission of the image frame is completed, sending a second interrupt command to the computing device indicating that transmission of the image frame is completed.
[0017] According to one aspect of the present invention, there is provided an image acquisition system including at least one camera, a frame grabber according to an embodiment of the present invention, and a computing device.
[0018] In summary, a frame grabber according to an embodiment of the present invention can perform some of the processing operations of a processor in a computing device, such as decoding image packets from multiple cameras and caching image frames on behalf of the processor in the computing device. The frame grabber according to an embodiment of the present invention can decode image packets on behalf of the processor in the computing device, thereby saving computing resources in the computing device. Furthermore, by decoding image packets from multiple cameras and caching image frames, the frame grabber according to an embodiment of the present invention can help to solve data overflow loss caused by fluctuations in the processing speed of the computing device. Furthermore, the frame grabber according to an embodiment of the present invention can transmit image frames stored in its memory to the computing device based on the computing device's image processing efficiency, thereby matching the amount of data transmitted to the computing device with the processing capacity of the computing device and reducing or avoiding situations in which the image frames transmitted from the frame grabber exceed the processing capacity of the computing device, thereby reducing or avoiding data overflow loss in the computing device. [Brief explanation of the drawings]
[0019] [Figure 1A] FIG. 1 is a schematic diagram of an image acquisition system according to some embodiments. [Figure 1B] FIG. 1 is a schematic diagram of an image acquisition system according to some embodiments. [Figure 2] 1 is a schematic diagram of a frame grabber according to some embodiments of the present invention. [Figure 3] 1 is a flowchart of an image acquisition method of an image acquisition system according to some embodiments of the present invention. [Figure 4] 1 is a schematic diagram of an image processing device according to some embodiments of the present invention; [Figure 5] FIG. 2 is a schematic diagram of an image processing subsystem according to some embodiments of the present invention. [Figure 6] FIG. 2 is a schematic diagram of a stream processing subsystem according to some embodiments of the present invention. [Figure 7] FIG. 2 is a schematic diagram of a signal processing subsystem according to some embodiments of the present invention. [Figure 8] FIG. 2 is a schematic diagram of a signal processing subsystem according to some embodiments of the present invention. [Figure 9] FIG. 2 is a schematic diagram of a signal processing unit according to some embodiments of the present invention. [Figure 10] FIG. 2 is a schematic diagram of a scheduler and communication bus subsystem according to some embodiments of the present invention. [Figure 11] 1 is a flowchart of an image acquisition method according to some embodiments of the present invention. [Figure 12] 1 is a flowchart of a method for a frame grabber to transmit image frames to a computing device according to some embodiments of the present invention. DETAILED DESCRIPTION OF THE INVENTION
[0020] In order to make the objectives, technical means and advantages of the present invention clearer, the present invention will be described in more detail below by way of examples with reference to the drawings.
[0021] Generally, the cache capacity of the network card and switch of the industrial computer is low, and if the processor of the industrial computer cannot process the received network packets in a timely manner, it will result in the cache overflow of the network card, packet loss, and incomplete images. In short, when faced with an image collection scenario with a large amount of data, current image collection means are prone to the problem of data overflow loss.
[0022] FIG. 1A shows a schematic diagram of an image collection system according to some embodiments. FIG. 1B shows a schematic diagram of an image collection system according to some embodiments. In the scenario shown in FIG. 1A, the image collection system may include one camera and one industrial computer. The industrial computer communicates with the single camera via a network card and receives image data collected by the camera. In the scenario shown in FIG. 1B, the image collection system may include a switch, an industrial computer, and multiple cameras.
[0023] Here, the camera may transmit images based on, for example, the GigE Vision protocol. GigE Vision is a standard for image transmission based on Gigabit Ethernet specified by the Automated Imaging Association (AIA) and is applied to industrial imaging applications. The GigE Vision protocol includes the GigE Vision Control Protocol (GVCP) control protocol and the GigE Vision Streaming Protocol (GVSP) streaming transmission protocol. Based on the GigE Vision protocol, the camera can divide a single image frame into network packets, for example, 9 KB in size, and realize image transmission using a hardware architecture based on Gigabit Ethernet, with a maximum transmission rate reaching 1 Gb / s. The camera may also perform lossless compression of the image frames before transmitting them. The industrial computer receives network packets via a Gigabit or 10 Gigabit network card, decodes discrete network packets via a processor, and reconstructs the image frames to receive the complete image.
[0024] Due to the limited cache capacity of industrial computer network cards and switches, if the industrial computer cannot process received network packets in a timely manner, this will result in cache overflow of the industrial computer network card, packet loss, and incomplete images. In short, when faced with a data-intensive image collection scenario, the image acquisition system shown in Figures 1A and 1B is prone to data overflow and loss problems.
[0025] The present invention provides a frame grabber to solve the problem of data overflow loss by replacing the network card and switch in the image acquisition system. Hereinafter, the frame grabber of the embodiment of the present invention will be described with reference to FIG.
[0026] FIG. 2 shows a schematic diagram of a frame grabber according to some embodiments of the present invention.
[0027] 2, the frame grabber may include at least one Ethernet Physical Layer (PHY) transceiver 1, a communication bus 2, an image processing device 3, and a memory 4. The image processing device 3 includes at least one image processing subsystem. For example, but not limited to, four image processing subsystems 31 are shown in FIG. 2.
[0028] Here, each image processing subsystem 31 communicates with the camera via an Ethernet physical layer transceiver 1 and with the computing device via a communication bus 2 .
[0029] In some embodiments, one Ethernet physical layer transceiver 1 is provided for each image processing subsystem 31 and communicates with one camera. The image processing subsystems 31 and the Ethernet physical layer transceivers 1 correspond one-to-one. Each image processing subsystem 31 communicates with one camera via one Ethernet physical layer transceiver 1 and with a computing device via the communication bus 2. In this manner, the frame grabber of the present embodiment can process multiple image frames in parallel, improving data processing efficiency for processing multiple image frames. The computing device is, for example, but not limited to, an industrial computer. The image processing device 3 may be implemented based on, for example, an FPGA (Field Programmable Gate Array) processor. Alternatively, the image processing processor may be implemented using logic gates, switches, an application specific integrated circuit (ASIC), a digital signal processor (DSP), or the like. The communication bus 2 is, for example, a communication interface such as PCI-Express.
[0030] The memory 4 is coupled to the image processing device 3. The memory 4 is, for example, a high-speed random access memory such as a dynamic random access memory (DRAM), a static random access memory (SRAM), or a double data rate synchronous dynamic random access memory (DDR SDRAM). Each image processing subsystem 31 acquires network packets from a camera. Here, the camera may transmit the network packets based on, for example, a user datagram protocol (UDP). The network packets may include image packets obtained by the camera encapsulating image frames captured by the camera according to a predetermined image transmission protocol. Here, the predetermined image transmission protocol is, for example, the GigE Vision protocol. The image packets are, for example, GVSP packets.
[0031] The image processing subsystem 31 decodes the image packets according to a predetermined image transmission protocol to obtain image frames. The image processing subsystem 31 caches the image frames in the memory 4 of the frame grabber. The image processing subsystem 31 may transmit the image frames stored in the memory 4 to the computing device based on the image processing efficiency of the computing device. In other words, by matching the amount of data transmission required for the image frames transmitted by the image processing subsystem 31 of the frame grabber to the processing capacity of the computing device, it is possible to reduce the situation where the image frames transmitted from the frame grabber exceed the processing capacity of the computing device and reduce the occurrence of data overflow loss in the computing device.
[0032] In summary, unlike a network card, a frame grabber according to an embodiment of the present invention can perform some of the processing functions of a processor in a computing device, such as decoding image packets from multiple cameras and caching image frames on behalf of the processor in the computing device. The frame grabber according to an embodiment of the present invention can decode image packets on behalf of the processor in the computing device, thereby saving computing resources in the computing device. Furthermore, by decoding image packets from multiple cameras and caching image frames, the frame grabber according to an embodiment of the present invention helps to address data overflow loss caused by fluctuations in the processing speed of the computing device. Furthermore, the frame grabber according to an embodiment of the present invention can transmit image frames stored in its memory to the computing device based on the computing device's image processing efficiency. This ensures that the amount of data transmitted to the computing device matches the processing capacity of the computing device, reducing or avoiding situations where image frames transmitted from the frame grabber exceed the processing capacity of the computing device, thereby reducing or avoiding data overflow loss in the computing device.
[0033] In some embodiments, each image processing subsystem 31 is further used to perform data processing on the image frames, where the data processing includes at least one of decompression and image signal processing. Decompression, for example, may be decoding a compressed image frame back into an uncompressed image frame. The image signal processing may include at least one of digital gain, Bayer interpolation, color correction, gamma correction, color space conversion, sharpening, etc. In this manner, the frame grabber can perform data processing on the images, thereby conserving the computing resources of the computing device and improving the speed at which the computing device processes the images, thereby improving the speed at which the images can be transmitted to the computing device.
[0034] FIG. 3 shows a flowchart of an image acquisition method 300 of an image acquisition system according to some embodiments of the present invention.
[0035] As shown in FIG. 3, the image acquisition method includes steps S301 to S304. In step S301, a camera generates an image frame, encapsulates the image frame, and obtains an image packet. After the camera generates the image frame, it may perform packet encapsulation on the image frame according to a predetermined image transmission protocol, such as GigE Vision. For example, the camera divides one image frame into three types of User Datagram Protocol (UDP) packets: a leader packet, a payload packet, and a trailer packet according to the GigE Vision protocol. The leader packet contains image start information and image format information, the trailer packet contains image end information, and the payload packet is the image payload. A UDP packet corresponding to one image frame may contain one leader packet, multiple payload packets, and one trailer packet.
[0036] In step S302, the frame grabber receives the image packet and decodes the image packet to obtain an image frame. For example, the frame grabber may decode according to the GigE Vision protocol.
[0037] In step S303, the frame grabber caches the image frame in the frame grabber's memory.
[0038] In some embodiments, the frame grabber may perform data processing on the image frames before transmitting the image frames to the computing device. Image processing may include, for example, at least one of decompression, digital gain, Bayer interpolation, color correction, gamma correction, color space conversion, and sharpness processing. For example, if the image frames cached in the frame grabber's memory are losslessly compressed image frames, the frame grabber may perform decompression on the image frames. If the image frames cached in the frame grabber's memory are not compressed, the frame grabber does not need to perform decompression. The frame grabber may also perform image signal processing on the image frames, such as digital gain, Bayer interpolation, color correction, gamma correction, color space conversion, and sharpness processing.
[0039] In step S304, the frame grabber transmits the image frames to the computing device via the communication bus. Here, the frame grabber may transmit the image frames stored in the memory of the frame grabber to the computing device based on the image processing efficiency of the computing device. In other words, the transmission rate from the frame grabber to the computing device depends on the image processing efficiency of the computing device.
[0040] In summary, the image acquisition method 300 according to the embodiment of the present invention can use a frame grabber to perform decoding, data processing, and image frame caching for image packets from multiple cameras instead of a processor in a computing device. The image acquisition method 300 according to the embodiment of the present invention can prevent the processor in the computing device from decoding and data processing for image packets, thereby saving computing resources in the computing device. Furthermore, the image acquisition method 300 according to the embodiment of the present invention helps to solve data overflow loss caused by fluctuations in the processing speed of the computing device by decoding image packets from multiple cameras and caching image frames.
[0041] FIG. 4 shows a schematic diagram of an image processing apparatus according to some embodiments of the present invention.
[0042] As shown in FIG. 4, the image processing device 3 of the frame grabber further includes a scheduler 32, a processor 33, a register configuration unit 34, and a communication bus subsystem 35.
[0043] The processor 33 may be, for example, a soft central processing unit (CPU) implemented by an FPGA, or may be a central processing unit (CPU) or microcontroller unit (MCU). The present invention is not limited thereto. The processor 33 is used to configure the registers of the Ethernet physical layer transceiver 1. Note that the image processing device 3 of the frame grabber can configure the Ethernet physical layer transceiver 1 via the processor 33. Therefore, the image processing device 3 of the frame grabber according to the embodiment of the present invention can configure the Ethernet physical layer transceiver 1 after the power is turned on. This eliminates the need to wait for the computing device to configure the Ethernet physical layer transceiver 1 after the computing device has finished booting up. This allows the Ethernet physical layer transceiver 1 to enter an operational state more quickly, allowing the frame grabber to start receiving data from the camera more quickly.
[0044] The register setting unit 34 sets registers (not shown in FIG. 4) in the image processing subsystem 31 based on setting instructions from the computing device.
[0045] The communication bus subsystem 35 is used to communicate with the computing device via the frame grabber's communication bus 2. The scheduler 32 is coupled to the communication bus subsystem 35. Here, each image processing subsystem 31 in the image processing device 3 can directly send data to be sent to the computing device to the scheduler 32. The scheduler 32 can receive data from the image processing subsystem 31 and send the data to the communication bus subsystem 35. The communication bus subsystem 35 can send the data to the computing device via the frame grabber's communication bus 2. In short, the image processing subsystems 31 in the image processing device 3 share the frame grabber's communication bus 2 via the scheduler 32 and the communication bus subsystem 35.
[0046] In some embodiments, the image processing device 3 further includes a memory controller 36 and an internal interconnect bus 37. The memory controller 36 is, for example, a double data rate controller (DDR controller). The internal interconnect bus 37 is, for example, an FPGA internal interconnect bus. The image processing subsystem 31 in the frame grabber is connected to the memory controller 36 via the internal interconnect bus 37. In this manner, the image processing subsystem 31 can use the memory controller 36 to store image frames in the memory 4 of the frame grabber.
[0047] FIG. 5 shows a schematic diagram of an image processing subsystem according to some embodiments of the present invention.
[0048] In addition to image packets, network packets may also include control command packets. In other words, one network packet may be an image packet or a control command packet, where the control command packet is, for example, a GVCP packet.
[0049] As shown in FIG. 5, each image processing subsystem 31 includes a stream processing subsystem (e.g., GVSP Subsystem) 311, a media access control unit (MAC Unit) 312, a control command processing unit (e.g., GVCP process unit) 313, a signal processing subsystem (ISP (image signal processing) Subsystem) 314, a packet generation unit 315, and an arbitration unit (MAC Arbiter Unit) 316.
[0050] The media access control unit 312 is used to receive the data stream from the Ethernet physical layer transceiver 1 and generate network packets based on the data stream. For example, the media access control unit 312 can generate two types of network packets: GVCP packets and GVSP packets.
[0051] The arbitration unit 316 is used to receive network packets from the media access control unit 312 and analyze the type of the network packets. The arbitration unit 316 sends image packets in the network packets to the stream processing subsystem 311 and sends control command packets in the network packets to the control command processing unit 313. Here, the control command packets may relate to, for example, camera state parameters, camera setting parameters, etc. That is, the arbitration unit 316 can separate GVSP packets from GVCP packets.
[0052] The stream processing subsystem 311 decodes the image packets to generate image frames, and stores the image frames in the memory 4 of the frame grabber.
[0053] The control command processing unit 313 sends the control command packet to the computing device, and can also receive the control command packet from the computing device and send the control command packet to the camera via the media access control unit 312.
[0054] The stream processing subsystem 311 is further used to grab image frames from the frame grabber memory and transmit the image frames to the signal processing subsystem 314 .
[0055] The signal processing subsystem 314 is used to send uncompressed image frames to the packet generating unit 315. Here, the signal processing subsystem 314 realizes a lossless image decompression function in a hardware manner. Here, since the signal processing subsystem 314 can perform the lossless decompression function, the amount of image data that the frame grabber can receive increases, and the amount of image data that can be sent to the computing device also increases. In this way, the frame grabber can improve the image transmission bandwidth through the signal processing subsystem 314, and the decompression process does not occupy any processor resources of the computing device.
[0056] The packet generation unit 315 is used to convert the image frames into transmission packets that conform to the communication bus transmission format and transmit the transmission packets to a computing device via the communication bus 2 of the frame grabber. For example, the data amount of the transmission packets that conform to the communication bus transmission format does not exceed a data amount threshold. Image frames collected by a camera may have different data amounts. The packet generation unit 315 may divide image frames with different data amounts into transmission packets that do not exceed the data amount threshold, so that the communication bus 2 of the frame grabber can transmit the data normally.
[0057] In some embodiments, the packet generation unit 315 sends a first interrupt command indicating a request for transmission of an image frame to the computing device via the communication bus subsystem 35 of the image processing device 3, such that the computing device responds to the first interrupt command by returning an image storage address in the computing device to the communication bus subsystem 35. Here, the image storage address is, for example, a base address for storing the image frame in the memory of the computing device. Based on this, the packet generation unit 315 can transmit the image frame to the computing device via the scheduler 32, the communication bus subsystem 35, and the communication bus 2.
[0058] The packet generation unit 315 transmits the image frame to the image storage address of the computing device via the communication bus subsystem 35 so that the computing device processes the image frame in response to the second interrupt command, and when the transmission of the image frame is complete, transmits a second interrupt command to the computing device via the communication bus subsystem 35 indicating that the transmission of the image frame is complete. In this way, by transmitting an interrupt command to the computing device, the frame grabber can pause transmission of a new image frame to the computing device before the computing device processes the image frame, and can transmit a new image frame to the computing device after the computing device processes the image frame. In other words, by transmitting an interrupt command to the computing device, the frame grabber can transmit image frames to the computing device based on the processing efficiency of the computing device, so that the amount of image data transmitted by the frame grabber can match the processing capacity of the computing device, thereby avoiding a situation where the image frames transmitted from the frame grabber exceed the processing capacity of the computing device and causing data overflow loss in the computing device.
[0059] In some embodiments, the control instruction processing unit 313 sends a third interrupt instruction to the computing device via the communication bus subsystem 35 indicating a request to transmit a control instruction packet, such that the computing device returns an instruction storage address within the computing device to the communication bus subsystem 35 in response to the third interrupt instruction.
[0060] The control command processing unit 313 transmits the control command packet to an command storage address in the computing device via the communication bus subsystem 35 so that the computing device processes the control command packet in response to the fourth interrupt command, and when the transmission of the control command packet is completed, sends a fourth interrupt command indicating that the transmission of the control command packet is completed to the computing device via the communication bus subsystem 35. In this way, the control command packet transmitted from the camera to the computing device can reach the computing device via the frame grabber.
[0061] In summary, the frame grabber can match the data transmission rate of the frame grabber with the processing efficiency of the computing device by sending an interrupt command to the computing device and waiting for the computing device to respond to the interrupt command, i.e., the image frames and control command packets stored in the memory of the frame grabber can be transmitted to the computing device based on the processing efficiency of the computing device for the image frames and control command packets from the camera.
[0062] FIG. 6 shows a schematic diagram of a stream processing subsystem 311 according to some embodiments of the invention.
[0063] As shown in FIG. 6, the stream processing subsystem 311 includes a decoding unit (Decode Unit) 3111, a memory management unit (MMU) 3112, an image direct memory access write unit (Image Direct Memory Access Write Unit) 3113, an image direct memory access read unit (Image Direct Memory Access Read Unit) 3114, and an image transmit unit (Image Transmit Unit) 3115.
[0064] The decoding unit 3111 is used to decode the image packets according to a predetermined image transmission protocol to obtain the image frames.
[0065] The memory management unit 3112 is used to manage the storage space of the memory 4. The memory management unit 3112 can also detect the completeness of image frames and handle various image imperfections such as packet loss, frame loss, bad frame, etc. For example, the memory management unit 3112 may delete an incomplete image frame.
[0066] The image direct memory write unit 3113 is used to obtain an image frame from the decoding unit 3111, request storage space in the memory 4 from the memory management unit 3112, and write the image frame to the requested storage space. The image direct memory write unit 3113 writes the image frame to the memory 4, for example, by a direct memory access (DMA) method.
[0067] The image direct memory reading unit 3114 is used to obtain the storage address of the image frame in the memory 4 from the memory management unit 3112 and read the image frame based on the storage address.
[0068] The image transmission unit 3115 is used to acquire image frames from the image direct memory reading unit 3114 and transmit them to the signal processing subsystem 314 .
[0069] FIG. 7 shows a schematic diagram of signal processing subsystem 314 according to some embodiments of the present invention.
[0070] As shown in FIG. 7, the signal processing subsystem 314 includes a decompression unit 3141, a bypass unit 3142, an analysis unit 3143, and a multiplexing unit 3145.
[0071] The analysis unit 3143 is used to analyze whether an image frame received from the stream processing subsystem 311 is a compressed image frame. If the received image frame is a compressed image frame, the analysis unit 3143 transmits the compressed image frame to the decompression unit 3141. If the received image frame is an uncompressed image frame, the analysis unit 3143 transmits the uncompressed image frame to the bypass unit 3142. The bypass unit 3142 does not process the received image frame.
[0072] The multiplexing unit 3145 is used to obtain the image frames output by the decompression unit 3141 and / or the image frames output by the bypass unit 3142, and transmit the obtained image frames to the packet generation unit 315.
[0073] In summary, the signal processing subsystem 314 can perform decompression on image frames that are in a compressed format, thereby allowing the frame grabber to perform the decompression instead of the computing device.
[0074] FIG. 8 shows a schematic diagram of signal processing subsystem 314 according to some embodiments of the present invention.
[0075] As shown in FIG. 8, the signal processing subsystem 314 includes a decompression unit 3141, a bypass unit 3142, an analysis unit 3143, a multiplexing unit 3145, and a signal processing unit 3146.
[0076] The decompression unit 3141 is used to decode the compressed image frames into uncompressed image frames.
[0077] The signal processing unit 3146 is used to perform image signal processing on the image frame. Here, the image signal processing may include, for example, at least one of digital gain, Bayer interpolation, color correction, gamma correction, color space conversion, and sharpness processing. In some embodiments, the signal processing unit 3146 has a structure, for example, as shown in FIG. 9. As shown in FIG. 9, the signal processing unit 3146 may include a digital gain unit 901, a Bayer interpolation unit 902, a color correction unit 903, a gamma correction unit 904, a color space conversion unit 905, and a sharpness processing unit 906. Each of these units performs digital gain, Bayer interpolation, color correction, gamma correction, color space conversion, or sharpness processing on the image frame.
[0078] The analysis unit 3143 analyzes whether the received image frame is a compressed image frame, and if the image frame is a compressed image frame, transmits the compressed image frame to the decompression unit 3141. If the received image frame is an uncompressed image frame, the analysis unit 3143 transmits the uncompressed image frame to one of the bypass unit 3142 and the signal processing unit 3146 based on the setting information. Here, the setting information is information that specifies whether the uncompressed image frame is transmitted to the bypass unit 3142 or the signal processing unit 3146. For example, the computing device may send the setting information of the signal processing unit 3146 to the register setting unit 34 of the image processing device 3 via the communication bus subsystem 35 through the communication bus 2. The register setting unit 34 may set the register of the signal processing subsystem 314 according to the setting information. In this way, the analysis unit 3143 transmits the uncompressed image frame to the bypass unit 3142 (or the signal processing unit 3146) according to the setting information.
[0079] The multiplexing unit 3145 is used to obtain the image frames output by the decompression unit 3141, the image frames output by the bypass unit 3142, and / or the image frames output by the signal processing unit 3146, and transmit the obtained image frames to the packet generation unit 315.
[0080] In summary, the signal processing subsystem 314 can perform, for example, decompression or image signal processing operations on the image frames, which can reduce the computational consumption of the computing device.
[0081] In some embodiments, each image processing subsystem 31 may send image frames and control instruction packets to a scheduler 32 of the image processing device 3 .
[0082] The scheduler 32 sequentially transmits the image frames and control command packets of each image processing subsystem 31 to the communication bus subsystem 35 .
[0083] For example, as shown in FIG. 10, the communication bus subsystem 35 controls the communication bus 2 via the communication bus controller 351 within the communication bus subsystem 35 to write image frames and control command packets of each image processing subsystem 31 to the memory of the computing device.
[0084] The communication bus subsystem 35 receives the control command packets from the computing devices and then transmits the control command packets to the scheduler 32 .
[0085] The scheduler 32 sends control command packets from the computing device to the control command processing unit 313 of the image processing subsystem 31 .
[0086] The control command processing unit 313 transmits control command packets from the computing device to the camera via the media access control unit 312 of the image processing subsystem 31 .
[0087] In some embodiments, the communication bus subsystem 35 is further used to obtain a write instruction for a register in the image processing subsystem 31 from the computing device and send the write instruction to the register setting unit 34 of the image processing subsystem 31. In this way, the register setting unit 34 can set the register in the image processing subsystem 31 based on the write instruction. The communication bus subsystem 35 is also used to obtain state parameters of the registers of the image processing subsystem 31 from the register setting unit 34 and send the state parameters to the computing device. In this way, the computing device can obtain the state parameters of the registers of the image processing subsystem 31 and re-perform parameter setting for the state parameters based on the obtained state parameters. The computing device can instruct the image processing subsystem 31 to set the register by sending a write instruction for parameter setting to the image processing subsystem 31.
[0088] FIG. 10 shows a schematic diagram of scheduler 32 and communication bus subsystem 35 according to some embodiments of the present invention.
[0089] As shown in FIG. 10, the scheduler 32 may include a scheduling write unit 321 and a scheduling read unit 322.
[0090] The communication bus subsystem 35 includes a bus controller 351, a PCIe direct memory write unit (Peripheral Component Interconnect Express Direct Memory Access Write Unit) 352, a PCIe direct memory read unit (Peripheral Component Interconnect Express Direct Memory Access Read Unit) 353, a register write unit 354, and a register read unit 355.
[0091] Here, the scheduling write unit 321 is used to transmit the image frames and control command packets of each image processing subsystem 31 to the PCIe direct memory write unit 352 of the communication bus subsystem 35. For example, the scheduling write unit 321 may transmit the image frames and control command packets of each image processing subsystem 31 to the PCIe direct memory write unit 352 sequentially or in parallel.
[0092] The bus controller 351 is used to instruct the PCIe direct memory write unit 352 to write the image frames and control command packets of each image processing subsystem 31 into the memory of the computing device.
[0093] The bus controller 351 may further be used to instruct the PCIe direct memory reading unit 353 to obtain a control command packet from the computing device and then send the control command packet to the scheduling reading unit 322 of the scheduler 32.
[0094] The scheduling reading unit 322 is used to send control command packets from the computing device to the control command processing unit 313 of the image processing subsystem 31 .
[0095] The bus controller 351 may further be used to instruct the register write unit 354 to obtain write instructions for registers in the image processing subsystem 31 from the computing device and send the write instructions to the register setting unit 34 of the image processing subsystem 31, so that the register setting unit 34 of the image processing subsystem 31 sets registers in the image processing subsystem 31 based on the write instructions.
[0096] The bus controller 351 may further be used to instruct the register reading unit 355 to obtain the status parameters of the registers of the image processing subsystem 31 from the register setting unit 34 of the image processing subsystem 31 and send the status parameters to the computing device.
[0097] In summary, the scheduler 32 allows different image processing subsystems 31 in the frame grabber to share the communication bus subsystem 35. The communication bus subsystem 35 can provide data communication between the frame grabber and a computing device.
[0098] 11 shows a flowchart of an image acquisition method 1100 according to some embodiments of the present invention. The image acquisition method 1100 may be performed in, for example, a frame grabber, and may include steps S1101 to S1104.
[0099] 11, in step S1101, a network packet is acquired from a camera. The network packet includes an image packet obtained by the camera encapsulating an image frame captured by the camera according to a predetermined image transmission protocol.
[0100] In step S1102, the image packets are decoded according to a predetermined image transmission protocol to obtain image frames.
[0101] In step S1103, the image frame is cached in the frame grabber's memory.
[0102] In step S1104, the image frames stored in the memory of the frame grabber are transmitted to a computing device based on the image processing efficiency of the computing device.
[0103] An image acquisition method according to an embodiment of the present invention can be executed in a frame grabber. In this way, the frame grabber can take over some processing operations of a processor in a computing device, such as decoding image packets from multiple cameras and caching image frames on behalf of the processor in the computing device. The image acquisition method according to an embodiment of the present invention can prevent the processor in the computing device from decoding image packets, thereby saving computing resources in the computing device. Furthermore, the image acquisition method according to an embodiment of the present invention can decode image packets from multiple cameras and cache image frames, thereby helping to solve data overflow loss caused by fluctuations in the processing speed of the computing device. Furthermore, the image acquisition method according to an embodiment of the present invention can transmit image frames stored in the memory of the frame grabber to the computing device based on the image processing efficiency of the computing device. This allows the amount of data transmitted to the computing device to match the processing capacity of the computing device, reducing or avoiding situations where image frames transmitted from the frame grabber exceed the processing capacity of the computing device, thereby reducing or avoiding data overflow loss in the computing device.
[0104] In some embodiments, method 1100 may perform data processing on the image frames before transmitting the image frames to the computing device, where the data processing includes at least one of decompression, digital gain, Bayer interpolation, color correction, gamma correction, color space conversion, and sharpness processing. In this manner, method 1100 may perform such data processing on behalf of the computing device, so as to conserve computing resources of the computing device and increase the rate at which the computing device receives image frames.
[0105] In some embodiments, step S1104 may be implemented as a method 1200 including steps S1201 to S1202.
[0106] 12, in step S1201, the frame grabber sends a first interrupt command to the computing device, indicating that the frame grabber requests the computing device to transmit an image frame, so that the computing device returns an image storage address in the computing device in response to the first interrupt command, where the image storage address is, for example, a base address for storing the image frame in the memory of the computing device.
[0107] In step S1202, the frame grabber transmits the image frame to the image storage address, so that the computing device processes the image frame in response to the second interrupt command, and when the transmission of the image frame is completed, sends a second interrupt command to the computing device indicating that the transmission of the image frame is completed.
[0108] In summary, the method 1200 may achieve matching between the data transmission rate of the frame grabber and the processing efficiency of the computing device by having the frame grabber send an interrupt command to the computing device and wait for the computing device to respond to the interrupt command. The above are merely some embodiments of the present invention, and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention should be included within the protection scope of the present invention. [Explanation of symbols]
[0109] 1 Ethernet Physical Layer Transceiver 2 Communication Bus 3. Image processing device 4. Memory 31 Image Processing Subsystem 32 Scheduler 33 processors 34 Register Setting Unit 35 Communication Bus Subsystem 36 Memory Controller 37 Internal Interconnect Bus 311 Stream Processing Subsystem 312 Media Access Control Unit 313 Control Command Processing Unit 314 Signal Processing Subsystem 315 Packet Generation Unit 316 Mediation Unit 3111 Decoding Unit 3112 Memory Management Unit 3113 Image Direct Memory Writing Unit 3114 Image Direct Memory Reading Unit 3115 Image Transmission Unit 3141 Defrosting Unit 3142 Bypass Unit 3143 Analysis Unit 3145 Multiplexing Unit 3146 Signal Processing Unit 321 Scheduling Write Unit 322 Scheduling Read Unit 351 Bus Controller 352 PCIe Direct Memory Write Unit 353 PCIe Direct Memory Read Unit 354 Register Write Unit 355 Register Reading Unit 901 Digital Gain Unit 902 Bayer Interpolation Unit 903 Color Correction Unit 904 Gamma Correction Unit 905 Color Space Conversion Unit 906 Sharpness Processing Unit
Claims
1. at least one Ethernet physical layer transceiver; A communication bus; an image processing device including at least one image processing subsystem, the at least one image processing subsystem communicating with a camera via the at least one Ethernet physical layer transceiver and with a computing device via the communication bus; a memory coupled to the image processor, For the at least one image processing subsystem, the image processing subsystem: Acquiring network packets from the camera, the network packets including image packets obtained by the camera encapsulating image frames in accordance with a predetermined image transmission protocol; Decoding the image packets in accordance with the predetermined image transmission protocol to obtain the image frames; caching the image frames in the memory; and transmitting the image frames stored in the memory to the computing device based on the image processing efficiency of the computing device; The image processing device further comprises: a communication bus subsystem for communicating with the computing device via the communication bus; a packet generation unit for converting the image frames into transmission packets that conform to a communication bus transmission format and transmitting the transmission packets to the computing device; the packet generation unit sends a first interrupt command to the computing device via the communication bus subsystem, indicating that the computing device is requesting transmission of the image frame, such that the computing device responds to the first interrupt command by returning an image storage address within the computing device to the communication bus subsystem; the packet generation unit transmits the image frame to the image storage address via the communication bus subsystem so that the computing device processes the image frame in response to a second interrupt command, and when the transmission of the image frame is complete, sends the second interrupt command to the computing device via the communication bus subsystem indicating that the transmission of the image frame is complete. A frame grabber characterized by:
2. Before transmitting the image frames stored in the memory to the computing device, the image processing subsystem is further used to perform data processing on the image frames, the data processing including at least one of decompression, digital gain, Bayer interpolation, color correction, gamma correction, color space conversion, and sharpness processing.
2. The frame grabber of claim 1.
3. The image processing device further comprises: a scheduler for receiving data from the at least one image processing subsystem and transmitting the received data to the communication bus subsystem, the communication bus subsystem transmitting the data received from the scheduler to a computing device via a communication bus; a processor for configuring registers of said at least one Ethernet physical layer transceiver; a register setting unit for setting a register in the at least one image processing subsystem based on a setting instruction from the computing device; 2. The frame grabber of claim 1.
4. The network packets further include control command packets; The image processing subsystem includes: a stream processing subsystem; a media access control unit for receiving a data stream of the at least one Ethernet physical layer transceiver and generating the network packets based on the data stream; a control command processing unit; a signal processing subsystem; an arbitration unit for receiving network packets from the media access control unit, sending image packets in the network packets to the stream processing subsystem, and sending control command packets in the network packets to the control command processing unit; the stream processing subsystem is used to decode the image packets in the network packets to generate the image frames and store the image frames in the memory of the frame grabber; a control command processing unit for transmitting the control command packet in the network packet to the computing device; the stream processing subsystem is further adapted to retrieve the image frames from the memory and transmit the image frames to the signal processing subsystem; the signal processing subsystem is used to transmit the image frames to the packet generation unit; 2. The frame grabber of claim 1.
5. The stream processing subsystem: a decoding unit for decoding the image packets in the network packets according to a predetermined image transmission protocol to obtain the image frames; a memory management unit for managing storage space in the memory of the frame grabber; an image direct memory write unit for obtaining the image frame from the decoding unit, requesting storage space in the memory from the memory management unit, and writing the image frame to the requested storage space; an image direct memory reading unit for obtaining a storage address of the image frame stored in the memory from the memory management unit and reading the image frame based on the storage address; an image transmission unit for acquiring the image frames from the image direct memory reading unit and transmitting the image frames to the signal processing subsystem; 5. The frame grabber of claim 4.
6. the signal processing subsystem: A defrosting unit; A bypass unit; an analyzing unit for analyzing whether an image frame received from the stream processing subsystem is a compressed image frame, and if the received image frame is a compressed image frame, transmitting the compressed image frame to the decompression unit, and if the received image frame is an uncompressed image frame, transmitting the uncompressed image frame to the bypass unit; a multiplexing unit for acquiring the image frame output by the decompression unit or the image frame output by the bypass unit, and transmitting the acquired image frame to the packet generation unit; 5. The frame grabber of claim 4.
7. the signal processing subsystem: a decompression unit for decoding compressed image frames received from the stream processing subsystem into uncompressed image frames; A bypass unit; a signal processing unit for performing image signal processing on the image frame, the image signal processing including at least one of digital gain, Bayer interpolation, color correction, gamma correction, color space conversion, and sharpness processing; an analysis unit that analyzes whether an image frame received from the stream processing subsystem is a compressed image frame, and if the received image frame is a compressed image frame, transmits the compressed image frame to a decompression unit, and if the received image frame is an uncompressed image frame, transmits the uncompressed image frame to one of the bypass unit and the signal processing unit based on setting information, wherein the setting information is used to specify one of the bypass unit and the signal processing unit; a multiplexing unit for acquiring the image frames output by the decompression unit, the image frames output by the bypass unit, or the image frames output by the signal processing unit, and transmitting the acquired image frames to the packet generating unit; 5. The frame grabber of claim 4.
8. the image processing device further includes a communication bus subsystem and a scheduler; the image processing subsystem transmits the image frame and the control command packet to the scheduler; the scheduler is used to transmit the image frames and the control command packets of the image processing subsystem to the communication bus subsystem; the communication bus subsystem is used for writing the image frames and the control instruction packets of the image processing subsystem into the memory of the computing device, and for receiving computer control instruction packets from the computing device and then transmitting the computer control instruction packets to the scheduler; the scheduler is used to transmit the computer control instruction packets from the computing device to the control instruction processing unit of the image processing subsystem; the control command processing unit is used to transmit computer control command packets from the computing device to the camera via the media access control unit; 5. The frame grabber of claim 4.
9. The control instruction processing unit transmits the third interrupt instruction indicating a request for transmission of a control instruction packet to the computing device via the communication bus subsystem, such that the computing device responds to the third interrupt instruction by returning an instruction storage address in the computing device to the communication bus subsystem; the control instruction processing unit transmits the control instruction packet to the instruction storage address via the communication bus subsystem so that the computing device processes the control instruction packet in response to a fourth interrupt instruction, and when the transmission of the control instruction packet is completed, sends the fourth interrupt instruction to the computing device via the communication bus subsystem, indicating that the transmission of the control instruction packet is completed.
5. The frame grabber of claim 4.
10. the communication bus subsystem is further used to obtain a write instruction for a register in the image processing subsystem from the computing device and send the write instruction to a register setting unit of the image processing subsystem; the register setting unit in the image processing subsystem is used to set the register in the image processing subsystem based on the write instruction; the communication bus subsystem is further used to obtain state parameters of the registers in the image processing subsystem from the register setting unit in the image processing subsystem, and to transmit the state parameters to the computing device; 9. The frame grabber of claim 8.
11. the scheduler includes a scheduling write unit and a scheduling read unit; the communication bus subsystem includes a bus controller, a PCIe direct memory write unit, a PCIe direct memory read unit, a register write unit, and a register read unit; the scheduling write unit is used to transmit the image frame and the control command packet of the image processing subsystem to the PCIe direct memory write unit of the communication bus subsystem; The bus controller instructing the PCIe direct memory write unit to write the image frame and the control instruction packet of the image processing subsystem to a memory of the computing device; instructing the PCIe direct memory reading unit to obtain a computer control instruction packet from the computing device and then send the computer control instruction packet to the scheduling reading unit of the scheduler; instructing the register writing unit to obtain a write instruction for a register in the image processing subsystem from the computing device and send the write instruction to a register setting unit of the image processing subsystem, so that the register setting unit sets a register in the image processing subsystem based on the write instruction; instructing the register reading unit to obtain state parameters of the registers in the image processing subsystem from the register setting unit and to send the state parameters to the computing device; the scheduling reading unit is used to transmit the computer control instruction packet from the computing device to the control instruction processing unit; 9. The frame grabber of claim 8.
12. 1. An image acquisition method applied to a frame grabber, comprising: acquiring network packets from a camera, the network packets including image packets obtained by the camera encapsulating image frames according to a predetermined image transmission protocol; decoding the image packets according to the predetermined image transmission protocol to obtain the image frames; caching the image frames in a memory of the frame grabber; transmitting the image frames stored in the memory to a computing device based on an image processing efficiency of the computing device; transmitting the image frames stored in the memory to the computing device based on an image processing efficiency of the computing device, sending a first interrupt command to the computing device indicating a request for transmission of the image frame, such that the computing device responds to the first interrupt command by returning an image storage address within the computing device; transmitting the image frame to the image storage address so that the computing device processes the image frame in response to a second interrupt command, and when the transmission of the image frame is complete, sending the second interrupt command to the computing device indicating that the transmission of the image frame is complete. An image acquisition method comprising:
13. At least one camera; A frame grabber according to any one of claims 1 to 11; a computing device; An image acquisition system comprising:
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