Liquid crystal display device and line defect detection method
The liquid crystal display device detects line defects using sensor electrodes and a predetermined criterion, addressing the complexity and size issues of existing methods by integrating line defect detection into the touch detection process, ensuring a simple and compact design.
Patent Information
- Application Number
- JP2021163375
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2021-10-04
- Publication Date
- 2025-11-25
- Estimated Expiration
- 2041-10-04
AI Technical Summary
Existing methods for detecting line defects in liquid crystal display devices require special circuits and additional wiring, increasing the size of the display panel and complicating the configuration.
A liquid crystal display device and method that utilize a matrix of sensor electrodes to detect line defects by applying a potential that does not change with time and determining if the detection values from these electrodes match a predetermined criterion, allowing line defects to be detected using the same circuit as the touch detection process.
Enables line defect detection in a simple configuration without the need for additional circuits or wiring, effectively identifying defects while maintaining a compact panel size and utilizing existing touch detection circuits.
Smart Images

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Abstract
Description
[Technical Field]
[0001] The present disclosure relates to a liquid crystal display device and a line defect detection method. [Background technology]
[0002] Methods for detecting line defects occurring in liquid crystal display devices are known. For example, Non-Patent Document 1 discloses a method for detecting defects in a liquid crystal display panel by providing a circuit at the end of the drive wiring of the liquid crystal display panel and detecting changes in voltage and current. Patent Document 1 discloses a method for inspecting source lines or gate lines using a fault inspection circuit in a liquid crystal display device having an active matrix liquid crystal panel. Patent Document 2 discloses a method for inspecting scan lines or signal lines for breaks or shorts in a liquid crystal display. [Prior art documents] [Non-patent literature]
[0003] [Non-Patent Document 1] AM-FPD 2018, Special Symposium 2-2, Evolution of In-Vehicle Display Technology and Innovation of the Cockpit System, Y.Muto, Panasonic Corp., Japan [Patent documents]
[0004] [Patent Document 1] International Publication No. 2018 / 079636 [Patent Document 2] Japanese Patent Application Publication No. 10-97203 Summary of the Invention [Problem to be solved by the invention]
[0005] The methods disclosed in Non-Patent Document 1 and Patent Documents 1 and 2 require the provision of a special circuit to detect line defects. This increases the circuit size. Furthermore, wiring is required to connect the line defect detection circuit to the source lines and gate lines, which poses a problem of increasing the external size of the display panel due to the wiring connected to the line defect detection circuit. Under these circumstances, there is a demand for a method for detecting line defects in a liquid crystal display device with a simple configuration.
[0006] The present disclosure has been made in view of the above circumstances, and has an object to detect line defects in a liquid crystal display device with a simple configuration. [Means for solving the problem]
[0007] In order to achieve the above object, a liquid crystal display device according to a first aspect of the present disclosure comprises: A liquid crystal display device comprising a liquid crystal panel and a driver that drives the liquid crystal panel, The liquid crystal panel is a plurality of sensor electrodes arranged in a matrix for detecting touches on the liquid crystal panel; a plurality of liquid crystal drive wirings for displaying an image on the liquid crystal panel; The driver a control unit that executes a display process that displays the image on the liquid crystal panel, a touch detection process that detects a touch on the liquid crystal panel, and a line defect determination process that determines whether or not there is a line defect on the liquid crystal panel, The control unit, in the line defect determination process, When a potential that does not substantially change with time is applied to each liquid crystal drive wiring, A drive signal is applied to each sensor electrode, and it is determined whether the detection value detected from each sensor electrode when the drive signal is applied matches a predetermined judgment criterion.If the sensor electrodes among the plurality of sensor electrodes whose detection values match the judgment criterion are distributed linearly, it is determined that the line defect has occurred.
[0008] A line defect detection method according to a second aspect of the present disclosure includes: A line defect detection method for detecting line defects in a liquid crystal display device including a plurality of sensor electrodes arranged in a matrix and a plurality of liquid crystal drive wirings, comprising: When a potential that does not substantially change with time is applied to each liquid crystal drive wiring, Applying a drive signal to each sensor electrode; determining whether or not a detection value detected from each of the sensor electrodes when the drive signal is applied matches a predetermined determination criterion; When the sensor electrodes whose detection values match the determination criterion are distributed linearly among the plurality of sensor electrodes, it is determined that the line defect has occurred. [Effects of the Invention]
[0009] According to the present disclosure, in the line defect determination process, When a potential that does not substantially change with time is applied to each liquid crystal drive wiring, A drive signal is applied to each sensor electrode, and it is determined whether or not the detection value detected from each sensor electrode when the drive signal is applied matches a predetermined criterion. If the sensor electrodes whose detection values match the criterion are distributed linearly among the plurality of sensor electrodes, it is determined that a line defect has occurred. This allows the line defect determination process to be performed using the same circuit as the touch detection process, making it possible to detect line defects in a liquid crystal display device with a simple configuration. [Brief explanation of the drawings]
[0010] [Figure 1] 1 is a schematic configuration diagram of a liquid crystal display device according to a first embodiment. [Figure 2] 3 is a diagram showing liquid crystal drive wiring in the liquid crystal display device according to the first embodiment. FIG. [Figure 3] 1 is a schematic diagram showing a cross section of a liquid crystal panel in a liquid crystal display device according to Embodiment 1. FIG. [Figure 4] 3 is a block diagram showing a configuration of a driver in the liquid crystal display device according to the first embodiment. FIG. [Figure 5] 4 is a timing chart of a display process executed by the liquid crystal display device according to the first embodiment. [Figure 6]4 is a timing chart of a touch detection process executed by the liquid crystal display device according to the first embodiment. [Figure 7] 4 is a schematic diagram showing sensor electrodes and liquid crystal drive wiring during touch detection in the first embodiment. FIG. [Figure 8] 4 is a diagram showing an equivalent circuit for one sensor electrode during touch detection in the first embodiment. FIG. [Figure 9] 4 is a timing chart of a line defect determination process executed by the liquid crystal display device according to the first embodiment. [Figure 10] 4 is a schematic diagram showing a sensor electrode and a liquid crystal drive wiring when the wiring is broken in the first embodiment. FIG. [Figure 11] 4A and 4B are diagrams illustrating a sensor electrode whose parasitic capacitance changes when a wire breaks in the first embodiment. [Figure 12] FIG. 4 is a diagram showing an equivalent circuit for one sensor electrode when a wire breaks in the first embodiment. [Figure 13] 5 is a diagram showing a waveform of a voltage value of a sensor electrode when a drive signal is applied in the first embodiment. FIG. [Figure 14] 5 is a flowchart showing the flow of a line defect determination process executed by the liquid crystal display device according to the first embodiment. [Figure 15] 10 is a timing chart of a line defect determination process executed by a liquid crystal display device according to the second embodiment. [Figure 16] FIG. 10 is a diagram showing an equivalent circuit for one sensor electrode in a normal state in the second embodiment. [Figure 17] FIG. 10 is a diagram showing the waveform of the voltage value of the sensor electrode when a drive signal is applied in the second embodiment. [Figure 18] FIG. 10 is a diagram showing an equivalent circuit for one sensor electrode in the event of a disconnection in the second embodiment. [Figure 19] FIG. 10 is a diagram showing an equivalent circuit for one sensor electrode in the event of a short circuit in the second embodiment. [Figure 20]10 is a flowchart showing the flow of a line defect determination process executed by a liquid crystal display device according to a second embodiment. [Figure 21] FIG. 11 is a diagram showing an equivalent circuit for one sensor electrode in the third embodiment. [Figure 22] FIG. 11 is a diagram showing an equivalent circuit for one sensor electrode in the event of a short circuit in the third embodiment. [Figure 23] FIG. 13 is a diagram showing an equivalent circuit for one sensor electrode in the event of a short circuit in the fourth embodiment. [Figure 24] FIG. 10 is a diagram illustrating a configuration of a sensor driver according to a fourth embodiment. [Figure 25] 13 is a diagram showing the waveform of the charge amount of the sensor electrode when a drive signal is applied in the fourth embodiment. FIG. DETAILED DESCRIPTION OF THE INVENTION
[0011] Hereinafter, a liquid crystal display device and a line defect detection method according to an embodiment will be described with reference to the drawings.
[0012] <First Embodiment> First, the configuration of a liquid crystal display device 10 according to embodiment 1 will be described with reference to Figures 1 and 2. The liquid crystal display device 10 is, for example, a display device for use in an automobile or an aircraft, but its use is not limited to this.
[0013] 1 and 2, a liquid crystal display device 10 includes a liquid crystal panel 20 and a driver 30 that drives the liquid crystal panel 20. Here, FIG. 1 is a diagram that schematically shows a configuration related to touch detection in the liquid crystal panel 20, and FIG. 2 is a diagram that schematically shows a configuration related to display in the liquid crystal panel 20.
[0014] The liquid crystal panel 20 is an in-cell touch panel that has the function of displaying images and the function of detecting touches. The in-cell type is a configuration in which a touch detection electrode is provided on one of two substrates that sandwich a liquid crystal material to form a liquid crystal panel. As shown in Fig. 1, the liquid crystal panel 20 has a plurality of sensor electrodes SE and a plurality of sensor wirings SL.
[0015] Each of the plurality of sensor electrodes SE is an electrode for detecting a touch on the touch detection area. Here, "touch" means that a detection object comes into contact with the sensor electrode SE, or that the detection object is close enough to the sensor electrode SE that a parasitic capacitance is formed between the detection object and the sensor electrode SE. Specifically, the detection object is a finger of a user of the liquid crystal display device 10. Note that the detection object is not limited to a finger, and may be a part of a living body, a stylus pen, a touch pen, or the like, as long as it can form a parasitic capacitance between the sensor electrode SE and the detection object.
[0016] The plurality of sensor electrodes SE are arranged in a matrix over almost the entire surface of the liquid crystal panel 20, and detect touch of a detection object on the surface of the liquid crystal panel 20. The plurality of sensor electrodes SE are arranged in close proximity to the gate lines GL and the data lines DL so that parasitic capacitance is formed between the plurality of sensor electrodes SE and the gate lines GL and the data lines DL. Each sensor electrode SE is also called a touch electrode, and is a rectangular transparent electrode measuring 1 to 5 mm in length and width. Note that, while FIG. 1 shows the plurality of sensor electrodes SE arranged in 5 rows and 4 columns as an example, the arrangement of the plurality of sensor electrodes SE is not limited to this.
[0017] Each sensor electrode SE is electrically connected to the driver 30 via a sensor wiring SL indicated by a dashed line in Fig. 1. One sensor wiring SL is connected to one sensor electrode SE. Each sensor electrode SE receives a drive signal from the driver 30 via the sensor wiring SL and outputs an output signal, which is a response signal to the drive signal, to the driver 30.
[0018] 2, the liquid crystal panel 20 includes a plurality of gate lines GL and a plurality of data lines DL as liquid crystal drive wiring for displaying images on the liquid crystal panel 20. As shown in the cross-sectional view of Fig. 3, each data line DL and each gate line GL is arranged below the sensor electrode SE and the sensor wiring SL. Note that, to avoid complexity, the sensor wiring SL is omitted in Fig. 2.
[0019] Each of the multiple gate lines GL is arranged to run in a first direction, the X direction (horizontal or row direction). A gate signal is applied to each of the multiple gate lines GL. Each of the multiple data lines DL is arranged to run in a second direction, the Y direction (vertical or column direction), which intersects with the first direction. A data voltage corresponding to an image signal (video signal) is applied to each of the multiple data lines DL. The data lines DL are also called source lines. When the gate lines GL and the data lines DL are not to be distinguished from each other, they are called liquid crystal drive wiring.
[0020] Subpixels SP are arranged at positions where gate lines GL and data lines DL intersect. Subpixels SP are minute elements that emit light in a specific color, for example, from the three primary colors of light: red, green, and blue (RGB). Subpixels SP may emit light in a combination of the three primary colors and other colors, or in combination with colors other than the three primary colors. While only one subpixel SP is shown in FIG. 2 to avoid complexity, in reality, a subpixel SP is arranged at each intersection of each gate line GL and each data line DL.
[0021] Each data line DL is connected to a sub-pixel SP via a TFT (Thin Film Transistor) (not shown). Each gate line GL is connected to the gate of the TFT. Note that, since the number of data lines DL required is equal to the number of sub-pixels SP corresponding to each of RGB, they are arranged at three times the density of the gate lines GL.
[0022] Next, the configuration of the driver 30 will be described with reference to Fig. 4. The driver 30 is electrically connected to the liquid crystal panel 20 and is a circuit for driving the liquid crystal panel 20. The driver 30 includes a liquid crystal driver 31, a sensor driver 32, and a control unit 33.
[0023] The liquid crystal driver 31 is a circuit for displaying images on the liquid crystal panel 20. The liquid crystal driver 31 is electrically connected to each gate line GL and each data line DL. The liquid crystal driver 31 outputs various signals to each gate line GL and each data line DL in response to control signals from the control unit 33.
[0024] The sensor driver 32 is a circuit for detecting whether or not a touch has been made on the liquid crystal panel 20 and the touch position. The sensor driver 32 is electrically connected to each sensor wiring SL and individually connected to each sensor electrode SE via the sensor wiring SL. The sensor driver 32 outputs various signals to each sensor electrode SE in response to a control signal from the control unit 33.
[0025] The control unit 33 is connected to the liquid crystal driver 31 and the sensor driver 32 via an internal bus, and executes processing and calculations related to the control of the driver 30. The control unit 33 includes, for example, a CPU (Central Processing Unit), a ROM (Read Only Memory), and a RAM (Random Access Memory). In the control unit 33, the CPU reads out programs and data stored in the ROM and uses the RAM as a work area to control the entire liquid crystal display device 10.
[0026] 4, the control unit 33 functionally includes a liquid crystal control unit 35, a sensor control unit 37, and a determination unit 39. The functions of these units are realized in the control unit 33 by the CPU reading out a program stored in the ROM into the RAM and executing the program.
[0027] The liquid crystal control unit 35 controls the liquid crystal driver 31 to execute display processing for displaying an image on the liquid crystal panel 20. Specifically, the liquid crystal control unit 35 receives input image data from the outside, converts the received input image data into control signals, and outputs the control signals to the liquid crystal driver 31. In accordance with the control signals output from the liquid crystal control unit 35, the liquid crystal driver 31 outputs drive signals to each gate line GL and each data line DL to display an image.
[0028] Furthermore, the liquid crystal control unit 35 outputs a synchronization signal indicating a blank period of a display period (liquid crystal driving period) during which display processing is performed to the sensor control unit 37. Here, the blank period of a display period (display blank period) refers to a period between two consecutive display periods during which display processing is not performed.
[0029] The sensor control unit 37 controls the sensor driver 32 to execute a touch detection process for detecting a touch on the liquid crystal panel 20. Specifically, the sensor control unit 37 outputs a control signal to the sensor driver 32 during a touch detection period during which the touch detection process is executed. The sensor driver 32 outputs a drive signal to each sensor electrode SE in accordance with the control signal output from the sensor control unit 37.
[0030] The sensor control unit 37 receives the detection values detected from each sensor electrode SE from the sensor driver 32 and outputs them to the determination unit 39. The sensor control unit 37 also outputs to the liquid crystal control unit 35 a synchronization signal and a control signal synchronized with the drive signal output to the sensor electrode SE.
[0031] The determination unit 39 receives the detection values of each sensor electrode SE from the sensor control unit 37, and determines whether or not there is a touch on the liquid crystal panel 20 and the position of the touch based on the received detection values. The determination unit 39 also determines whether or not there is a line defect on the liquid crystal panel 20. The determination unit 39 outputs the determination results of the touch and the line defect to the outside.
[0032] The control unit 33 alternately repeats the display process and the touch detection process at predetermined time intervals. The display process and the touch detection process will be described in detail below.
[0033] (Display processing) FIG. 5 shows a timing chart of signals applied to the sensor electrodes SE, gate lines GL, and data lines DL in the display process.
[0034] When performing the display process, the sensor control unit 37 applies the reference voltage Vc to the sensor wiring SL without applying a drive voltage. In other words, during the display process, the sensor control unit 37 applies a constant potential to the sensor wiring SL without outputting a pulse that becomes a noise source. Alternatively, the sensor control unit 37 may set the sensor wiring SL to a high impedance state.
[0035] Meanwhile, in the display process, the liquid crystal control unit 35 sequentially applies gate signals to each gate line GL. The gate signals are pulse signals for turning on the TFTs connected to the subpixels SP to which the data voltage is written. The liquid crystal control unit 35 applies gate signals to each of the gate lines GL running in the row direction, thereby sequentially turning on the TFTs connected to each gate line GL, row by row.
[0036] Next, the liquid crystal control unit 35 applies an image signal to each data line DL. Specifically, the liquid crystal control unit 35 applies to each data line DL a data voltage that defines the image in the row to be written and indicates the grayscale of each subpixel SP in the row to which the gate signal is applied. More specifically, because adjacent data lines DL have different polarities, the liquid crystal control unit 35 applies data voltages of opposite polarity to the even-numbered data lines DL and the odd-numbered data lines DL.
[0037] The data voltage applied to each data line DL is applied to the subpixel SP via the TFT of the corresponding row. This sets the gradation of each subpixel SP, and the gradation is maintained for one frame period. The liquid crystal control unit 35 repeats this operation for all subpixels SP to display an image on the liquid crystal panel 20.
[0038] (Touch detection processing) 6 shows a timing chart of signals applied to the sensor electrodes SE, gate lines GL, and data lines DL in the touch detection process. The liquid crystal display device 10 according to the first embodiment detects touches by a self-capacitance method.
[0039] When performing touch detection processing, the liquid crystal control unit 35 applies a constant potential to each liquid crystal drive wiring. Here, the constant potential means a potential that is not subjected to a pulse or the like and does not substantially fluctuate over time. Specifically, the liquid crystal control unit 35 applies a constant potential of black potential (near VDcenter) to each data line DL. Alternatively, the liquid crystal driver 31 may fix each data line DL in a floating state. Furthermore, the liquid crystal control unit 35 does not output a gate signal to each gate line GL, and fixes the potential of each gate line GL at the off potential VGL.
[0040] When a constant potential is applied to each liquid crystal drive wiring in this manner, the sensor control unit 37 applies a drive signal to each sensor electrode SE. Here, the drive signal is a signal composed of a train of positive drive pulses. Each drive pulse is a rectangular pulse. The pulse width of the drive pulse is, for example, 3 to 7 μs, and the pulse period is, for example, three times the pulse width. The sensor control unit 37 applies such drive signals in parallel to each of the multiple sensor electrodes SE provided on the liquid crystal panel 20, i.e., simultaneously at the same timing.
[0041] The low voltage of the drive pulse is a reference voltage Vc, and the high voltage (drive voltage) corresponding to the pulse height of the drive pulse is set to a voltage (e.g., 5 V) that is sufficient to detect the proximity of an object to be detected. However, the value of the drive voltage is not limited. The reference voltage Vc is, for example, a fixed DC voltage such as a ground voltage or a power supply voltage. However, the reference voltage Vc may be any voltage as long as it prevents the sensor electrode SE from entering a floating state and suppresses electromagnetic noise emission.
[0042] When a drive signal is applied to each sensor electrode SE, the sensor control unit 37 acquires a detection value detected from each sensor electrode SE when the drive signal is applied. Specifically, the sensor driver 32 detects a voltage value of each sensor electrode SE when the drive signal is applied. The sensor control unit 37 acquires the voltage value (output voltage) of each sensor electrode SE detected by the sensor driver 32 as the detection value, and outputs it to the determination unit 39. The determination unit 39 detects a touch on the liquid crystal panel 20 based on the detection value of each sensor electrode SE in response to the drive signal.
[0043] As shown in Figure 7, parasitic capacitances C1 and C2 are formed between each sensor electrode SE and the gate lines GL and data lines DL that pass through the sensor electrode SE. When a human finger, which is the object to be detected, touches or approaches the sensor electrode SE, a parasitic capacitance C3 is formed between the finger and at least one sensor electrode SE, and a transient current flows through the parasitic capacitance C3. The magnitude of the parasitic capacitance C3 formed at this time changes depending on the distance between the finger and the sensor electrode SE. Thus, when a sensor electrode SE is touched, the parasitic capacitance formed at that sensor electrode SE increases.
[0044] 8, when a certain sensor electrode SE is touched with a finger, in addition to the parasitic capacitances C1 and C2 between the sensor electrode SE and the plurality of gate lines GL and the plurality of data lines DL that pass through the opposite position, a parasitic capacitance C3 is also formed in parallel with the sensor electrode SE. Therefore, when the sensor electrode SE is touched, the parasitic capacitance formed in the sensor electrode SE increases by the amount of the parasitic capacitance C3 compared to when the sensor electrode SE is not touched.
[0045] The determination unit 39 determines whether the detection value of each sensor electrode SE when the drive signal is applied matches a determination criterion indicating an increase in parasitic capacitance C3. If the detection value of a certain sensor electrode SE matches the determination criterion, the determination unit 39 determines that the sensor electrode SE has been touched.
[0046] Specifically, the determination unit 39 monitors, as a detection value, the voltage value of each sensor electrode SE when the drive signal is applied, and measures the charging time of each sensor electrode SE, specifically, the time it takes for the voltage value of each sensor electrode SE to rise above a predetermined threshold when the drive signal is applied.
[0047] When a sensor electrode SE is touched, the parasitic capacitance formed at the sensor electrode SE increases compared to when the sensor electrode SE is not touched, and therefore the charging time required for the sensor electrode SE to be charged by the drive pulse increases. Therefore, when the charging time measured at a certain sensor electrode SE is longer than a predetermined reference value, the determination unit 39 determines that the sensor electrode SE is touched by an object to be detected.
[0048] If it is determined that at least one sensor electrode SE has been touched, the determination unit 39 identifies the position of the touch from the distribution of the detected parasitic capacitance. In other words, the determination unit 39 identifies the position coordinates of the touched object based on the distribution of at least one sensor electrode SE that has been determined to have been touched among the multiple sensor electrodes SE arranged in a matrix. In this way, the determination unit 39 determines whether or not a touch has occurred and the position of the touch based on the change in the parasitic capacitance formed in each sensor electrode SE.
[0049] (Line defect detection processing) In addition to the display process and touch detection process described above, the control unit 33 executes a line defect determination process. Here, a line defect refers to a defect (display failure) that occurs on the display. Specifically, a line defect includes a break or short circuit in a gate line GL or a data line DL. The liquid crystal display device 10 according to the first embodiment determines whether a break in a gate line GL or a data line DL has occurred as a line defect.
[0050] 9 shows a timing chart of signals applied to the sensor electrodes SE, gate lines GL, and data lines DL in the line defect determination process according to Embodiment 1. The control unit 33 executes the line defect determination process during at least one of the period from when the liquid crystal display device 10 is turned on until the first display process is executed and the display blank period between two display processes.
[0051] When performing the line defect determination process, the liquid crystal control unit 35 applies a constant potential, i.e., a potential that does not substantially vary over time, to each liquid crystal drive wiring. At this time, in order to improve the detection accuracy of the parasitic capacitances C1 and C2, the liquid crystal control unit 35 applies to each gate line GL and each data line DL a potential that is as far as possible from the potential of the drive signal applied to the sensor electrode SE, i.e., the potential corresponding to the high voltage of the drive pulse (for example, 5 V).
[0052] Specifically, similar to the touch detection process, the liquid crystal control unit 35 applies the off-potential VGL to each gate line GL without applying a gate signal to each gate line GL, thereby ensuring a potential difference between the off-potential VGL and the potential of the drive signal between each gate line GL and each sensor electrode SE.
[0053] On the other hand, while the liquid crystal control unit 35 applied a black potential to each data line DL in the touch detection process, it applies a white potential (maximum / minimum VD) to each data line DL in the line defect determination process. More specifically, the liquid crystal driver 31 applies a positive white potential (maximum potential, for example, 10.2 V) to the even-numbered data lines DL and a negative white potential (minimum potential, for example, 0.2 V) to the odd-numbered data lines DL, taking into account the difference in polarity between adjacent data lines DL. In this way, the liquid crystal control unit 35 applies a potential to each data line DL so that the difference between the potential applied to each data line DL and the potential of the drive signal in the line defect determination process is larger than the difference between the potential applied to each data line DL and the potential of the drive signal in the touch detection process.
[0054] When a constant potential is applied to each liquid crystal drive wiring in this manner, the sensor control unit 37 applies a drive signal to each sensor electrode SE. As in the touch detection process, the sensor control unit 37 applies a positive drive pulse to each of the multiple sensor electrodes SE provided on the liquid crystal panel 20 in parallel, i.e., simultaneously at the same timing.
[0055] When a drive signal is applied to each sensor electrode SE, the sensor control unit 37 acquires a detection value detected from each sensor electrode SE in response to the drive signal. Specifically, the sensor driver 32 detects a voltage value of each sensor electrode SE when the drive signal is applied to each sensor electrode SE. The sensor control unit 37 acquires the voltage value of each sensor electrode SE detected by the sensor driver 32 as the detection value and outputs it to the determination unit 39.
[0056] In the line defect determination process, the determination unit 39 determines whether the detection value of each sensor electrode SE in response to the drive signal matches a predetermined determination criterion. Here, the determination criterion is a criterion that indicates that a line defect has occurred in the liquid crystal panel 20. In the first embodiment, the determination criterion is a criterion that indicates that the parasitic capacitance C1 or C2 formed in the sensor electrode SE has decreased due to a disconnection.
[0057] 10, when a break occurs in any of the gate lines GL or data lines DL, charge moves from the liquid crystal driver 31 to the break point, but no charge moves beyond the break point. As a result, in at least one sensor electrode SE located beyond the break point, the parasitic capacitance C1 or C2 of the wiring portion where charge movement has stopped changes, affecting detection results such as charging time and amount of accumulated charge.
[0058] For example, as shown in Fig. 11, if a break occurs in one gate line GL, the parasitic capacitance C1 formed between the gate line GL and the multiple sensor electrodes SE located beyond the break and surrounded by a thick line will no longer be detected. Therefore, as shown in the equivalent circuit shown in Fig. 12, the parasitic capacitance formed in the sensor electrode SE located beyond the break is reduced by the amount of parasitic capacitance C1 between the sensor electrode SE and the broken gate line GL. Note that although Figs. 11 and 12 explain an example in which a break occurs in the gate line GL, the same applies when a break occurs in the data line DL.
[0059] The determination unit 39 determines whether the parasitic capacitance C1 or C2 formed in each sensor electrode SE has decreased based on the voltage value detected from each sensor electrode SE when the drive signal is applied. Specifically, the determination unit 39 determines whether the parasitic capacitance C1 or C2 formed in each sensor electrode SE has decreased relatively compared to normal or compared to the parasitic capacitance C1 or C2 formed in other sensor electrodes SE. If the parasitic capacitance C1 or C2 formed in the sensor electrode SE whose voltage value has been detected has decreased, the determination unit 39 determines that the voltage value meets the determination criterion.
[0060] Specifically, the determination unit 39 monitors the voltage value of each sensor electrode SE when a drive signal is applied, and measures the charging time of each sensor electrode SE, specifically, the time it takes for the voltage value of each sensor electrode SE to rise above a predetermined threshold when a drive signal is applied.
[0061] 13 shows the waveform of the voltage value of the sensor electrode SE when a drive signal (a rectangular pulse signal shown by a solid line) is applied to the sensor electrode SE. In FIG. 13, the dotted line shows the waveform of the voltage value of the sensor electrode SE under normal conditions, i.e., when it is not touched and no disconnection has occurred. The dashed line also shows the waveform of the voltage value of the sensor electrode SE during touch detection, i.e., when the sensor electrode SE is touched by a finger or the like. The dashed line also shows the waveform of the voltage value of the sensor electrode SE during disconnection, i.e., when a disconnection has occurred in either the gate line GL or the data line DL opposite the sensor electrode SE.
[0062] During touch detection, as shown in FIGS. 7 and 8, the parasitic capacitance formed in the sensor electrode SE increases by the amount of the parasitic capacitance C3 due to the touch, compared to normal operation. Therefore, the charging time due to the drive signal becomes longer than normal operation. In contrast, during a disconnection, as shown in FIGS. 10 to 12, the parasitic capacitance formed in the sensor electrode SE decreases by the amount of the parasitic capacitance C1 or C2 of the disconnected gate line or data line, compared to normal operation. Therefore, the charging time due to the drive signal becomes shorter than normal operation.
[0063] The determination unit 39 determines whether or not such a charging time for each sensor electrode SE is equal to or less than a predetermined determination value (first determination value). If the charging time is equal to or less than the determination value, the determination unit 39 determines that the parasitic capacitance C1 or C2 has decreased, and determines that the detected value (voltage value) matches the determination criterion.
[0064] If there are sensor electrodes SE whose detection values meet the criteria, the determination unit 39 determines whether they are distributed linearly. Here, linearly distributed sensor electrodes SE refer to two or more sensor electrodes SE that are consecutively arranged in the vertical or horizontal direction (along the gate line GL or the data line DL) among the multiple sensor electrodes SE arranged in a matrix. In the example of Fig. 11, the three sensor electrodes SE surrounded by thick lines located beyond the disconnection point are distributed linearly as sensor electrodes SE whose detection values meet the criteria.
[0065] When two or more sensor electrodes SE whose detection values match the judgment criterion are distributed linearly, the judgment unit 39 judges that a line defect has occurred in the liquid crystal panel 20. Specifically, the judgment unit 39 judges that the line defect is a break in the liquid crystal drive wiring that faces the linearly distributed sensor electrodes SE among the multiple liquid crystal drive wirings.
[0066] For example, when two or more sensor electrodes SE whose detection values match the determination criterion are distributed linearly in the horizontal direction (row direction), the determination unit 39 determines that a disconnection has occurred in one of the multiple gate lines GL arranged at positions opposite those sensor electrodes SE. Alternatively, when two or more sensor electrodes SE whose detection values match the determination criterion are distributed linearly in the vertical direction (column direction), the determination unit 39 determines that a disconnection has occurred in one of the multiple data lines DL arranged at positions opposite those sensor electrodes SE.
[0067] More specifically, the determination unit 39 determines that the disconnection occurs within the region of the sensor electrode SE that is closest to the driver 30 on the wiring among two or more linearly distributed sensor electrodes SE. This makes it possible to identify the location of the disconnection in units of the size of the sensor electrode SE.
[0068] When a touch by a finger or the like is detected, the parasitic capacitance of at least one sensor electrode SE where the touch is detected increases among the multiple sensor electrodes SE arranged in a matrix. Therefore, when a touch is detected, the change in parasitic capacitance appears as a dot. In contrast, when a wire break occurs, the parasitic capacitance of at least one sensor electrode SE arranged along the wire where the wire break occurred decreases among the multiple sensor electrodes SE arranged in a matrix. Therefore, when a wire break occurs, the change in parasitic capacitance appears as a line. In this way, it is possible to distinguish between a touch and a wire break based on the distribution of sensor electrodes SE where the parasitic capacitance has changed.
[0069] The sensor control unit 37 applies multiple drive pulses to each sensor electrode SE as a countermeasure against detection variations due to the influence of external noise, etc. As an example, FIG. 9 shows a case where eight drive pulses are applied. The determination unit 39 then determines whether or not a line defect exists based on the detection values for the multiple drive pulses. This improves the accuracy of line defect detection.
[0070] Next, the flow of the line defect determination process in the first embodiment will be described with reference to the flowchart shown in Fig. 14. The line defect determination process shown in Fig. 14 is executed during at least one of the period from when the liquid crystal display device 10 is turned on until the first display process is executed and the display blank period.
[0071] When the line defect determination process starts, the liquid crystal control unit 35 controls the liquid crystal driver 31 to apply a constant potential to each gate line GL and each data line DL (step S11). Specifically, in order to apply a potential that is as far as possible from the drive signal applied to the sensor electrode SE, the liquid crystal control unit 35 applies an off potential VGL to each gate line GL and a maximum or minimum potential to each data line DL.
[0072] In this state, the sensor control unit 37 controls the sensor driver 32 to apply a train of drive pulses as a drive signal to each sensor electrode SE (step S12), and then acquires the detection value of each sensor electrode SE in response to the applied drive signal (step S13).
[0073] After acquiring the detection value of each sensor electrode SE, the determination unit 39 determines whether or not there is a sensor electrode SE whose acquired detection value matches the determination criterion (step S14). Specifically, the determination unit 39 monitors the voltage value of each sensor electrode SE. Then, the determination unit 39 determines whether or not the charging time required for each sensor electrode SE to be charged to a threshold value or more is equal to or less than a predetermined determination value.
[0074] If there is a sensor electrode SE whose detection value meets the criterion (step S14; YES), the determination unit 39 further determines whether the sensor electrodes SE whose detection value meets the criterion are linearly distributed (step S15). If the sensor electrodes SE whose detection value meets the criterion are linearly distributed (step S15; YES), the determination unit 39 determines that a line defect has occurred (step S16). Specifically, the determination unit 39 determines that a break has occurred in any of the gate lines GL or data lines DL that pass through positions opposite two or more linearly distributed sensor electrodes SE.
[0075] On the other hand, if there is no sensor electrode SE whose detection value meets the judgment criterion (step S14; NO), the judgment unit 39 judges that it is normal, that is, that no line defect has occurred (step S17). Also, even if there is a sensor electrode SE whose detection value meets the judgment criterion, if it is not distributed linearly (step S15; NO), the judgment unit 39 also judges that it is normal. With this, the line defect judgment process shown in FIG. 14 ends.
[0076] As described above, in the line defect determination process, the liquid crystal display device 10 according to the first embodiment applies a drive signal to each sensor electrode SE and determines whether the detection value detected from each sensor electrode SE when the drive signal is applied matches a predetermined criterion. The liquid crystal display device 10 then determines that a line defect has occurred when, among the multiple sensor electrodes SE, sensor electrodes SE whose detection values match the criterion are distributed linearly.
[0077] In this way, the liquid crystal display device 10 according to the first embodiment determines whether or not there is a line defect based on the detection values detected from each sensor electrode SE, and therefore can execute the line defect determination process using the same circuit as that used for the touch detection process. Therefore, it is possible to detect a line defect in the liquid crystal display device 10 with a simple configuration.
[0078] In particular, line defects account for nearly half of all defects in liquid crystal modules, and are easily recognized and detected as clear abnormalities on the display. However, line defects cause only slight changes in the load on the drive circuit, making it difficult to detect line defects due to such load changes. In the first embodiment, we focus on the fact that the parasitic capacitances C1 and C2 between the sensor electrode SE and the liquid crystal drive wiring change between normal and disconnected states, and use a detection circuit in the touch panel to detect slight capacitance changes. This allows line defects in the liquid crystal display device 10 to be detected without a special circuit for detecting line defects. Furthermore, since there is no need for a special circuit for detecting line defects, there is no need to provide a new wiring area connecting the detection circuit to the data lines DL and gate lines GL, which prevents the external dimensions of the liquid crystal panel 20 from increasing.
[0079] <Embodiment 2> Next, a description will be given of embodiment 2. Descriptions of the same configurations and functions as embodiment 1 will be omitted where appropriate.
[0080] The method of the first embodiment described above can detect a break in units of the size of the sensor electrode SE, but it is difficult to determine which of the multiple liquid crystal drive wirings arranged opposite the sensor electrode SE has a break. Furthermore, the method of the first embodiment can detect a break, but it is difficult to detect a short circuit between wirings. In contrast, the liquid crystal display device 10 according to the second embodiment detects breaks and short circuits as line defects for each individual wiring.
[0081] FIG. 15 shows a timing chart of signals applied to the sensor electrodes SE, gate lines GL, and data lines DL in the line defect determination process according to the second embodiment.
[0082] When performing the line defect determination process, the sensor control unit 37 applies a drive signal to each sensor electrode SE, as in embodiment 1. As in the touch detection process, the sensor control unit 37 applies a positive drive pulse to each of the multiple sensor electrodes SE provided on the liquid crystal panel 20 in parallel, that is, simultaneously at the same timing.
[0083] On the other hand, in the line defect determination process, the liquid crystal control unit 35 varies the potential of each gate line GL and each data line DL one by one at a timing synchronized with the drive signal applied to each sensor electrode SE. Specifically, the liquid crystal control unit 35 varies the potential by applying a pulse signal to each gate line GL and each data line DL.
[0084] More specifically, the liquid crystal control unit 35 sequentially applies a pulse signal of an ON potential VGH to each gate line GL, and sequentially applies a pulse signal of a white potential (maximum potential or minimum potential) to each data line DL. Based on a synchronization signal output from the sensor control unit 37, the liquid crystal control unit 35 grasps the timing at which the sensor control unit 37 applied a drive signal to each sensor electrode SE.
[0085] When a drive signal is applied to each sensor electrode SE, the sensor control unit 37 acquires a detection value detected from each sensor electrode SE when the drive signal is applied. Specifically, the sensor control unit 37 acquires the voltage value of each sensor electrode SE detected by the sensor driver 32 as the detection value, and outputs the voltage value to the determination unit 39.
[0086] In the line defect determination process, the determination unit 39 determines whether the detection value of each sensor electrode SE at the timing when the potential of the opposing gate line GL or data line DL is varied matches a predetermined determination criterion. In the second embodiment, the determination criterion is a criterion indicating that the potential variation in the liquid crystal drive wiring has decreased or disappeared due to a break or short circuit.
[0087] 16 shows an equivalent circuit for one sensor electrode SE when there is neither a break nor a short circuit. When a pulse signal is applied to either the gate line GL or the data line DL, the AC (Alternative Current) component of the potential fluctuation caused by the pulse signal passes through the parasitic capacitance C1 or C2 and flows to the sensor electrode SE located opposite the gate line GL or data line DL to which the pulse signal is applied. As a result, the voltage value of the sensor electrode SE fluctuates due to the influence of the AC component passing through the parasitic capacitance C1 or C2.
[0088] Figure 17 shows the waveform of the voltage value when a drive signal (a rectangular pulse signal shown by a solid line) is applied to the sensor electrode SE. In Figure 17, the dotted line shows the waveform of the voltage value of the sensor electrode SE under normal conditions, i.e., when there is no potential fluctuation in any of the opposing electrodes of the sensor electrode SE. On the other hand, the dashed line shows the waveform of the voltage value of the sensor electrode SE when there is a potential fluctuation in any of the opposing electrodes of the sensor electrode SE. Note that the opposing electrodes of the sensor electrode SE refer to the multiple gate lines GL and multiple data lines DL that pass through a position opposing the sensor electrode SE.
[0089] When the potential of the counter electrode of the sensor electrode SE fluctuates, the voltage value of the sensor electrode SE fluctuates compared to normal due to the influence of the AC component that has passed through the parasitic capacitance C1 or C2, as shown by the dashed line in Fig. 17. The determination unit 39 determines whether or not there is an open circuit or a short circuit based on the amount of fluctuation in the voltage value of the sensor electrode SE when the potential of the counter electrode fluctuates.
[0090] For example, as shown in Figure 18, if a break occurs in either the gate line GL or the data line DL, charge moves from the liquid crystal driver 31 to the break, but no charge moves beyond the break. Therefore, even if a pulse signal is applied to the broken gate line GL or data line DL, the pulse signal does not reach beyond the break. In this case, no AC component passes through the parasitic capacitance C1 or C2, so the waveform of the voltage value of the sensor electrode SE is the same as under normal conditions.
[0091] In contrast, as shown in Figure 19, if a short circuit occurs in one of the gate lines GL or data lines DL, the potential fluctuation caused by the pulse signal applied to that gate line GL or data line DL is inhibited by the short circuit. Therefore, the AC component passing through the parasitic capacitance C1 or C2 is weakened or eliminated compared to when a pulse signal is applied to a normal line. As a result, the fluctuation in the voltage value of the sensor electrode SE is reduced and returns to a level close to normal.
[0092] 18 and 19 illustrate an example in which a break or short circuit occurs in a gate line GL, but the same applies to a case in which a short circuit or break occurs in a data line DL. Furthermore, the short circuit determined by the determination unit 39 is not limited to a short circuit between two gate lines GL or two data lines DL, but may also be a short circuit between a gate line GL and a data line DL, or a short circuit between a gate line GL or a data line DL and a COM electrode (common electrode). The COM electrode is a common electrode to which an intermediate potential required for driving the liquid crystal is applied.
[0093] The determination unit 39 measures the amount of fluctuation in the voltage value of each sensor electrode SE that is provided at a position facing the liquid crystal drive wiring whose potential has been fluctuated by the pulse signal. Specifically, the determination unit 39 measures the amount of fluctuation in the voltage value of each sensor electrode SE as the difference from the normal voltage value or the difference from the voltage value of another sensor electrode SE.
[0094] Then, the determination unit 39 determines whether the amount of fluctuation in the voltage value of each sensor electrode SE is equal to or less than a predetermined determination value (second determination value). If the amount of fluctuation is equal to or less than the determination value, the determination unit 39 determines that the potential fluctuation in the liquid crystal drive wiring has decreased or disappeared due to a break or short circuit, and determines that the detected value (voltage value) meets the determination criterion.
[0095] When sensor electrodes SE whose detection values match the criteria exist, the determination unit 39 determines whether they are distributed linearly. When two or more sensor electrodes SE whose detection values match the criteria are distributed linearly along the direction in which the liquid crystal drive wiring whose potential has been varied is arranged, the determination unit 39 determines that a break or short circuit has occurred in the liquid crystal drive wiring whose potential has been varied.
[0096] On the other hand, if the amount of fluctuation is greater than the judgment value, i.e., if the detected value of the sensor electrode SE indicates a fluctuation due to a potential fluctuation in the liquid crystal drive wiring, the judgment unit 39 judges that the detected value does not match the judgment criterion, and in this case, the judgment unit 39 determines that the liquid crystal drive wiring is normal and that neither a break nor a short circuit has occurred.
[0097] In the line defect determination process, the control unit 33 applies a pulse signal to each of these liquid crystal drive lines (gate lines GL or data lines DL) and performs individual determination process for each liquid crystal drive line to determine whether or not there is a break or short circuit. In this way, the control unit 33 determines whether or not there is a break or short circuit for each individual liquid crystal drive line.
[0098] In the line defect detection process, the liquid crystal control unit 35 applies multiple drive pulses to each liquid crystal drive wiring (gate line GL or data line DL) as a countermeasure against detection variations due to the influence of external noise, etc. Then, the determination unit 39 determines the presence or absence of a line defect based on the voltage values for the multiple drive pulses. This improves the accuracy of line defect detection. Here, to avoid complexity, FIG. 15 shows a case where two drive pulses are applied to each liquid crystal drive wiring, but the liquid crystal control unit 35 may also apply, for example, eight drive pulses to each liquid crystal drive wiring.
[0099] Furthermore, applying a pulse signal to the gate line GL may cause display degradation due to fluctuations in the potential of the gate line GL. Therefore, unless there is no display degradation due to fluctuations in the potential of the gate line GL, it is difficult to execute the line defect determination process in the second embodiment during a display blank period. Furthermore, the line defect determination process in the second embodiment requires a longer processing time than the line defect determination process in the first embodiment because pulse signals are applied sequentially to each gate line GL and each data line DL one by one. Therefore, it is preferable to execute the line defect determination process in the second embodiment during the period from when the liquid crystal display device 10 is turned on until the first display process is executed.
[0100] Next, the flow of the line defect determination process in the second embodiment will be described with reference to the flowchart shown in FIG.
[0101] When the line defect determination process starts, the liquid crystal control unit 35 controls the liquid crystal driver 31 to vary the potential of any one of the gate lines GL or data lines DL (step S21). Specifically, the liquid crystal control unit 35 selects any one of the multiple gate lines GL and multiple data lines DL, and applies a pulse signal to the selected line.
[0102] In synchronization with the application of the pulse signals, the sensor control unit 37 controls the sensor driver 32 to apply a train of drive pulses as drive signals to each sensor electrode SE (step S22). Then, the sensor control unit 37 acquires the detection values of each sensor electrode SE in response to the applied drive signals (step S23).
[0103] When the detection value of each sensor electrode SE is acquired, the determination unit 39 determines whether or not there is a sensor electrode SE whose acquired detection value matches the determination criterion (step S24). Specifically, the determination unit 39 determines whether or not the amount of change in the voltage value of each sensor electrode SE provided at a position opposite to the gate line GL or data line DL whose potential has been changed is equal to or less than a determination value.
[0104] If there is a sensor electrode SE whose detection value meets the judgment criterion (step S24; YES), the judgment unit 39 further judges whether two or more sensor electrodes SE whose detection value meets the judgment criterion are distributed linearly along the direction of the selected gate line GL or data line DL (step S25).
[0105] If two or more sensor electrodes SE whose detection values meet the judgment criterion are distributed linearly along the direction of the selected gate line GL or data line DL (step S25; YES), the judgment unit 39 judges that a line defect has occurred in the selected gate line GL or data line DL (step S26).
[0106] On the other hand, if there is no sensor electrode SE whose detection value meets the criterion (step S24; NO), the determination unit 39 determines that the selected gate line GL or data line DL is normal, i.e., that no line defect has occurred (step S27).Also, even if there is a sensor electrode SE whose detection value meets the criterion but is not distributed linearly (step S25; NO), the determination unit 39 also determines that the selected gate line GL or data line DL is normal.
[0107] Next, the control unit 33 determines whether or not the process has been performed on all the gate lines GL and data lines DL (step S28). If there are any unprocessed gate lines GL or data lines DL (step S28; NO), the control unit 33 selects a new unprocessed gate line GL or data line DL and returns the process to step S21. Then, the control unit 33 performs the processes of steps S21 to S27 on the newly selected line. In this way, the control unit 33 determines the presence or absence of a line defect for each of all the gate lines GL and data lines DL.
[0108] Finally, when the process is executed for all the gate lines GL and data lines DL (step S28; YES), the line defect determination process shown in FIG. 20 ends.
[0109] As described above, the liquid crystal display device 10 according to the second embodiment varies the potential of one of the liquid crystal drive wires in synchronization with the drive signal applied to each sensor electrode SE, and determines that a break or short circuit has occurred in that liquid crystal drive wire if the detected value of the sensor electrode SE facing that liquid crystal drive wire matches the determination criterion. The liquid crystal display device 10 according to the second embodiment performs such individual determination processing for each liquid crystal drive wire.
[0110] As described above, the liquid crystal display device 10 according to the second embodiment determines the presence or absence of a line defect for each of the plurality of liquid crystal drive wirings, which takes more time than the line defect determination process of the first embodiment, but it can determine the presence or absence of a line defect for each individual liquid crystal drive wiring. Furthermore, it can determine the presence or absence of not only a break but also a short circuit as a line defect.
[0111] Note that the control unit 33 is not limited to performing the line defect determination process of the second embodiment on all of the gate lines GL and data lines DL. For example, the control unit 33 may perform the line defect determination process of the second embodiment after detecting line defects in units of the size of the sensor electrodes SE by the line defect determination process of the first embodiment. Specifically, the control unit 33 first determines, by the line defect determination process of the first embodiment, that a line defect has occurred in one of the plurality of liquid crystal drive wirings facing two or more sensor electrodes SE whose detection values meet the determination criterion. Then, the control unit 33 second performs the individual determination process of the second embodiment on each of the plurality of liquid crystal drive wirings, and identifies the liquid crystal drive wiring in which a line defect has occurred from among the plurality of liquid crystal drive wirings. This reduces the time required to detect line defects on a wiring-by-wiring basis.
[0112] Furthermore, the control unit 33 may apply pulse signals with different conditions to multiple liquid crystal drive wirings facing the same sensor electrode SE, thereby changing the conditions for potential fluctuations for each of the multiple liquid crystal drive wirings. This makes it possible to distinguish which of the multiple liquid crystal drive wirings is responsible for the potential fluctuation of the liquid crystal drive wiring that affects the voltage value of the sensor electrode SE when the drive signal is applied, even if pulse signals are applied at the same timing to multiple liquid crystal drive wirings facing the same sensor electrode SE. Therefore, the time required to detect line defects can be shortened compared to when pulse signals are applied to all of the liquid crystal drive wirings one by one in sequence.
[0113] <Third Embodiment> Next, a description will be given of embodiment 3. Descriptions of the same configurations and functions as those of embodiments 1 and 2 will be omitted where appropriate.
[0114] The method of the first embodiment described above can detect a break in a short time, but has difficulty in detecting a short circuit between lines. In contrast, the liquid crystal display device 10 according to the third embodiment can detect a short circuit between lines of the same type, specifically, a short circuit between two gate lines GL and a short circuit between two data lines DL.
[0115] 21 shows an equivalent circuit for each sensor electrode SE in the line defect determination process of the third embodiment. The liquid crystal control unit 35 sets every other one of the plurality of liquid crystal drive lines (gate lines GL and data lines DL) to a high impedance (Hi-Z) state. Here, the high impedance state means a state in which the line defect detection process is highly resistant to electrical signals.
[0116] The liquid crystal driver 31 has a function of disconnecting each of the multiple liquid crystal drive wirings from the other wirings. The liquid crystal control unit 35 controls the liquid crystal driver 31 to disconnect every other gate line GL and data line DL from the other wirings, thereby setting the liquid crystal driver 31 to a high impedance state.
[0117] The liquid crystal control unit 35 applies a constant potential to other liquid crystal drive wirings that are not in a high-impedance state, as in the first embodiment. Specifically, the liquid crystal control unit 35 applies an off-potential VGL (for example, -7 V) to each gate line GL that is not in a high-impedance state. Furthermore, the liquid crystal control unit 35 applies a positive white potential (maximum potential, for example, 10.2 V) or a negative white potential (minimum potential, for example, 0.2 V) to each data line DL that is not set to a high-impedance state. Note that while FIG. 21 shows an example in which a positive white potential (10.2 V) is applied, whether a positive white potential or a negative white potential is applied depends on the polarity of the data line DL.
[0118] When every other gate line GL and data line DL is set to a high impedance state and a constant potential is applied to the other lines, the sensor control unit 37 applies a drive signal to each sensor electrode SE. As in the first embodiment, the sensor control unit 37 applies a positive drive pulse to each of the multiple sensor electrodes SE provided on the liquid crystal panel 20 in parallel, i.e., at the same time.
[0119] When a drive signal is applied to each sensor electrode SE, the sensor control unit 37 acquires a detection value detected from each sensor electrode SE when the drive signal is applied. Specifically, the sensor control unit 37 acquires the voltage value of each sensor electrode SE when the drive signal is applied as the detection value, and outputs the voltage value to the determination unit 39.
[0120] The determination unit 39 determines whether the detection value of each sensor electrode SE in response to the drive signal matches a predetermined determination criterion. In the third embodiment, the determination criterion is a criterion indicating that the parasitic capacitance C1 or C2 formed on the sensor electrode SE has increased due to a short circuit.
[0121] More specifically, a parasitic capacitance C1 or C2 is formed between each sensor electrode SE and the gate line GL or data line DL to which a constant potential is applied. On the other hand, since no charge is supplied to the gate line GL or data line DL in the high impedance state, no parasitic capacitance C1 or C2 is formed between each sensor electrode SE and the gate line GL or data line DL in the high impedance state.
[0122] 22, when a short circuit occurs between two gate lines GL, a charge is supplied from the data line DL to which a constant potential is applied to the data line DL in a high-impedance state. As a result, the parasitic capacitances C1 and C2 formed on the sensor electrode SE facing the two shorted gate lines GL increase by one parasitic capacitance C1. Similarly, when a short circuit occurs between two data lines DL, the parasitic capacitances C1 and C2 formed on the sensor electrode SE facing the two shorted data lines DL increase by one parasitic capacitance C2.
[0123] The determination unit 39 determines whether the parasitic capacitance C1 or C2 formed in each sensor electrode SE has increased based on the voltage value detected from each sensor electrode SE when a drive signal is applied. Specifically, the determination unit 39 determines whether the parasitic capacitance C1 or C2 formed in each sensor electrode SE has increased relatively compared to normal conditions under the same conditions (i.e., conditions under which every other liquid crystal drive wire is set to a high impedance state) or compared to the parasitic capacitance C1 or C2 formed in other sensor electrodes SE under the same conditions. If the parasitic capacitance C1 or C2 formed in the sensor electrode SE whose voltage value has been detected has increased, the determination unit 39 determines that the voltage value meets the determination criterion.
[0124] As in the first embodiment, the determination unit 39 monitors the voltage value of each sensor electrode SE when a drive signal is applied and measures the charging time. The determination unit 39 determines whether the charging time for each sensor electrode SE is equal to or greater than a determination value (third determination value). If the charging time is equal to or greater than the determination value, the determination unit 39 determines that the parasitic capacitance C1 or C2 has increased, and that the detected value (voltage value) meets the determination criterion.
[0125] When a sensor electrode SE whose detection value meets the determination criterion exists, the determination unit 39 determines whether or not the sensor electrodes are distributed linearly, as in the first embodiment. When two or more sensor electrodes SE whose detection values meet the determination criterion are distributed linearly, the determination unit 39 determines that a short circuit has occurred in the gate line GL or data line DL facing the linearly distributed sensor electrodes SE. Specifically, the determination unit 39 determines that a short circuit has occurred between wirings of the same type, that is, a short circuit between two gate lines GL or a short circuit between two data lines DL.
[0126] As described above, the liquid crystal display device 10 according to the third embodiment applies a drive signal to each sensor electrode SE when every other one of the plurality of liquid crystal drive wires is in a high impedance state, and determines whether or not a short circuit exists based on the detection value detected from each sensor electrode SE at that time. This makes it possible to quickly detect short circuits between wires of the same type in units of the size of the sensor electrode SE.
[0127] Note that the line defect determination process in the third embodiment requires driving the gate lines GL, and therefore is difficult to perform during a display blank period. Therefore, the control unit 33 performs the line defect determination process in the third embodiment, for example, during a period from when the liquid crystal display device 10 is turned on until the first display process is started.
[0128] <Fourth Embodiment> Next, a description will be given of embodiment 4. Descriptions of the same configurations and functions as those of embodiments 1 to 3 will be omitted where appropriate.
[0129] The method of the third embodiment described above detects short circuits between the same types of wiring. In contrast, the liquid crystal display device 10 according to the fourth embodiment detects short circuits between different types of wiring, specifically, short circuits between gate lines GL and data lines DL, short circuits between gate lines GL and COM electrodes, and short circuits between data lines DL and COM electrodes.
[0130] 23 shows an equivalent circuit for each sensor electrode SE in the line defect determination process of the fourth embodiment. The liquid crystal control unit 35 applies a constant potential to each liquid crystal drive wiring, as in the first embodiment. Specifically, the liquid crystal control unit 35 applies an off potential VGL (e.g., −7 V) to each gate line GL. The liquid crystal control unit 35 also applies a positive white potential (maximum potential, e.g., 10.2 V) or a negative white potential (minimum potential, e.g., 0.2 V) to each data line DL.
[0131] When a constant potential is applied to each gate line GL and each data line DL in this manner, the sensor control unit 37 applies a drive signal to each sensor electrode SE. As in the first embodiment, the sensor control unit 37 applies a positive drive pulse to each of the multiple sensor electrodes SE provided on the liquid crystal panel 20 in parallel, i.e., at the same timing.
[0132] When a drive signal is applied to each sensor electrode SE, the sensor control unit 37 acquires a detection value of each sensor electrode SE in response to the drive signal. In the first to third embodiments, the sensor control unit 37 acquires the voltage value of each sensor electrode SE as the detection value. In contrast, in the fourth embodiment, the sensor control unit 37 acquires the amount of charge of each sensor electrode SE as the detection value.
[0133] 24 shows the configuration of sensor driver 32 in embodiment 4. Sensor driver 32 includes drive signal application unit 321, charge amount detection unit 322, and switch 323. Drive signal application unit 321 applies a drive signal to each sensor electrode SE in accordance with a control signal from sensor control unit 37. When a drive signal is applied, switch 323 switches the path between sensor driver 32 and each sensor electrode SE to a path connecting drive signal application unit 321 and each sensor electrode SE.
[0134] The charge amount detection unit 322 detects the amount of charge accumulated in each sensor electrode SE when a drive signal is applied. When detecting the amount of charge, the switch 323 switches the path between the sensor driver 32 and each sensor electrode SE to a path connecting the charge amount detection unit 322 and each sensor electrode SE. The sensor control unit 37 obtains the amount of charge of each sensor electrode SE detected by the charge amount detection unit 322 as a detection value and outputs it to the determination unit 39.
[0135] The determination unit 39 determines whether the detection value of each sensor electrode SE in response to the drive signal matches a predetermined determination criterion. In the fourth embodiment, the determination criterion indicates that the potential difference across both ends of the parasitic capacitance C1 or C2 formed on the sensor electrode SE has decreased due to a short circuit.
[0136] More specifically, a parasitic capacitance C1 or C2 is formed between each sensor electrode SE and the gate line GL and data line DL to which a constant potential is applied. When no short circuit occurs, the potential difference across the parasitic capacitance C1 or C2 is the difference between the constant potential applied to the gate line GL and data line DL and the potential (e.g., 5 V) of the drive signal applied to the sensor electrode SE (-12 V, -4.8 V, and 5.2 V in the example of FIG. 23).
[0137] Here, as shown in Fig. 23, when a short circuit occurs between a gate line GL and a data line DL, charge flows between the shorted wirings, and the potentials of the shorted wirings become the same. In the example of Fig. 23, the potential of the shorted gate line GL and data line DL becomes 1.6V, which is an intermediate potential between -7V and 10.2V, which were the respective potentials before the short circuit. As a result, the absolute value of the potential difference between the shorted gate line GL and data line DL and the sensor electrode SE (-3.4V in the example of Fig. 23) is reduced compared to the absolute values of the potential differences between the non-shorted gate line GL and data line DL and the sensor electrode SE (-12V, -4.8V, and 5.2V in the example of Fig. 23).
[0138] Similarly, when a short circuit occurs between the gate line GL and the COM electrode, and when a short circuit occurs between the data line DL and the COM electrode, the absolute value of the potential difference between the shorted wiring and the sensor electrode SE decreases.
[0139] The determination unit 39 determines whether the potential difference across the parasitic capacitance C1 or C2 formed on each sensor electrode SE has decreased based on the amount of charge detected from each sensor electrode SE when the drive signal is applied. Specifically, the determination unit 39 determines whether the potential difference across the parasitic capacitance C1 or C2 formed on each sensor electrode SE has decreased relatively compared to normal or compared to the potential difference across the parasitic capacitance C1 or C2 formed on another sensor electrode SE. Then, when the potential difference across the parasitic capacitance C1 or C2 formed on the sensor electrode SE for which the amount of charge has been detected has decreased, the determination unit 39 determines that the amount of charge meets the determination criterion.
[0140] Specifically, the determination unit 39 monitors the amount of charge on each sensor electrode SE when a drive signal is applied, and measures the discharge time of each sensor electrode SE, specifically, the time it takes for the amount of charge on each sensor electrode SE to decrease from a peak value to a predetermined threshold or less when a drive signal is applied.
[0141] Fig. 25 shows the waveform of the charge amount of the sensor electrode SE when a drive signal (a rectangular pulse signal shown by a solid line) is applied to the sensor electrode SE. In Fig. 25, the waveform of the charge amount of the sensor electrode SE under normal conditions, i.e., when no short circuit occurs, is shown by a dotted line. Also, the waveform of the charge amount of the sensor electrode SE when a short circuit occurs between different types of wiring is shown by a dashed line.
[0142] When a short circuit occurs between different types of wiring, the potential difference between the parasitic capacitances C1 and C2 formed in the sensor electrode SE decreases compared to normal. The amount of charge stored in the sensor electrode SE is expressed as the product of the parasitic capacitance and the potential difference (Q = C × V), so it decreases as the potential difference decreases. Therefore, when a short circuit occurs between different types of wiring, the charging and discharging times due to the drive signal become shorter compared to normal.
[0143] The determination unit 39 determines whether or not the discharge time for each sensor electrode SE is equal to or less than a predetermined determination value (fourth determination value). If the discharge time is equal to or less than the determination value, the determination unit 39 determines that the potential difference across the parasitic capacitance C1 or C2 has decreased, and determines that the detected value (amount of charge) meets the determination criterion.
[0144] When a sensor electrode SE whose detection value meets the determination criterion exists, the determination unit 39 determines whether or not the sensor electrodes are distributed linearly, as in the first embodiment. When two or more sensor electrodes SE whose detection values meet the determination criterion are distributed linearly, the determination unit 39 determines that a short circuit has occurred in the gate line GL or the data line DL facing the linearly distributed sensor electrodes SE. Specifically, the determination unit 39 detects short circuits between different types of wiring, i.e., a short circuit between a gate line GL and a data line DL, a short circuit between a gate line GL and a COM electrode, and a short circuit between a data line DL and a COM electrode.
[0145] As described above, the liquid crystal display device 10 according to the fourth embodiment applies a drive signal to each sensor electrode SE, and determines whether the potential difference across the parasitic capacitance C1 or C2 has decreased based on the amount of charge detected from each sensor electrode SE. This allows the liquid crystal display device 10 to detect a short circuit between different types of wiring in the liquid crystal panel 20.
[0146] <Modification> Although the embodiments of the present disclosure have been described above, the present disclosure is not limited to the embodiments. Each embodiment can be combined, modified, or omitted as appropriate.
[0147] For example, in the first to third embodiments, the determination unit 39 acquires a voltage value as a detection value detected from each sensor electrode SE when a drive signal is applied in the touch detection process and the line defect determination process, and determines whether or not a touch and a line defect exist based on the charging time of each sensor electrode SE. However, the determination unit 39 may use an index other than charging time as long as it can detect changes in the parasitic capacitance formed in each sensor electrode SE. For example, the determination unit 39 may determine whether or not a touch and a line defect exist based on the discharge time of each sensor electrode SE. Alternatively, the sensor control unit 37 may acquire the amount of current flowing through each sensor electrode SE when a drive pulse is applied to the sensor electrode SE, instead of the voltage value, as the detection value of each sensor electrode SE. The determination unit 39 may then determine whether or not a touch and a line defect exist based on the amount of current. Furthermore, capacitance detection methods disclosed in, for example, Japanese Patent No. 6615683 and Japanese Patent Laid-Open No. 2019-211898 may be applied to the touch detection process and the line defect determination process of the present disclosure.
[0148] In the above embodiment, the liquid crystal panel 20 has been described as an in-cell touch panel. However, the liquid crystal panel 20 is not limited to an in-cell touch panel, and may be, for example, an on-cell touch panel, as long as a parasitic capacitance is formed between the sensor electrode SE and the liquid crystal drive wiring. Furthermore, it goes without saying that the touch detection process can be omitted if the only purpose is to detect and distinguish line defects.
[0149] In the above embodiment, the sensor electrode SE is arranged on the side where the data lines DL, gate lines GL, and TFTs are arranged. In such an arrangement, for example, in a liquid crystal panel that employs a horizontal electric field method such as FFS (Fringe Field Switching) mode, a common electrode is arranged on the substrate side where the TFTs are arranged, and therefore the common electrode can be used as the sensor electrode SE.
[0150] Furthermore, the method for detecting line defects described in the above embodiment is not limited to liquid crystal display devices, but can also be applied to organic EL display devices, etc. For example, it is possible to arrange the sensor electrode SE using ITO (Indium Tin Oxide) or the like in the base layer portion of the TFT substrate, or to arrange the sensor electrode SE in a planarizing layer formed between the TFT formation layer and the EL light-emitting layer.
[0151] In the above embodiment, the control unit 33 functions as the liquid crystal control unit 35, the sensor control unit 37, and the determination unit 39 by the CPU executing a program stored in the ROM. However, instead of a CPU, the control unit 33 may include dedicated hardware such as an ASIC (Application Specific Integrated Circuit), an FPGA (Field-Programmable Gate Array), or various control circuits, and the dedicated hardware may function as the liquid crystal control unit 35, the sensor control unit 37, and the determination unit 39. In this case, the functions of each unit may be realized by individual hardware, or the functions of each unit may be realized together by a single piece of hardware. Furthermore, some of the functions of each unit may be realized by dedicated hardware, and other parts may be realized by software or firmware.
[0152] The present disclosure allows various embodiments and modifications without departing from the broad spirit and scope of the present disclosure. Furthermore, the above-described embodiments are intended to illustrate the present disclosure and do not limit the scope of the present disclosure. That is, the scope of the present disclosure is defined by the claims, not the embodiments. Various modifications made within the scope of the claims and the meaning of equivalent disclosures are considered to be within the scope of the present disclosure. [Explanation of symbols]
[0153] 10 liquid crystal display device, 20 liquid crystal panel, 30 driver, 31 liquid crystal driver, 32 sensor driver, 33 control unit, 35 liquid crystal control unit, 37 sensor control unit, 39 determination unit, 321 drive signal application unit, 322 charge amount detection unit, 323 switch, DL data line, GL gate line, SP subpixel, SE sensor electrode, SL sensor wiring.
Claims
1. A liquid crystal display device comprising a liquid crystal panel and a driver that drives the liquid crystal panel, The liquid crystal panel is a plurality of sensor electrodes arranged in a matrix for detecting touches on the liquid crystal panel; a plurality of liquid crystal drive wirings for displaying an image on the liquid crystal panel; The driver a control unit that executes a display process that displays the image on the liquid crystal panel, a touch detection process that detects a touch on the liquid crystal panel, and a line defect determination process that determines whether or not there is a line defect on the liquid crystal panel, In the line defect determination process, the control unit applies a drive signal to each sensor electrode when a potential that does not substantially vary with time is applied to each liquid crystal drive wiring, determines whether or not a detection value detected from each sensor electrode when the drive signal is applied matches a predetermined determination criterion, and determines that the line defect has occurred when sensor electrodes of which the detection value matches the determination criterion are distributed linearly among the plurality of sensor electrodes. LCD display device.
2. In the line defect determination process, the control unit applies the drive signal to each of the sensor electrodes when a potential that does not substantially vary with time is applied to each of the liquid crystal drive wirings, and when the sensor electrodes whose detection values match the determination criterion are distributed linearly, determines that a break has occurred in the liquid crystal drive wiring that faces the linearly distributed sensor electrodes, as the line defect. The liquid crystal display device according to claim 1 .
3. the control unit applies the drive signal to each of the sensor electrodes when a potential that does not substantially vary with time is applied to each of the liquid crystal drive wirings in the touch detection process, and detects the touch based on a detection value detected from each of the sensor electrodes when the drive signal is applied; a difference between a potential applied to a plurality of data lines among the plurality of liquid crystal drive wirings in the line defect determination process and a potential of the drive signal is larger than a difference between a potential applied to the plurality of data lines in the touch detection process and a potential of the drive signal; The liquid crystal display device according to claim 2 .
4. the control unit determines that the detection value matches the determination criterion when a charging time of the sensor electrode from which the detection value is detected by the drive signal is equal to or shorter than a first determination value in the line defect determination process.
4. The liquid crystal display device according to claim 2 or 3.
5. In the line defect determination process, the control unit varies the potential of one of the plurality of liquid crystal drive wirings at a timing synchronized with the drive signal, determines whether the detection value of each sensor electrode facing the one liquid crystal drive wiring at the timing matches the determination criterion, and executes an individual determination process for each liquid crystal drive wiring to determine that a break or short circuit has occurred in the one liquid crystal drive wiring as the line defect when sensor electrodes whose detection values match the determination criterion are distributed linearly. The liquid crystal display device according to claim 1 .
6. the control unit determines that the detection value matches the determination criterion when a fluctuation amount of the detection value at the timing is equal to or less than a second determination value in the individual determination process. The liquid crystal display device according to claim 5 .
7. In the line defect determination process, the control unit applies a drive signal to each of the sensor electrodes when every other liquid crystal drive wiring among the plurality of liquid crystal drive wirings is in a high impedance state, and when the sensor electrodes whose detection values match the determination criterion are distributed linearly, determines that a short circuit between wirings of the same type has occurred in the liquid crystal drive wirings facing the linearly distributed sensor electrodes, as the line defect. The liquid crystal display device according to claim 1 .
8. the control unit determines that the detection value matches the determination criterion when a charging time of the sensor electrode from which the detection value is detected by the drive signal is equal to or longer than a third determination value in the line defect determination process. The liquid crystal display device according to claim 7 .
9. In the line defect determination process, the control unit determines that the detection value matches the determination criterion when the discharge time due to the drive signal of the sensor electrode from which the detection value is detected is equal to or less than a fourth determination value, and determines that the line defect is a short circuit between different types of wiring in the liquid crystal drive wiring facing the linearly distributed sensor electrodes when the sensor electrodes from which the detection value matches the determination criterion are distributed linearly. The liquid crystal display device according to claim 1 .
10. In the line defect determination process, the control unit detects, as the detection value, an amount of charge of each of the sensor electrodes when the drive signal is applied. The liquid crystal display device according to claim 9 .
11. A line defect detection method for detecting line defects in a liquid crystal display device including a plurality of sensor electrodes arranged in a matrix and a plurality of liquid crystal drive wirings, comprising: applying a drive signal to each sensor electrode when a potential that does not substantially vary with time is applied to each liquid crystal drive wiring; determining whether or not a detection value detected from each of the sensor electrodes when the drive signal is applied matches a predetermined determination criterion; determining that the line defect has occurred when the sensor electrodes, among the plurality of sensor electrodes, whose detection values match the determination criterion are distributed linearly; Line defect detection method.
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