Learning device, inference device, learning method, inference method, learning program, and inference program

Abstract

The device is provided with a learning data acquisition unit (101) that acquires input parameters which are multiple ambient temperatures and heat generation amounts of a module, and output parameters which are temperature parameters related to the module taking into account the temperature dependency on the input parameters, and a thermal learning model creation unit (102) that creates a thermal learning model that inputs the ambient temperatures and power consumption of the module as input parameters and outputs the temperature parameters related to the module as output parameters based on the results acquired by the learning data acquisition unit (101).

Description

[Technical Field]

[0001] The present disclosure relates to a learning device, an inference device, a learning method, an inference method, a learning program, and an inference program. [Background technology]

[0002] In recent years, there has been an increasing demand for miniaturization and higher output power for high frequency modules used in wireless communications or radar.

[0003] On the other hand, miniaturization of high-frequency modules leads to a worsening of the heat dissipation environment, and increasing power output leads to an increase in heat generation due to increased power consumption. Therefore, as high-frequency modules become smaller and more powerful, the heat density increases significantly, increasing the risk of failure.

[0004] Furthermore, if a problem is discovered after prototyping, it will take time and money to find a solution, and in the worst case scenario, the project may have to be reworked, so the demand for high-quality thermal design is increasing day by day.

[0005] In particular, in high-frequency modules, improving the accuracy of models of transistors, which are the main heat-generating parts, plays an extremely important role.

[0006] Conventional thermal calculations for transistor models have been performed using the 45-degree method. The 45-degree method is based on physical equations. As a result, the 45-degree method has the advantage of high convergence and fast calculation times for amplifier design.

[0007] On the other hand, according to the description in Non-Patent Document 1, for example, the 45-degree method assumes that the thermal conductivity of the substrate is constant. However, actual substrate materials have temperature dependency, etc. Therefore, when designing an amplifier under multiple temperature conditions, or when there is a temperature distribution in multiple cells, the 45-degree method has the problem of low calculation accuracy. [Prior art documents] [Non-patent literature]

[0008] [Non-Patent Document 1] AM Darwish, AJ Bayba and HA Hung, "Thermal resistance calculation of AlGaN-GaN devices," in IEEE Transactions on Microwave Theory and Techniques, vol. 52, no. 11, pp. 2611-2620, Nov. 2004 Summary of the Invention [Problem to be solved by the invention]

[0009] As mentioned above, the 45-degree method calculates under the assumption that the thermal conductivity of the board is constant, so the calculation accuracy is low when designing an amplifier under multiple temperature conditions or when there is a temperature distribution in multiple cells.

[0010] The present disclosure has been made to solve the above-mentioned problems, and aims to provide a learning device that enables models to be more accurate than before. [Means for solving the problem]

[0011] The learning device according to the present disclosure includes a learning data acquisition unit that acquires input parameters that are multiple environmental temperatures and heat values ​​of a module, and output parameters that are temperature parameters related to the module in consideration of the temperature dependency on the input parameters, and a thermal learning model creation unit that creates a thermal learning model that inputs the environmental temperatures and heat values ​​of the module as input parameters and outputs the temperature parameters related to the module as output parameters based on the results acquired by the learning data acquisition unit. a conversion unit that converts the thermal learning model into a thermal learning model of an analog model; and a transistor model creation unit that creates a transistor model incorporating the thermal learning model of the analog model obtained by the conversion unit. The present invention is characterized by the following. [Effects of the Invention]

[0012] According to the present disclosure, the above-described configuration makes it possible to improve the accuracy of the model compared to the conventional method. [Brief explanation of the drawings]

[0013] [Figure 1] 1 is a diagram illustrating an example of the configuration of a learning device according to a first embodiment. [Figure 2] 4 is a flowchart showing an example of the operation of the learning device according to the first embodiment. [Figure 3] FIG. 1 is a diagram showing an example of the temperature dependence and plane orientation dependence of thermal conductivity. [Figure 4] FIG. 1 is a diagram showing an example of the configuration of an 8-finger transistor cell with an ISV structure. [Figure 5] FIG. 10 is a diagram showing an example of the configuration of an 8-finger transistor cell with a Side Via structure. [Figure 6] FIG. 10 is a diagram illustrating an example of the relationship between thermal resistance and heat generation amount. [Figure 7] FIG. 10 is a diagram showing an example of the configuration of a four-finger transistor cell. [Figure 8] FIG. 10 is a diagram showing an example of the relationship between thermal resistance and drain electrode width. [Figure 9] FIG. 2 is a diagram illustrating an example of the configuration of a thermal learning model using a neural network according to the first embodiment. [Figure 10] FIG. 2 is a diagram illustrating an example of the configuration of a transistor model according to the first embodiment. [Figure 11] 1 is a diagram illustrating an example of the configuration of an inference device according to a first embodiment. [Figure 12] 4 is a flowchart showing an example of the operation of the inference device according to the first embodiment. [Figure 13] FIG. 10 is a diagram illustrating an example of the relationship between temperature and pulse width when the duty ratio is changed. [Figure 14] FIG. 10 is a diagram illustrating a configuration example of a thermal learning model of a neural network according to a second embodiment. [Figure 15] FIG. 10 is a diagram showing an example of transient changes in output power during pulse operation. [Figure 16]FIG. 1 is a diagram illustrating an example of the configuration of a four-cell transistor. [Figure 17] FIG. 11 is a diagram illustrating a configuration example of a thermal learning model of a neural network according to a third embodiment. [Figure 18] FIG. 1 is a diagram illustrating an example of the configuration of an amplifier using multiple stages of transistors. [Figure 19] FIG. 10 is a diagram illustrating a configuration example of a thermal learning model of a neural network according to a fourth embodiment. [Figure 20] FIG. 10 is a diagram showing an example of the relationship between time and temperature of a life curve. [Figure 21] 21A and 21B are diagrams illustrating examples of hardware configurations of a learning device and an inference device according to the first embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0014] Hereinafter, embodiments will be described in detail with reference to the drawings. Embodiment 1 FIG. 1 is a diagram showing an example of the configuration of a learning device 1 according to the first embodiment. The learning device 1 is a device that creates a thermal learning model and a transistor model that take into account the results of thermal analysis. The transistor model created by the learning device 1 is effective as a transistor model when designing an amplifier (high-frequency module) for wireless communication or radar applications. In addition, the thermal learning model created by the learning device 1 can be widely applied as a thermal learning model when designing semiconductor modules other than amplifiers.

[0015] 1, the learning device 1 includes a learning data acquisition unit 101, a thermal learning model creation unit 102, a conversion unit 103, and a transistor model creation unit 104. The example of FIG. 1 shows a case where the learning data acquisition unit 101 includes a thermal analysis implementation unit 1011 and an actual measurement data acquisition unit 1012.

[0016] The learning data acquisition unit 101 acquires input parameters that are conditions for a plurality of thermal analyses, and output parameters that are temperature parameters related to the module in consideration of the temperature dependency of the input parameters.

[0017] The conditions for thermal analysis are at least the ambient temperature and heat generation of the module. The ambient temperature of the module is the temperature of the environment in which the module is used. The heat generation of the module is the power converted into heat in the module, which is the DC power (power consumption) minus the RF output power plus the RF input power. Furthermore, the conditions for the thermal analysis may include at least one of the substrate material and substrate structure of the module in addition to the ambient temperature and heat generation of the module. The substrate structure of the module may include, for example, the substrate thickness of the module.

[0018] Furthermore, examples of temperature parameters relating to a module include the temperature at each position of a heat source, or the thermal resistance between each position or across the entire module.

[0019] The thermal analysis execution unit 1011 uses CAD (Computer-aided design) to perform a thermal analysis including temperature dependency using a plurality of thermal analysis conditions as input parameters, and obtains temperature parameters related to the module as output parameters. Furthermore, the thermal analysis execution unit 1011 may perform a thermal analysis that includes not only temperature dependency but also plane orientation dependency.

[0020] The measured data acquisition unit 1012 acquires measured data measured by a sensor (not shown) or the like, thereby acquiring input parameters that are conditions for a plurality of thermal analyses, and output parameters that are temperature parameters related to the module in consideration of the temperature dependency of the input parameters. Note that, in the measured data acquisition unit 1012 as well, the output parameter is not limited to the temperature that is the output value indicated by the measured data, but may be a thermal resistance calculated from this temperature.

[0021] The learning data acquisition unit 101 selects which of the thermal analysis implementation unit 1011 and the actual measurement data acquisition unit 1012 to use for processing, for example, in response to a user's operation using an operating device (not shown) connected to the learning device 1.

[0022] In the example of FIG. 1, the learning data acquisition unit 101 includes both the thermal analysis execution unit 1011 and the actual measurement data acquisition unit 1012. However, the present invention is not limited to this, and the learning data acquiring unit 101 may include at least one of the thermal analysis executing unit 1011 and the measured data acquiring unit 1012 .

[0023] In the following description, the learning device 1 creates a model using the learning data obtained by the thermal analysis implementation unit 1011 of the learning data acquisition unit 101, and outputs data representing the model to an external device (not shown) such as a display device or a storage device.

[0024] The thermal learning model creation unit 102 creates a thermal learning model based on the results of the thermal analysis performed by the thermal analysis execution unit 1011. The thermal learning model created by the thermal learning model creation unit 102 is a model that inputs thermal analysis conditions as input parameters and outputs temperature parameters related to the module as output parameters. This thermal learning model is a data analysis model with thermal analysis conditions as input and temperature parameters as output, and is, for example, a model using a neural network.

[0025] The conversion unit 103 converts the thermal learning model created by the thermal learning model creation unit 102 into an analog model. At this time, the conversion unit 103 performs the conversion into the analog model using, for example, Verilog-A. The thermal learning model that is the target of conversion by the conversion unit 103 is a thermal learning model in which the output parameter is the thermal resistance of the module.

[0026] The transistor model creation unit 104 creates a transistor model incorporating the thermal learning model of the analog model obtained by the conversion unit 103.

[0027] Note that FIG. 1 shows a case where the learning device 1 creates both a thermal learning model and a transistor model. However, the present invention is not limited to this, and the learning device 1 may be configured to create only a thermal learning model. In other words, in this case, the learning device 1 does not need the conversion unit 103 and the transistor model creation unit 104.

[0028] Next, an example of the operation of the learning device 1 according to the first embodiment shown in Fig. 1 will be described with reference to Fig. 2. That is, an example of the operation when the learning device 1 creates both a thermal learning model and a transistor model will be described here. In the example of operation of the learning device 1 according to the first embodiment shown in Fig. 1, first, as shown in Fig. 2, the thermal analysis execution unit 1011 uses CAD to perform a thermal analysis including temperature dependency using a plurality of thermal analysis conditions as input parameters, thereby obtaining temperature parameters related to the module as output parameters (step ST101). The thermal analysis execution unit 1011 may also perform a thermal analysis including not only temperature dependency but also plane orientation dependency.

[0029] Next, the thermal learning model creation unit 102 creates a thermal learning model that inputs the thermal analysis conditions as input parameters and outputs temperature parameters related to the module as output parameters based on the results of the thermal analysis performed by the thermal analysis execution unit 1011 (step ST102). Here, the output parameter of the thermal learning model is the thermal resistance of the module.

[0030] Next, the conversion unit 103 converts the thermal learning model created by the thermal learning model creation unit 102 into an analog model thermal learning model (step ST103).

[0031] Next, the transistor model creating unit 104 creates a transistor model incorporating the thermal learning model of the analog model obtained by the converting unit 103 (step ST104).

[0032] If the learning device 1 creates only the thermal learning model, the processes of steps ST103 and ST104 are not required. In this case, the output parameter of the thermal learning model may be a temperature parameter related to the module other than the thermal resistance of the module.

[0033] Next, the operation of the learning device 1 will be described in detail. First, the CAD used by the thermal analysis execution unit 1011 will be described. The CAD used by the thermal analysis implementation unit 1011 is a CAD capable of thermal analysis simulation. More specifically, when the thermal analysis implementation unit 1011 performs a thermal analysis including temperature dependency, the CAD is a CAD capable of thermal analysis simulation including temperature dependency of material physical property values. Furthermore, when the thermal analysis implementation unit 1011 performs a thermal analysis including plane orientation dependency, the CAD is a CAD capable of thermal analysis simulation including plane orientation dependency of material physical property values. Examples of this CAD include Icepak by Ansys, Inc. and Celsius Thermal Solver by Cadence, Inc.

[0034] FIG. 3 is a diagram showing an example of the temperature dependency and plane orientation dependency of thermal conductivity. In FIG. 3, reference numeral 11 denotes, for example, the thermal conductivity in the lateral direction (XY direction) of the substrate, and reference numeral 12 denotes, for example, the thermal conductivity in the vertical direction (Z direction) of the substrate. As shown in Figure 3, thermal conductivity varies depending on the surface orientation of the substrate. In such a situation, it is difficult to reproduce actual thermal conductivity using the 45-degree method.

[0035] Furthermore, as shown in Figure 3, thermal conductivity is temperature dependent, and as the temperature rises, the thermal conductivity decreases. This means that, for example, the thermal resistance changes significantly between 25°C (room temperature) and 100°C, and indicates that when the amount of heat generated is the same, the temperature rises more at 100°C.

[0036] When the ambient temperature of the module is extremely wide, for example from -50°C to 150°C, the thermal conductivity may differ by about twice between low-temperature and high-temperature conditions. Therefore, in such cases, the 45-degree method, which has a constant thermal conductivity, reduces the accuracy of thermal resistance calculations, making it difficult to create a highly accurate model.

[0037] Furthermore, the plane orientation dependency and temperature dependency of thermal conductivity also differ depending on the substrate material used. The substrate material is not limited to semiconductor materials such as Si, GaAs, GaN, SiC, Ga2O3, or diamond, but may also include any material such as die bond materials such as AuSn or Ag, package resins such as molds, substrates such as PCBs or glass, or materials related to modules in general that use semiconductors, such as shields, wires, leads, or graphite sheets. Note that semiconductor materials such as GaN, SiC, Ga2O3, or diamond are extremely effective materials for wide bandgap semiconductors used in high-power applications. Then, in the thermal analysis implementation unit 1011, if at least one of the plane orientation dependency or temperature dependency of the thermal conductivity of these materials can be grasped, it is possible to perform a thermal analysis simulation that takes into account at least one of the plane orientation dependency and temperature dependency.

[0038] Next, the substrate structure (substrate thickness) of the module will be described.

[0039] FIG. 4 is a diagram showing an example of the configuration of an 8-finger transistor cell 2 with an ISV structure. The 8-finger transistor cell 2 with an ISV structure shown in FIG. 4 includes a gate electrode 201, a drain electrode 202, and source electrode vias 203-1, 203-2, 203-3, 203-4, and 203-5.

[0040] FIG. 5 is a diagram showing an example of the configuration of an 8-finger transistor cell 3 with a Side Via structure. 5 includes a gate electrode 301, a drain electrode 302, source electrode vias 303-1 and 303-2, and a bridge 304. The bridge 304 is used to connect the source electrode vias 303-1 and 303-2, and is configured, for example, with an air bridge structure.

[0041] The 8-finger transistor cell 2 with an ISV structure shown in Figure 4 and the 8-finger transistor cell 3 with a Side Via structure shown in Figure 5 both have the same total gate electrode width, but the transistor cells are significantly different. This is because the via shape must be changed depending on the substrate thickness. The substrate thickness affects the difficulty of chip mounting. As such, it is expected that both the ISV structure, which has good characteristics but a thin substrate thickness, i.e., which makes mounting more difficult, and the Side Via structure, which has a thick substrate thickness, will be used as substrate structures.

[0042] Next, the difference in thermal resistance between a transistor cell with an ISV structure and a transistor cell with a Side Via structure will be described. FIG. 6 is a diagram illustrating an example of the relationship between thermal resistance and heat generation amount. In FIG. 6, reference numeral 21 indicates the results of a thermal analysis simulation for a transistor cell with an ISV structure, and reference numeral 22 indicates the results of a thermal analysis simulation for a transistor cell with a Side Via structure. As shown in FIG. 6, it can be seen that the thermal resistance in a transistor cell with an ISV structure is lower than the thermal resistance in a transistor cell with a Side Via structure.

[0043] Furthermore, as shown in Figure 6, it can be seen that the thermal resistance of both the ISV structure transistor cell and the Side Via structure transistor cell increases as the amount of heat generated increases. This result appears when a thermal analysis simulation is performed that takes into account the temperature dependence of thermal conductivity, and is difficult to reproduce in a thermal analysis simulation that does not include temperature dependence.

[0044] Next, the factors that cause the difference in thermal resistance between a transistor cell with an ISV structure and a transistor cell with a Side Via structure will be described. Fig. 7 is a diagram showing an example of the configuration of a four-finger transistor cell, which corresponds to a cross-sectional view of the ISV structure transistor cell 2 shown in Fig. 4 and the Side Via structure transistor cell 3 shown in Fig. 5 cut along the X-axis. The four-finger transistor cell shown in Fig. 7 includes gate electrodes 401-1, 401-2, 401-3, and 401-4, drain electrodes 402-1 and 402-2, source electrodes 403-1, 403-2, and 403-3, and a solid backside GND 404. In Fig. 7, the heat spread indicated by the solid lines is assumed to be in the 45-degree angle for the sake of simplicity. The heat source is located between gate electrodes 401-1, 401-2, 401-3, and 401-4 and drain electrodes 402-1 and 402-2, where the electric field is high.

[0045] 7, when the width of drain electrodes 402-1 and 402-2 is sufficiently small compared to the substrate thickness, interference points (thermal interference points) occur in the spread of heat, as indicated by reference numerals 405-1 and 405-3. Similarly, when the width of source electrode 403-2 is sufficiently small compared to the substrate thickness, interference points (thermal interference points) occur in the spread of heat, as indicated by reference numeral 405-2. When such thermal interference points occur, thermal conduction deteriorates, resulting in increased thermal resistance.

[0046] As mentioned above, the source electrode width and drain electrode width are important parameters for thermal resistance. In a Side Via structure, the source electrode width must be narrower than in an ISV structure, which tends to increase thermal resistance. The reason for narrowing the source electrode width in a Side Via structure is to reduce source inductance. Source inductance is a factor that degrades high-frequency characteristics, and there is a trade-off between thermal resistance and source inductance when it comes to source electrode width.

[0047] Next, the influence of the drain electrode width on the thermal resistance will be described. FIG. 8 is a diagram showing an example of the relationship between the thermal resistance and the drain electrode width. Figure 8 shows the results of a thermal analysis simulation performed on a transistor cell with an ISV structure. Reference numeral 31 indicates the results of a thermal analysis simulation performed on a transistor cell with a conventional ISV structure and a thin substrate, while reference numeral 32 indicates the results of a thermal analysis simulation performed on an ISV transistor with a substrate thickness equivalent to a side via structure, i.e., a thick substrate. The drain electrode width is sometimes expressed as the gate-gate spacing, which is the distance between the centers of the gate electrodes. In the case of an ISV structure, the source electrode width is usually set to the minimum width that allows for via formation, but this is not always the case; widening the source electrode width can also be effective in reducing thermal resistance.

[0048] As shown in Fig. 8, it can be seen that the thermal resistance decreases as the drain electrode width increases. This is because the thermal interference points 405-1, 405-2, and 405-3 in Fig. 7 move closer to the backside solid GND 404 as the drain electrode width increases.

[0049] 8, it can be seen that the thermal resistance of the thinner substrate indicated by reference numeral 31 is smaller than the thermal resistance of the thicker substrate indicated by reference numeral 32. This is because thinner substrates have fewer paths for heat to pass through, resulting in lower thermal resistance.

[0050] As mentioned above, thermal resistance varies due to various factors, not just temperature and surface orientation. To create a model that accurately reproduces these, a thermal learning model is essential, which takes various factors as input and outputs temperature-related parameters such as thermal resistance.

[0051] FIG. 9 is a diagram illustrating an example of the configuration of a thermal learning model using a neural network. 9 includes input units 501-1, 501-2, 501-3, and 501-4, and an output unit 502. Here, hyperparameters such as the number of layers, the number of nodes in each layer, the learning rate, the maximum number of epochs, and the activation function are all arbitrary values.

[0052] The thermal learning model does not necessarily have to be a neural network, but may be anything that can model a thermal analysis simulation, such as a model based on physical equations.

[0053] Input units 501-1, 501-2, 501-3, and 501-4 shown in FIG. 9 input parameters such as the module drain electrode width and substrate thickness in addition to the module environmental temperature and heat generation amount. The output unit 502 outputs, for example, the thermal resistance of the module as an output parameter.

[0054] In addition, the thermal learning model creation unit 102 can create a thermal learning model such as that shown in Figure 9 by using the thermal analysis conditions and results of the thermal analysis in the thermal analysis implementation unit 1011 as supervised data for the input parameters and output parameters in the neural network.

[0055] The above-mentioned input parameters and output parameters are merely examples, and are not limiting. The input parameters may be any parameters that have a fluctuation factor.

[0056] Furthermore, the input parameters may be parameters relating to the transistor layout, such as the width of a single gate electrode or the number of fingers, in addition to the drain electrode width and substrate thickness. The input parameters are not limited to semiconductor materials such as Si, GaAs, GaN, SiC, Ga2O3, or diamond, but may also include die bond materials such as AuSn or Ag, package resins such as molds, substrates such as PCBs or glass, or materials related to modules in general that use semiconductors, such as shields, wires, leads, or graphite sheets.

[0057] The output parameter may be any general temperature parameter, and is not limited to thermal resistance, and may be the maximum temperature of a heat generating part or the average temperature within a certain range.

[0058] 9 is used to create a transistor model, this thermal learning model is converted into an analog model thermal learning model by the conversion unit 103. For example, Verilog-A used in this conversion unit 103 is a language for defining analog models, and can be converted on Python.

[0059] FIG. 10 is a diagram illustrating an example of the configuration of a transistor model. The transistor model shown in FIG. 10 includes a thermal resistance terminal 601 and a variation parameter 602 .

[0060] A thermal resistance, which is an output parameter of the thermal learning model, is input to a thermal resistance terminal 601 .

[0061] 10, the single gate electrode width (Wgu), number of fingers (Finger), substrate thickness (Subt), ambient temperature (Tamb), and gate-gate spacing (Lgg) are shown as variation parameters 602. The amplifier designer can set the values ​​of these parameters, and the thermal resistance value varies depending on the value. The variation parameters 602 described above are just an example, and any parameter that can be used as an input parameter for the thermal learning model can be used.

[0062] A transistor receives RF (radio frequency) power, amplifies it, and outputs it. A portion of the power is converted into heat and output as heat. The amount of heat generated is expressed as the product of the DC component current and voltage of the RF power input to the transistor. Therefore, the transistor model creation unit 104 may create a transistor model that has a function of calculating the product of the current and voltage of the DC component of the RF power input to this transistor. The value calculated by this transistor model may then be input as the heat generation amount to the thermal learning model of the transistor model. This improves the accuracy of temperature parameters, which have conventionally been optimized only at the maximum output point, even in the case of small signals, contributing to improving the accuracy of the transistor model.

[0063] In the above explanation, the learning device 1 creates a model using the learning data obtained by the thermal analysis implementation unit 1011 of the learning data acquisition unit 101 and outputs data representing the model to an external device, but the same applies when the learning device 1 uses the learning data obtained by the actual measurement data acquisition unit 1012 of the learning data acquisition unit 101.

[0064] Next, an inference device 7 that performs inference processing using the thermal learning model or transistor model obtained by the learning device 1 will be described with reference to FIG. The inference device 7 includes a data acquisition unit 701 and an inference unit 702, as shown in FIG.

[0065] The data acquisition unit 701 acquires the thermal analysis conditions as input parameters. These thermal analysis conditions are the same as the thermal analysis conditions used in the learning device 1. For example, the data acquisition unit 701 acquires the thermal analysis conditions as input parameters in response to a user operation.

[0066] The inference unit 702 inputs the input parameters acquired by the data acquisition unit 701 into the thermal learning model created by the learning device 1, and acquires the temperature parameters related to the module output from the thermal learning model. When a transistor model is created by the learning device 1, the inference unit 702 inputs the input parameters acquired by the data acquisition unit 701 into the thermal learning model of the transistor model.

[0067] Next, an example of the operation of the inference device 7 according to the first embodiment shown in FIG. 11 will be described with reference to FIG. In the inference device 7 according to the first embodiment shown in FIG. 11, first, as shown in FIG. 12, the data acquisition unit 701 acquires the conditions of the thermal analysis as input parameters (step ST201).

[0068] Next, the inference unit 702 inputs the input parameters acquired by the data acquisition unit 701 into the thermal learning model created by the learning device 1, and acquires the temperature parameters related to the module output from the thermal learning model (step ST202).

[0069] As described above, according to this embodiment 1, the learning device 1 includes a learning data acquisition unit 101 that acquires input parameters which are multiple environmental temperatures and heat values ​​of a module, and output parameters which are temperature parameters related to the module taking into account the temperature dependency on the input parameters, and a thermal learning model creation unit 102 that creates a thermal learning model that inputs the environmental temperatures and heat values ​​of the module as input parameters and outputs the temperature parameters related to the module as output parameters based on the results acquired by the learning data acquisition unit 101. Furthermore, according to this embodiment 1, the learning data acquisition unit 101 uses a CAD capable of thermal analysis simulation, and performs thermal analysis using multiple environmental temperatures and heat generation amounts of the module as input parameters, thereby obtaining temperature parameters for the module as output parameters, taking into account the temperature dependency on the input parameters. Furthermore, according to the first embodiment, the CAD is capable of performing a thermal analysis simulation that includes temperature dependency of material property values. Moreover, according to the first embodiment, the CAD is capable of performing a thermal analysis simulation that includes plane orientation dependency for material property values. Furthermore, according to the first embodiment, the thermal learning model is configured by a neural network. Furthermore, according to the first embodiment, the output parameter obtained by the learning data acquiring unit 101 and the thermal learning model is the thermal resistance of the module. As a result, the learning device 1 according to embodiment 1 can achieve a thermal learning model with higher accuracy than conventional models. That is, the learning device 1 according to embodiment 1 can obtain a thermal learning model that takes into account the temperature dependency of thermal conductivity, thereby achieving a thermal learning model with higher accuracy than conventional models.

[0070] Furthermore, according to the first embodiment, at least one of the substrate material and the substrate structure of the module is added as an input parameter used in the learning data acquiring unit 101 and the thermal learning model. As a result, the learning device 1 of embodiment 1 can obtain a thermal learning model that further takes into account at least one of the module's substrate material and substrate structure, making it possible to achieve a thermal learning model with higher accuracy than conventional models.

[0071] Furthermore, according to this embodiment 1, the learning device 1 includes a conversion unit 103 that converts a thermal learning model into an analog model thermal learning model, and a transistor model creation unit 104 that creates a transistor model that incorporates the analog model thermal learning model obtained by the conversion unit 103. As a result, the learning device 1 according to embodiment 1 can achieve a transistor model with higher accuracy than conventional models. That is, the learning device 1 according to embodiment 1 can obtain a transistor model that takes into account the temperature dependence of thermal conductivity, thereby achieving a transistor model with higher accuracy than conventional models.

[0072] Furthermore, according to the first embodiment, the board structure, which is at least one of the module layout and the board thickness, is added as an input parameter used in the learning data acquiring unit 101 and the thermal learning model. As a result, the learning device 1 according to the first embodiment can obtain a transistor model that also takes into account at least one of the module layout and the substrate thickness, thereby realizing a transistor model with higher accuracy than conventional models.

[0073] Furthermore, according to this embodiment 1, the transistor model creation unit 104 creates a transistor model having the function of calculating the product of the current and voltage of the DC component in the high-frequency power input to the transistor, and inputs the value calculated by the transistor model into the thermal learning model as the heat generation amount. As a result, the learning device 1 according to the first embodiment has improved accuracy even in the case of small signals, and can achieve a transistor model with higher accuracy than conventional models.

[0074] Furthermore, according to this embodiment 1, the inference device 7 includes a data acquisition unit 701 that acquires input parameters, and an inference unit 702 that inputs the input parameters acquired by the data acquisition unit 701 into a thermal learning model and acquires temperature parameters related to the module output from the thermal learning model. As a result, the inference device 7 according to the first embodiment is able to perform calculations with higher accuracy than conventional methods. That is, the inference device 7 according to the first embodiment uses a model that takes into account the temperature dependency of thermal conductivity, thereby enabling calculations with higher accuracy than conventional methods.

[0075] Furthermore, according to this embodiment 1, the learning method includes a step in which the learning data acquisition unit 101 acquires input parameters which are multiple environmental temperatures and heat generation amounts of the module, and output parameters which are temperature parameters related to the module taking into account the temperature dependency on the input parameters, and a step in which the thermal learning model creation unit 102 creates a thermal learning model based on the results acquired by the learning data acquisition unit 101, which inputs the environmental temperatures and heat generation amounts of the module as input parameters and outputs the temperature parameters related to the module as output parameters. As a result, the learning method according to the first embodiment makes it possible to obtain a thermal learning model with higher accuracy than conventional methods. That is, the learning method according to the first embodiment makes it possible to obtain a thermal learning model that takes into account the temperature dependency of thermal conductivity, thereby realizing a thermal learning model with higher accuracy than conventional methods.

[0076] Furthermore, according to this embodiment 1, the inference method includes a step in which a data acquisition unit 701 acquires input parameters, and a step in which an inference unit 702 inputs the input parameters acquired by the data acquisition unit 701 into a thermal learning model described in claim 17 and acquires temperature parameters related to the module output from the thermal learning model. As a result, the inference method according to the first embodiment enables calculations with higher accuracy than conventional methods. That is, the inference method according to the first embodiment uses a model that takes into account the temperature dependency of thermal conductivity, thereby enabling calculations with higher accuracy than conventional methods.

[0077] Furthermore, according to the first embodiment, the learning program causes the computer to function as the learning device. As a result, the learning program according to embodiment 1 enables the thermal learning model to be more accurate than conventional ones. That is, the learning program according to embodiment 1 can obtain a thermal learning model that takes into account the temperature dependency of thermal conductivity, thereby realizing a thermal learning model with higher accuracy than conventional ones.

[0078] Furthermore, according to the first embodiment, the inference program causes a computer to function as the inference device described above. As a result, the inference program according to the first embodiment enables calculations with higher accuracy than conventional methods. That is, the inference program according to the first embodiment uses a model that takes into account the temperature dependency of thermal conductivity, enabling calculations with higher accuracy than conventional methods.

[0079] Embodiment 2 In the first embodiment, the case where the environmental temperature of the module, the amount of heat generated, the substrate material, and the substrate structure are used as input parameters has been described, but these are parameters in a steady state. On the other hand, high frequency modules for wireless communication or radar applications typically perform modulated wave operation or pulse operation. Therefore, in the second embodiment, a thermal learning model applicable to pulse operation will be described.

[0080] In the learning data acquiring unit 101 and the thermal learning model in the learning device 1 according to the second embodiment, the duty ratio and pulse width of the module are added as input parameters in addition to the ambient temperature and heat generation amount of the module. The duty ratio and pulse width of the module are the duty ratio and pulse width of the RF power input to the module. In addition to the above, other parameters shown in the first embodiment may also be added as input parameters. Furthermore, in the data acquisition unit 701 and the inference unit 702 in the inference device 7 according to the second embodiment, the duty ratio and pulse width of the module are added as input parameters in addition to the ambient temperature and heat generation amount of the module. Furthermore, other parameters shown in the first embodiment may be added as input parameters in addition to the above.

[0081] FIG. 13 is a diagram showing an example of the relationship between the temperature and the pulse width when the duty ratio is changed. 13, reference numeral 41 indicates a waveform in the case of a high duty cycle, reference numeral 42 indicates a waveform in the case of a medium duty cycle, and reference numeral 43 indicates a waveform in the case of a low duty cycle. For example, a high duty cycle refers to a duty ratio of about 33%, a medium duty cycle refers to a duty ratio of about 10%, and a low duty cycle refers to a duty ratio of about 2%.

[0082] As shown in Figure 13, it can be seen that the temperature rises as the duty ratio increases. It can also be seen that the temperature tends to rise as the pulse width increases. Note that the characteristics shown in Figure 13 are those at a certain ambient temperature and a certain amount of heat generation.

[0083] As shown in FIG. 13, it is clear that the temperature can be determined if the two conditions of the module duty ratio and pulse width are known at a certain ambient temperature and heat generation amount. Therefore, by adding the module duty ratio and pulse width as input parameters to the thermal learning model shown in embodiment 1, it becomes possible to model transient temperature changes, and transient responses can also be applied to the transistor model shown in embodiment 1.

[0084] FIG. 14 is a diagram illustrating a configuration example of a thermal learning model of a neural network according to the second embodiment. The thermal learning model of the neural network according to the second embodiment shown in FIG. 14 includes input units 501b-1, 501b-2, 501b-3, and 501b-4, and an output unit 502b. 14, in order to accurately calculate the thermal resistance (Zth) during pulse operation of the module, the input parameters required are the module ambient temperature (Tamb) and heat generation amount (Pdiss), as well as the duty ratio and pulse width. These parameters are the minimum required input parameters, and other parameters described in the first embodiment can also be used as input parameters.

[0085] In FIG. 14, the output parameter is the thermal resistance (Zth) during pulse operation of the module, but it is not limited to this and other parameters related to heat such as temperature can also be added.

[0086] Next, we will discuss the effect of applying transient response to the thermal learning model. FIG. 15 is a diagram showing an example of a transient change in output power during pulse operation. As shown in Figure 15, immediately after a large amount of power is input to the transistor, the temperature gradually rises, causing the output power to change transiently, as indicated by the reference numeral 51. Therefore, by using a transistor model that is adapted to the transient response, it is possible to accurately model this characteristic. While Figure 15 shows a single pulse, it can also be applied to cases where there are multiple pulses.

[0087] The transistor model using the pulse shown in Figure 15 is extremely useful, for example, in the field of communications. The change in output power indicated by reference numeral 52 in Figure 15 is the time change in the AM-AM characteristics. A change in the AM-AM characteristics indicates a deterioration in distortion characteristics, which means that the time response of the distortion characteristics of a transistor can be modeled with high accuracy.

[0088] As described above, according to the second embodiment, the duty ratio and pulse width of the module are added as input parameters used in the learning data acquiring unit 101 and the thermal learning model. As a result, in the learning device 1 according to the second embodiment, it is possible to obtain a model that can be applied to pulse operations, in contrast to the first embodiment.

[0089] Embodiment 3 In the first and second embodiments, the case where the target transistor is a single-cell transistor is described. However, the transistor is not limited to this. For example, a high-power amplifier using GaN or the like often has a multi-cell transistor. Therefore, in the third embodiment, a transistor model applicable to a multi-cell transistor assumed for a high-power amplifier will be described.

[0090] In the learning data acquiring unit 101 and the thermal learning model in the learning device 1 according to the third embodiment, the number of transistor cells and the cell spacing are added as input parameters in addition to the ambient temperature and heat generation amount of the module. In addition to the above, at least one of the other parameters shown in the first embodiment or the parameters shown in the second embodiment (duty ratio and pulse width) may be added as input parameters. Furthermore, in the data acquisition unit 701 and the inference unit 702 in the inference device 7 according to the third embodiment, the number of transistor cells and the cell spacing are added as input parameters in addition to the ambient temperature and heat generation value of the module. In addition to the above, at least one or more of the other parameters shown in the first embodiment or the parameters shown in the second embodiment (duty ratio and pulse width) may be added as input parameters.

[0091] FIG. 16 is a diagram showing an example of the configuration of a four-cell transistor. 16 includes transistor cells 801-1, 801-2, 801-3, and 801-4. Reference numerals 802-1, 802-2, and 802-3 indicate the cell spacing. Note that a matching circuit is connected to the amplifier, but is not shown in the figure as it is irrelevant to this description.

[0092] In a multi-cell transistor, important parameters that affect the thermal resistance are the number of cells of the transistor that generate heat and the cell spacing. That is, when the cell spacing is narrow, the heat rises due to the occurrence of the thermal interference points shown in Fig. 7. Furthermore, when the cell spacings 802-1, 802-2, and 802-3 are equal, the temperature of the transistor cells near the center rises due to the influence of the thermal interference points.

[0093] FIG. 17 is a diagram illustrating a configuration example of a thermal learning model of a neural network according to the third embodiment. The thermal learning model of the neural network according to the third embodiment shown in FIG. 17 includes input units 501c-1, 501c-2, 501c-3, and 501c-4, and output units 502c-1, 502c-2, 502c-3, and 502c-4. 17, to accurately calculate the thermal resistance (Rth) of a multi-cell transistor, the number of transistor cells (cells) and the cell spacing (cell pitch) are required as input parameters in addition to the module ambient temperature (Tamb) and heat generation (Pdiss). These parameters are the minimum required input parameters, and it is also possible to use at least one of the other parameters shown in the first embodiment or the parameters shown in the second embodiment (duty ratio and pulse width) as input parameters.

[0094] In the case of a multi-cell transistor, the temperature may differ for each of the transistor cells 131-1, 131-2, 131-3, and 131-4. In such cases, the thermal learning model can be used to obtain the thermal resistance for each transistor cell, and the obtained data can be applied to the transistor model to achieve high accuracy. In addition, while it has been described above that when each transistor cell has a different temperature, it is possible to calculate the thermal resistance for each transistor cell using the thermal learning model, and when each finger of a transistor cell has a different temperature, it is also possible to calculate the thermal resistance for each finger using the thermal learning model.

[0095] In FIG. 17, the output parameter is the thermal resistance (Rth) of each transistor cell, but it is not limited to this and other parameters related to heat such as temperature, for example, the thermal resistance (Zth) of the transient response, can also be added.

[0096] As described above, according to the third embodiment, the number of transistor cells and the cell spacing are added as input parameters used in the learning data acquiring unit 101 and the thermal learning model. Furthermore, according to the third embodiment, the output parameter obtained by the learning data acquiring unit 101 and the thermal learning model is the thermal resistance of each transistor cell. As a result, in the learning device 1 according to the third embodiment, it is possible to obtain a model that can be applied to multi-cell transistors, unlike the first and second embodiments.

[0097] Embodiment 4 In the first to third embodiments, the target transistor is a single stage of an amplifier. However, amplifiers often have a multi-stage configuration to increase gain. In a multi-stage configuration, for example, thermal interference may occur depending on the spacing between the second and third stage transistors, and the temperature rise may not be reproduced using only the transistor models described so far. Therefore, in the fourth embodiment, a transistor model applicable to multi-stage transistors assuming a high-gain amplifier will be described.

[0098] In the learning data acquiring unit 101 and the thermal learning model in the learning device 1 according to the fourth embodiment, the transistor spacing is added as an input parameter in addition to the ambient temperature and heat generation amount of the module. In addition to the above, at least one of the other parameters shown in the first embodiment, the parameters shown in the second embodiment (duty ratio and pulse width), and the parameters shown in the third embodiment (number of cells and cell spacing) may be added as an input parameter. Furthermore, in the data acquisition unit 701 and the inference unit 702 in the inference device 7 according to the fourth embodiment, the transistor spacing is added as an input parameter in addition to the ambient temperature and heat generation of the module. In addition to the above, at least one of the other parameters shown in the first embodiment, the parameters shown in the second embodiment (duty ratio and pulse width), and the parameters shown in the third embodiment (number of cells and cell spacing) may be added as an input parameter.

[0099] FIG. 18 is a diagram showing an example of the configuration of an amplifier using multiple stages of transistors. 18 includes an RF power input terminal 901, an RF power output terminal 902, a first-stage transistor 903-1, a second-stage transistor 903-2, a third-stage transistor 903-3, an input matching circuit 904, a first-to-second stage matching circuit 905, a second-to-third stage matching circuit 906, an output matching circuit 907, and a solid backside GND 908. Reference numeral 909 denotes a thermal interference point.

[0100] In the example of FIG. 18, depending on the distance between the second-stage transistor 903-2 and the third-stage transistor 903-3, thermal interference occurs, increasing the thermal resistance and causing a rise in temperature.

[0101] FIG. 19 is a diagram illustrating a configuration example of a thermal learning model of a neural network according to the fourth embodiment. The thermal learning model of the neural network according to the fourth embodiment shown in FIG. 19 includes input units 501d-1, 501d-2, and 501d-3, and output units 502d-1, 502d-2, and 502d-3. 19, to accurately calculate the thermal resistance (Rth(FET)) of an amplifier using multiple transistor stages, the module ambient temperature (Tamb), heat generation (Pdiss), and the spacing between transistors (FETs) are required as input parameters. These parameters are the minimum required input parameters, and it is also possible to use at least one of the other parameters shown in the first embodiment, the parameters shown in the second embodiment (duty ratio and pulse width), and the parameters shown in the third embodiment (number of cells and cell spacing) as input parameters.

[0102] In addition, in the case of an amplifier using multiple stages of transistors, the temperature may differ for each of the transistors 803-1, 803-2, and 803-3 (FET1, FET2, and FET3). In such cases, the thermal learning model can be used to calculate the thermal resistance for each of the transistors 803-1, 803-2, and 803-3, and then the calculation can be applied to the transistor model to improve accuracy. In addition, for example, the third-stage transistor may be a multi-cell transistor. In that case, as in the third embodiment, the thermal learning model can be used to calculate the thermal resistance of each transistor cell, and the calculation can be applied to the transistor model to improve accuracy.

[0103] In FIG. 19, the output parameter is the thermal resistance (Rth) of each transistor, but it is not limited to this, and it is also possible to add a parameter related to heat such as temperature, for example, the thermal resistance (Zth) of the transient response.

[0104] As described above, according to the fourth embodiment, the transistor spacing is added as an input parameter used in the learning data acquiring unit 101 and the thermal learning model. As a result, in the learning device 1 according to the fourth embodiment, it is possible to obtain a model that can be applied to multiple stages of transistors, in contrast to the first to third embodiments.

[0105] As described in the first to fourth embodiments, the learning device 1 can create a highly accurate transistor model by taking into account the temperature dependency of thermal conductivity. As a result, in the first to fourth embodiments, the transistor model can accurately reproduce temperature, enabling accurate lifetime estimation during design. That is, the transistor model creation unit 104 in embodiments 1-4 can create a transistor model that has the function of calculating the lifetime of a transistor, for example, by Miner's rule, based on the thermal resistance output from the thermal learning model.

[0106] FIG. 20 is a diagram showing an example of the relationship between time and temperature in a life curve. As shown in Figure 20, the lifetime curve indicated by reference numeral 61 shows that the higher the temperature, the shorter the continuation time. For example, if the lifetime at temperature T1 is N1, continuing that state for n1 hours means that n1 / N1 of the lifetime will be consumed, meaning that the lifetime will end when it reaches 1. When this is applied to multiple temperatures, it can be expressed by the following equation (1). n1 / N1+n2 / N2+n3 / N3+n4 / N4+n5 / N5+=Σ(ni / Ni)=1 (1)

[0107] In this way, by using a transistor model that employs the thermal learning model shown in embodiments 1-4, it becomes possible to reproduce the temperature with high accuracy, and it becomes possible to estimate the lifetime with high accuracy during design.

[0108] Finally, examples of the hardware configurations of the learning device 1 and the inference device 7 according to embodiments 1-4 will be described with reference to Fig. 21. Below, examples of the hardware configurations of the learning device 1 according to embodiments 1-4 will be described, but the same applies to the hardware of the inference device 7 according to embodiments 1-4. The functions of the learning data acquisition unit 101, the thermal learning model creation unit 102, the conversion unit 103, and the transistor model creation unit 104 in the learning device 1 are realized by a processing circuit 1001. The processing circuit 1001 may be dedicated hardware as shown in FIG. 21A, or may be a CPU (also referred to as a central processing unit, processing unit, arithmetic unit, microprocessor, microcomputer, processor, or DSP (Digital Signal Processor)) 1002 that executes a program stored in memory 1003 as shown in FIG. 21B.

[0109] When the processing circuit 1001 is dedicated hardware, the processing circuit 1001 corresponds to, for example, a single circuit, a composite circuit, a programmed processor, a parallel programmed processor, an ASIC (Application Specific Integrated Circuit), an FPGA (Field Programmable Gate Array), or a combination thereof. The functions of each of the learning data acquisition unit 101, the thermal learning model creation unit 102, the conversion unit 103, and the transistor model creation unit 104 may be realized individually by the processing circuit 1001, or the functions of each unit may be realized collectively by the processing circuit 1001.

[0110] When the processing circuit 1001 is a CPU 1002, the functions of the learning data acquisition unit 101, the thermal learning model creation unit 102, the conversion unit 103, and the transistor model creation unit 104 are realized by software, firmware, or a combination of software and firmware. The software and firmware are written as programs and stored in the memory 1003. The processing circuit 1001 realizes the functions of each unit by reading and executing the programs stored in the memory 1003. That is, the learning device 1 includes the memory 1003 for storing a program that, when executed by the processing circuit 1001, results in the execution of, for example, each step shown in FIG. 2. Furthermore, these programs can also be said to cause a computer to execute the procedures and methods of the learning data acquisition unit 101, the thermal learning model creation unit 102, the conversion unit 103, and the transistor model creation unit 104. Here, examples of memory 1003 include non-volatile or volatile semiconductor memory such as RAM (Random Access Memory), ROM (Read Only Memory), flash memory, EPROM (Erasable Programmable ROM), EEPROM (Electrically EPROM), magnetic disk, flexible disk, optical disk, compact disk, mini disk, or DVD (Digital Versatile Disc).

[0111] It is also possible to realize some of the functions of the learning data acquisition unit 101, the thermal learning model creation unit 102, the conversion unit 103, and the transistor model creation unit 104 with dedicated hardware and some with software or firmware. For example, the function of the learning data acquisition unit 101 can be realized by a processing circuit 1001 as dedicated hardware, and the functions of the thermal learning model creation unit 102, the conversion unit 103, and the transistor model creation unit 104 can be realized by the processing circuit 1001 reading and executing programs stored in a memory 1003.

[0112] In this way, the processing circuit 1001 can realize each of the above-described functions by hardware, software, firmware, or a combination of these.

[0113] It should be noted that the embodiments may be freely combined, or any of the components in each embodiment may be modified, or any of the components in each embodiment may be omitted. [Industrial Applicability]

[0114] The learning device according to the present disclosure enables models to be more accurate than before, and is suitable for use in learning devices and the like. [Explanation of symbols]

[0115] 1 Learning device, 2, 3 Transistor cell, 7 Inference device, 101 Learning data acquisition unit, 102 Thermal learning model creation unit, 103 Conversion unit, 104 Transistor model creation unit, 201 Gate electrode, 202 Drain electrode, 203-1, 203-2, 203-3, 203-4, 203-5 Source electrode via, 301 Gate electrode, 302 Drain electrode, 303-1, 303-2 Source electrode via, 304 Bridge, 401-1, 401-2, 401-3, 401-4 Gate electrode, 402-1, 402-2 Drain electrode, 403-1, 403-2, 403-3 Source electrode, 404 Back surface solid GND, 405-1, 405-2, 405-3 Thermal interference points, 501-1, 501-2, 501-3, 501-4, 501b-1, 501b-2, 501b-3, 501b-4, 501c-1, 501c-2, 501c-3, 501c-4, 501d-1, 501d-2, 501d-3 Input section, 502, 502b, 502c-1, 502c-2, 502c-3, 502c-4, 502d-1, 502d-2, 502d-3 Output section, 601 Thermal resistance terminal, 602 Variable parameters, 701 Data acquisition section, 702 Inference section, 801-1, 801-2, 801-3, 801-4 Transistor cells, 802-1, 802-2, 802-3 Cell spacing, 901 input terminal, 902 output terminal, 903-1, 903-2, 903-3 transistor, 904 input matching circuit, 905 1st-2nd stage matching circuit, 906 2nd-3rd stage matching circuit, 907 output matching circuit, 908 backside ground, 909 thermal interference point, 1001 processing circuit, 1002 CPU, 1003 memory, 1011 thermal analysis execution unit, 1012 actual measurement data acquisition unit.

Claims

1. a learning data acquisition unit that acquires input parameters that are a plurality of environmental temperatures and heat values ​​of the module, and output parameters that are temperature parameters related to the module in consideration of the temperature dependency of the input parameters; a thermal learning model creation unit that creates a thermal learning model based on the results acquired by the learning data acquisition unit, by inputting the environmental temperature and heat generation amount of the module as input parameters and outputting temperature parameters related to the module as output parameters; A conversion unit that converts the thermal learning model into an analog model of the thermal learning model; a transistor model creation unit that creates a transistor model incorporating a thermal learning model of the analog model obtained by the conversion unit; A learning device equipped with

2. At least one of a substrate material and a substrate structure of a module is added as an input parameter used in the learning data acquisition unit and the thermal learning model.

2. The learning device according to claim 1.

3. The module duty ratio and pulse width are added as input parameters used in the learning data acquisition unit and the thermal learning model.

2. The learning device according to claim 1.

4. The learning data acquisition unit uses a CAD capable of thermal analysis simulation, and performs thermal analysis using a plurality of environmental temperatures and heat values ​​of the module as input parameters, thereby obtaining temperature parameters for the module in consideration of temperature dependency on the input parameters as output parameters.

2. The learning device according to claim 1.

5. The CAD is capable of performing thermal analysis simulations including temperature dependency of material property values.

5. The learning device according to claim 4.

6. The CAD is capable of performing thermal analysis simulations that include surface orientation dependency for material property values.

5. The learning device according to claim 4.

7. The thermal learning model is constructed by a neural network.

2. The learning device according to claim 1.

8. The output parameter obtained by the learning data acquisition unit and the thermal learning model is the thermal resistance of the module.

2. The learning device according to claim 1.

9. A substrate structure, which is at least one of a module layout and a substrate thickness, is added as an input parameter used in the learning data acquisition unit and the thermal learning model.

2. The learning device according to claim 1.

10. the transistor model creation unit creates a transistor model having a function of calculating the product of a current and a voltage of a DC component in high frequency power input to a transistor; The value calculated by the transistor model is input as the heat generation amount into the thermal learning model.

2. The learning device according to claim 1.

11. The number of transistor cells and the cell spacing are added as input parameters used in the learning data acquisition unit and the thermal learning model.

2. The learning device according to claim 1.

12. The output parameter obtained by the learning data acquisition unit and the thermal learning model is the thermal resistance of each transistor cell.

12. The learning device according to claim 11.

13. The transistor spacing is added as an input parameter used in the learning data acquisition unit and the thermal learning model.

2. The learning device according to claim 1.

14. The transistor model creation unit creates a transistor model having a function of calculating a lifetime of a transistor based on the thermal resistance output from the thermal learning model.

2. The learning device according to claim 1, wherein:

15. a data acquisition unit for acquiring input parameters; an inference unit that inputs the input parameters acquired by the data acquisition unit into the thermal learning model according to any one of claims 1 to 14, and acquires temperature parameters relating to the module output from the thermal learning model; An inference device comprising:

16. a learning data acquiring unit acquiring input parameters, which are a plurality of environmental temperatures and heat values ​​of the module, and output parameters, which are temperature parameters related to the module in consideration of temperature dependency on the input parameters; a step in which a thermal learning model creation unit creates a thermal learning model that inputs an environmental temperature and a heat generation amount of a module as input parameters and outputs a temperature parameter related to the module as an output parameter based on the results acquired by the learning data acquisition unit; A conversion unit converts the thermal learning model into an analog model thermal learning model; a transistor model creation unit creating a transistor model incorporating a thermal learning model of the analog model obtained by the conversion unit; A learning method that has

17. a data acquisition unit acquiring input parameters; an inference unit inputting the input parameters acquired by the data acquisition unit into a thermal learning model according to any one of claims 1 to 14, and acquiring temperature parameters relating to the module output from the thermal learning model; A method of inference having the following structure:

18. A learning program for causing a computer to function as the learning device according to any one of claims 1 to 14.

19. An inference program for causing a computer to function as the inference device according to claim 15.

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