Integrated semiconductor optical device

Abstract

To suppress deterioration of reliability due to stress.SOLUTION: A lamination type semiconductor light element includes: a mesa stripe structure 16 which includes a first part 26 and a second part 28 extending in a first direction D1 in a stripe shape and being arranged at an interval in the first direction D1, includes a third part 30 between the first part 26 and the second part 28, and is formed of a semiconductor; and electrode patterns 34 which each include a first electrode 36 overlapping the first part 26 and not overlapping the second part 28, each include a second electrode 38 overlapping the second part 28 and not overlapping the first part 26, and is formed of a metal in a shape avoiding overlapping the third part 30, the first electrode 36 and the second electrode 38 being separated. The electrode pattern 34 includes an adjacent region 42 which is, on a semiconductor layer 32, adjacent to the third part 30 in a second direction D2 orthogonal to the first direction D1 without overlapping the mesa stripe structure 16.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present disclosure relates to an integrated semiconductor optical device. [Background technology]

[0002] Integrated semiconductor optical devices in which multiple optical functional elements are integrated are known (Patent Documents 1, 2, and 3). The optical functional elements include a semiconductor layer and metal electrodes on the semiconductor layer. Each electrode is independent so that the optical functional elements can operate independently. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2002-280662 [Patent Document 2] Japanese Patent Application Laid-Open No. 2002-324936 [Patent Document 3] Japanese Patent Application Laid-Open No. 2017-157583 Summary of the Invention [Problem to be solved by the invention]

[0004] During the process of forming electrodes, stress is applied to the semiconductor layer due to temperature changes caused by the difference in thermal expansion coefficients between metal and semiconductor. During the process of mounting electrodes to the submount, stress is applied to the semiconductor layer due to temperature changes caused by the difference in thermal expansion coefficients between the connecting solder and semiconductor.

[0005] In the region sandwiched between the pair of electrodes (region without electrodes), the semiconductor layer does not experience stress due to the difference in thermal expansion coefficients, but it is affected by the stress generated directly below the pair of electrodes. For example, compressive stress generated directly below the pair of electrodes can generate expansion (tensile) stress. The coexistence of such compressed and expanded regions can lead to a decrease in characteristics, such as uneven spacing of the diffraction grating.

[0006] The present disclosure aims to suppress deterioration of reliability due to stress. [Means for solving the problem]

[0007] The integrated semiconductor optical device has a mesa stripe structure made of semiconductor, extending in a stripe shape in a first direction and having a first portion and a second portion spaced apart in the first direction, and a third portion between the first portion and the second portion, and includes a first electrode overlapping the first portion but not overlapping the second portion, and a second electrode overlapping the second portion but not overlapping the first portion, the first electrode and the second electrode being separated, and an electrode pattern made of metal in a shape that avoids overlapping with the third portion, and the electrode pattern includes an adjacent region on a semiconductor layer that does not overlap the mesa stripe structure and is located next to the third portion in a second direction perpendicular to the first direction. [Brief explanation of the drawings]

[0008] [Figure 1] 1 is a plan view of an integrated semiconductor optical device according to a first embodiment. [Figure 2] 2 is a cross-sectional view taken along line II-II of the integrated semiconductor optical device shown in FIG. [Figure 3] 3 is a cross-sectional view taken along line III-III of the integrated semiconductor optical device shown in FIG. [Figure 4] FIG. 2 is a plan view of a submount on which the semiconductor optical element shown in FIG. 1 is mounted. [Figure 5] 5 is a cross-sectional view of the structure shown in FIG. 4 taken along line VV. [Figure 6] FIG. 10 is a plan view of an integrated semiconductor optical device according to a second embodiment. [Figure 7] FIG. 10 is a plan view of an integrated semiconductor optical device according to a third embodiment. [Figure 8] FIG. 10 is a plan view of an integrated semiconductor optical device according to a fourth embodiment. [Figure 9] FIG. 10 is a plan view of an integrated semiconductor optical device according to a fifth embodiment. [Figure 10] FIG. 10 is a plan view of an integrated semiconductor optical device according to a sixth embodiment. [Figure 11] 11 is a cross-sectional view taken along the line XI-XI of the integrated semiconductor optical device shown in FIG. [Figure 12] 11 is a cross-sectional view taken along line XII-XII of the integrated semiconductor optical device shown in FIG. [Figure 13] FIG. 13 is a plan view of an integrated semiconductor optical device according to a seventh embodiment. [Figure 14] 14 is a cross-sectional view taken along line XIV-XIV of the integrated semiconductor optical device shown in FIG. 13. [Figure 15] 14 is a cross-sectional view taken along the line XV-XV of the integrated semiconductor optical device shown in FIG. 13. FIG. [Figure 16] FIG. 13 is a plan view of an integrated semiconductor optical device according to an eighth embodiment. [Figure 17] FIG. 17 is a plan view of a submount on which the integrated semiconductor optical device shown in FIG. 16 is mounted. [Figure 18] 18 is a cross-sectional view of the structure shown in FIG. 17 taken along line XVIII-XVIII. DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Elements with the same reference numerals in all the drawings have the same or equivalent functions, and their repeated explanation will be omitted. Note that the size of the figures does not necessarily correspond to the magnification.

[0010] [First embodiment] FIG. 1 is a plan view of an integrated semiconductor optical device according to a first embodiment. FIG. 2 is a cross-sectional view of the integrated semiconductor optical device shown in FIG. 1 taken along line II-II. FIG. 3 is a cross-sectional view of the integrated semiconductor optical device shown in FIG. 1 taken along line III-III. The integrated semiconductor optical device has a first optical functional element 12 and a second optical functional element 14 integrated integrally on a substrate 10. A backside electrode 22 is provided on the back side of the substrate 10. The backside electrode 22 is provided in common to the first optical functional element 12 and the second optical functional element 14, but is not limited thereto and may be provided individually.

[0011] [Mesa stripe structure] The integrated semiconductor optical device has a mesa stripe structure 16. The mesa stripe structure 16 extends in a stripe shape in a first direction D1 and is made of semiconductor. The mesa stripe structure 16 forms a waveguide that spans both the first optical functional element 12 and the second optical functional element 14. The first optical functional element 12 includes a first optical functional layer 18, and the second optical functional element 14 includes a second optical functional layer 20.

[0012] The first optical functional layer 18 and the second optical functional layer 20 are each a multi-quantum well (MQW) or bulk semiconductor layer, and are layers that optically function when a voltage is applied (for example, an active layer that emits laser light or an absorption layer that absorbs light in response to voltage), or a passive waveguide. The first optical functional layer 18 and the second optical functional layer 20 are monolithically connected by a BJ (Butt-Joint) structure.

[0013] A cladding layer 24 is disposed on the first optical functional layer 18 and the second optical functional layer 20. The cladding layer 24 may be a continuous, integrated layer, or may be separate layers disposed on the first optical functional layer 18 and the second optical functional layer 20. A contact layer (not shown) may be disposed on the cladding layer 24.

[0014] The mesa stripe structure 16 has a first portion 26 and a second portion 28 that are spaced apart in the first direction D1. The mesa stripe structure 16 has a third portion 30 between the first portion 26 and the second portion 28. The boundary between the first optical functional element 12 and the second optical functional element 14 is at the third portion 30.

[0015] [Semiconductor layer] A semiconductor layer 32 is in contact with the side surface of the mesa stripe structure 16 (FIG. 3). The semiconductor layer 32 is made of a semi-insulating semiconductor, is a buried layer of the mesa stripe structure 16, and forms a BH (Buried Hetero) structure.

[0016] [Electrode pattern] The integrated semiconductor optical device has an electrode pattern 34 (FIG. 1). The electrode pattern 34 is made of metal (for example, Au) in a shape that avoids overlapping with the third portion 30.

[0017] [1st electrode] The electrode pattern 34 includes a first electrode 36 that overlaps the first portion 26 but does not overlap the second portion 28. The first optical functional element 12 includes the first electrode 36 for driving the first optical functional layer 18.

[0018] [Second electrode] The electrode pattern 34 includes a second electrode 38 that overlaps the second portion 28 but does not overlap the first portion 26. The first electrode 36 and the second electrode 38 are separated (electrically insulated). Because the clad layer 24 is commonly provided on the first optical functional layer 18 and the second optical functional layer 20, the second optical functional layer 20 is driven via the second electrode 38, although voltage leakage is not completely eliminated. The voltage applied to the first electrode 36 does not drive the second optical functional layer 20.

[0019] [Third electrode] The electrode pattern 34 includes a third electrode 40 that is separated (electrically insulated) from the first electrode 36 and the second electrode 38. The third electrodes 40 are a right electrode 40R and a left electrode 40L that sandwich the mesa stripe structure 16 in a second direction D2 that is perpendicular to the first direction D1. The right electrode 40R and the left electrode 40L have equal planar sizes. The third electrode 40 is located adjacent to at least a portion (e.g., the entirety) of the first electrode 36 and at least a portion (e.g., the entirety) of the second electrode 38 in the second direction D2. The third electrode 40 is a floating electrode that is not electrically connected to the mesa stripe structure 16.

[0020] Adjacent Regions The electrode pattern 34 includes adjacent regions 42 ( FIG. 1 ). The adjacent regions 42 do not overlap the mesa stripe structure 16. The adjacent regions 42 are located next to the third portion 30 in the second direction D2. The adjacent regions 42 are on the semiconductor layer 32 (buried layer) that is in contact with the mesa stripe structure 16. The adjacent regions 42 are part of the third electrode 40. The adjacent regions 42 are a pair of adjacent regions 42 that sandwich the mesa stripe structure 16.

[0021] [Submount] Fig. 4 is a plan view of a submount on which the semiconductor optical element shown in Fig. 1 is mounted, and Fig. 5 is a cross-sectional view taken along line VV of the structure shown in Fig. 4.

[0022] The integrated semiconductor optical device is mounted junction-up on a submount 44. The submount 44 includes wiring 46, wiring 48, and wiring 50. The back electrode 22 is bonded to the wiring 50 with solder 52. The wiring 50 is connected to a ground potential (not shown). The wiring 46 and the first electrode 36 are connected by a wire 54. The wiring 48 and the second electrode 38 are connected by a wire 56. The wiring 46 and the wiring 48 are connected to an external power supply (not shown).

[0023] [Action and effect] During the process of bonding the integrated semiconductor optical device to the submount 44, the solder 52 is melted by heat and then cooled and solidified. The metal electrode pattern 34 has a higher thermal expansion coefficient than the semiconductor first and second portions 26 and 28. Therefore, after cooling, stress (compressive stress) occurs in the first and second portions 26 and 28. The stress is greatest directly below the edges of the first and second electrodes 36 and 38. The third portion 30, sandwiched between the first and second portions 26 and 28, experiences stress (expansive or tensile stress). However, this stress is offset by the compressive stress occurring in the semiconductor layer 32 beneath the electrode pattern 34 (adjacent region 42) adjacent to the third portion 30. This reduces the reliability degradation due to stress. In particular, the first and second optical functional layers 18 and 20 are in different optical and current densities during operation, so reducing the occurrence of stress is advantageous in terms of reliability and performance. Stress due to the difference in thermal expansion coefficient between the first electrode 36 and the second electrode 38 and the semiconductor also occurs during the manufacturing process of the integrated semiconductor optical device. For example, if an alloying process is included after electrode formation, stress occurs during cooling after the alloying process, similar to the above-mentioned process of bonding to the submount 44. However, as described above, the stress acting on the third portion 30 is offset by the electrode pattern 34 (adjacent region 42).

[0024] [Second embodiment] 6 is a plan view of the integrated semiconductor optical device according to the second embodiment. The adjacent region 242 is a part of at least one of the first electrode 236 and the second electrode 238 (e.g., the first electrode 236). The adjacent regions 242 are a pair of adjacent regions 242 that sandwich the mesa stripe structure 216. The first electrode 236 integrally includes a first non-overlapping region 258 that does not overlap with the mesa stripe structure 216. The second electrode 238 integrally includes a second non-overlapping region 260 that does not overlap with the mesa stripe structure 216. The first non-overlapping region 258 and the second non-overlapping region 260 have a first edge 262 and a second edge 264 that face each other, respectively.

[0025] This embodiment can also suppress a decrease in reliability due to stress, as explained in detail in the first embodiment. Furthermore, since the first electrode 236 itself is wide, heat dissipation from the first electrode 236 can be improved, and the optical output characteristics during high-temperature operation can be improved. Note that the first electrode 236 is electrically connected to the cladding layer in the first optical functional element 212, but does not electrically affect the cladding layer in the second optical functional element 214.

[0026] [Third embodiment] 7 is a plan view of the integrated semiconductor optical device according to the third embodiment. The adjacent region 342 is a part of at least one of the first electrode 336 and the second electrode 338 (e.g., the second electrode 338). The adjacent regions 342 are a pair of adjacent regions 342 that sandwich the mesa stripe structure 316. The first electrode 336 integrally includes a first non-overlapping region 358 that does not overlap with the mesa stripe structure 316. The second electrode 338 integrally includes a second non-overlapping region 360 that does not overlap with the mesa stripe structure 316. The first non-overlapping region 358 and the second non-overlapping region 360 have a first edge 362 and a second edge 364 that face each other, respectively.

[0027] This embodiment also suppresses the deterioration of reliability due to stress, as explained in detail in the first embodiment. Furthermore, since the first electrode 336 itself is wide, heat dissipation from the first electrode 336 can be improved, and the optical output characteristics during high-temperature operation can be improved. Note that the first electrode 336 is electrically connected to the cladding layer in the first optical functional element 312, but does not electrically affect the cladding layer in the second optical functional element 314.

[0028] At least one of the first edge 362 and the second edge 364 (for example, the second edge 364) includes an inclined edge 366 that intersects and is oblique to the first direction D1 and the second direction D2. A part of the inclined edge 366 is an edge of the adjacent region 342.

[0029] Stress occurs in the semiconductor layer directly below the edge (inclined edge 366) of the adjacent region 342. If this stress is too strong, it exceeds the offset of the stress in the third portion 330, so it is desirable to reduce the stress acting on the third portion 330 as necessary. Therefore, by slanting the inclined edge 366, it is possible to distribute the stress acting in the direction perpendicular to the extension direction of the mesa stripe structure 316 (second direction D2). This makes it possible to provide an integrated semiconductor optical device with excellent reliability.

[0030] [Fourth embodiment] 8 is a plan view of the integrated semiconductor optical device according to the fourth embodiment. The adjacent region 442 is a part of at least one of the first electrode 436 and the second electrode 438 (e.g., the first electrode 436). The adjacent region 442 is located on only one side of the mesa stripe structure 416. The first electrode 436 integrally includes a first non-overlapping region 458 that does not overlap with the mesa stripe structure 416. The second electrode 438 integrally includes a second non-overlapping region 460 that does not overlap with the mesa stripe structure 416. The first non-overlapping region 458 and the second non-overlapping region 460 extend on one side of the mesa stripe structure 416.

[0031] The first non-overlapping region 458 and the second non-overlapping region 460 each have a first edge 462 and a second edge 464 that face each other. At least one of the first edge 462 and the second edge 464 (e.g., the first edge 462) includes an inclined edge 466 that intersects and is oblique with respect to the first direction D1 and the second direction D2. A portion of the inclined edge 466 is an edge of the adjacent region 442.

[0032] In this embodiment, the width (second direction D2) of the integrated semiconductor optical device is narrower than that of the first embodiment. Wires (not shown) are bonded to the first electrode 436 and the second electrode 438 to input electricity from the outside. A certain size is required for this purpose. From the viewpoint of reliability, it is preferable not to bond wires directly above the mesa stripe structure 416 or in the area nearby. Therefore, the mesa stripe structure 416 is positioned to one side rather than at the center in the second direction D2. In this embodiment, the effects described in the first embodiment can also be sufficiently obtained.

[0033] [Fifth embodiment] 9 is a plan view of an integrated semiconductor optical device according to a fifth embodiment. The adjacent regions 542 are part of at least one (e.g., both) of the first electrode 536 and the second electrode 538. The adjacent regions 542 are a pair of adjacent regions 542 sandwiching the mesa stripe structure 516. The first electrode 536 integrally includes a first non-overlapping region 558 that does not overlap with the mesa stripe structure 516. The second electrode 538 integrally includes a second non-overlapping region 560 that does not overlap with the mesa stripe structure 516. The first non-overlapping region 558 and the second non-overlapping region 560 have a first edge 562 and a second edge 564 that face each other, respectively. This embodiment can also suppress deterioration in reliability due to stress, as described in detail in the first embodiment.

[0034] [Sixth embodiment] Fig. 10 is a plan view of the integrated semiconductor optical device according to the sixth embodiment. Fig. 11 is a cross-sectional view of the integrated semiconductor optical device taken along line XI-XI of Fig. 10. Fig. 12 is a cross-sectional view of the integrated semiconductor optical device taken along line XII-XII of Fig. 10.

[0035] The first optical functional element 612 is a DFB (Distributed Feedback) laser equipped with a diffraction grating 668 (FIG. 11), but may also be a directly modulated laser that outputs a modulated signal or a CW (Continuous Wave) laser that outputs continuous light. The second optical functional element 614 is a semiconductor amplifier. The second optical functional element 614 amplifies the laser light of the first optical functional element 612 by applying a voltage (injecting a current) between the second electrode 638 and the back electrode 622. The amplified laser light is used as signal light for optical communication.

[0036] The first optical functional layer 618 and the second optical functional layer 620 are the same multiple quantum well. Therefore, although there is no boundary in the crystallographic sense, the boundary is shown with a dotted line in Figure 11 because they operate differently in terms of optical functions. Note that the first optical functional layer 618 and the second optical functional layer 620 may each be different multiple quantum well layers. Optical confinement layers (not shown) may be provided above and below the multiple quantum well layer.

[0037] The first optical functional layer 618 and the second optical functional layer 620 extend widely over the substrate 610. A semiconductor layer 632 (cladding layer) thereon has a partially convex shape and forms the lower end of a mesa stripe structure 616. The mesa stripe structure 616 is continuous with a portion of the upper surface of the semiconductor layer 632. The upper surface of the semiconductor layer 632 is located lower than the upper surface of the mesa stripe structure 616. The first electrode 636 and the second electrode 638 each include portions that overlap the upper surface and side surfaces of the mesa stripe structure 616 (FIG. 12).

[0038] The adjacent region 642 is a part of at least one of the first electrode 636 and the second electrode 638 (for example, the first electrode 636). The adjacent regions 642 are a pair of adjacent regions 642 that sandwich the mesa stripe structure 616. The first electrode 636 integrally includes a first non-overlapping region 658 that does not overlap with the mesa stripe structure 616. The second electrode 638 integrally includes a second non-overlapping region 660 that does not overlap with the mesa stripe structure 616. The first non-overlapping region 658 and the second non-overlapping region 660 have a first edge 662 and a second edge 664 that face each other, respectively. The electrode pattern 634 may have a shape shown in FIG. 5, 6, or 7.

[0039] The integrated semiconductor element is a ridge type and does not have a buried layer. Therefore, a large stress is applied to the mesa stripe structure 616. Due to the stress, the pitch of the diffraction grating 668 in the first optical functional element 612 changes in a direction parallel to the optical axis. The amount of change is proportional to the stress, and the uneven pitch of the diffraction grating 668 deteriorates the optical characteristics. However, this embodiment can also suppress the deterioration of reliability due to stress, as explained in detail in the first embodiment.

[0040] [Seventh embodiment] Fig. 13 is a plan view of the integrated semiconductor optical device according to the seventh embodiment. Fig. 14 is a cross-sectional view of the integrated semiconductor optical device taken along line XIV-XIV of Fig. 13. Fig. 15 is a cross-sectional view of the integrated semiconductor optical device taken along line XV-XV of Fig. 13.

[0041] The semiconductor layer 732 is in contact with the side surface of the mesa stripe structure 716. Both sides of the mesa stripe structure 716 are buried with the semiconductor layer 732. The first optical functional element 712 and the second optical functional element 714 are buried type semiconductor elements. The semiconductor layer 732 is an InP layer doped with Fe. The substrate 710 is made of n-type InP. The cladding layer 724 is made of p-type InP.

[0042] The first optical functional element 712 and the second optical functional element 714 are connected by a BJ structure. Another structure (e.g., a passive waveguide structure) may be included between the first optical functional element 712 and the second optical functional element 714. The passive waveguide has a bulk waveguide structure, and the bulk waveguide structure functions as an optical functional layer.

[0043] The first optical functional element 712 is a DFB laser equipped with a diffraction grating 768. The first optical functional layer 718 is composed of a multiple quantum well layer and optical confinement layers sandwiching it above and below. The second optical functional element 714 may be either an electroabsorption modulator or a Mach-Zehnder optical modulator. Electroabsorption optical modulators and Mach-Zehnder optical modulators are called external optical modulators, which convert continuous light input from an external source into modulated light. A high-frequency optical signal is generated by applying a high-frequency signal voltage to the second optical functional element 714. The second optical functional layer 720 is composed of a multiple quantum well layer functioning as an absorption layer and optical confinement layers sandwiching it above and below.

[0044] The electrode pattern 734 includes a third electrode 740 separated from the first electrode 736 and the second electrode 738. The electrode pattern 734 has a multilayer electrode structure in which Ti, Pt, and Au are layered in this order from the cladding layer 724 side. The third electrode 740 is a right electrode 740R and a left electrode 740L that sandwich the mesa stripe structure 716 in the second direction D2. The right electrode 740R and the left electrode 740L are equal in size in plan view. The third electrode 740 is located adjacent to at least a portion of the first electrode 736 and at least a portion of the second electrode 738 in the second direction D2.

[0045] At least one of the first electrode 736 and the second electrode 738 (e.g., the first electrode 736) integrally includes a non-overlapping region 770 that does not overlap the mesa stripe structure 716. The third electrode 740 is located adjacent to the non-overlapping region 770 in the first direction D1. The adjacent region 742 is a part of the third electrode 740. The adjacent region 742 is a pair of adjacent regions 742 that sandwich the mesa stripe structure 716.

[0046] The first optical functional element 712, which functions as a laser, generates heat during operation, so it is desirable to arrange the electrodes as widely as possible to ensure heat dissipation. Therefore, although the first electrode 736 is wide, the region adjacent to the third electrode 740 has an elongated shape and is located only directly above and near the mesa stripe structure 716. In the second optical functional element 714, which functions as an electro-absorption optical modulator, the second electrode 738 is located only directly above and near the mesa stripe structure 716 to reduce parasitic capacitance and obtain good high-frequency characteristics.

[0047] The integrated semiconductor optical device is suitable for mounting on a submount (not shown) in a junction-down configuration. In the junction-down configuration, the first electrode 736 and the second electrode 738 are directly soldered to the submount. This causes large stresses (e.g., compressive stresses) to occur in the first portion 726 and the second portion 728 of the mesa stripe structure 716. Correspondingly, the stresses (e.g., expansive stresses) to occur in the third portion 730 also become large. As a result, the stress balance becomes uneven in the optical axis direction of the mesa stripe structure 716. However, by directly soldering the third electrode 740 to the submount, the stress imbalance can be alleviated.

[0048] [Eighth embodiment] 16 is a plan view of the integrated semiconductor optical device according to the eighth embodiment. The electrode pattern 834 includes a third electrode 840 that is separated from the first electrode 836 and the second electrode 838. At least one of the first electrode 836 and the second electrode 838 integrally includes a non-overlapping region 870 that does not overlap with the mesa stripe structure 816. The third electrode 840 is located adjacent to the non-overlapping region 870 in the first direction D1. The adjacent region 842 is a part of the third electrode 840. The adjacent regions 842 are a pair of adjacent regions 842 that sandwich the mesa stripe structure 816.

[0049] The third electrode 840 is located adjacent to at least a portion of the first electrode 836 and at least a portion of the second electrode 838 in the second direction D2. The third electrode 840 is a right electrode 840R and a left electrode 840L that sandwich the mesa stripe structure 816 in the second direction D2. At least one of the right electrode 840R and the left electrode 840L is separated into multiple electrode portions 872. At least one of the first electrode 836 and the second electrode 838 (e.g., the second electrode 838) integrally includes a branch portion 874 located between the multiple electrode portions 872. A voltage is applied to the second electrode 838 via the branch portion 874. The branch portion 874 is also a non-overlapping region 870 that does not overlap the mesa stripe structure 816.

[0050] Fig. 17 is a plan view of a submount on which the integrated semiconductor optical device shown in Fig. 16 is mounted. Fig. 18 is a cross-sectional view taken along line XVIII-XVIII of the structure shown in Fig. 17. The submount 844 includes a modulator wiring 876 for driving the modulator, a laser wiring 878 for driving the laser, a ground wiring 880 common to both, and electrically floating dummy pads 882 and 883.

[0051] The integrated semiconductor optical device is mounted junction-down on a submount 844. In the junction-down configuration, the first electrode 836, the second electrode 838, and the third electrode 840 are each bonded to the submount 844 with solder 852. The first electrode 836 is bonded to the laser wiring 878 with solder 852. The second electrode 838 is bonded to the modulator wiring 876 with solder 852. The third electrode 840 is bonded to a dummy pad 882 with solder 852. The right electrode 840R is also bonded to a dummy pad 883 with solder. The back electrode 822 is connected to the ground wiring 880 by a ground wire 884.

[0052] The second electrode 838 is solder-bonded in a region (for example, a branched portion 874) that avoids overlap with the mesa stripe structure 816. The first electrode 836 is also solder-bonded in a region (for example, a non-overlapping region 870) that avoids overlap with the mesa stripe structure 816, which is most susceptible to the effects of stress. Therefore, even if a parasitic capacitance component occurs in the branched portion 874, the stress acting on the mesa stripe structure 816 can be reduced.

[0053] [Outline of the embodiment] (1) An integrated semiconductor optical device comprising: a mesa stripe structure (16) made of a semiconductor, the mesa stripe structure (16) extending in a stripe shape in a first direction (D1), having a first portion (26) and a second portion (28) arranged at an interval in the first direction (D1), and having a third portion (30) between the first portion (26) and the second portion (28); a first electrode (36) overlapping the first portion (26) but not the second portion (28), and a second electrode (38) overlapping the second portion (28) but not the first portion (26), the first electrode (36) and the second electrode (38) being separated; and an electrode pattern (34) made of a metal in a shape that avoids overlapping with the third portion (30), the electrode pattern (34) including an adjacent region (42) not overlapping the mesa stripe structure (16), located adjacent to the third portion (30) in a second direction (D2) orthogonal to the first direction (D1), and on a semiconductor layer (32) that is continuous with the mesa stripe structure (16).

[0054] Because the first portion 26 and the second portion 28 overlap the electrode pattern 34, stress occurs due to the difference in thermal expansion coefficient between the semiconductor and the metal. Because the third portion 30 is sandwiched between the first portion 26 and the second portion 28, stress occurs therein, but this stress is offset by stress occurring in the semiconductor layer 32 below the adjacent region 42 next to the third portion 30. This makes it possible to suppress a decrease in reliability due to stress.

[0055] (2) The integrated semiconductor optical device according to (1), wherein the semiconductor layer 32 is in contact with the side surface of the mesa stripe structure 16.

[0056] (3) An integrated semiconductor optical element according to (1), wherein each of the first electrode 636 and the second electrode 638 includes a portion overlapping the top surface and side surfaces of the mesa stripe structure 616, the mesa stripe structure 616 is continuous with a portion of the top surface of the semiconductor layer 632, and the top surface of the semiconductor layer 632 is located lower than the top surface of the mesa stripe structure 616.

[0057] (4) An integrated semiconductor optical element according to any one of (1) to (3), wherein the electrode pattern 34 further includes a third electrode 40 separated from the first electrode 36 and the second electrode 38, and the adjacent region 42 is a part of the third electrode 40.

[0058] (5) The integrated semiconductor optical device according to (4), wherein the third electrode 40 is a right electrode 40R and a left electrode 40L that sandwich the mesa stripe structure 16 in the second direction D2.

[0059] (6) The integrated semiconductor optical device according to (5), wherein the right electrode 40R and the left electrode 40L are equal in size in plan view.

[0060] (7) The integrated semiconductor optical device according to (5), wherein at least one of the right electrode 840R and the left electrode 840L is separated into a plurality of electrode portions 872.

[0061] (8) An integrated semiconductor optical element according to (7), wherein at least one of the first electrode 836 and the second electrode 838 integrally includes a branch portion 874 located between the plurality of electrode portions 872.

[0062] (9) An integrated semiconductor optical element according to any one of (4) to (8), wherein the third electrode 40 is located adjacent to at least a portion of the first electrode 36 and at least a portion of the second electrode 38 in the second direction D2.

[0063] (10) An integrated semiconductor optical element as described in (9), wherein the third electrode 40 is located adjacent to the entire first electrode 36 and the entire second electrode 38 in the second direction D2.

[0064] (11) An integrated semiconductor optical element according to any one of (4) to (10), wherein at least one of the first electrode 736 and the second electrode 738 integrally includes a non-overlapping region 770 that does not overlap the mesa stripe structure 716, and the third electrode 740 is located adjacent to the non-overlapping region 770 in the first direction D1.

[0065] (12) An integrated semiconductor optical element according to any one of (1) to (3), wherein the adjacent region 242 is a part of at least one of the first electrode 236 and the second electrode 238.

[0066] (13) An integrated semiconductor optical element according to (12), wherein the first electrode 236 integrally includes a first non-overlapping region 258 that does not overlap the mesa stripe structure 216, the second electrode 238 integrally includes a second non-overlapping region 260 that does not overlap the mesa stripe structure 216, and the first non-overlapping region 258 and the second non-overlapping region 260 have a first edge 262 and a second edge 264 that face each other, respectively.

[0067] (14) An integrated semiconductor optical element as described in (13), wherein at least one of the first edge 362 and the second edge 364 includes an inclined edge 366 that intersects and is oblique with respect to the first direction D1 and the second direction D2, and a part of the inclined edge 366 is an edge of the adjacent region 342.

[0068] (15) An integrated semiconductor optical element according to any one of (1) to (14), wherein the adjacent regions 42 are a pair of adjacent regions 42 sandwiching the mesa stripe structure 16 therebetween.

[0069] The present invention is not limited to the above-described embodiments and various modifications are possible. For example, the configurations described in the embodiments can be replaced with substantially the same configurations, configurations that achieve the same effects, or configurations that can achieve the same objectives. [Explanation of symbols]

[0070] 10 substrate, 12 first optical functional element, 14 second optical functional element, 16 mesa stripe structure, 18 first optical functional layer, 20 second optical functional layer, 22 back electrode, 24 cladding layer, 26 first portion, 28 second portion, 30 third portion, 32 semiconductor layer, 34 electrode pattern, 36 first electrode, 38 second electrode, 40 third electrode, 40L left electrode, 40R right electrode, 42 adjacent region, 44 submount, 46 wiring, 48 wiring, 50 wiring, 52 solder, 54 wire, 56 wire, 212 first optical functional element, 214 second optical functional element, 216 mesa stripe structure, 236 first electrode, 238 second electrode, 242 adjacent region, 258 first non-overlapping region, 260 second non-overlapping region, 262 first edge, 264 Second edge, 312 First optical functional element, 314 Second optical functional element, 316 Mesa stripe structure, 330 Third portion, 336 First electrode, 338 Second electrode, 342 Adjacent region, 358 First non-overlapping region, 360 Second non-overlapping region, 362 First edge, 364 Second edge, 366 Slanted edge, 416 Mesa stripe structure, 436 First electrode, 438 Second electrode, 442 Adjacent region, 458 First non-overlapping region, 460 Second non-overlapping region, 462 First edge, 464 Second edge, 466 Slanted edge, 516 Mesa stripe structure, 536 First electrode, 538 Second electrode, 542 Adjacent region, 558 First non-overlapping region, 560 Second non-overlapping region, 562 First edge, 564 Second edge, 610 Substrate, 612 First optical functional element, 614 Second optical functional element, 616 Mesa stripe structure, 618 First optical functional layer, 620 Second optical functional layer, 622 Back electrode, 632 Semiconductor layer, 634 Electrode pattern, 636 First electrode, 638 Second electrode, 642 Adjacent region, 658 First non-overlapping region, 660 Second non-overlapping region, 662 First edge, 664 Second edge, 668 Diffraction grating, 710 Substrate, 712 First optical functional element, 714 Second optical functional element, 716 Mesa stripe structure, 718 First optical functional layer, 720 Second optical functional layer, 724 Cladding layer, 726 First portion, 728 Second portion, 730 Third portion, 732 Semiconductor layer, 734 Electrode pattern, 736 First electrode, 738 Second electrode, 740 Third electrode, 740L Left electrode, 740R Right electrode, 742 Adjacent region, 768Diffraction grating, 770, non-overlapping region, 816, mesa stripe structure, 822, backside electrode, 834, electrode pattern, 836, first electrode, 838, second electrode, 840, third electrode, 840L, left side electrode, 840R, right side electrode, 842, adjacent region, 844, submount, 852, solder, 870, non-overlapping region, 872, electrode portion, 874, branch portion, 876, modulator wiring, 878, laser wiring, 880, ground wiring, 882, dummy pad, 883, dummy pad, 884, ground wire, D1, first direction, D2, second direction.

Claims

1. a mesa stripe structure made of a semiconductor, extending in a stripe shape in a first direction, having a first portion and a second portion spaced apart in the first direction, and having a third portion between the first portion and the second portion; an electrode pattern made of metal, including a first electrode that overlaps the first portion but does not overlap the second portion, and a second electrode that overlaps the second portion but does not overlap the first portion, the first electrode and the second electrode being separated, and having a shape that avoids overlapping with the third portion; and the electrode pattern further includes a third electrode separated from the first electrode and the second electrode; the third electrode is not electrically connected to the mesa stripe structure; the third electrode extends the length of the first portion, the second portion, and the third portion; the third electrode includes an adjacent region on a semiconductor layer continuous with the mesa stripe structure, the adjacent region being located adjacent to the third portion in a second direction perpendicular to the first direction without overlapping the mesa stripe structure.

2. 2. The integrated semiconductor optical device according to claim 1, The semiconductor layer is in contact with the side surface of the mesa stripe structure.

3. 2. The integrated semiconductor optical device according to claim 1, each of the first electrode and the second electrode includes a portion overlapping an upper surface and a side surface of the mesa stripe structure; the mesa stripe structure is continuous with a portion of the upper surface of the semiconductor layer, The top surface of the semiconductor layer is located at a lower position than the top surface of the mesa stripe structure.

4. 2. The integrated semiconductor optical device according to claim 1, The third electrode is a right electrode and a left electrode sandwiching the mesa stripe structure in the second direction.

5. 5. The integrated semiconductor optical device according to claim 4, The right electrode and the left electrode are equal in size in plan view.

6. 6. The integrated semiconductor optical device according to claim 1, The third electrode is located adjacent to at least a portion of the first electrode and at least a portion of the second electrode in the second direction.

7. 7. The integrated semiconductor optical device according to claim 6, The third electrode is located adjacent to the entire first electrode and the entire second electrode in the second direction.

8. 8. The integrated semiconductor optical device according to claim 1, The adjacent regions are a pair of adjacent regions sandwiching the mesa stripe structure.

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