Communication device and communication method

Abstract

To provide a communication device capable of properly performing power line communication using a wire that obtains desired communication characteristics to the extent that meets the requirements of a user, and a communication signal generation method.SOLUTION: The communication device includes: a selection unit that selects a mode specifying the number of one or more channels provided within a given frequency band used for communication via a wired media with another communication device and a channel used for the communication in the mode; and a signal processing unit that generates a communication frame used for signal processing of input data and communication according to the selected mode and channel.SELECTED DRAWING: Figure 5

Description

[Technical Field]

[0001] The present disclosure relates to a communication device and a communication method for generating a communication signal in wired power line communication. [Background technology]

[0002] Conventionally, among the standard technologies of the IEEE (The Institute of Electrical and Electronics Engineers) 1901, which is a communication standard related to power line communication (e.g., high-speed power line communication), wired communication using Wavelet OFDM (Orthogonal Frequency Division Multiplexing) has been known (see, for example, Non-Patent Document 1). In this wired communication, a single communication channel (hereinafter simply referred to as "channel") having a frequency band usable in high-speed power line communication (i.e., a frequency band from 2 MHz to 30 MHz) is used. [Prior art documents] [Non-patent literature]

[0003] [Non-Patent Document 1] IEEE Communications Society, “IEEE Standard for Broadband over Power Line Networks: Medium Access Control and Physical Layer Specifications”, IEEE Std 1901-2010, 30 December 2010 Summary of the Invention [Problem to be solved by the invention]

[0004] However, depending on the condition of the wired transmission path between an electronic device (hereinafter also referred to as a "PLC device") that is compatible with the above-mentioned Power Line Communication (PLC) and another PLC device with which it is communicating, the use of only the above-mentioned single channel may be affected by the attenuation characteristics or noise characteristics of the communication signal, and there has been a problem in that the desired communication characteristics that meet the user's requirements cannot be fully obtained.

[0005] The present disclosure has been devised in view of the above-described conventional circumstances, and provides a communication device and a communication signal generation method that adaptively perform wired power line communication that can obtain desired communication characteristics that meet user requirements. [Means for solving the problem]

[0006] The present disclosure relates to a method for communicating with other communication devices. via wired media A selector for selecting one mode from a plurality of modes that are defined within a predetermined frequency band used for communication and each of which defines a different number of channels, and for selecting a channel in the selected mode; and a selector for selecting a channel corresponding to each of the one or more channels in the selected mode. The number of authenticated other communication devices is one or more. of acquisition and a communication unit that selects the selected item. acquisition The above for each channel The number of authenticated other communication devices is one or more. The present invention provides a communication device that selects a channel to be used for the communication based on the above.

[0007] The present disclosure also provides a communication method in a communication device, via wired media A mode is selected from a plurality of modes that are defined within a predetermined frequency band used for communication and each define a different number of channels, and a signal corresponding to each of one or more channels in the selected mode is transmitted. The number of authenticated other communication devices is one or more. of acquisition and when selecting the channel, acquisition The above for each channel The number of authenticated other communication devices is one or more. and selecting a channel to be used for the communication based on the above. [Effects of the Invention]

[0010] According to the present disclosure, it is possible to adaptively perform wired power line communication that can obtain desired communication characteristics that meet user requirements. [Brief explanation of the drawings]

[0011] [Figure 1] FIG. 1 is a block diagram showing a configuration example of a wired communication system according to a first embodiment; [Figure 2] FIG. 1 is a block diagram showing an example of a hardware configuration of a PLC device according to a first embodiment. [Figure 3] FIG. 1 is an explanatory diagram showing a typical example of the distribution of resampling data on the time axis and the frequency axis when the clock frequency is multiplied. [Figure 4A] A table showing an example of usable frequency bands (f1 to f2), frequency bands of each channel (fc1 to fc2), and frequency bands of resampling data (fr1 to fr2) in accordance with multiplication of the clock frequency. [Figure 4B] A table showing examples of fc1, fc2, fr1, and fr2 corresponding to the cases where the clock frequency is 1x (1 / 2 mode) and the clock frequency is 1x (1 / 4 mode) [Figure 4C] A table showing examples of fc1, fc2, fr1, and fr2 corresponding to the cases where the clock frequency is doubled (1 / 2 mode) and the clock frequency is doubled (1 / 4 mode) [Figure 4D] A table showing examples of fc1, fc2, fr1, and fr2 corresponding to the cases where the clock frequency is four times (1 / 2 mode) and four times (1 / 4 mode) [Figure 5] 1 is a flowchart showing an example of an operation procedure of digital signal processing by the PLC device according to the first embodiment. [Figure 6] FIG. 10 is an explanatory diagram showing an example of a method for frequency shifting of resampling data; [Figure 7] FIG. 10 is an explanatory diagram showing an example of the process outline of step St4 corresponding to the case of (1 / 2 mode) and channel CH1; [Figure 8]FIG. 10 is an explanatory diagram showing an example of the process outline of step St4 corresponding to the case of (1 / 2 mode) and channel CH2; [Figure 9] FIG. 10 is an explanatory diagram showing an example of the process outline of step St4 corresponding to the case of (1 / 4 mode) and channel CH1. [Figure 10] FIG. 10 is an explanatory diagram showing an example of the process outline of step St4 corresponding to the case of (1 / 4 mode) and channel CH2; [Figure 11] FIG. 10 is an explanatory diagram showing an example of the process outline of step St4 corresponding to the case of (1 / 4 mode) and channel CH3; [Figure 12] FIG. 10 is an explanatory diagram showing an example of the process outline of step St4 corresponding to the case of (1 / 4 mode) and channel CH4. [Figure 13A] 1 is a flowchart illustrating a first example of an operation procedure for selecting a channel in a PLC master device according to the first embodiment. [Figure 13B] 1 is a flowchart illustrating a first example of an operation procedure for selecting a channel in a PLC slave device according to the first embodiment. [Figure 14A] 10 is a flowchart illustrating an example of an operation procedure for channel selection by the control device according to the first embodiment. [Figure 14B] 10 is a flowchart illustrating a second example of an operation procedure related to channel selection of the PLC master device according to the first embodiment. [Figure 14C] 10 is a flowchart illustrating a second example of an operation procedure for selecting a channel in a PLC slave device according to the first embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0012] Hereinafter, with reference to the accompanying drawings as appropriate, embodiments specifically disclosing a communication device and a communication signal generation method according to the present disclosure will be described in detail. However, unnecessary detailed description may be omitted. For example, detailed description of well-known matters or redundant description of substantially identical configurations may be omitted. This is to avoid unnecessary redundancy in the following description and to facilitate understanding by those skilled in the art. Note that the accompanying drawings and the following description are provided to enable those skilled in the art to fully understand the present disclosure and are not intended to limit the subject matter recited in the claims.

[0013] 1 is a block diagram showing an example of the configuration of a wired communication system 1000 according to the first embodiment. The wired communication system 1000 includes, for example, three PLC (Power Line Communication) devices 10A, 10B, and 10C, and a control device 50. Note that in the wired communication system 1000, the number of PLC devices 10, which are an example of communication devices, is not limited to three.

[0014] The control device 50 is connected to one of the three PLC devices 10A, 10B, and 10C that serves as a master device in power line communication (e.g., PLC device 10A) via a communication cable LN1, and can perform wired communication (e.g., LAN (Local Area Network) communication) with the master PLC device 10. Meanwhile, in the wired communication system 1000 shown in FIG. 1 , the control device 50 is not connected to one of the three PLC devices 10A, 10B, and 10C that serves as a slave device in power line communication (e.g., PLC devices 10B and 10C) via the communication cable LN1, and therefore cannot perform wired communication (see above) with the slave PLC devices 10. Note that the PLC devices (e.g., PLC devices 10B and 10C) operating as slave devices may also be connected to the control device 50 via the communication cable LN1 to communicate with the control device 50, just like the master device. Alternatively, the control device 50 may communicate with some or all of the three PLC devices 10A, 10B, and 10C via wireless communication.

[0015] In a wired communication system 1000, a plurality of PLC devices 10 are connected to a wired medium (e.g., a power line 1A) so that they can perform power line communication. For example, in FIG. 1, three PLC devices 10A, 10B, and 10C can each perform power line communication with another PLC device 10 (an example of another communication device). The internal configurations of the PLC devices 10A, 10B, and 10C are all the same, and will be described in detail later with reference to FIG. 2. In the following description, when there is no need to distinguish between the operations (processing) of the PLC devices 10A, 10B, and 10C, they will be collectively referred to as PLC devices 10. The PLC devices 10 can perform power line communication in accordance with, for example, the IEEE (The Institute of Electrical and Electronics Engineers) 1901 communication standard.

[0016] The PLC device 10 is, for example, a PLC modem or an electrical device with a built-in PLC modem. This electrical device may include any of home appliances such as televisions, telephones, video decks, and set-top boxes, and office equipment such as personal computers (PCs), facsimiles, and printers. The PLC device 10 may also include infrastructure equipment such as intercoms, auto-locking door systems, smart meters, building energy management systems, factory energy management systems, and demand response-enabled devices, as well as Internet of Things (IoT) devices such as smart street lights, security cameras (in other words, surveillance cameras), air conditioning control devices, lighting control devices, and sensor devices.

[0017] Therefore, possible use cases for the PLC device 10 according to the first embodiment include a use case requiring high-speed power line communication, a use case requiring long-distance power line communication, and a use case requiring power line communication that satisfies both of these, in accordance with the needs of the user (e.g., customer) who uses the PLC device 10. The PLC device 10 according to the first embodiment can perform power line communication that can accommodate any of the various use cases described above, and can achieve comfortable, highly scalable wired communication that meets the needs of users.

[0018] The control device 50, the details of which will be described later, determines the communication channel (hereinafter simply referred to as "channel") to be used when each PLC device 10 performs power line communication. The control device 50 is configured using, for example, a personal computer (PC), and is capable of inputting data based on signals sent from a mouse or keyboard that can accept user operations. The control device 50 includes a communication interface 51, a memory 52, a processor 53, an input / output interface 54, and a storage 55.

[0019] The communication interface 51 is configured using a communication circuit for performing wired communication with the PLC device 10A serving as the PLC parent device, and transmits and receives data or information to and from the PLC device 10A. Note that in FIG. 1, it is abbreviated as "communication I / F" for the sake of simplicity.

[0020] The memory 52 is configured using, for example, a RAM (Random Access Memory) and a ROM (Read Only Memory), and temporarily stores programs and data necessary for executing the operation of the control device 50, as well as data or information generated during operation. The RAM is, for example, a work memory used when the control device 50 is operating. The ROM stores and holds, for example, programs and data for controlling the control device 50 in advance. The ROM holds, for example, a program of an algorithm (in other words, a program in which the algorithm is defined) for determining a channel to be used when the PLC device 10 described below performs power line communication.

[0021] The processor 53 is configured using, for example, a CPU (Central Processing Unit), an MPU (Micro Processing Unit), a DSP (Digital Signal Processor), or an FPGA (Field Programmable Gate Array). The processor 53 functions as a controller that manages the operation of the control device 50, and performs control processing for overall supervision of the operation of each part of the control device 50, data input / output processing between each part of the control device 50, data arithmetic (calculation) processing, and data storage processing. The processor 53 operates in accordance with the programs and data stored in the memory 52. ​​The processor 53 uses the memory 52 during operation, and may temporarily store data or information generated or acquired by the processor 53 in the memory 52.

[0022] The input / output interface 54 inputs data based on signals sent from a mouse or keyboard capable of accepting the above-mentioned user operations, and outputs data stored in the memory 52 to an external device (not shown) connected to the control device 50. In Fig. 1, it is abbreviated as "input / output I / F" for the sake of simplicity.

[0023] The storage 55 is configured using, for example, a semiconductor memory such as a flash memory, an HDD (Hard Disk Drive), or an SSD (Solid State Drive), and records data or information generated or acquired by the processor 53. Details of the operation of the control device 50 will be described later with reference to Figures 14A, 14B, and 14C.

[0024] 2 is a block diagram showing an example of the hardware configuration of the PLC device 10 according to embodiment 1. The PLC device 10 includes a switching power supply 20 and a circuit module 30.

[0025] The switching power supply 20 supplies DC voltages (e.g., +1.2V, +3.3V, +12V) suitable as drive power for various loads in the circuit module 30 to the corresponding loads in the circuit module 30. The switching power supply 20 includes, for example, a switching transformer (not shown) and a DC-DC converter (not shown). Power to the switching power supply 20 is supplied from a power connector 21 via an impedance upper 27 and an AC-DC converter 24. Note that in FIG. 2, the AC-DC converter 24 is abbreviated as "AC / DC" for simplicity of illustration. The power connector 21 is provided, for example, on the rear surface of a housing 100 of the PLC device 10.

[0026] The circuit module 30 includes a main IC (Integrated Circuit) 11, an AFE·IC (Analog Front END·Integrated Circuit) 12, a low pass filter (LPF) 13, a driver IC 15, a coupler 16, a band pass filter (BPF) 17, and a memory 18. The circuit module 30 also includes a wired PHY·IC (Physical layer·Integrated Circuit) 19 that is compatible with wired communication such as Ethernet (registered trademark), and an AC cycle detector 60.

[0027] The coupler 16 is connected to a power connector 21 as an example of a first communication unit, and is further connected to the power line 1A via a power cable 1B, a power plug 25, and an outlet 2. An LED (Light Emitting Diode) 23 operates as a display unit of the PLC device 10 and is connected to the main IC 11. A LAN cable 26 for connecting to various devices (for example, a personal computer such as the control device 50) is connected to a modular jack 22 as an example of a second communication unit. The modular jack 22 is provided on the back surface of the housing 100, for example. The LED 23 is provided on the front surface of the housing 100, for example.

[0028] The main IC 11, which is an example of a communication device, includes a CPU 11A, PLC·MAC (Power Line Communication·Media Access Control layer) blocks 11C1 and 11C2, and PLC·PHY (Power Line Communication·Physical layer) blocks 11B1 and 11B2.

[0029] The CPU 11A implements, for example, a 32-bit RISC (Reduced Instruction Set Computer) type processor. The PLC·MAC block 11C2 manages the MAC (Media Access Control) layer of the transmission signal (for example, manages the execution of channel selection (determination) described below). The PLC·MAC block 11C1 manages the MAC layer of the reception signal. The PLC·PHY block 11B2 manages the PHY (Physical layer) layer of the transmission signal (for example, manages the execution of clock frequency multiplication and resampling described below). The PLC·PHY block 11B1 manages the PHY layer (physical layer) of the reception signal.

[0030] The AFE·IC 12 includes a DA converter (Digital to Analog Converter: DAC) 12A, an AD converter (Analog to Digital Converter: ADC) 12D, and variable gain amplifiers (VGA) 12B and 12C.

[0031] The coupler 16 includes a coil transformer 16A and coupling capacitors 16B and 16C. The CPU 11A refers to data or information stored in the memory 18, controls the operations of the PLC MAC blocks 11C1 and 11C2 and the PLC PHY blocks 11B1 and 11B2, and controls the PLC device 10 as a whole.

[0032] 2 illustrates an example in which the PLC device 10 includes a PLC MAC block 11C1 and a PLC PHY block 11B1 as receiving blocks, and further includes a PLC MAC block 11C2 and a PLC PHY block 11B2 as transmitting blocks. Alternatively, the PLC device 10 may include a PLC MAC block 11C and a PLC PHY block 11B that are shared for both transmission and reception (see dotted lines in FIG. 2).

[0033] The PLC·MAC blocks 11C1 and 11C2 may be collectively referred to as the PLC·MAC block 11C, and the PLC·PHY blocks 11B1 and 11B2 may be collectively referred to as the PLC·PHY block 11B.

[0034] The main IC 11 is an electrical circuit (LSI: Large Scale Integration) that performs signal processing, including basic control or modulation / demodulation for data communication, similar to a commonly known modem. For example, the main IC 11 performs various digital signal processing (e.g., resampling among clock frequency multiplication, resampling, and frequency shifting, which will be described later) on data output from a communication terminal (e.g., a PC) via the modular jack 22 to modulate the data, and outputs a digital transmission signal (an example of a communication frame) generated by the digital signal processing to the AFE IC 12. The main IC 11 also demodulates a received signal by performing digital signal processing on a signal input from the power line 1A via the AFE IC 12, and outputs the received signal to the communication terminal (e.g., a PC) via the modular jack 22.

[0035] The AC cycle detector 60 generates a synchronization signal required for the PLC devices 10 to operate in time synchronization. The AC cycle detector 60 includes a diode bridge 60a, resistors 60b and 60c, a DC (Direct Current) power supply unit 60e, and a capacitor 60d.

[0036] Diode bridge 60a is connected to resistor 60b. Resistor 60b is connected in series with resistor 60c. Resistors 60b and 60c are connected in parallel to one terminal of capacitor 60d. DC power supply 60e is connected to the other terminal of capacitor 60d.

[0037] Specifically, the AC cycle detector 60 generates a synchronization signal as follows. The AC cycle detector 60 detects zero-crossing points in the AC power waveform AC of the commercial power source supplied to the power line 1A (i.e., an AC waveform consisting of a sine wave of 50 Hz or 60 Hz), and generates a synchronization signal based on the timing of the zero-crossing points. An example of the synchronization signal is a square wave consisting of multiple pulses synchronized with the zero-crossing points of the AC power waveform. Note that the AC cycle detector 60 may be omitted. In this case, a synchronization signal included in a communication signal transmitted from an external device, for example, is used to synchronize the operations of the PLC devices 10.

[0038] Power line communication by the PLC device 10 is generally performed, for example, as follows.

[0039] For example, during transmission, data input from modular jack 22 is sent to main IC 11 via wired PHY IC 19, which is compatible with Ethernet (registered trademark), and undergoes digital signal processing (for example, at least resampling of the above-mentioned clock frequency multiplication, resampling, and frequency shifting) to generate a digital transmit signal. This generated digital transmit signal is converted into an analog transmit signal by DA converter 12A of AFE IC 12. The converted analog transmit signal is output to power line 1A via low-pass filter 13, driver IC 15, coupler 16, power connector 21, power cable 1B, power plug 25, and outlet 2.

[0040] Also, during reception, for example, the received signal supplied from power line 1A is sent to bandpass filter 17 via coupler 16, and after gain adjustment by variable amplifier 12C of AFE IC 12, is converted into a digital received signal by AD converter 12D. The converted digital received signal is sent to main IC 11, where it is subjected to digital signal processing and converted into digital data. The converted digital data is output from modular jack 22 via wired PHY IC 19 that is compatible with Ethernet (registered trademark) or the like.

[0041] Next, an outline example of digital signal processing (for example, clock frequency multiplication, resampling, frequency shifting) executed by the main IC 11 in the PLC device 10 will be described with reference to each of FIGS.

[0042] 3 is an explanatory diagram schematically illustrating an example of the distribution of resampling data on the time axis and the frequency axis associated with multiplication of the clock frequency. A PLC device 10 (e.g., PLC device 10A) according to the first embodiment uses a predetermined frequency band (specifically, from 2 MHz to 30 MHz) defined in the IEEE 1901 communications standard for wired communication with another PLC device 10 (e.g., PLC device 10B) via a power line 1A. According to the IEEE 1901 communications standard, by using the frequency band from 2 MHz to 30 MHz as one channel (i.e., using it as standard mode), the PLC device 10 can perform power line communication with a throughput of, for example, about 240 Mbps.

[0043] The PLC device 10 according to the first embodiment can perform faster power line communication by multiplying the clock frequency (in other words, the sampling frequency) in the standard mode described above (in other words, a mode in which the clock frequency is not multiplied and a clock frequency of 1x (e.g., 62.5 MHz) is used).

[0044] In the following description, for simplicity, the frequency band usable for power line communication by the PLC device 10 will be exemplified as 2 MHz to 28 MHz, and the lower limit of the usable frequency band will be expediently set as f1 = 2 MHz, and the upper limit of the same frequency band will be expediently set as f2 = 28 MHz. Note that in the following description, f2 may also be read as 30 MHz.

[0045] 3, the horizontal axis of the four graphs in the vertical column on the left side of the page is time, and the horizontal axis of the four graphs in the vertical column on the right side of the page is frequency. In other words, the four graphs in the vertical column on the left side of the page show the time axis components of the data for resampling (hereinafter referred to as "resampling data") executed by the PLC PHY block 11B2 of the main IC 11. Similarly, the four graphs in the vertical column on the right side of the page show the frequency axis components of the data for resampling (resampling data) executed by the PLC PHY block 11B2 of the main IC 11.

[0046] That is, in the second row of Fig. 3, the components on the time axis and the frequency axis of the resampling data when the clock frequency is 1 (i.e., when the clock frequency is not multiplied) are shown contrastively in the left-right direction of the page. Similarly, in the third row of Fig. 3, the components on the time axis and the frequency axis of the resampling data when the clock frequency is multiplied (2x) are shown contrastively in the left-right direction of the page. Similarly, in the fourth row (bottom row) of Fig. 3, the components on the time axis and the frequency axis of the resampling data when the clock frequency is multiplied (4x) are shown contrastively in the left-right direction of the page.

[0047] As shown in the top and second rows of FIG. 3, when the clock frequency is not multiplied (i.e., when the clock frequency is 1x, 62.5 MHz), the resampling data Dt1 has components from frequency f11 (= fr11 = 2 MHz) to frequency f21 (= fr21 = 28 MHz). This resampling data Dt1 has frequency components below the Nyquist frequency (fs1 / 2). fs1 is the sampling frequency when the clock frequency is not multiplied, and is 62.5 MHz. fr11 is the lower limit of the frequency components of the resampling data Dt1 when the clock frequency is not multiplied, and is, for example, 2 MHz. fr21 is the upper limit of the frequency components of the resampling data Dt1 when the clock frequency is not multiplied, and is, for example, 28 MHz.

[0048] Similarly, as shown in the third row of FIG. 3, when the clock frequency is doubled (i.e., when the clock frequency is doubled to 125 MHz, which is twice the clock frequency (62.5 MHz)), the resampling data Dt2 has components ranging from frequency fr12 (= 2 * fr11 = 4 MHz) to frequency fr22 (= 2 * fr21 = 56 MHz). This resampling data Dt2 has frequency components below the Nyquist frequency (fs2 / 2). fs2 is the sampling frequency when the clock frequency is doubled, and is 125 MHz. fr12 is the lower limit of the frequency components of the resampling data Dt2 when the clock frequency is doubled, and is, for example, 4 MHz. fr22 is the upper limit of the frequency components of the resampling data Dt2 when the clock frequency is doubled, and is, for example, 56 MHz. Since the subcarriers used in power line communications are predetermined, doubling the clock frequency changes not only the lower limit frequency of the frequency band but also the upper limit frequency, such as f12 and f22.

[0049] Similarly, as shown in the bottom row of FIG. 3, when the clock frequency is multiplied (by four) (i.e., when the clock frequency is multiplied by four, i.e., when the clock frequency is 250 MHz, which is four times the clock frequency (62.5 MHz)), the resampling data Dt4 has components ranging from frequency fr13 (= 4 * fr11 = 8 MHz) to frequency fr23 (= 4 * fr21 = 112 MHz). This resampling data Dt3 has frequency components below the Nyquist frequency (fs3 / 2). fs3 is the sampling frequency when the clock frequency is multiplied (by four), and is 250 MHz. fr13 is the lower limit of the frequency components of the resampling data Dt4 when the clock frequency is multiplied (by four), and is, for example, 8 MHz. fr23 is the upper limit of the frequency components of the resampling data Dt4 when the clock frequency is multiplied (by four), and is, for example, 112 MHz. Similarly, since the subcarriers used in power line communications are predetermined, multiplying the clock frequency (by 4) changes not only the lower limit frequency of the frequency band but also the upper limit frequency, such as f13 and f23.

[0050] Fig. 4A is a table showing an example of the usable frequency band (f1-f2), the frequency band of each channel (fc1-fc2), and the frequency band of the resampling data (fr1-fr2) associated with multiplication of the clock frequency. Fig. 4B is a table showing an example of fc1, fc2, fr1, and fr2 corresponding to the cases where the clock frequency is 1x (1 / 2 mode) and the clock frequency is 1x (1 / 4 mode). Fig. 4C is a table showing an example of fc1, fc2, fr1, and fr2 corresponding to the cases where the clock frequency is 2x (1 / 2 mode) and the clock frequency is 2x (1 / 4 mode). Fig. 4D is a table showing an example of fc1, fc2, fr1, and fr2 corresponding to the cases where the clock frequency is 4x (1 / 2 mode) and the clock frequency is 4x (1 / 4 mode).

[0051] 4A, 4B, 4C, and 4D may be stored in advance in, for example, the memory 18. As shown in Fig. 4A, when the clock frequency is not multiplied, the frequency band available for power line communication is f1 (=2 MHz) to f2 (=28 MHz), with the lower limit of the channel frequency band being fc11 and the upper limit being fc21, and the lower limit of the frequency band of the resampling data being fr11 and the upper limit being fr21.

[0052] When the clock frequency is multiplied (doubled), the frequency band that can be used in power line communication is f1 (=2MHz) to f2 (=56MHz), with the lower limit of the channel frequency band being fc12 and the upper limit being fc22, and the lower limit of the frequency band of the resampling data being fr12 and the upper limit being fr22.

[0053] When the clock frequency is multiplied (by 4), the frequency band that can be used in power line communications is f1 (= 2 MHz) to f2 (= 112 MHz), with the lower limit of the channel frequency band being fc13 and the upper limit being fc23, and the lower limit of the frequency band of the resampling data being fr13 and the upper limit being fr23.

[0054] Furthermore, as shown in FIG. 4B, in the case of a mode (1 / 2 mode) or (1 / 4 mode) for power line communication that does not multiply the clock frequency and is capable of supporting long distances, the lower and upper limits of the frequency band for each channel in each mode and the lower and upper limits of the frequency band for the resampling data can be calculated using Equations (1) and (2), respectively, which will be described later. This calculation is performed, for example, by the PLC PHY block 11B2. The calculation results may be stored in table TBL2 shown in FIG. 4B. In Equations (1) and (2), fs1 = 62.5 MHz. In Equations (1) to (6), X is a number indicating the mode, and Y is the ordinal number of the channel. For example, for the first channel CH1 of the two channels formed in (1 / 2 mode), X = 2 and Y = 1.

[0055] In the following description, (1 / 2 mode) is a mode in which two channels are formed within the frequency band (f1 to f2) usable for power line communication in order to improve the communication distance of power line communication compared to standard mode (for example, an improvement of 1.5 times compared to standard mode). Similarly, (1 / 4 mode) is a mode in which four channels are formed within the frequency band (f1 to f2) usable for power line communication in order to further improve the communication distance of power line communication compared to standard mode (for example, an improvement of 2 times compared to standard mode).

[0056]

number

[0057]

number

[0058] Furthermore, as shown in FIG. 4C, when the clock frequency is doubled and the mode is set to a power line communication mode (1 / 2 mode) or (1 / 4 mode) that supports long-distance communication, the lower and upper limits of the frequency band for each channel in each mode and the lower and upper limits of the frequency band for the resampling data can be calculated using Equations (3) and (4), respectively, as described below. This calculation is performed by, for example, the PLC PHY block 11B2. The calculation results may be stored in table TBL3 shown in FIG. 4C. In Equations (3) and (4), fs2 = 125 (= 2 * 62.5) MHz.

[0059]

number

[0060]

number

[0061] Furthermore, as shown in FIG. 4D, when the clock frequency is multiplied (by 4) and the mode is set to a power line communication mode (1 / 2 mode) or (1 / 4 mode) that supports long-distance communication, the lower and upper limits of the frequency band for each channel in each mode and the lower and upper limits of the frequency band for the resampling data can be calculated using Equations (5) and (6), respectively, which will be described later. This calculation is performed by, for example, the PLC PHY block 11B2. The calculation results may be stored in table TBL4 shown in FIG. 4D. In Equations (5) and (6), fs3 = 250 (= 4 * 62.5) MHz.

[0062]

number

[0063]

number

[0064] Next, the operation procedure of digital signal processing by the PLC device 10 according to the first embodiment will be described with reference to Fig. 5. Fig. 5 is a flowchart showing an example of the overall operation procedure of the PLC device 10 according to the first embodiment.

[0065] In FIG. 5, the PLC device 10 selects a sampling frequency (X times: X=1, 2, or 4) (St1). That is, by determining the sampling frequency (X times), the PLC device 10 determines a clock frequency corresponding to that sampling frequency. The PLC device 10 executes various digital signal processes in step St4, which will be described later, according to the determined clock frequency. Here, X=1, 2, or 4, but these values ​​are merely examples. The selection in step St1 is executed, for example, in the PLC MAC block 11C2.

[0066] The PLC device 10, as will be described in detail later, selects a mode to be used in power line communication based on, for example, transmission path information transmitted from another PLC communication device (St2). That is, the PLC device 10 determines how many channels (Y: Y=1, 2, or 4) to prepare (i.e., form) within the frequency band available for power line communication. Here, Y=1, 2, or 4, but these values ​​are merely examples. The selection in step St2 is performed, for example, by the PLC MAC block 11C2.

[0067] Based on the mode (e.g., 1 / 4 mode) selected in step St2, the PLC device 10 selects a channel (e.g., one of channels CH1, 2, 3, or 4) to be used for power line communication with other PLC devices (St3). In other words, the PLC device 10 determines which channel to select for power line communication from the number of channels prepared corresponding to the mode selected in step St2. The selection in step St3 is performed, for example, by the PLC MAC block 11C2.

[0068] After step St3, the PLC device 10 uses the sampling frequency selected in step St1 to perform various digital signal processing according to the mode and channel selected in steps St2 and St3 (St4). The digital signal processing in step St4 is performed, for example, in the PLC PHY block 11B2.

[0069] Specifically, the PLC device 10 multiplies the sampling frequency (i.e., clock frequency) selected in step St1 and operates based on the multiplied sampling frequency (i.e., clock frequency). The PLC device 10 multiplies the sampling period for sampling the multiplied data (i.e., the resampling data input to the main IC 11) in accordance with the mode selected in step St2 (St4-1).

[0070] The PLC device 10 upsamples (for example, doubles upsampling) the resampling data whose sampling period has been multiplied in step St4-1 in accordance with the mode selected in step St2 (St4-2).

[0071] The PLC device 10 performs filtering on the resampling data after upsampling in step St4-2 according to the channel selected in step St3, and acquires resampling data of the frequency band components of the selected channel (St4-3). In the first embodiment, the processes of steps St4-2 and St4-3 are collectively referred to as resampling.

[0072] After the processing of step St4-3, the PLC device 10 performs a frequency shift (in other words, frequency conversion) process (St4-4) as necessary on the frequency components of the resampling data acquired in step St4-3 so that they fall within the frequency band of the channel selected in step St3. Note that after step St4-4, the PLC device 10 may perform resampling on the resampling data after the processing of step St4-4 (i.e., the same process as the processes of steps St4-2 and St4-3) in accordance with the mode and channel selected in steps St2 and St3, respectively.

[0073] By performing the digital signal processing shown in step St4, the PLC device 10 can generate a communication frame that conforms to a predetermined format used in power line communication. The communication frame used in power line communication by the PLC device 10 includes, for example, a preamble, a frame control, and a frame body. The communication frame is formed in any sequence in the time domain and the frequency domain. The preamble data is a fixed value, for example, all 1s. The preamble data is used, for example, for carrier detection, synchronization, and demodulation. The frame control and frame body data are each indefinite values.

[0074] 6 is an explanatory diagram showing an example of a method for frequency shifting of resampling data. The PLC device 10 according to the first embodiment uses, for example, a process of performing a Hilbert transform (i.e., removing negative frequency components) and then multiplying the result by a carrier wave to shift the frequency of the resampling data. The Hilbert transform process shown in FIG. 6 is executed, for example, in the PLC PHY block 11B2.

[0075] As shown in Figure 6, in the Hilbert transform, the phase of a real signal x(t) having a real component is delayed by π / 2 to generate a signal y(t) (St11). The real signal x(t) and the signal y(t) generated in step St11 are multiplied by a complex coefficient j (St12), and a signal jy(t) corresponding to the multiplication result is added to the real signal x(t) to generate a complex signal z(t) (St13). This complex signal z(t) is also called an analytic signal, and does not have negative frequency components.

[0076] A real component is extracted from the multiplication result of the complex signal z(t) generated in step St13 and the carrier wave exp(jωt) (St14). This generates a real signal, which is data for resampling consisting only of real components after frequency shifting. In step St14, as shown in detail in FIG. 6, the multiplication result of the real signal x(t) and the real component of the carrier wave exp(jωt) (see St14-1) and the multiplication result of the signal y(t) and the imaginary component of the carrier wave exp(jωt) (see St14-2) are added together (St14-3). This generates a real signal, which is data for resampling consisting only of real components after frequency shifting.

[0077] Note that the PLC device 10 may use a frequency shift method other than the Hilbert transform shown in FIG. 6, such as a method similar to that used when generating high-frequency signals in normal wireless communication (for example, filtering the result of multiplying a baseband signal by a carrier wave), to remove unnecessary frequency components and generate resampling data corresponding to the frequency band of the channel selected in step St3.

[0078] Fig. 7 is an explanatory diagram showing an example of the process outline of step St4 corresponding to the case of (1 / 2 mode) and channel CH1. Fig. 8 is an explanatory diagram showing an example of the process outline of step St4 corresponding to the case of (1 / 2 mode) and channel CH2.

[0079] In Figures 7 and 8, the flowchart on the far left of the page shows an excerpt from the corresponding flowchart in Figure 5, the center of the page is a graph showing the time axis components of four vertically-spaced resampling data items, similar to Figure 3, and the rightmost page is a graph showing the frequency axis components of four vertically-spaced resampling data items, similar to Figure 3, which are shown for comparison.

[0080] 7, the clock frequency is not multiplied, so the sampling frequency fs4 = 62.5 MHz. If the clock frequency is multiplied (for example, by 2), the sampling frequency fs4 = 62.5 MHz * 2 = 125 MHz, and if the clock frequency is multiplied (for example, by 4), the sampling frequency fs4 = 62.5 MHz * 4 = 250 MHz, and so on.

[0081] In FIG. 7, when the sampling period is doubled (St4-1), the resampling data ReD2 having a frequency band less than the Nyquist frequency (=fs4 / 2) (specifically, fr1 (=4 MHz, see FIG. 4B) to fr2 (=f2=28 MHz)) becomes resampling data ReD21 having frequency components from f1 (=2 MHz, see FIG. 4B) to fc2 (=14 MHz, see FIG. 4B). The Nyquist frequency also becomes (fs5 / 2). fs5 (=fs4 / 2) = 31.25 MHz. This resampling data ReD21 has data corresponding to subcarrier numbers 10 to 100, for example.

[0082] After step St4-1, two-fold upsampling is performed (St4-2). For example, the PLC PHY block 11B2 performs zero insertion processing on the resampling data ReD21. As a result, the foldback resampling data ReD215m for the resampling data ReD21 is generated on the opposite side (i.e., the high-frequency side) of the Nyquist frequency (fs5 / 2). "Data *" shown in FIGS. 7 to 12 indicates that the data is foldback resampling data. The Nyquist frequency is (fs4 / 2). This foldback resampling data ReD215m has data in an array in which the array of subcarrier numbers 10 to 100 in the resampling data ReD21 is mirrored horizontally (i.e., data corresponding to subcarrier numbers 100 to 10).

[0083] After step St4-2, filtering is performed using a low-pass filter (St4-3). For example, a low-pass filter (not shown) included in the PLC PHY block 11B2 filters out the high-frequency foldover resampling data ReD215m. This generates resampling data ReD21 included in the frequency band (fc1 to fc2) of channel CH1. The Nyquist frequency is maintained at (fs4 / 2), which is the same as the Nyquist frequency (fs4 / 2) before the start of step St4-1. As a result, the PLC device 10 can generate resampling data that is compatible with the mode and channel selected in steps St2 and St3, respectively, through the processing of steps St4-1, St4-2, and St4-3, while still satisfying the condition that the frequency band is below the Nyquist frequency used for power line communication. This allows the PLC device 10 to generate a digital transmission signal that can perform the desired power line communication suited to the user's needs.

[0084] In the example of FIG. 8, the clock frequency is not multiplied, so the sampling frequency fs4 is 62.5 MHz.

[0085] In FIG. 8, when the sampling period is doubled (St4-1), the resampling data ReD2 having a frequency band (specifically, fr1 (=4 MHz, see FIG. 4B) to fr2 (=f2=28 MHz)) that is less than the Nyquist frequency (=fs4 / 2) becomes resampling data ReD21 having frequency components from f1 (=2 MHz, see FIG. 4B) to fc2 (=14 MHz, see FIG. 4B). The Nyquist frequency also becomes (fs5 / 2). This resampling data ReD21 has data corresponding to subcarrier numbers 10 to 100, for example.

[0086] After step St4-2, two-fold upsampling is performed (St4-2). For example, the PLC PHY block 11B2 performs zero insertion processing on the resampling data ReD21. As a result, the foldback resampling data ReD215m for the resampling data ReD21 is generated on the opposite side (i.e., the high-frequency side) of the Nyquist frequency (fs5 / 2). The Nyquist frequency becomes (fs4 / 2).

[0087] After step St4-2, filtering is performed using a low-pass filter (St4-3). For example, the high-frequency aliased resampling data ReD215m is filtered out by a low-pass filter (not shown) included in the PLC PHY block 11B2. This generates resampling data ReD21 included in the frequency band (fc1 to fc2) of channel CH1. Furthermore, the Nyquist frequency remains (fs4 / 2), which is the same as the Nyquist frequency (fs4 / 2) before the start of step St4-1.

[0088] Furthermore, after step St4-3, a frequency shift (frequency conversion) process is performed (St4-4) as described with reference to Fig. 6. For example, the PLC PHY block 11B2 generates resampling data ReD21f by frequency-converting the frequency components of the resampling data ReD21 so as to obtain the operating frequency band (fc1 to fc2) of channel CH2 selected in step St3, using calculations using formula (1) or formula (2) or table TBL2 shown in Fig. 4B. As a result, the PLC device 10 can generate resampling data that is compatible with the mode and channel selected in steps St2 and St3, respectively, by the processes of steps St4-1, St4-2, St4-3, and St4-4, while satisfying the condition that the frequency band is below the Nyquist frequency used for power line communication. Therefore, a digital transmission signal that can perform desired power line communication suited to the user's needs can be generated.

[0089] Fig. 9 is an explanatory diagram showing an example of the process outline of step St4 corresponding to the case of (1 / 4 mode) and channel CH1. Fig. 10 is an explanatory diagram showing an example of the process outline of step St4 corresponding to the case of (1 / 4 mode) and channel CH2. Fig. 11 is an explanatory diagram showing an example of the process outline of step St4 corresponding to the case of (1 / 4 mode) and channel CH3. Fig. 12 is an explanatory diagram showing an example of the process outline of step St4 corresponding to the case of (1 / 4 mode) and channel CH4.

[0090] In Figures 9 to 12, the flowchart on the far left of the page shows an excerpt from the corresponding flowchart in Figure 5, the center of the page is a graph showing the time axis components of four vertically-spaced resampling data items similar to Figure 3, and the rightmost page is a graph showing the frequency axis components of four vertically-spaced resampling data items similar to Figure 3, and each is shown for comparison.

[0091] In the example of FIG. 9, the clock frequency is not multiplied, so the sampling frequency fs4 is 62.5 MHz.

[0092] In FIG. 9, when the sampling period is quadrupled (St4-1), the resampling data ReD4 having a frequency band less than the Nyquist frequency (=fs4 / 2) (specifically, fr1 (=4 MHz, see FIG. 4B) to fr2 (=f2=28 MHz)) becomes resampling data ReD41 having frequency components from f1 (=2 MHz, see FIG. 4B) to fc2 (=7 MHz, see FIG. 4B). The Nyquist frequency also becomes (fs6 / 2). fs6 (=fs4 / 4) = 15.625 MHz. Although not shown, this resampling data ReD41 has data corresponding to subcarrier numbers 10 to 100, for example.

[0093] After step St4-1, two-fold upsampling is performed (St4-2). For example, the PLC PHY block 11B2 performs zero insertion processing on the resampling data ReD41. As a result, the foldback resampling data ReD416m for the resampling data ReD41 is generated on the opposite side (i.e., the higher frequency side) of the Nyquist frequency (fs6 / 2). The Nyquist frequency becomes (fs5 / 2). This foldback resampling data ReD416m has data in an array in which the array of subcarrier numbers 10 to 100 in the resampling data ReD41 is mirrored horizontally (i.e., data corresponding to subcarrier numbers 100 to 10).

[0094] After step St4-2, filtering is performed using a low-pass filter (St4-3). For example, the high-frequency aliased resampling data ReD416m is filtered out by a low-pass filter (not shown) included in the PLC PHY block 11B2. This generates resampling data ReD41 included in the frequency band (fc1 to fc2) of channel CH1. However, the Nyquist frequency remains (fs5 / 2) and is not the same as the Nyquist frequency (fs4 / 2) before the start of step St4-1.

[0095] Therefore, in order to return the Nyquist frequency to the Nyquist frequency (fs4 / 2) before the start of step St4-1, a second resampling consisting of steps St4-2 and St4-3 is performed again after step St4-3. For example, the PLC PHY block 11B2 performs zero insertion processing on the resampling data ReD41. As a result, foldback resampling data ReD415m for the resampling data ReD41 is generated on the opposite side (i.e., the higher frequency side) of the Nyquist frequency (fs5 / 2). The Nyquist frequency also becomes (fs4 / 2). This foldback resampling data ReD415m has data in an array in which the array of subcarrier numbers 10 to 100 in the resampling data ReD41 is mirrored horizontally (i.e., data corresponding to subcarrier numbers 100 to 10).

[0096] After the second step St4-2, a second filtering process is performed using a low-pass filter (St4-3). For example, a low-pass filter (not shown) included in the PLC PHY block 11B2 filters out the high-frequency foldback resampling data ReD415m. This generates resampling data ReD41 included in the frequency band (fc1 to fc2) of channel CH1. As a result, the PLC device 10 can generate resampling data that is compatible with the mode and channel selected in steps St2 and St3 while satisfying the condition that the frequency band is below the Nyquist frequency used for power line communication through the processes of steps St4-1, St4-2, St4-3, St4-2, and St4-3. This allows the PLC device 10 to generate a digital transmission signal that can perform the desired power line communication suited to the user's needs.

[0097] In the example of FIG. 10, the clock frequency is not multiplied, so the sampling frequency fs4 is 62.5 MHz.

[0098] In FIG. 10, when the sampling period is quadrupled (St4-1), the resampling data ReD4 having a frequency band (specifically, fr1 (=4 MHz, see FIG. 4B) to fr2 (=f2=28 MHz)) that is less than the Nyquist frequency (=fs4 / 2) becomes resampling data ReD41 having frequency components from f1 (=2 MHz, see FIG. 4B) to fc2 (=7 MHz, see FIG. 4B). The Nyquist frequency also becomes (fs6 / 2). Although not shown in the figure, this resampling data ReD41 has data corresponding to subcarrier numbers 10 to 100, for example.

[0099] After step St4-1, two-fold upsampling is performed (St4-2). For example, the PLC PHY block 11B2 performs zero insertion processing on the resampling data ReD41. As a result, the foldback resampling data ReD416m for the resampling data ReD41 is generated on the opposite side (i.e., the higher frequency side) of the Nyquist frequency (fs6 / 2). The Nyquist frequency becomes (fs5 / 2). This foldback resampling data ReD416m has data in an array in which the array of subcarrier numbers 10 to 100 in the resampling data ReD41 is mirrored horizontally (i.e., data corresponding to subcarrier numbers 100 to 10).

[0100] After step St4-2, filtering is performed using a low-pass filter (St4-3). For example, a low-pass filter (not shown) included in the PLC PHY block 11B2 filters out the high-frequency aliased resampling data ReD416m. This generates resampling data ReD41 included in the frequency band (fc1 to fc2) of channel CH1. However, since the example in FIG. 10 is an example in which channel CH2 is selected in step St3, frequency shifting is performed after step St4-3. Furthermore, the Nyquist frequency remains at (fs5 / 2) and is not the same as the Nyquist frequency (fs4 / 2) before the start of step St4-1.

[0101] Furthermore, after step St4-3, a frequency shift (frequency conversion) process is performed (St4-4) as described with reference to Fig. 6. For example, the PLC PHY block 11B2 performs a calculation using formula (1) or formula (2) or uses table TBL2 shown in Fig. 4B to generate resampling data ReD41f by frequency converting the frequency components of the resampling data ReD41 to the higher frequency side so as to obtain the operating frequency band (fc1 to fc2) of the channel CH2 selected in step St3.

[0102] Furthermore, to return the Nyquist frequency to the Nyquist frequency (fs4 / 2) before the start of step St4-1, a second resampling consisting of steps St4-2 and St4-3 is performed after step St4-4. For example, the PLC PHY block 11B2 performs zero insertion processing on the resampling data ReD41f. As a result, foldback resampling data ReD41f5m for the resampling data ReD41f is generated on the opposite side of the Nyquist frequency (fs5 / 2) (i.e., on the high-frequency side). The Nyquist frequency also becomes (fs4 / 2). This foldback resampling data ReD41f5m has data in an array in which the array of subcarrier numbers 10 to 100 in the resampling data ReD41 is mirrored horizontally (i.e., data corresponding to subcarrier numbers 100 to 10).

[0103] After the second step St4-2, a second filtering process is performed using a low-pass filter (St4-3). For example, a low-pass filter (not shown) included in the PLC PHY block 11B2 filters out the high-frequency foldover resampling data ReD41f5m. This generates resampling data ReD41f included in the frequency band (fc1 to fc2) of channel CH2. As a result, the PLC device 10 can generate resampling data that is compatible with the mode and channel selected in steps St2 and St3 while satisfying the condition that the frequency band is below the Nyquist frequency used for power line communication through the processes of steps St4-1, St4-2, St4-3, St4-4, St4-2, and St4-3. This allows the PLC device 10 to generate a digital transmission signal that can perform the desired power line communication suited to the user's needs.

[0104] In the example of FIG. 11, the clock frequency is not multiplied, so the sampling frequency fs4 is 62.5 MHz.

[0105] In FIG. 11, when the sampling period is quadrupled (St4-1), the resampling data ReD4 having a frequency band (specifically, fr1 (=4 MHz, see FIG. 4B) to fr2 (=f2=28 MHz)) that is less than the Nyquist frequency (=fs4 / 2) becomes resampling data ReD41 having frequency components from f1 (=2 MHz, see FIG. 4B) to fc2 (=7 MHz, see FIG. 4B). The Nyquist frequency also becomes (fs6 / 2). Although not shown in the figure, this resampling data ReD41 has data corresponding to subcarrier numbers 10 to 100, for example.

[0106] After step St4-1, two-fold upsampling is performed (St4-2). For example, the PLC PHY block 11B2 performs zero insertion processing on the resampling data ReD41. As a result, the foldback resampling data ReD416m for the resampling data ReD41 is generated on the opposite side (i.e., the higher frequency side) of the Nyquist frequency (fs6 / 2). The Nyquist frequency becomes (fs5 / 2). This foldback resampling data ReD416m has data in an array in which the array of subcarrier numbers 10 to 100 in the resampling data ReD41 is mirrored horizontally (i.e., data corresponding to subcarrier numbers 100 to 10).

[0107] After step St4-2, filtering is performed using a high-pass filter (St4-3). For example, a high-pass filter (not shown) included in the PLC PHY block 11B2 filters out the resampling data ReD41 in the low frequency range. This generates folded resampling data ReD416m that falls within the frequency band of channel CH2. However, when a digital transmission signal including the folded resampling data ReD416m is transmitted, the arrangement of the subcarrier numbers is reversed from the arrangement of the resampling data input to the main IC 11, which undesirably complicates the receiving process in the receiving PLC device 10. Furthermore, the Nyquist frequency remains at (fs5 / 2) and is not the same as the Nyquist frequency (fs4 / 2) before the start of step St4-1.

[0108] Therefore, in order to return the Nyquist frequency to the Nyquist frequency (fs4 / 2) before the start of step St4-1, a second resampling consisting of steps St4-2 and St4-3 is performed again after step St4-3. For example, the PLC PHY block 11B2 performs zero insertion processing on the fold-over resampling data ReD416m. As a result, fold-over resampling data for the fold-over resampling data ReD416m (i.e., resampling data ReD416m5m) is generated on the opposite side (i.e., the high-frequency side) of the Nyquist frequency (fs5 / 2). The Nyquist frequency also becomes (fs4 / 2). This resampling data ReD416m5m has data in an array in which the array of subcarrier numbers 100 to 10 in the fold-over resampling data ReD416m is mirrored horizontally (i.e., data corresponding to subcarrier numbers 10 to 100).

[0109] After the second step St4-2, a second filtering process is performed using a high-pass filter (St4-3). For example, a high-pass filter (not shown) included in the PLC PHY block 11B2 filters out the low-frequency foldback resampling data ReD416m. This generates resampling data ReD416m5m included in the frequency band (fc1 to fc2) of channel CH3. As a result, the PLC device 10 can generate resampling data that is compatible with the mode and channel selected in steps St2 and St3 while satisfying the condition that the frequency band is below the Nyquist frequency used for power line communication through the processes of steps St4-1, St4-2, St4-3, St4-2, and St4-3. This allows the PLC device 10 to generate a digital transmission signal that can perform the desired power line communication suited to the user's needs.

[0110] In the example of FIG. 12, the clock frequency is not multiplied, so the sampling frequency fs4 is 62.5 MHz.

[0111] In FIG. 12, when the sampling period is quadrupled (St4-1), the resampling data ReD4 having a frequency band (specifically, fr1 (=4 MHz, see FIG. 4B) to fr2 (=f2=28 MHz)) that is less than the Nyquist frequency (=fs4 / 2) becomes resampling data ReD41 having frequency components from f1 (=2 MHz, see FIG. 4B) to fc2 (=7 MHz, see FIG. 4B). The Nyquist frequency also becomes (fs6 / 2). Although not shown in the figure, this resampling data ReD41 has data corresponding to subcarrier numbers 10 to 100, for example.

[0112] After step St4-1, two-fold upsampling is performed (St4-2). For example, the PLC PHY block 11B2 performs zero insertion processing on the resampling data ReD41. As a result, the foldback resampling data ReD416m for the resampling data ReD41 is generated on the opposite side (i.e., the higher frequency side) of the Nyquist frequency (fs6 / 2). The Nyquist frequency becomes (fs5 / 2). This foldback resampling data ReD416m has data in an array in which the array of subcarrier numbers 10 to 100 in the resampling data ReD41 is mirrored horizontally (i.e., data corresponding to subcarrier numbers 100 to 10).

[0113] After step St4-2, filtering is performed using a high-pass filter (St4-3). For example, the resampling data ReD41 on the low frequency side is cut off by a high-pass filter (not shown) included in the PLC PHY block 11B2. As a result, folded resampling data ReD416m included in the frequency band of channel CH2 is generated.

[0114] Furthermore, after step St4-3, a frequency shift (frequency conversion) process is performed (St4-4) as described with reference to Fig. 6. For example, the PLC PHY block 11B2 generates the folding resampling data ReD416mf by frequency converting the frequency components of the folding resampling data ReD416m to the lower frequency side, using calculations using formula (1) or formula (2) or table TBL2 shown in Fig. 4B, so as to obtain the usable frequency band of the channel CH1 selected in step St3.

[0115] Here, as described above, when a digital transmission signal including the return resampling data ReD416mf is transmitted, the arrangement of the subcarrier numbers is reversed from the arrangement of the resampling data input to the main IC 11, which undesirably complicates the receiving process in the receiving PLC device 10. Furthermore, the Nyquist frequency remains at (fs5 / 2) and is not the same as the Nyquist frequency (fs4 / 2) before the start of step St4-1.

[0116] Therefore, in order to return the Nyquist frequency to the Nyquist frequency (fs4 / 2) before the start of step St4-1, a second resampling consisting of steps St4-2 and St4-3 is performed again after step St4-4. For example, the PLC PHY block 11B2 performs zero insertion processing on the aliasing resampling data ReD416mf. As a result, aliasing resampling data for the aliasing resampling data ReD416mf (i.e., resampling data ReD416mf5m) is generated on the opposite side (i.e., the high-frequency side) of the Nyquist frequency (fs5 / 2). The Nyquist frequency also becomes (fs4 / 2). This resampling data ReD416mf5m has data in an array in which the array of subcarrier numbers 100 to 10 in the aliasing resampling data ReD416mf is mirrored horizontally (i.e., data corresponding to subcarrier numbers 10 to 100).

[0117] After the second step St4-2, a second filtering process is performed using a high-pass filter (St4-3). For example, a high-pass filter (not shown) included in the PLC PHY block 11B2 filters out the low-frequency foldover resampling data ReD416mf. This generates resampling data ReD416fm5m included in the frequency band (fc1 to fc2) of channel CH4. As a result, the PLC device 10 can generate resampling data that is compatible with the mode and channel selected in steps St2 and St3 while satisfying the condition that the frequency band is below the Nyquist frequency used for power line communication through the processes of steps St4-1, St4-2, St4-3, St4-4, St4-2, and St4-3. This allows the PLC device 10 to generate a digital transmission signal that can perform the desired power line communication suited to the user's needs. If the frequency band of channel CH4 is narrow, the PLC·PHY block 11B2 may increase the frequency band of channel CH4 by reducing the frequency band of another channel (for example, channel CH3 adjacent to channel CH4).

[0118] Next, an operational procedure for selecting (determining) a channel to be used for power line communication by the PLC device 10 according to the first embodiment will be described with reference to FIGS. 13A, 13B, 14A, 14B, and 14C. FIG. 13A is a flowchart illustrating a first example of an operational procedure for channel selection by the PLC master device according to the first embodiment. FIG. 13B is a flowchart illustrating a first example of an operational procedure for channel selection by the PLC slave device according to the first embodiment. FIG. 14A is a flowchart illustrating an example of an operational procedure for channel selection by the control device 50 according to the first embodiment. FIG. 14B is a flowchart illustrating a second example of an operational procedure for channel selection by the PLC master device according to the first embodiment. FIG. 14C is a flowchart illustrating a second example of an operational procedure for channel selection by the PLC slave device according to the first embodiment.

[0119] When selecting a channel to be used for power line communication with other PLC devices 10, the PLC device 10 of embodiment 1 performs either a first pattern (see Figures 13A and 13B) in which the PLC devices 10 estimate the bandwidth among themselves and select (determine) the channel, or a second pattern (see Figures 14A, 14B, and 14C) in which the control device 50 and multiple PLC devices 10 select (determine) the channel.

[0120] When the PLC device 10 according to the first embodiment is connected to another PLC device 10 via a power line 1A, the higher the frequency band used in the power line communication, the more pronounced the attenuation characteristics. On the other hand, the lower the frequency band used in the power line communication, the more pronounced the noise characteristics. Furthermore, when a power line (e.g., the power line 1A) is used as the wired medium for power line communication, unlike when a coaxial cable is used, the conditions of the transmission path fluctuate depending on the wiring conditions of the power line, the presence or absence of a noise-generating load, the load connected to the power line, and so on. Therefore, when only a single channel (frequency band: e.g., 2 to 28 MHz) is used as in the past, if the conditions of the transmission path fluctuate, a good communication environment may not be obtained due to the effects of the above-mentioned attenuation characteristics and noise characteristics. For this reason, it is considered that the channel used in power line communication is adaptively selected according to the conditions of the transmission path.

[0121] In the first pattern, a PLC master device (e.g., PLC device 10A) according to the first embodiment acquires transmission path information obtained by observing a PLC slave device (e.g., PLC device 10B) while scanning channels, and selects (determines) a channel to be used in power line communication based on the acquired transmission path information for each channel. In the first pattern, the mode is selected in advance, and information about the mode is known in each PLC device 10. In the following description, the transmission path information is, for example, the SNR (Signal-to-Noise Ratio) of the carrier (carrier wave) corresponding to each channel, and the communication speed (PHY speed) in the physical layer obtained from the SNR result. Note that this PHY speed can be calculated from the number of bits that can be transmitted per symbol. In the case of multi-hop communication, the transmission path information can use the link cost calculated to determine the multi-hop communication path.

[0122] In the second pattern, the PLC master device (e.g., PLC device 10A) according to the first embodiment acquires transmission path information obtained by observing a PLC slave device (e.g., PLC device 10B) while scanning channels, and transmits this acquired transmission path information for each channel to the control device 50 (see FIG. 1). The control device 50 selects (determines) a channel and mode to be used in power line communication based on the transmission path information for each channel transmitted from the PLC master device, and transmits the selection result to the PLC master device. The PLC master device transmits the selection result transmitted from the control device 50 to the PLC slave device (including multiple PLC slave devices; the same applies below) to share it.

[0123] As a premise for the explanation of FIG. 13A, for example, a user holds a PLC master (e.g., PLC device 10A) and a PLC slave (e.g., PLC device 10B) and presses and holds a predetermined button (not shown) provided on each housing 100, thereby registering the PLC slave to the PLC master (easy connection). Alternatively, instead of easy connection, the mode of the PLC master and PLC slave may be selected in advance (automatic connection). In the following explanation, the mode is assumed to be 1 / 4 mode, which is compatible with long-distance power line communication. In other words, up to four channels are formed (generated) between 2 MHz and 28 MHz. Furthermore, each of the processes shown in the following FIG. 13A is executed, for example, by the PLC MAC block 11C2.

[0124] In FIG. 13A, the PLC master (e.g., PLC device 10A) starts up on channel CH1 (1 / 4 mode) (St21). The PLC master (e.g., PLC device 10A) transmits control signals (e.g., beacon signals or hello signals) to each of the PLC slave devices (e.g., PLC devices 10B and 10C) to perform predetermined authentication (e.g., confirming that each device holds information known only to the other device). That is, the PLC master (e.g., PLC device 10A) determines whether each of the devices that returned a response signal to the control signal is a legitimate PLC slave device (St22). The PLC master (e.g., PLC device 10A) determines whether a predetermined number of seconds (e.g., 60 seconds) has elapsed since the start of authentication of the PLC slave devices (St23). Authentication of the PLC slave devices continues until the predetermined number of seconds has elapsed (St23, NO).

[0125] On the other hand, if the PLC parent device (e.g., PLC device 10A) determines that a predetermined number of seconds (e.g., 60 seconds) has elapsed since the start of authentication of the PLC child devices (St23, YES), it acquires the transmission path information (see above) for channel CH1 sent from the PLC child device and the number of authenticated devices for channel CH1 (i.e., the number of PLC child devices authenticated on channel CH1) and records them in memory 18 (St24).

[0126] The PLC master device (e.g., PLC device 10A) determines whether scanning of all channels is complete (in other words, whether the number of authenticated devices and transmission path information for each channel is acquired for all channels CH1, CH2, CH3, and CH4 (in 1 / 4 mode)) (St25). If it is determined that scanning of all channels is not complete (NO in St25), the PLC master device (e.g., PLC device 10A) cancels the authentication of the PLC slave device for channel CH1 in step St22 (St26) and changes and sets the current channel (e.g., channel CH1) to another channel (e.g., channel CH2) (St27). After step St27, the process of the PLC master device (e.g., PLC device 10A) returns to step St22. That is, the PLC master device (e.g., PLC device 10A) repeats the processes of steps St22 to St27 until scanning of all channels is complete.

[0127] When the PLC master (e.g., PLC device 10A) determines that scanning of all channels has been completed (St25, YES), it determines and selects a channel that is suitable for power line communication (e.g., a channel with a large number of authenticated devices, a channel with the highest PHY speed, or a channel with the lowest link cost) based on the number of authenticated devices and transmission path information for each channel (St28). The PLC master (e.g., PLC device 10A) transmits information about the channel selected in step St28 to each PLC slave device to share it, and then performs power line communication with the PLC slave devices as normal operation (St29).

[0128] 13B, the PLC slave device starts scanning from the channel CH1 with the smallest frequency band, and after the channel CH4 with the largest frequency band, it loops back to the channel CH1 with the smallest frequency band and continues scanning. Also, each process shown in the following FIG. 13B is executed, for example, in the PLC MAC block 11C2.

[0129] 13B, the PLC slave devices (for example, PLC devices 10B and 10C) start up as channel CH1 (1 / 4 mode) (St31), and acquire transmission path information for channel CH1 by calculation or the like, and store it in memory 18.

[0130] The PLC slave devices (e.g., PLC devices 10B and 10C) determine whether they have detected a control signal transmitted from a PLC master device (e.g., PLC device 10A) (St32). If a control signal transmitted from the PLC master device (e.g., PLC device 10A) is not detected (St32, NO), the PLC slave devices (e.g., PLC devices 10B and 10C) determine whether a predetermined number of seconds (e.g., 60 seconds) has elapsed since they were activated as channel CH1 in step St31 (St33). In other words, the PLC slave devices (e.g., PLC devices 10B and 10C) wait until the predetermined number of seconds elapses in step St33, until they can detect a control signal transmitted from the PLC master device (e.g., PLC device 10A).

[0131] If the PLC slave device (e.g., PLC devices 10B and 10C) does not detect a control signal until the predetermined number of seconds in step St33 has elapsed, it changes the current channel (e.g., channel CH1) to another channel (e.g., channel CH2) and sets it (St34). After step St34, the processing of the PLC slave device (e.g., PLC devices 10B and 10C) returns to step St32. That is, the channel (in other words, the bandwidth used) is changed every predetermined number of seconds in step St33, and it is repeatedly determined for each channel whether a control signal from the PLC master device (e.g., PLC device 10A) has been detected.

[0132] If a PLC slave device (e.g., PLC devices 10B and 10C) determines that it has detected a control signal transmitted from a PLC master device (e.g., PLC device 10A) (St32, YES), it performs a predetermined authentication (e.g., confirming that information known only to each other is held) with the PLC master device (e.g., PLC device 10A) (St35). After the authentication in step St35, the PLC slave device (e.g., PLC devices 10B and 10C) transmits the transmission path information (see above) acquired on the current channel to the PLC master device (e.g., PLC device 10A) (St36).

[0133] 14A, it is assumed that the registration process of PLC slave devices (e.g., PLC devices 10B and 10C) as communication partners of a PLC master device (e.g., PLC device 10A) has been performed in advance. For simplicity of explanation, the initial value of the scanning mode is assumed to be (1 / 4 mode). Each of the processes shown in FIG. 14A below is executed by, for example, processor 53.

[0134] 14A, the control device 50 starts up as channel CH1 in (1 / 4 mode) (St41). The control device 50 determines whether a predetermined number of seconds (e.g., 60 seconds) has passed since starting up as channel CH1 in (1 / 4 mode) (St42). The processing of the control device 50 waits until the predetermined number of seconds has passed (St42, NO). If the control device 50 determines that the predetermined number of seconds has passed (St42, YES), it requests the PLC parent device (e.g., PLC device 10A) to acquire the number of authenticated devices and transmission path information for channel CH1 in (1 / 4 mode) (St43).

[0135] The control device 50 determines whether scanning of all channels has been completed (in other words, whether the number of authenticated devices and transmission path information for each channel has been acquired for all channels CH1, CH2, CH3, and CH4 in (1 / 4 mode), all channels CH1 and CH2 in (1 / 2 mode), and channel CH1 in standard mode) (St44). If it is determined that scanning of all channels has not been completed (St44, NO), the control device 50 transmits a request to change either the channel or the mode and channel to the PLC parent device (e.g., PLC device 10A) (St45). After step St45, the process of the control device 50 returns to step St42. That is, the control device 50 repeats the processes of steps St42 to St45 until scanning of all channels has been completed.

[0136] When the control device 50 determines that scanning of all channels has been completed (St44, YES), it determines and selects a channel that is good for power line communication (e.g., a channel with a large number of authenticated devices, a channel with the highest PHY speed, or a channel with the lowest link cost) based on the number of authenticated devices and transmission path information for each channel (St46).The control device 50 generates a setting instruction for information related to the mode and channel selected in step St46 and transmits it to the PLC parent device (e.g., PLC device 10A) (St47).

[0137] As a premise for the explanation of FIG. 14B, each process shown in FIG. 14B is executed in, for example, the PLC·MAC block 11C2.

[0138] 14B, after starting up (St51), the PLC master device (e.g., PLC device 10A) receives a request to change either the channel or the mode and channel (see step St45) transmitted from the control device 50, and then changes the current channel or the current mode and channel (St52). For example, the PLC master device (e.g., PLC device 10A) changes to channel CH2 (1 / 4 mode).

[0139] A PLC master (e.g., PLC device 10A) transmits a control signal (e.g., a beacon signal or a hello signal) to each of the PLC slave devices (e.g., PLC devices 10B and 10C) to perform a predetermined authentication (e.g., confirming that each device holds information known only to the other device). That is, the PLC master (e.g., PLC device 10A) determines whether each of the devices that have returned a response signal to the control signal is a legitimate PLC slave device (St53). If the PLC master (e.g., PLC device 10A) determines that the authentication of the PLC slave device has been successful, it acquires the transmission path information (see above) for channel CH1 transmitted from the PLC slave device and the number of authenticated devices for channel CH1 (i.e., the number of PLC slave devices authenticated on channel CH1) and records them in memory 18 (St54).

[0140] The PLC master device (e.g., PLC device 10A) transmits a request to the control device 50 to cancel authentication of the PLC slave device for the current channel changed in step St42 (St55). When the PLC master device (e.g., PLC device 10A) receives a request to change either the channel or the mode and channel sent from the control device 50 (see step St45), it changes the current channel or the current mode and channel (St56). For example, the PLC master device (e.g., PLC device 10A) changes to channel CH2 (1 / 4 mode). After step St56, the processing of the PLC master device (e.g., PLC device 10A) returns to step St53. That is, the PLC master device (e.g., PLC device 10A) repeats the processing of steps St43 to St46 until scanning of all channels is completed.

[0141] As a premise for the explanation of Figure 14C, the PLC slave device starts scanning channels, or modes and channels, in the order of (1 / 4 mode) channels CH1, CH2, CH3, CH4, (1 / 2 mode) channels CH1, CH2, and standard mode channel CH1, and after standard mode, it loops back to (1 / 4 mode) channel CH1 to continue scanning. Also, each process shown in Figure 14C below is executed, for example, by the PLC MAC block 11C2.

[0142] 14C, the PLC slave devices (for example, PLC devices 10B and 10C) start up as channel CH1 (1 / 4 mode) (St61), acquire transmission path information for channel CH1 by calculation or the like, and store it in memory 18.

[0143] The PLC slave devices (e.g., PLC devices 10B and 10C) determine whether they have detected a control signal transmitted from a PLC master device (e.g., PLC device 10A) (St62). If they have not detected a control signal transmitted from the PLC master device (e.g., PLC device 10A) (NO in St62), they determine whether a predetermined number of seconds (e.g., 15 seconds) has elapsed since they started up on channel CH1 in step St61 (St63). That is, the PLC slave devices (e.g., PLC devices 10B and 10C) wait until the predetermined number of seconds elapses in step St63 until they can detect a control signal transmitted from the PLC master device (e.g., PLC device 10A). This predetermined number of seconds is shorter than the predetermined number of seconds (e.g., 60 seconds) counted by the PLC master device (e.g., PLC device 10A) since the PLC slave device authentication started in step St23. This is because if the PLC slave devices switch channels at the same intervals as the PLC master device, the PLC master device cannot thoroughly examine all channels. It is more preferable that the channel switching period of the PLC slave devices (i.e., the "predetermined seconds" in step St63) be equal to or less than the period of the PLC master device (i.e., the "predetermined seconds" in step St23) divided by the number of channels. This allows the PLC master device to more reliably secure time to scan all channels. For example, if the period of the PLC master device is 60 seconds and the number of channels is 4, it is preferable that the period of the PLC slave devices be 15 seconds or less.

[0144] If the PLC slave device (e.g., PLC device 10B, 10C) does not detect a control signal until the predetermined number of seconds in step St63 has elapsed, it changes the current channel (e.g., channel CH1) to another channel (e.g., channel CH2) and sets it (St64). After step St64, the processing of the PLC slave device (e.g., PLC device 10B, 10C) returns to step St62. That is, the channel (in other words, the bandwidth used) is changed every predetermined number of seconds in step St63, and it is repeatedly determined for each channel whether a control signal from the PLC master device (e.g., PLC device 10A) has been detected.

[0145] If a PLC slave device (e.g., PLC devices 10B and 10C) determines that it has detected a control signal transmitted from a PLC master device (e.g., PLC device 10A) (St62, YES), it performs a predetermined authentication (e.g., confirming that information known only to each other is held) with the PLC master device (e.g., PLC device 10A) (St65). After the authentication in step St65, the PLC slave device (e.g., PLC devices 10B and 10C) transmits the transmission path information (see above) acquired on the current channel to the PLC master device (e.g., PLC device 10A) (St66).

[0146] As described above, in the wired communication system 1000 according to the first embodiment, the PLC device 10 selects, in the PLC MAC block 11C2 (an example of a selection unit), a mode that specifies the number of one or more channels provided within a predetermined frequency band (e.g., 2 MHz to 30 MHz) used for communication with another PLC device 10 (an example of another communication device) via a wired medium (e.g., power line 1A), and a channel to be used for communication in that mode. Depending on the selected mode and channel, the PLC device 10 performs digital signal processing on input data (e.g., resampling data) input to the main IC to generate a communication frame to be used for communication in the PLC PHY block 11B2 (an example of a signal processing unit).

[0147] As a result, compared to conventional power line communications using a single channel within an available frequency band (e.g., 2 MHz to 30 MHz), PLC device 10 according to the first embodiment can adaptively select a channel suitable for power line communications from among multiple channels within the frequency band, taking into consideration noise characteristics and signal attenuation characteristics, and perform good power line communications using the selected channel according to the conditions of the transmission path. Therefore, PLC device 10 according to the first embodiment can adaptively perform wired power line communications that achieve desired communication characteristics to meet user requirements (e.g., long distance, high speed, or both). Furthermore, because PLC device 10 can form multiple channels within a frequency band of, for example, 2 MHz to 30 MHz, it can perform good power line communications asynchronously with other PLC devices (e.g., multiple security cameras) connected to PLC device 10 while achieving communication performance that meets long distance, high speed, or both. This facilitates real-time monitoring and other similar functions. Furthermore, the PLC device 10 can be implemented with a main IC 11 that incorporates a PLC MAC block 11C and a PLC PHY block 11B on a single chip, enabling wired communication that supports high speeds and power line communication that supports long distances, making it easy to configure by incorporating a scalable integrated circuit (IC).

[0148] Furthermore, as digital signal processing, the PLC device 10 multiplies the sampling period of the input data, samples the input data, and then resamples the sampled input data. As a result, the PLC device 10 changes the Nyquist frequency by multiplying the sampling period before resampling, so even after resampling, it can return to the original Nyquist frequency (e.g., fs4 / 2) used for communication before resampling, making it possible to easily form a channel according to the selected mode and channel.

[0149] Furthermore, as part of the digital signal processing, the PLC device 10 converts the frequency band of the resampled input data into a frequency band corresponding to the selected channel, thereby enabling the PLC device 10 to form a channel that satisfies the frequency band (e.g., a higher frequency band) of the selected channel within a frequency band (e.g., 2 MHz to 30 MHz) that can be used in power line communications.

[0150] Furthermore, as part of the digital signal processing, the PLC device 10 resamples the input data after frequency conversion (frequency shifting), which allows the PLC device 10 to form a channel that satisfies the frequency band (e.g., a higher or lower frequency band) of the selected channel within the frequency band (e.g., 2 MHz to 30 MHz) that can be used in power line communications.

[0151] The PLC device 10 also selects a clock frequency that can be multiplied and performs signal processing of input data based on the selected clock frequency. This allows the PLC device 10 to operate at a faster clock frequency than in standard mode, where the clock frequency is not multiplied, thereby enabling power line communication that is more adaptable to higher speeds. For example, when the clock frequency is multiplied by two, the PLC device 10 can perform wired communication (using, for example, a coaxial cable as the wired medium) in double mode, which provides a throughput of approximately 500 Mbps. When the clock frequency is multiplied by four, the PLC device 10 can perform wired communication (using, for example, a coaxial cable as the wired medium) in quadruple mode, which provides a throughput of approximately 1 Gbps.

[0152] The PLC device 10 also includes a communication unit (e.g., a power connector 21) that communicates with other PLC devices 10 via a wired medium. The PLC device 10 receives transmission path information transmitted from the other PLC devices 10 using one or more channels, and selects a channel to use for communication between itself and the other PLC devices 10 based on the received transmission path information for each channel. This allows the PLC device 10 (PLC master) to adaptively select a channel with a good transmission path condition in accordance with the status of the power line 1A (i.e., the status of the transmission path) between the PLC device 10 and the other PLC devices 10 (PLC slaves), thereby enabling power line communication.

[0153] The PLC device 10 also includes a first communication unit (e.g., power connector 21) for communicating with other PLC devices 10 via a wired medium, and a second communication unit (e.g., modular jack 22) for communicating with a control device 50 (an example of an external device) via a wired medium, which determines the channel to be used for communication between the PLC device 10 and the other PLC devices 10. The PLC device 10 receives transmission path information transmitted from the other PLC devices 10 using one or more channels, and transmits the received transmission path information for each channel transmitted from the other PLC devices 10 to the control device 50. The PLC device 10 (PLC master) receives from the control device 50 information regarding the channel or mode and channel to be used for communication determined by the control device 50, and selects the channel to be used for communication between the PLC device 10 and the other PLC devices 10 according to the received information regarding the channel or mode and channel to be used for communication. This allows the PLC device 10 (PLC parent device) to adaptively select a channel that is suitable for the status of the power line 1A (i.e., the status of the transmission path) between it and another PLC device 10 (PLC child device) based on the channel determined by the control device 50 or information regarding the mode and channel, without the device itself having to make any decisions, thereby enabling power line communication.

[0154] Although various embodiments have been described above with reference to the drawings, it goes without saying that the present disclosure is not limited to such examples. It is clear that a person skilled in the art can conceive of various modifications or alterations within the scope of the claims, and it is understood that these also naturally fall within the technical scope of the present disclosure. Furthermore, the components of the various embodiments described above may be combined in any manner without departing from the spirit of the invention.

[0155] In the first embodiment described above, the standard mode, (1 / 2 mode), (1 / 4 mode), double mode, and quadruple mode are given as examples of modes, but the modes are not limited to these. For example, (1 / 8 mode) and eighth mode are also possible, and the PLC device 10 can form a channel to satisfy the mode and channel selected based on the status of the transmission path between other PLC devices 10. [Industrial Applicability]

[0156] The present disclosure is useful as a communication device and a communication signal generation method that adaptively performs wired power line communication, which can obtain desired communication characteristics that meet user requirements. [Explanation of symbols]

[0157] 1A power line 1B power cable 2 power outlets 10, 10A, 10B, 10C PLC equipment 11 Main IC 11A CPU 11B1, 11B2 PLCPHY blocks 11C1, 11C2 PLCMAC block 12 AFEIC 12A DA converter 12B, 12C variable amplifier 12D AD converter 13 Low-pass filter 15 Driver IC 16 Coupler 16A coil transformer 16B, 16C Coupling capacitors 17 Bandpass Filter 18,52 memory 19 Wired PHY IC 20 Switching power supply 21 Power connector 22 Modular jack 23 LED 24 AC-DC converter 25 Power plug 26 LAN cable 27 Impedance Upper 27A, 27B coils 30 Circuit Module 50 Control device 51 Communication Interface 53 processors 54 Input / Output Interface 55 Storage 60 AC Cycle Detector 100 cabinets 1000 Communication Systems CH1~CH4 communication channels

Claims

1. a selection unit that selects one mode from a plurality of modes that are defined within a predetermined frequency band used for communication with other communication devices via a wired medium, each mode defining a different number of channels, and selects a channel in the selected mode; a communication unit that acquires the authenticated numbers of the one or more other communication devices corresponding to each of the one or more channels in the selected mode, the selection unit selects a channel to be used for the communication based on the acquired number of authenticated other communication devices for each channel. Communication equipment.

2. a signal processing unit that performs signal processing on input data to generate a communication frame in accordance with the selected mode and channel; The signal processing unit performs the signal processing by multiplying the sampling period of the input data and sampling the input data, and resampling the input data after the sampling. The communication device according to claim 1 .

3. The signal processing unit further converts the frequency band of the resampled input data into a frequency band corresponding to the selected channel. The communication device according to claim 2 .

4. The signal processing unit further performs resampling of the converted input data as the signal processing. The communication device according to claim 3 .

5. the communication unit further acquires at least one piece of information of a communication speed with one or more of the other communication devices and a link cost with one or more of the other communication devices; the selection unit selects a channel to be used for the communication based on the information further acquired by the communication unit. The communication device according to claim 1 .

6. A communication method in a communication device, comprising: selecting one mode from a plurality of modes each defining a different number of channels, the modes being defined within a predetermined frequency band used for communication with another communication device via a wired medium; obtaining the number of authenticated devices of one or more other communication devices corresponding to each of one or more channels in the selected mode; When selecting the channel, a channel to be used for the communication is selected based on the acquired number of authenticated other communication devices for each channel. Communication method.

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