Transmitting device and receiving device

Abstract

To improve the transmission performance by using an optimal signal point allocation mapping rule according to a modulation scheme and an error correction code in an SC-FDE system.SOLUTION: An RS encoding portion 14 of a transmission device 1 performs encoding using a shortened RS (204, 188) code as an outer code. A convolutional coding unit 16 performs coding using a convolutional code with a predetermined coding rate as the inner code. A mapping portion 20 performs mapping on a signal sequence according to a preset mapping rule. For the signal point arrangement of the mapping rule, when the modulation method is 16APSK, the radius ratio R12 is set to 2.86, 3.15, 2.88, 2.93 according to the coding rate of the convolutional code 1 / 2, 2 / 3, 3 / 4, and 5 / 6. When the modulation method is 32APSK, the radius ratios R12 are set to 2.79, 3.16, 2.87 and 2.91, and the radius ratios R13 are set to 5.29, 5.79, 5.20, and 5.11.SELECTED DRAWING: Figure 10

Description

[Technical Field]

[0001] The present invention relates to a transmitting device and a receiving device that can be used in a broadcast or wireless transmission system. [Background technology]

[0002] Conventionally, single-carrier systems using one carrier have been widely used in fixed-transmission wireless transmission systems for broadcasting, communications, etc. In recent years, among single-carrier systems, a single-carrier-frequency-domain equalization (SC-FDE) system has been proposed, which performs channel equalization in the frequency domain (a process of restoring amplitude and phase changes that occur in a propagation path) (see, for example, Patent Document 1).

[0003] Like the Orthogonal Frequency Division Multiplexing (OFDM) system, the SC-FDE system performs channel estimation and channel equalization in the frequency domain on a block-by-block basis, enabling it to track rapid channel fluctuations in mobile transmission. Therefore, the SC-FDE system is more suitable for mobile transmission than the single-carrier system, which performs channel equalization in the time domain.

[0004] Furthermore, SC-FDE can prevent inter-block interference in a multipath environment by providing a guard interval, just like OFDM. A receiver using SC-FDE first performs block synchronization to detect the beginning of a block, extracts a pilot signal (UW: Unique Word) and data for channel estimation, and converts the time-domain signal into a frequency-domain signal using a Fourier transform.

[0005] Next, the receiving device performs channel estimation using the UW converted to the frequency domain, and uses the obtained propagation path information to perform equalization on the frequency domain data using ZF (Zero-Forcing) or MMSE (Minimum Mean Square Error) standards.

[0006] Finally, the receiving device converts the equalized frequency domain data back into the time domain and performs processing such as symbol determination. During the symbol determination processing, the receiving device compares the received signal with the signal points of a signal point constellation based on a preset mapping rule and calculates the likelihood.

[0007] In this mapping rule, when no error correction is performed in a transmitter using SC-FDE, it is generally believed that the error rate can be improved by using a signal constellation that maximizes the minimum Euclidean distance. Here, the signal constellation that maximizes the minimum Euclidean distance is a signal constellation that maximizes the distance between each signal point and its adjacent signal point (signal point with the smallest Euclidean distance) under constant power conditions (conditions under which the average power of all signal points in the data part is normalized to 1).

[0008] However, when performing error correction, it is known that the error rate relative to the C / N ratio (carrier-to-noise ratio) varies depending on the type and coding rate of the error correction code and the signal constellation. That is, there exists a signal constellation that can minimize the required C / N, which is the C / N for achieving a required error rate (see, for example, Non-Patent Document 1). [Prior art documents] [Patent documents]

[0009] [Patent Document 1] Japanese Patent Application Publication No. 2018-6796 [Non-patent literature]

[0010] [Non-Patent Document 1] Fumiya Yamagishi,etc,“Distortion Compensation Method on SC-FDE Modulation using for 42-GHz band UHDTV Wireless Camera”,2021 IEEE Radio and Wireless Symposium,pp.91-93,Jan.2021. Summary of the Invention [Problem to be solved by the invention]

[0011] As described above, in the SC-FDE scheme, the optimum signal constellation of data varies depending on the modulation scheme and error correction code.

[0012] Therefore, if an optimal signal constellation mapping rule can be used depending on the modulation method and error correction code, it is expected that transmission performance can be improved.

[0013] Therefore, the present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a transmitting device and a receiving device that can improve transmission performance in an SC-FDE system by using an optimal signal point mapping rule according to a modulation system and an error correction code. [Means for solving the problem]

[0014] In order to solve the above problem, the transmitter of claim 1 is an SC-FDE type transmitter that performs error correction coding on a signal to be transmitted using a predetermined outer code and inner code and performs mapping according to a mapping rule of a predetermined modulation method, and when the modulation method is 16APSK, two concentric circles are defined on an IQ axis, and on the circumference of the inner concentric circle, four signals are arranged at equal intervals of π / 2 from a position of π / 4 in a counterclockwise direction about the I axis, and on the circumference of the outer concentric circle, 12 signals are arranged at equal intervals of π / 6 from a position of π / 12 in a counterclockwise direction about the I axis, and a radius ratio R 12 = r2 / r1, and when the modulation method is 32APSK, three concentric circles are defined on the IQ axis, and on the circumference of the innermost concentric circle, four signals are arranged at equal intervals of π / 2 from a position of π / 4 counterclockwise around the I axis, and on the circumference of the concentric circle between the innermost and outermost concentric circles, A signal point constellation is such that 12 signals are arranged at equal intervals of π / 6 from a position of π / 12 in a counterclockwise direction about the I axis, and 16 signals are arranged at equal intervals of π / 8 from a position of π / 8 in a counterclockwise direction about the I axis on the circumference of the outermost concentric circle, and the radius of the innermost concentric circle is r1, the deformation of the concentric circle between the innermost concentric circle and the outermost concentric circle is r2, and the radius of the outermost concentric circle is r3, and a radius ratio R 12 = r2 / r1 and radius ratio R 13 a mapping unit that performs mapping on the signal sequence that has been subjected to the error correction coding using the mapping rule according to the signal point arrangement of r = r3 / r1, wherein the outer code is an RS code and the inner code is a convolutional code In the case where When the modulation method is 16APSK, when the coding rate of the convolutional code is 1 / 2, the radius ratio R 12 = 2.86, and when the coding rate of the convolutional code is 2 / 3, the radius ratio R 12= 3.15, and when the coding rate of the convolutional code is 3 / 4, the radius ratio R 12 = 2.88, and when the coding rate of the convolutional code is 5 / 6, the radius ratio R 12 = 2.93, and when the modulation method is 32APSK, when the coding rate of the convolutional code is 1 / 2, the radius ratio R 12 = 2.79 and the radius ratio R 13 = 5.29, and when the coding rate of the convolutional code is 2 / 3, the radius ratio R 12 = 3.16 and the radius ratio R 13 = 5.79, and when the coding rate of the convolutional code is 3 / 4, the radius ratio R 12 = 2.87 and the radius ratio R 13 = 5.20, and when the coding rate of the convolutional code is 5 / 6, the radius ratio R 12 = 2.91 and the radius ratio R 13 =5.11.

[0015] A transmitting apparatus according to claim 2 is the transmitting apparatus according to claim 1, wherein the outer code is a BCH code and the inner code is an LDPC code. In the case where When the modulation method is 16APSK, when the coding rate of the LDPC code is 1 / 2, the radius ratio R 12 = 3.38, and when the coding rate of the LDPC code is 2 / 3, the radius ratio R 12 = 3.36, and when the coding rate of the LDPC code is 3 / 4, the radius ratio R 12 = 3.06, and when the coding rate of the LDPC code is 5 / 6, the radius ratio R 12 = 2.82, and when the modulation method is 32APSK, when the coding rate of the LDPC code is 1 / 2, the radius ratio R 12 = 3.24 and the radius ratio R 13 = 7.00, and when the coding rate of the LDPC code is 2 / 3, the radius ratio R 12 = 3.35 and the radius ratio R 13 = 6.64, and when the coding rate of the LDPC code is 3 / 4, the radius ratio R 12 = 3.07 and the radius ratio R 13= 5.87, and when the coding rate of the LDPC code is 5 / 6, the radius ratio R 12 = 2.81 and the radius ratio R 13 =5.05.

[0016] Furthermore, a receiving device of claim 3 is an SC-FDE receiving device that receives a modulated radio signal from an SC-FDE transmitting device that has been subjected to error correction coding using predetermined outer and inner codes and mapping using a mapping rule for a predetermined modulation scheme, equalizes the received signal in the frequency domain, demaps a time domain signal related to a data portion after equalization using the same mapping rule as the mapping rule for the modulation scheme, calculates a bit likelihood, and decodes the bit likelihood sequence. In this SC-FDE receiving device, when the modulation scheme is 16APSK, two concentric circles are defined on an IQ axis, and on the circumference of the inner concentric circle, four signals are arranged at equal intervals of π / 2 from a position of π / 4 in a counterclockwise direction about the I axis, and on the circumference of the outer concentric circle, 12 signals are arranged at equal intervals of π / 6 from a position of π / 12 in a counterclockwise direction about the I axis, and the radius of the inner concentric circle is r1 and the radius of the outer concentric circle is r2, and a radius ratio R 12 Using the mapping rule according to the signal point arrangement of r = r2 / r1, symbol determination is performed by demapping the time domain signal for the equalized data portion, and when the modulation method is 32APSK, assuming that three concentric circles are defined on the IQ axis, four signals are arranged on the circumference of the innermost concentric circle at equal intervals of π / 2 from a position of π / 4 counterclockwise around the I axis, and the concentric circles between the innermost and outermost concentric circles are On the circumference, 12 signals are arranged at equal intervals of π / 6 from the position of π / 12 in the counterclockwise direction about the I axis, and on the circumference of the outermost concentric circle, 16 signals are arranged at equal intervals of π / 8 from the position of π / 8 in the counterclockwise direction about the I axis, and the radius of the innermost concentric circle is r1, the deformation of the concentric circle between the innermost concentric circle and the outermost concentric circle is r2, and the radius of the outermost concentric circle is r3, and the radius ratio R12 = r2 / r1 and radius ratio R 13 a symbol decision unit that performs symbol decision by demapping a time domain signal related to the equalized data portion using the mapping rule according to the signal point arrangement of r = r3 / r1, wherein the outer code is an RS code, and the inner code is a convolutional code In the case where When the modulation method is 16APSK, when the coding rate of the convolutional code is 1 / 2, the radius ratio R 12 = 2.86, and when the coding rate of the convolutional code is 2 / 3, the radius ratio R 12 = 3.15, and when the coding rate of the convolutional code is 3 / 4, the radius ratio R 12 = 2.88, and when the coding rate of the convolutional code is 5 / 6, the radius ratio R 12 = 2.93, and when the modulation method is 32APSK, when the coding rate of the convolutional code is 1 / 2, the radius ratio R 12 = 2.79 and the radius ratio R 13 = 5.29, and when the coding rate of the convolutional code is 2 / 3, the radius ratio R 12 = 3.16 and the radius ratio R 13 = 5.79, and when the coding rate of the convolutional code is 3 / 4, the radius ratio R 12 = 2.87 and the radius ratio R 13 = 5.20, and when the coding rate of the convolutional code is 5 / 6, the radius ratio R 12 = 2.91 and the radius ratio R 13 =5.11.

[0017] The receiving device of claim 4 is the receiving device of claim 3, wherein the outer code is a BCH code and the inner code is an LDPC code. In the case where When the modulation method is 16APSK, when the coding rate of the LDPC code is 1 / 2, the radius ratio R 12 = 3.38, and when the coding rate of the LDPC code is 2 / 3, the radius ratio R 12 = 3.36, and when the coding rate of the LDPC code is 3 / 4, the radius ratio R 12= 3.06, and when the coding rate of the LDPC code is 5 / 6, the radius ratio R 12 = 2.82, and when the modulation method is 32APSK, when the coding rate of the LDPC code is 1 / 2, the radius ratio R 12 = 3.24 and the radius ratio R 13 = 7.00, and when the coding rate of the LDPC code is 2 / 3, the radius ratio R 12 = 3.35 and the radius ratio R 13 = 6.64, and when the coding rate of the LDPC code is 3 / 4, the radius ratio R 12 = 3.07 and the radius ratio R 13 = 5.87, and when the coding rate of the LDPC code is 5 / 6, the radius ratio R 12 = 2.81 and the radius ratio R 13 =5.05. [Effects of the Invention]

[0018] As described above, according to the present invention, in the SC-FDE scheme, transmission performance can be improved by using an optimal signal constellation mapping rule according to the modulation scheme and error correction code. [Brief explanation of the drawings]

[0019] [Figure 1] 1 is a block diagram illustrating a schematic configuration example of a transmission device according to an embodiment of the present invention. [Figure 2] FIG. 10 is a block diagram illustrating a configuration and processing example of a byte interleaving unit. [Figure 3] FIG. 2 is a block diagram illustrating a configuration and a processing example of a convolutional encoding unit. [Figure 4] 10A and 10B are diagrams illustrating puncturing patterns for each coding rate in a convolutional coding unit. [Figure 5] FIG. 10 is a block diagram illustrating the configuration and processing example of a bit interleaving unit when the modulation method is 16APSK. [Figure 6] FIG. 10 is a block diagram illustrating the configuration and processing example of a bit interleaving unit when the modulation method is 32APSK. [Figure 7] FIG. 10 is a block diagram illustrating a configuration and processing example of a time interleaving unit. [Figure 8] FIG. 10 is a diagram illustrating a signal point arrangement when the modulation method is 16APSK. [Figure 9] FIG. 10 is a diagram illustrating a signal point arrangement when the modulation method is 32APSK. [Figure 10] FIG. 10 is a diagram illustrating radius ratios for each coding rate when the modulation scheme is 16APSK or 32APSK. [Figure 11] FIG. 10 is a diagram illustrating the relationship between the radius ratio r2 / r1 and the BER for each coding rate when the modulation scheme is 16APSK. [Figure 12] 10 is a diagram illustrating a method for calculating radius ratios R12 and R13 when the modulation method is 32APSK. FIG. [Figure 13] FIG. 10 is a diagram illustrating an example of the configuration of an SC-FDE block symbol sequence. [Figure 14] 1 is a block diagram illustrating a schematic configuration example of a receiving device according to an embodiment of the present invention. [Figure 15] FIG. 10 is a block diagram showing a schematic configuration example of a transmission device according to another embodiment of the present invention. [Figure 16] FIG. 10 is a diagram illustrating an example of an FEC block configuration. [Figure 17] 10 is a diagram showing an approximate LDPC coding rate, an LDPC coding rate, the number of block header bits H, the number of main signal bits D, etc. [Figure 18] 10A and 10B are diagrams illustrating a configuration of an energy diffusion unit and an example of processing; [Figure 19] FIG. 10 is a diagram illustrating radius ratios of each coding rate when the modulation scheme is 16APSK or 32APSK in another embodiment of the present invention. [Figure 20] FIG. 10 is a diagram illustrating the relationship between the radius ratio r2 / r1 and the BER for each coding rate when the modulation scheme is 16APSK in another embodiment of the present invention. [Figure 21] FIG. 10 is a block diagram showing a schematic configuration example of a receiving device according to another embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0020] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. The present invention is characterized in that, in an SC-FDE scheme, a concatenated code is used in which an inner code of an error correction code is a convolutional code and an outer code is a Reed Solomon (RS) code, and when the modulation scheme is 16APSK (Amplitude and Phase Shift Keying) or 32APSK, an optimal signal constellation mapping rule is used when mapping signals in a transmitting device or when demapping signals in a receiving device.

[0021] Furthermore, the present invention is characterized in that in an SC-FDE scheme, a concatenated code is used in which the inner code of the error correction code is an LDPC (Low Density Parity Check) code and the outer code is a BCH code, and when the modulation scheme is 16APSK or 32APSK, an optimal signal point arrangement mapping rule is used when mapping signals in a transmitting device or when demapping signals in a receiving device.

[0022] [Transmitting device] First, a transmitting device according to an embodiment of the present invention will be described. In this example, a convolutional code is used as the inner code of an error correcting code, and an RS code is used as the outer code. Fig. 1 is a block diagram showing a schematic configuration example of a transmitting device according to an embodiment of the present invention. This transmitting device 1 is a device that uses a single carrier scheme that enables channel equalization in the frequency domain in an SC-FDE wireless transmission system, and when the modulation scheme for the data part is 16APSK or 32APSK, it uses a mapping rule based on a signal point arrangement with a radius ratio shown in Figs. 8 to 10, which will be described later.

[0023] This transmitting device 1 includes a DVB-ASI (Digital Video Broadcasting-Asynchronous Serial Interface) input I / F (Interface) unit 11, a frame synchronization unit 12, an energy dispersal unit 13, an RS coding unit 14, a byte interleaving unit 15, a convolution coding unit 16, a delay correction unit 17, a bit interleaving unit 18, a time interleaving unit 19, a mapping unit 20, a UW generation unit 21, an SC block construction unit 22, a band-limiting filter unit 23, an orthogonal modulation unit 24, a DA (digital / analog) conversion unit 25, a frequency conversion unit 26, a power amplification unit 27, and a transmitting antenna 28.

[0024] A DVB-ASI format signal (hereinafter referred to as a "DVB-ASI signal") to be transmitted is input to the DVB-ASI input I / F unit 11. The DVB-ASI input I / F unit 11 then extracts a 204-byte or 188-byte TS signal in TS (Transport Stream) packet units from the DVB-ASI signal and outputs the TS signal to the frame synchronization unit 12.

[0025] If the rate of the TS signal is smaller than the transmission capacity, the DVB-ASI input I / F unit 11 performs appropriate buffer processing, such as inserting NULL packets.

[0026] The frame synchronization unit 12 receives the TS signal from the DVB-ASI input I / F unit 11, frames the packets included in the TS signal in units of eight packets, and performs frame synchronization by replacing the first byte of the frame with 0xB8, which is the inverse of the TS synchronization byte (0x47).The frame synchronization unit 12 then outputs a frame, each consisting of eight TS packets after frame synchronization, to the energy dispersal unit 13.

[0027] The energy dispersal unit 13 receives a frame, each consisting of eight TS packets after frame synchronization, from the frame synchronization unit 12, and performs energy dispersal by adding a pseudo-random sequence to the TS packets included in the frame.The energy dispersal unit 13 then outputs the frame after energy dispersal to the RS encoding unit 14.

[0028] The RS encoding unit 14 inputs the frame after energy diffusion from the energy diffusion unit 13, and performs encoding (error correction encoding) on ​​the frame using a shortened RS (204,188) code (a shortened RS code with a coding rate of 188 / 204) as an outer code of the error correction code. Then, the RS encoding unit 14 outputs the encoded frame to the byte interleaving unit 15.

[0029] The byte interleaving unit 15 receives the coded frame from the RS coding unit 14 , interleaves the frame on a byte-by-byte basis, and outputs the byte-interleaved byte sequence to the convolution coding unit 16 .

[0030] 2 is a block diagram illustrating the configuration and processing example of the byte interleaving unit 15. M indicates a cell length of 17. In the byte interleaving unit 15, an input-side switch switches the input coded frame bit stream byte by byte and stores it in multiple FIFO buffers, and an output-side switch switches the bit stream read from the multiple FIFO buffers byte by byte, thereby performing byte interleaving.

[0031] Specifically, the byte interleaving unit 15 performs convolutional interleaving by sequentially supplying the 204-byte bitstream of the encoded frame, one byte per path, to 12 paths arranged so that blocks with a delay of 17 bytes per block have a delay of (N-1) blocks for the nth path.

[0032] 1, the convolutional coding unit 16 receives the byte sequence from the byte interleaving unit 15 and performs error correction coding on the byte sequence using a convolutional code with a predetermined coding rate as an inner code of the error correction code. The convolutional coding unit 16 then outputs the coded byte sequence to the delay correction unit 17.

[0033] 3 is a block diagram illustrating the configuration and processing example of the convolutional encoder 16. The convolutional encoder 16 encodes the byte sequence data Din using a convolutional code with a constraint length of 7, a coding rate of 1 / 2, and generator polynomials G1=171 octets and G2=133 octets as the original codes. In this embodiment of the present invention, the coding rates correspond to 1 / 2, 2 / 3, 3 / 4, and 5 / 6.

[0034] 4 is a diagram illustrating puncturing patterns for each coding rate in convolutional coding section 16. The puncturing patterns and transmission signal sequences for each of coding rates 1 / 2, 2 / 3, 3 / 4, and 5 / 6 are as shown in FIG.

[0035] For example, when the coding rate is 1 / 2, the puncturing pattern is X:1, Y:1, and the transmission signal sequence is X1, Y1.

[0036] Returning to Fig. 1, the delay correction unit 17 receives the coded byte sequence from the convolutional coding unit 16. The delay correction unit 17 then performs delay correction on the byte sequence, corresponding to the amount of delay generated in the bit interleaving unit 18 on the modulation side and in the bit deinterleaving unit 45 on the demodulation side shown in Fig. 14 (described later), in accordance with the modulation method of the data portion. The delay correction unit 17 outputs the delay-corrected byte sequence to the bit interleaving unit 18.

[0037] The bit interleaving unit 18 receives the delay-corrected byte sequence from the delay correction unit 17 , performs bit-by-bit interleaving on the byte sequence, and outputs the bit-interleaved signal sequence to the time interleaving unit 19 .

[0038] 5 is a block diagram illustrating a configuration and processing example of the bit interleave unit 18 when the modulation method is 16APSK. The bit interleave unit 18 performs serial / parallel conversion on the byte sequence of bit data b0, b1, b2, b3, b4, b5, ... input from the delay correction unit 17 in an S / P (serial / parallel) conversion unit.

[0039] The bit interleave unit 18 outputs the input bit data b0 and b4 as is, delays the input bit data b1 and b5 by 40 bits (in the delay unit) and outputs the 40-bit delayed bit data b1 and b5, delays the input bit data b2 by 80 bits and outputs the 80-bit delayed bit data b2, and delays the input bit data b3 by 120 bits and outputs the 120-bit delayed bit data b3.

[0040] 6 is a block diagram illustrating the configuration and processing example of the bit interleave unit 18 when the modulation method is 32APSK. The bit interleave unit 18 performs serial / parallel conversion on the byte sequence of bit data b0, b1, b2, b3, b4, b5, ... input from the delay correction unit 17 using an S / P conversion unit.

[0041] The bit interleave unit 18 outputs the input bit data b0 and b5 as is, delays the input bit data b1 by 30 bits (in the delay unit), and outputs the 30-bit delayed bit data b1. The bit interleave unit 18 also delays the input bit data b2 by 60 bits and outputs the 60-bit delayed bit data b2, and delays the input bit data b3 by 90 bits and outputs the 90-bit delayed bit data b3. The bit interleave unit 18 also delays the input bit data b4 by 120 bits and outputs the 120-bit delayed bit data b4.

[0042] Returning to FIG. 1, the time interleaving unit 19 receives the bit-interleaved signal sequence from the bit interleaving unit 18, performs time interleaving on the signal sequence, and outputs the time-interleaved signal sequence to the mapping unit 20.

[0043] 7 is a block diagram illustrating the configuration and processing example of the time interleaving unit 19. The time interleaving unit 19 distributes the symbols of the signal sequence input from the bit interleaving unit 18 on the time axis by convolutional interleaving using i+1 symbol buffers.

[0044] However, m i =(i×5) mod n c and n c indicates the number of data symbols in the input signal sequence, i indicates the symbol number, and I indicates an arbitrary value. i indicates the length of the symbol buffer, and is an integer rounded down to the nearest whole number.

[0045] Returning to Figure 1, the mapping unit 20 inputs the time-interleaved signal sequence from the time interleaving unit 19, maps the signal sequence according to a preset mapping rule, and outputs the mapped data symbols to the SC block construction unit 22.

[0046] Figure 8 is a diagram illustrating a signal point constellation when the modulation method is 16APSK. When the modulation method is 16APSK, if two concentric circles α1 and α2 are defined on the IQ axis, the signal point constellation is such that four signals are arranged on the circumference of the inner concentric circle α1 at equal intervals of π / 2 from the position φ=π / 4 in a counterclockwise direction around the I axis. Also, the signal point constellation is such that 12 signals are arranged on the circumference of the outer concentric circle α2 at equal intervals of π / 6 from the position π / 12 in a counterclockwise direction around the I axis.

[0047] As shown in Figure 8, four bits of the input signal sequence are mapped to each signal point. The radius of the concentric circle α1 is r1, and the radius of the concentric circle α2 is r2.

[0048] 9 is a diagram illustrating a signal point constellation when the modulation method is 32APSK. When the modulation method is 32APSK, if three concentric circles β1, β2, and β3 are defined on the I and Q axes, the signal point constellation will be such that four signals are arranged on the circumference of the innermost concentric circle β1 at equal intervals of π / 2 from the position π / 4 counterclockwise around the I axis.

[0049] Furthermore, as a signal point arrangement, 12 signals are arranged on the circumference of concentric circle β2 between the innermost concentric circle β1 and the outermost concentric circle β3 at equal intervals of π / 6 from the position π / 12 counterclockwise around the I axis.Furthermore, 16 signals are arranged on the circumference of the outermost concentric circle β3 at equal intervals of π / 8 from the position π / 8 counterclockwise around the I axis.

[0050] As shown in Figure 9, 5 bits of the input signal sequence are mapped to each signal point. The radius of concentric circle β1 is r1, the radius of concentric circle β2 is r2, and the radius of concentric circle β3 is r3.

[0051] 10 is a diagram showing the radius ratio of each coding rate when the modulation method is 16APSK and 32APSK. When the modulation method is 16APSK, the radius ratio R 12 In addition, when the modulation method is 32APSK, the radius ratio R is set to r1, r2, and r3 of the concentric circle β1, β2, and β3, respectively, as shown in FIG. 12 =r2 / r1,R 13 =r3 / r1.

[0052] As shown in FIG. 10, when the modulation method is 16APSK, the signal point arrangement is such that when the coding rate of the convolutional code used in the convolutional coding unit 16 is 1 / 2, the radius ratio R 12 = 2.86, and when the coding rate of the convolutional code is 2 / 3, the radius ratio R 12 = 3.15. In addition, when the coding rate of the convolutional code is 3 / 4, the radius ratio R 12= 2.88, and the coding rate of the convolutional code is 5 / 6, the radius ratio R 12 =2.93.

[0053] When the modulation method is 32APSK, the signal point arrangement is such that when the coding rate of the convolutional code used in the convolutional coding unit 16 is 1 / 2, the radius ratio R 12 =2.79,R 13 = 5.29, and when the coding rate of the convolutional code is 2 / 3, the radius ratio R 12 =3.16,R 13 = 5.79. In addition, when the coding rate of the convolutional code is 3 / 4, the radius ratio R 12 =2.87,R 13 = 5.20, and the coding rate of the convolutional code is 5 / 6, the radius ratio R 12 =2.91,R 13 =5.11.

[0054] In this way, when the modulation method is 16APSK, the mapping unit 20 maps the signal points in the signal constellation shown in FIG. 8 and the radius ratio R 12 The input signal sequence is mapped using the mapping rule of the signal constellation of the above, and mapped data symbols are generated.

[0055] 9 and the radius ratio R 12 ,R 13 The input signal sequence is mapped using the mapping rule of the signal constellation of the above, and mapped data symbols are generated.

[0056] Here, the radius ratio R of each coding rate when the modulation method shown in Figure 10 is 16APSK 12 is obtained by the following calculation method. First, for a signal sequence containing only data, R 12 =r2 / r1=2.7(radius ratio R' 12= 2.70, the error rate after error correction decoding on the demodulation side (BER: Bit Error Rate) is 1 × 10 -4 Then, for this CNR, the radius ratio r2 / r1 is varied in various ways, and the BER for each radius ratio r2 / r1 is calculated.

[0057] The radius ratio R' described in the above-mentioned Non-Patent Document 1 12 =2.70 is the optimum value of the signal constellation that maximizes the minimum Euclidean distance when the modulation method is 16APSK and there is no error correction or noise.

[0058] Figure 11 shows the relationship between the radius ratio r2 / r1 and the BER for each coding rate when the modulation method is 16APSK. Figure 11(1) shows the case of a coding rate of 1 / 2, Figure 11(2) shows the case of a coding rate of 2 / 3, Figure 11(3) shows the case of a coding rate of 3 / 4, and Figure 11(4) shows the case of a coding rate of 5 / 6. The horizontal axis shows the radius ratio r2 / r1, and the vertical axis shows the BER.

[0059] Radius ratio R of each coding rate 12 In the calculation method of the radius ratio R' 12 By calculating the BER for each radius ratio r2 / r1 while changing the radius ratio r2 / r1 in various ways, the characteristics shown in Figures 11(1) to (4) are obtained.

[0060] Then, the radius ratio r2 / r1 at which the BER is minimum is identified from the characteristics shown in Fig. 11 (1) to (4), and the radius ratio r2 / r1 is set as the radius ratio R of the signal point arrangement. 12 Let's say.

[0061] For example, in the case of the coding rate 1 / 2 shown in FIG. 11(1), the conventional radius ratio R' 12 The CNR was calculated as 9.4 dB when the radius ratio was 2.70. The proposed radius ratio 2.86 was identified as the smallest BER among the radius ratios r2 / r1 shown on the horizontal axis. 12 =2.86 is obtained.

[0062] Similarly, in the case of the coding rate of 2 / 3 shown in FIG. 11(2), CNR=11.8 dB is calculated, and the radius ratio R 12 = 3.15 is obtained, and in the case of the coding rate 3 / 4 shown in Figure 11(3), CNR = 13.2 dB is calculated, and the radius ratio R 12 In addition, when the coding rate is 5 / 6 as shown in FIG. 11(4), CNR=14.8 dB is calculated, and the radius ratio R 12 =2.93 is obtained.

[0063] As a result, for each coding rate of 16APSK shown in Fig. 11 (1) to (4), the radius ratio R 12 By using a mapping rule for the signal constellation that reflects this, the BER is minimized, thereby improving the transmission performance.

[0064] Figure 12 shows the radius ratio R 12 ,R 13 10 is a diagram illustrating a method for calculating the radius ratio R 12 ,R 13 is obtained by the calculation method shown in FIG.

[0065] Here, the radius ratio R' 12 = 2.70 and radius ratio R' 13 = 4.10 is the optimum value of the signal constellation that maximizes the minimum Euclidean distance when the modulation method is 32APSK and there is no error correction or noise (R 12 =r2 / r1=2.7,R 13 =r3 / r1=4.2). 13 =4.2 is a typographical error, the correct value is 4.1 (radius ratio R' 13 =4.10).

[0066] For data-only signal sequences, the radius ratio R' 12= 2.70 and radius ratio R' 13 = 4.10, the BER is 1 × 10 -4 The calculated CNR is defined as CNR_32.

[0067] First, in the calculation method described above when the modulation method is 16APSK, the radius ratio R 12 = r2 / r1 is calculated (step S1201).

[0068] Next, the radius ratio R of 16APSK obtained in step S1201 is 12 = r2 / r1, the radius ratio R of 32APSK is fixed. 13 Specifically, for a signal sequence containing only data, the radius ratio R obtained in step S1201 is calculated as 12 Using the value of =r2 / r1 and the above-mentioned CNR_32, the radius ratio r3 / r1 is changed in various ways (see γ1 in step S1202), and the BER for each radius ratio r3 / r1 is calculated. The radius ratio r3 / r1 that minimizes the BER is determined as the radius ratio R of the signal point constellation. 13 Let's say.

[0069] Next, the radius ratio R of 32APSK obtained in step S1202 13 = r3 / r1, and the radius ratio R 12 Specifically, for a signal sequence containing only data, the radius ratio R obtained in step S1202 is calculated again (step S1203). 13 Using the value of =r3 / r1 and the above-mentioned CNR_32, the radius ratio r2 / r1 is changed in various ways (see γ2 in step S1203), and the BER for each radius ratio r2 / r1 is calculated. The radius ratio r2 / r1 that minimizes the BER is determined as the radius ratio R of the signal constellation point. 12 Let's say.

[0070] Furthermore, the radius ratio R of 32APSK obtained in step S1203 12 = r2 / r1, the radius ratio R of 32APSK is fixed. 13Specifically, for a signal sequence containing only data, the radius ratio R obtained in step S1203 is calculated again (step S1204). 12 Using the value of =r2 / r1 and the above-mentioned CNR_32, the radius ratio r3 / r1 is changed in various ways (see γ1 in step S1204), and the BER for each radius ratio r3 / r1 is calculated. The radius ratio r3 / r1 that minimizes the BER is determined as the radius ratio R of the signal constellation point. 13 Let's say.

[0071] In this way, the radius ratio R calculated in steps S1204 and S1203 12 ,R 13 is used as a mapping rule. Here, in step S1204 (the radius ratio R obtained in step S1203) 12 By repeating the process using S1203, the radius ratio R 12 ,R 13 converges and the accuracy increases, but the three processes of steps S1202, S1203, and S1204 result in a radius ratio R that is accurate enough to be used as a mapping rule. 12 ,R 13 Then, for each coding rate of 32APSK, the radius ratio R obtained in steps S1204 and S1203 of FIG. 12 ,R 13 By using a mapping rule that reflects this, the BER is minimized, and the transmission performance can be improved.

[0072] 1, the UW generation unit 21 generates a UW that serves as a pilot signal and outputs the UW to the SC block configuration unit 22. The UW is a known fixed pattern between the transmitting device 1 and the receiving device 2 shown in Fig. 14, which will be described later, and can be a CAZAC (Constant Amplitude Zero Auto-Correlation) sequence, for example, a Zadoff-Chu sequence, which has a constant amplitude in the time domain and the frequency domain and has excellent periodic auto-correlation characteristics.

[0073] The SC block constructing unit 22 receives the mapped data symbols from the mapping unit 20 and also receives the UWs from the UW generating unit 21. Then, the SC block constructing unit 22 inserts the UWs into the data symbols to construct an SC-FDE block symbol sequence shown in FIG.

[0074] 13 is a diagram showing an example of the configuration of an SC-FDE block symbol sequence. The horizontal axis represents time. An SC-FDE block, which is one block of transmission symbols in this SC-FDE block symbol sequence, is composed of a front UW (256 symbols), data symbols (DATA, 1792 symbols), and a rear UW (256 symbols). Two consecutive UWs are inserted before and after the data symbols.

[0075] The length of the SC-FDE block symbols is 2304 symbols (=256+1792+256). The data symbols and the rear UW are symbols to be equalized, and the length of the symbols to be equalized is 2048 symbols (=1792+256).

[0076] Returning to Fig. 1, the bandlimiting filter unit 23 receives the SC-FDE block symbol sequence from the SC block configuration unit 22, performs 2x upsampling on the SC-FDE block symbol sequence, and performs waveform shaping using a bandlimiting filter. Then, the bandlimiting filter unit 23 outputs the waveform-shaped SC-FDE block symbol sequence to the orthogonal modulation unit 24. A root roll-off filter is generally used as the bandlimiting filter.

[0077] The orthogonal modulation unit 24 receives the waveform-shaped SC-FDE block symbol sequence from the band-limiting filter unit 23, performs orthogonal modulation on the SC-FDE block symbol sequence, and performs aperture correction. The orthogonal modulation unit 24 then outputs the digital signal after the orthogonal modulation and aperture correction to the DA conversion unit 25. The aperture correction is a process for correcting an aperture effect due to digital-to-analog conversion in the DA conversion unit 25 at the subsequent stage.

[0078] The DA conversion unit 25 receives the digital signal after quadrature modulation and aperture correction from the quadrature modulation unit 24, converts the digital signal into an analog signal, and outputs the analog signal to the frequency conversion unit .

[0079] The frequency conversion unit 26 receives the analog signal from the DA conversion unit 25 , converts the frequency of the analog signal into a radio frequency, and outputs a modulated signal of the radio frequency to the power amplification unit 27 .

[0080] The power amplifier 27 receives the radio frequency modulated signal from the frequency converter 26 and amplifies the modulated signal so that the power of the radio frequency modulated signal reaches a predetermined value. The modulated signal amplified by the power amplifier 27 is transmitted via the transmitting antenna 28 as a modulated radio signal.

[0081] As described above, according to the transmitting device 1 of the embodiment of the present invention, the RS encoding unit 14 encodes a frame generated from a DVB-ASI signal, which is a signal to be transmitted, through processing by the DVB-ASI input I / F unit 11, the frame synchronization unit 12, and the energy dispersal unit 13, using a shortened RS(204,188) code as an outer code.

[0082] The convolutional coding unit 16 encodes the byte interleaved byte sequence generated from the encoded frame by the processing of the byte interleaving unit 15 using a convolutional code with a predetermined coding rate (the coding rate is 1 / 2, 2 / 3, 3 / 4, or 5 / 6) as an inner code.

[0083] The mapping unit 20 performs mapping on the signal sequence generated from the coded byte sequence by the processes of the delay correction unit 17, the bit interleaving unit 18 and the time interleaving unit 19 according to a preset mapping rule.

[0084] Then, through processing by the UW generation unit 21, SC block construction unit 22, band-limiting filter unit 23, orthogonal modulation unit 24, DA conversion unit 25, frequency conversion unit 26 and power amplification unit 27, a modulated signal is generated from the mapped data symbol, and the modulated radio signal is transmitted via the transmitting antenna 28.

[0085] Here, the mapping rule used in the mapping unit 20 is, when the modulation method is 16APSK, the signal point arrangement shown in FIG. 8 and the radius ratio R 12 In addition, the mapping rule is based on the signal point arrangement shown in FIG. 9 when the modulation method is 32APSK, and the radius ratio R 12 ,R 13 This is due to the signal point arrangement of

[0086] When the modulation method is 16APSK, the radius ratio R of each coding rate included in the mapping rule is 12 First, for a signal sequence containing only data, the radius ratio R' 12 = 2.70, the BER is 1 × 10 -4 Then, the CNR is calculated by varying the radius ratio r2 / r1 at this CNR, and the BER is calculated. The radius ratio r2 / r1 at which the BER is minimum is then specified. (The radius ratio r2 / r1 at which the BER is minimum is defined as the radius ratio R 12 In this way, the radius ratio R of each coding rate included in the mapping rule when the modulation method is 16APSK is 12 is obtained.

[0087] Also, when the modulation method is 32APSK, first, for the signal sequence containing only data, the radius ratio R obtained when the modulation method is 16APSK is12 and radius ratio R' 12 = 2.70 and radius ratio R' 13 = 4.10, the BER is 1 × 10 -4 Using the CNR_32, the BER is calculated when the radius ratio r3 / r1 is changed in various ways, and the radius ratio r3 / r1 at which the BER is minimum is identified to obtain a tentative radius ratio R 13 (The radius ratio r3 / r1 at which BER is minimized is assumed to be the provisional radius ratio R 13 (Let us assume that.)

[0088] Then, the radius ratio R of each coding rate included in the mapping rule when the modulation method is 32APSK is 12 is the provisional radius ratio R obtained for the data-only signal sequence. 13 The BER was calculated by using the CNR_32 and CNR_32, and the radius ratio r2 / r1 at which the BER was minimized was identified. (The radius ratio r2 / r1 at which the BER was minimized was defined as the radius ratio R 12 (This is what we have decided.)

[0089] In addition, when the modulation method is 32APSK, the radius ratio R 13 is the radius ratio R obtained when the modulation method is 32APSK for a data-only signal sequence. 12 The BER was calculated by using the CNR_32 and CNR_32, and the radius ratio r3 / r1 at which the BER was minimized was identified. (The radius ratio r3 / r1 at which the BER was minimized was defined as the radius ratio R 13 In this way, the radius ratio R of each coding rate included in the mapping rule when the modulation method is 32APSK is 12 ,R 13 is obtained.

[0090] The standard radius ratio R' described in the aforementioned Non-Patent Document 1 12 =2.70,R' 13 = 4.10 (As mentioned above, in Non-Patent Document 1, R 13=4.2 is a typographical error; the correct value is 4.1.) is the optimum value of the signal constellation that maximizes the minimum Euclidean distance when the modulation method is 32APSK and there is no error correction or noise. However, when error correction is performed, the optimum radius ratio R 12 ,R 13 fluctuates.

[0091] Therefore, the BER that can be decoded using the outer code is 1 × 10 -4 is the required BER, and the CNR at that time is used as the reference. The radius ratio R 12 ,R 13 Since the required CNR is better than the reference CNR, the transmission performance can be improved.

[0092] Therefore, in the SC-FDE method, by using an optimal signal point mapping rule according to the modulation method and error correction code, it is possible to improve transmission performance without significantly changing the configuration of the transmitting device 1, i.e., without adding new signal processing.

[0093] [Receiving device] Next, a receiving device according to an embodiment of the present invention will be described. In this example, a convolutional code is used as the inner code of the error correction code, and an RS code is used as the outer code. Fig. 14 is a block diagram showing a schematic configuration example of a receiving device according to an embodiment of the present invention. This receiving device 2 is a device that uses a single carrier scheme that enables channel equalization based on the MMSE standard in the frequency domain in a SC-FDE wireless transmission system, and uses a mapping rule (the same as the mapping rule used in the transmitting device 1) based on the signal point arrangement shown in Figs. 8 to 10 when the modulation scheme for the data part is 16APSK or 32APSK.

[0094] This receiving device 2 includes a receiving antenna 31, a frequency conversion unit 32, an AD (analog / digital) conversion unit 33, an orthogonal demodulation unit 34, a band-limiting filter unit 35, block synchronization units 36 and 37, a Fourier transform unit 38, a channel estimation unit 39, an S / N measurement unit 40, a frequency domain equalization unit 41, an inverse Fourier transform unit 42, a symbol determination unit 43, a time deinterleaving unit 44, a bit deinterleaving unit 45, a Viterbi decoding unit 46, a byte deinterleaving unit 47, an RS decoding unit 48, an energy despreading unit 49, a frame synchronization unit 50, and a DVB-ASI output I / F unit 51.

[0095] Here, the number of receiving branches is set to 1, but it may be set to 2 or more. When the number of receiving branches is set to 2 or more, diversity combining is assumed to be possible.

[0096] The receiving device 2 receives the modulated radio signal transmitted from the transmitting device 1 shown in Fig. 1 via the receiving antenna 31. The frequency conversion unit 32 converts the radio frequency of the modulated radio signal received via the receiving antenna 31 into an intermediate frequency and outputs the intermediate frequency signal to the AD conversion unit 33.

[0097] The AD conversion unit 33 receives the intermediate frequency signal from the frequency conversion unit 32, converts the analog intermediate frequency signal into a digital signal, and outputs the digital signal to the quadrature demodulation unit .

[0098] The orthogonal demodulation unit 34 receives the digital signal from the AD conversion unit 33, performs automatic frequency control on the digital signal, and generates a complex baseband signal by orthogonal demodulation while correcting the frequency deviation. The orthogonal demodulation unit 34 then outputs the frequency-corrected complex baseband signal to the band-limiting filter unit 35.

[0099] The band-limiting filter unit 35 inputs the frequency-corrected complex baseband signal from the orthogonal demodulation unit 34, performs band-limiting on the complex baseband signal by filtering, and outputs the band-limited complex baseband signal to the block synchronization unit 36. A root roll-off filter is generally used as the band-limiting filter.

[0100] The block synchronization unit 36 ​​receives the band-limited complex baseband signal from the band-limiting filter unit 35. The block synchronization unit 36 ​​then determines the correlation peak position due to autocorrelation of the complex baseband signal based on the IQ signal of the UW portion, and detects the synchronization timing of the SC-FDE block. The block synchronization unit 36 ​​outputs the SC-FDE block whose synchronization timing has been detected to the block synchronization unit 37.

[0101] The block synchronization unit 37 receives the SC-FDE block for which synchronization timing has been detected from the block synchronization unit 36. The block synchronization unit 37 then detects the precise start position (synchronization timing) of the SC-FDE block by cross-correlation between the complex baseband signals around the start position of the SC-FDE block and the known UW. The block synchronization unit 37 outputs the SC-FDE block for which the precise start position of the SC-FDE block has been detected to the Fourier transform unit 38, the channel estimation unit 39, and the S / N measurement unit 40.

[0102] The Fourier transform unit 38 receives an SC-FDE block whose precise starting position has been detected from the block synchronization unit 37. The Fourier transform unit 38 then performs a fast Fourier transform (FFT) on the payload portion of the SC-FDE block that has been oversampled twice (the portion to be equalized, which is made up of the data and the rear UW shown in FIG. 13). The Fourier transform unit 38 outputs a frequency domain signal relating to the data and UW portions to the frequency domain equalization unit 41.

[0103] The channel estimation unit 39 receives an SC-FDE block whose precise SC-FDE block start position has been detected from the block synchronization unit 37. The channel estimation unit 39 then performs a fast Fourier transform on the 2x oversampled UW portion of the SC-FDE block, and performs channel estimation by dividing the result of the fast Fourier transform by a reference signal (a signal obtained by fast Fourier transforming a known UW). The channel estimation unit 39 outputs propagation path information obtained by channel estimation to the frequency domain equalization unit 41.

[0104] The S / N measurement unit 40 receives an SC-FDE block whose precise SC-FDE block start position has been detected from the block synchronization unit 37. The S / N measurement unit 40 then extracts consecutive UWs from the SC-FDE block, measures the S / N from the UWs by taking advantage of the fact that the UWs are consecutive, and outputs the S / N to the frequency domain equalization unit 41.

[0105] The frequency domain equalizer 41 receives the frequency domain signals relating to the data and UW portions from the Fourier transformer 38, propagation path information from the channel estimator 39, and S / N (S / N of the data symbol) from the S / N measuring unit 40.

[0106] The frequency domain equalization unit 41 performs channel equalization in the frequency domain based on the MMSE standard using the frequency domain signals related to the data and UW portions, propagation path information, and S / N. Then, the frequency domain equalization unit 41 outputs the frequency domain signals related to the data and UW portions after the channel equalization to the inverse Fourier transform unit 42.

[0107] The inverse Fourier transform unit 42 receives the channel-equalized data and frequency-domain signals related to the UW portion from the frequency-domain equalization unit 41, performs an inverse fast Fourier transform (IFFT) on the frequency-domain signals, and outputs the time-domain signals related to the data and UW portion to the symbol decision unit 43.

[0108] The symbol decision unit 43 receives the time domain signal relating to the data and UW portions from the inverse Fourier transform unit 42, and extracts the time domain signal relating to the data portion from the time domain signal.

[0109] The symbol decision unit 43 performs symbol decision by demapping the time domain signal related to the data portion using a preset mapping rule (the same mapping rule as used in the transmitting device 1) and calculating bit likelihood.The symbol decision unit 43 then generates a bit likelihood sequence corresponding to the coded bit sequence and outputs the bit likelihood sequence to the time deinterleaving unit 44.

[0110] Specifically, when the modulation scheme is 16APSK, the symbol decision unit 43 uses a mapping rule according to the coding rate according to the signal constellations shown in FIGS. 8 and 10 to compare the time domain signal relating to the data portion with the signal of the signal constellation in the mapping rule, and calculates the bit likelihood based on the distance between the signals.

[0111] Furthermore, when the modulation scheme is 32APSK, the symbol decision unit 43 uses a mapping rule according to the coding rate according to the signal constellations shown in FIGS. 9 and 10 to compare the time domain signal relating to the data portion with the signal of the signal constellation in the mapping rule, and calculates the bit likelihood based on the distance between the signals.

[0112] The time deinterleaving unit 44 receives the bit likelihood sequence from the symbol decision unit 43 and performs time deinterleaving on the bit likelihood sequence to form a pair with the time interleaving unit 19 shown in Fig. 1. The time deinterleaving unit 44 then outputs the bit likelihood sequence after time deinterleaving to the bit deinterleaving unit 45.

[0113] The bit deinterleaving unit 45 receives the bit likelihood sequence after time deinterleaving from the time deinterleaving unit 44, and performs bit deinterleaving on the bit likelihood sequence to form a pair with the bit interleaving unit 18 shown in Fig. 1. The bit deinterleaving unit 45 then outputs the bit likelihood sequence after bit deinterleaving to the Viterbi decoding unit 46.

[0114] The Viterbi decoding unit 46 receives the bit-deinterleaved bit likelihood sequence from the bit deinterleaving unit 45, performs soft-decision Viterbi decoding using the bit likelihood, and generates a bit sequence. The Viterbi decoding unit 46 then outputs the bit sequence to the byte deinterleaving unit 47.

[0115] The byte deinterleave unit 47 inputs the bit sequence from the Viterbi decoding unit 46, performs byte deinterleaving on the bit sequence in a manner that pairs with the byte interleave unit 15 shown in Figure 1, and outputs the byte sequence after byte deinterleaving to the RS decoding unit 48.

[0116] The RS decoding unit 48 receives the byte sequence after byte deinterleaving from the byte deinterleaving unit 47, performs RS decoding on the byte sequence, and outputs the RS-decoded signal sequence to the energy despreading unit 49.

[0117] The energy despreading unit 49 inputs the RS-decoded signal sequence from the RS decoding unit 48, performs energy despreading on the signal sequence in a manner paired with the energy dispersal unit 13 shown in Figure 1, and outputs the signal sequence after energy despreading to the frame synchronization unit 50.

[0118] The frame synchronization unit 50 receives the signal sequence after energy despreading from the energy despreading unit 49, and performs frame synchronization on the signal sequence to be paired with the frame synchronization unit 12 shown in Fig. 1. The frame synchronization unit 50 then replaces the first byte of the frame, 0xB8, with a TS synchronization byte (0x47) to restore the original format, reconstructs eight TS packets from the frame, each consisting of eight packets, and outputs the TS signal to the DVB-ASI output I / F unit 51.

[0119] When the DVB-ASI input I / F unit 11 shown in FIG. 1 performs processing to insert null packets, the frame synchronization unit 50 deletes the null packets from the TS signal and outputs it.

[0120] The DVB-ASI output I / F unit 51 receives the TS signal from the frame synchronization unit 50 and performs processing on the TS signal in a manner that is paired with the DVB-ASI input I / F unit 11 shown in Fig. 1. The DVB-ASI output I / F unit 51 converts the TS signal into a DVB-ASI signal and outputs the DVB-ASI signal.

[0121] As described above, according to the receiving device 2 of the embodiment of the present invention, the modulated radio signal transmitted from the transmitting device 1 is received, and the symbol determination unit 43 performs demapping using a predetermined mapping rule on the time domain signal related to the data portion of the time domain signal related to the data and UW portions generated from the received signal through processing by the frequency conversion unit 32, AD conversion unit 33, orthogonal demodulation unit 34, band-limiting filter unit 35, block synchronization units 36, 37, Fourier transform unit 38, channel estimation unit 39, S / N measurement unit 40, frequency domain equalization unit 41 and inverse Fourier transform unit 42, and performs symbol determination by calculating the bit likelihood.

[0122] Then, a DVB-ASI signal is generated from the bit likelihood sequence through processing by a time deinterleaving unit 44, a bit deinterleaving unit 45, a Viterbi decoding unit 46, a byte deinterleaving unit 47, an RS decoding unit 48, an energy despreading unit 49, a frame synchronization unit 50, and a DVB-ASI output I / F unit 51, and is output.

[0123] Here, the mapping rule used in the symbol decision unit 43 is the same as that used by the transmitting device 1 shown in Fig. 1. That is, the mapping rule is, when the modulation method is 16APSK, the signal point arrangement shown in Fig. 8 and the radius ratio R according to the coding rate shown in Fig. 10 are used. 12In addition, the mapping rule is based on the signal point arrangement shown in FIG. 9 when the modulation method is 32APSK, and the radius ratio R 12 ,R 13 This is due to the signal point arrangement of

[0124] As a result, in the SC-FDE method, by using an optimal signal point mapping rule according to the modulation method and error correction code, it is possible to improve transmission performance without significantly changing the configuration of the receiving device 2, i.e., without adding new signal processing.

[0125] [Transmitting Device / Other Embodiments] Next, a transmitting device according to another embodiment of the present invention will be described. In this example, an LDPC code is used as the inner code of the error correction code, and a BCH code is used as the outer code. Fig. 15 is a block diagram showing a schematic configuration example of a transmitting device according to another embodiment of the present invention. This transmitting device 3 is a device that uses a single carrier scheme that enables channel equalization in the frequency domain in an SC-FDE wireless transmission system, and when the modulation scheme for the data part is 16APSK or 32APSK, it uses a mapping rule based on signal point constellations with radius ratios shown in Figs. 8 and 9 above and Fig. 19 below.

[0126] This transmitting device 3 includes a DVB-ASI input I / F unit 61, an FEC (Forward Error Correction) block configuration unit 62, a BCH encoding unit 63, an energy dispersal unit 64, an LDPC encoding unit 65, a time interleaving unit 66, a mapping unit 67, a UW generation unit 68, an SC block configuration unit 69, a band-limiting filter unit 70, an orthogonal modulation unit 71, a DA conversion unit 72, a frequency conversion unit 73, a power amplification unit 74, and a transmitting antenna 75.

[0127] The DVB-ASI input I / F unit 61 receives a DVB-ASI signal as a transmission target signal. Similar to the DVB-ASI input I / F unit 11 shown in FIG. 1 , the DVB-ASI input I / F unit 61 extracts a 204-byte or 188-byte TS signal in TS packet units from the DVB-ASI signal and outputs the TS signal in TS packet units to the FEC block configuration unit 62.

[0128] If the rate of the TS signal is smaller than the transmission capacity, the DVB-ASI input I / F unit 61 performs appropriate buffer processing, such as inserting null packets.

[0129] The FEC block configuration unit 62 receives the TS signal from the DVB-ASI input I / F unit 61. The FEC block configuration unit 62 then reserves areas for the FEC block, each area having a size corresponding to the LDPC coding rate used in the subsequent LDPC encoding unit 65, and each area consisting of a block header, a main signal, BCH code parity, stuff bits, and LDPC code parity.

[0130] 16 is a diagram showing an example of an FEC block configuration. Let H be the number of block header bits, D be the number of main signal bits, and p be the number of BCH parity bits. bch In addition, the number of stuff bits is S, and the number of LDPC parity bits is p ldpc Let's say.

[0131] Also, the size (number of bits) obtained by adding the number of block header bits H to the number of main signal bits D is k bch , k bch The number of BCH parity bits p bch The size obtained by adding bch , n bch The size obtained by adding the number of stuff bits S to k ldpc Also, k ldpc The number of LDPC parity bits p ldpc The number of bits after LDPC coding is n ldpcLet's say.

[0132] This FEC block consists of a block header with H block header bits, a main signal with D main signal bits, and p BCH parity bits. bch BCH code parity, stuff bits with number of stuff bits S, and LDPC parity bits p ldpc The block header, main signal, BCH code parity, and stuff bits are within the range in which power (energy) is dispersed by the energy dispersal unit 64 at the subsequent stage.

[0133] 17 is a diagram showing the approximate LDPC coding rate, the LDPC coding rate, the number of block header bits H, the number of main signal bits D, etc. More specifically, the bit allocation of each region corresponding to the approximate LDPC coding rate and the LDPC coding rate, i.e., the number of block header bits H, the number of main signal bits D, the number of BCH parity bits p bch , the number of stuffing bits S and the number of LDPC parity bits p ldpc Furthermore, the number of bits after LDPC coding is n ldpc and the number of stored TS packets.

[0134] The approximate LDPC coding rate indicates an approximate value of the LDPC coding rate, and the value actually used in the downstream LDPC encoder 65 is one of LDPC coding rates 61 / 120, 81 / 120, 89 / 120, or 101 / 120. These LDPC coding rates correspond to approximate LDPC coding rates of 1 / 2, 2 / 3, 3 / 4, or 5 / 6, respectively. The number of stored TS packets indicates the number of TS packets stored in one block, i.e., the number of TS packets stored in the main signal area of ​​the FEC block.

[0135] In FIG. 17, for example, when the approximate LDPC coding rate is 1 / 2, that is, when the LDPC coding rate is 61 / 120, the number of block header bits H is 176, the number of main signal bits D is 22440, and the number of BCH parity bits p bch is 192, the number of stuff bits S is 6, the number of LDPC parity bits p ldpcis 22066, the number of bits after LDPC coding is n ldpc is 44880, and the number of stored TS packets is 15. Similarly, when the approximate LDPC coding rate is 2 / 3 or the like, that is, when the LDPC coding rate is 81 / 120 or the like, the values ​​shown in FIG. 17 are used. These values ​​are set in advance. For convenience of explanation, the following explanation will be given assuming that the approximate LDPC coding rate is the LDPC coding rate.

[0136] For details about LDPC coding rates, please refer to the following documents: [Non-patent document 2] ARIB STD-B71

[0137] Returning to Figure 15, the FEC block construction unit 62 reserves each area (areas of the size shown in Figure 17) corresponding to the LDPC coding rate of the FEC block, and then stores data of any predetermined bits (data with all bits set to '1' when not in use) in the block header area (area with block header bit count H = 176).

[0138] The FEC block construction unit 62 removes the synchronization byte 0x47 from each TS packet included in the input TS signal. Then, for the main signal area (the area with the number of bits (number of main signal bits D) of the number of TS packets stored corresponding to the LDPC coding rate), the FEC block construction unit 62 stores, in that area, each TS packet from which the synchronization byte 0x47 has been removed, with the signal having the number of main signal bits D corresponding to the number of TS packets stored.

[0139] The FEC block constructing unit 62 stores data in which all bits are set to '1' in the stuff bit area (area where the number of stuff bits S=6).

[0140] BCH code parity area (number of BCH parity bits p bch For the area where the LDPC code parity is set to 192, the BCH encoding unit 63 at the subsequent stage generates BCH code parity and stores it in the area. ldpcFor the area (a), the LDPC code parity is generated by the LDPC encoding unit 65 at the subsequent stage and stored in the area.

[0141] The FEC block constructing unit 62 constructs a signal sequence of an FEC block in which the above-mentioned data is stored for the block header, main signal, and stuff bits, and the above-mentioned areas are reserved for the BCH code parity and LDPC code parity.The FEC block constructing unit 62 then outputs the signal sequence of the FEC block to the BCH encoding unit 63.

[0142] The BCH encoding unit 63 receives the signal sequence of the FEC block from the FEC block configuration unit 62. Then, the BCH encoding unit 63 performs BCH encoding on the signal sequence in accordance with the aforementioned Non-Patent Document 2 using a shortened code of BCH (65535, 65343) with error correction capability t=12, thereby generating BCH code parity.

[0143] The BCH encoding unit 63 stores the BCH code parity in an area for BCH code parity included in the FEC block, and outputs the signal sequence of the FEC block in which the BCH code parity is stored to the energy dispersal unit 64. For details of the BCH encoding process, see the above-mentioned Non-Patent Document 2.

[0144] The energy dispersal unit 64 receives the signal sequence of the FEC block in which the BCH code parity is stored from the BCH encoding unit 63. The energy dispersal unit 64 then performs energy dispersal on the block header, main signal, BCH code parity, and stuff bits of the signal sequence of the FEC block, but does not perform energy dispersal on the LDPC code parity area. The energy dispersal period is one FEC block.

[0145] The energy dispersal unit 64 outputs a signal sequence consisting of the block header, main signal, BCH code parity and stuff bits after energy dispersal, and (data in this area of) the LDPC code parity that has not been energy dispersal, to the LDPC encoding unit 65 as the signal sequence after energy dispersal.

[0146] FIG. 18 is a diagram illustrating a configuration and processing example of the energy dispersal unit 64. The energy dispersal unit 64 includes a pseudo-random bit sequence generation unit, an addition control switch, and an exclusive OR operation unit. The pseudo-random bit sequence generation unit generates a 25th-order generating polynomial (X 25 +X 22 +1) to generate a pseudorandom bit sequence.

[0147] When the addition control switch is in the on state, it outputs the pseudo-random bit sequence generated by the pseudo-random bit sequence generation unit to the exclusive OR operation unit, and when it is in the off state, it outputs a '0' bit to the exclusive OR operation unit.

[0148] The exclusive OR operation unit receives the pseudo-random bit sequence or '0' bits from the addition switch. The exclusive OR operation unit also receives the data signals to be subjected to energy dispersal (block header, main signal, BCH code parity, and stuff bits) from the signal sequence of the FEC block received from the BCH encoding unit 63.

[0149] The exclusive OR operation unit performs an exclusive OR operation on these signals. The signal sequence after the exclusive OR operation is output as an energy-dispersed data signal (the block header, main signal, BCH code parity, and stuff bits after energy dispersal).

[0150] This energy-dispersed data signal is output to the LDPC encoding unit 65 as a signal sequence after energy diffusion, together with (data in the region of) the LDPC code parity that is not energy-dispersed out of the signal sequence of the FEC block input from the BCH encoding unit 63.

[0151] 15 , the LDPC encoding unit 65 receives the signal sequence after energy diffusion from the energy diffusion unit 64. The LDPC encoding unit 65 then performs LDPC encoding on the signal sequence in accordance with the aforementioned Non-Patent Document 2, using an LDPC code with a predetermined coding rate as an inner code of an error correcting code, to generate LDPC code parity. The LDPC encoding unit 65 stores the LDPC code parity in an area for LDPC code parity included in the signal sequence.

[0152] The LDPC encoding unit 65 outputs the signal sequence in which the LDPC code parity is stored to the time interleaving unit 66. For details of the LDPC encoding process, please refer to the above-mentioned Non-Patent Document 2.

[0153] The time interleaving unit 66 receives the signal sequence in which the LDPC code parity is stored from the LDPC encoding unit 65, performs time interleaving on the signal sequence in the same manner as the time interleaving unit 19 shown in Fig. 1, and outputs the time-interleaved signal sequence to the mapping unit 67. In this case, the time interleaving unit 66 distributes symbols on the time axis by convolutional interleaving under the circuit configuration of the time interleaving unit 19 shown in Fig. 7.

[0154] The mapping unit 67 receives the time-interleaved signal sequence from the time interleaving unit 66, performs mapping on the signal sequence according to a preset mapping rule, and outputs the mapped data symbols to the SC block configuration unit 69.

[0155] FIG. 19 is a diagram showing the radius ratio of each coding rate when the modulation method is 16APSK or 32APSK in another embodiment of the present invention, and shows a case where an LDPC code is used as the inner code and a BCH code is used as the outer code.

[0156] The signal point arrangement when the modulation method is 16APSK is as shown in Figure 8, and the signal point arrangement when the modulation method is 32APSK is as shown in Figure 9. As mentioned above, when the modulation method is 16APSK, the radius ratio R 12 In addition, when the modulation method is 32APSK, the radius ratio R is set to r1, r2, and r3 of the concentric circle β1, β2, and β3, respectively, as shown in FIG. 12 =r2 / r1,R 13 =r3 / r1.

[0157] As shown in FIG. 19, when the modulation method is 16APSK, the signal point arrangement is such that when the coding rate of the LDPC code used in the LDPC coding unit 65 is 1 / 2, the radius ratio R 12 = 3.38, and when the coding rate of the LDPC code is 2 / 3, the radius ratio R 12 = 3.36. In addition, when the coding rate of the LDPC code is 3 / 4, the radius ratio R 12 = 3.06, and when the coding rate of the LDPC code is 5 / 6, the radius ratio R 12 =2.82.

[0158] When the modulation method is 32APSK, the signal point arrangement is such that when the coding rate of the LDPC code used in the LDPC coding unit 65 is 1 / 2, the radius ratio R 12 =3.24,R 13 = 7.00, and when the coding rate of the LDPC code is 2 / 3, the radius ratio R 12 =3.35,R 13 = 6.64. When the coding rate of the LDPC code is 3 / 4, the radius ratio R 12 =3.07,R 13 = 5.87, and when the coding rate of the LDPC code is 5 / 6, the radius ratio R 12 =2.81,R 13 =5.05.

[0159] In this way, when the modulation method is 16APSK, the mapping unit 67 maps the signal point arrangement shown in FIG. 8 and the radius ratio R12 The input signal sequence is mapped using the mapping rule of the signal constellation of the above, and mapped data symbols are generated.

[0160] 19. In addition, when the modulation method is 32APSK, the mapping unit 67 maps the signal point arrangement shown in FIG. 9 and the radius ratio R 12 ,R 13 The input signal sequence is mapped using the mapping rule of the signal constellation of the above, and mapped data symbols are generated.

[0161] Here, the radius ratio R of each coding rate when the modulation method shown in FIG. 19 is 16APSK is 12 can be obtained by the following calculation method. First, the coding rate of the LDPC code is fixed, and the CNR value is changed while the radius ratio r2 / r1 is varied for each CNR. The BER for each radius ratio r2 / r1 is calculated to determine the characteristics of the radius ratio r2 / r1 and BER. Then, the characteristics of the radius ratio r2 / r1 and BER for each CNR are found to be approximately 1×10 -5 The radius ratio r2 / r1 is set to the radius ratio R 12 Explore as.

[0162] In order to be error-free after BCH decoding, the BER after LDPC decoding should be 1×10 -7 However, the error correction capability of the LDPC code, which is the inner code, changes rapidly in the amount of improvement in BER relative to CNR. Therefore, to simplify the simulation, we set the BER curve with a slope of approximately 1×10 -5 is the standard.

[0163] In addition, the CNR is calculated by the radius ratio R 12 When searching for the minimum BER, if the BER after LDPC decoding becomes error-free and the minimum BER point cannot be found, the CNR value is reduced by 0.05 dB and processing continues.

[0164] Fig. 20 is a diagram showing the relationship between the radius ratio r2 / r1 and the BER for each coding rate when the modulation scheme is 16APSK in another embodiment of the present invention. Fig. 20(1) shows the case of a coding rate of 1 / 2, Fig. 20(2) shows the case of a coding rate of 2 / 3, Fig. 20(3) shows the case of a coding rate of 3 / 4, and Fig. 20(4) shows the case of a coding rate of 5 / 6. The horizontal axis shows the radius ratio r2 / r1, and the vertical axis shows the BER.

[0165] Radius ratio R of each coding rate 12 In the calculation method of (1), the CNR value is changed, and the BER for each radius ratio r2 / r1 is calculated for each CNR when the radius ratio r2 / r1 is changed in various ways.

[0166] As a result, for each CNR in the case of a coding rate of 1 / 2, the characteristics of the radius ratio r2 / r1 and BER for each CNR are obtained, including the characteristics shown in Figure 20(1) when CNR = 6.35 dB. Also, for each CNR in the case of a coding rate of 2 / 3, the characteristics of the radius ratio r2 / r1 and BER for each CNR are obtained, including the characteristics shown in Figure 20(2) when CNR = 9.00 dB. Similarly, for a coding rate of 3 / 4, the characteristics for each CNR are obtained, including the characteristics shown in Figure 20(3) when CNR = 10.00 dB, and for a coding rate of 5 / 6, the characteristics for each CNR are obtained, including the characteristics shown in Figure 20(4) when CNR = 11.75 dB.

[0167] For each coding rate, the lowest BER is approximately 1 × 10 -5 The radius ratio r2 / r1 corresponding to the coding rate is 12 The proposed radius ratios shown in Figures 20(1) to (4) are the lowest point, and the BER is the lowest. In other words, the proposed radius ratios shown in Figures 20(1) to (4) have the lowest BER of approximately 1 × 10 -5 The radius ratio r2 / r1=R 12 is obtained as:

[0168] For example, in the case of a coding rate of 1 / 2, as shown in Figure 20(1), the lowest point is the proposed radius ratio of 3.38, compared to the conventional radius ratio of 2.70 when CNR = 6.35 dB, and the radius ratio r2 / r1 = R 12 In addition, for a coding rate of 2 / 3, as shown in Figure 20(2), the lowest point is the proposed radius ratio of 3.36, compared to the conventional radius ratio of 2.70 when CNR = 9.00 dB, and the radius ratio r2 / r1 = R 12 =3.36 is obtained.

[0169] In addition, in the case of a coding rate of 3 / 4, as shown in Figure 20(3), the lowest point is the proposed radius ratio of 3.06, compared to the conventional radius ratio of 2.70 when CNR = 10.00 dB, and the radius ratio r2 / r1 = R 12 In addition, for a coding rate of 5 / 6, as shown in Figure 20(4), the lowest point is the proposed radius ratio of 2.82, compared to the conventional radius ratio of 2.70 when CNR = 11.75 dB, and the radius ratio r2 / r1 = R 12 =2.82 is obtained.

[0170] As a result, for each of the 16APSK coding rates 1 / 2, 2 / 3, 3 / 4, and 5 / 6, the radius ratio R 12 By using a mapping rule for the signal constellation that reflects this, the BER is minimized, thereby improving the transmission performance.

[0171] In addition, the radius ratio R 12 ,R 13 can be obtained by the following calculation method. First, in the above calculation method when the coding rate of the LDPC code is fixed and the modulation method is 16APSK, the radius ratio R 12 is searched for (step S1).

[0172] Then, the radius ratio R searched for in the case of 16APSK in step S1 is 12The radius ratio r3 / r1 and BER characteristics are obtained by calculating the BER for each radius ratio r3 / r1 when the radius ratio r3 / r1 is changed in various ways for each CNR while changing the CNR value. Then, the lowest BER is approximately 1×10 -5 A radius ratio r3 / r1 is searched for such that the CNR at this time is CNR1 (step S2).

[0173] Then, by using the radius ratio r3 / r1 found in step S2, CNR1 is fixed and the radius ratio r2 / r1 is variously changed, and the BER for each radius ratio r2 / r1 is calculated to obtain the characteristics of the radius ratio r2 / r1 and the BER. Then, the radius ratio r2 / r1 that gives the lowest BER in the characteristics of the radius ratio r2 / r1 and the BER is defined as the radius ratio R 12 (Step S3).

[0174] Then, the radius ratio R 12 The characteristics of the radius ratio r3 / r1 and BER are obtained by calculating the BER for each radius ratio r3 / r1 when the radius ratio r3 / r1 is changed variously with the CNR1 fixed. Then, the radius ratio r3 / r1 at which the BER is lowest is defined as the radius ratio R 13 (Step S4).

[0175] These radius ratios r2 / r1 and r3 / r1 are normalized so that the average amplitude of all signal points is 1. In addition, in steps S3 and S4, the radius ratios R 12 ,R 13 If the search is error-free (no errors occur after LDPC code decoding), the process returns to step S2, the CNR value is reduced, and the process continues.

[0176] In this way, the radius ratio R 12 ,R 13 is used as a mapping rule. Here, in step S4 (the radius ratio R obtained in step S3)12 By repeating the process S3 and S4, the radius ratio R 12 ,R 13 After the processing of step S1, the three processing steps S2, S3, and S4 are performed to obtain a radius ratio R with sufficient accuracy to be used as a mapping rule. 12 ,R 13 Then, for each coding rate of 32APSK, the radius ratio R obtained by the above calculation method can be obtained. 12 ,R 13 By using a mapping rule that reflects this, the BER is minimized, and the transmission performance can be improved.

[0177] 15, the UW generation unit 68, SC block configuration unit 69, band-limiting filter unit 70, quadrature modulation unit 71, DA conversion unit 72, frequency conversion unit 73, and power amplification unit 74 are similar to the UW generation unit 21, SC block configuration unit 22, band-limiting filter unit 23, quadrature modulation unit 24, DA conversion unit 25, frequency conversion unit 26, and power amplification unit 27 shown in Fig. 1, and therefore their description will be omitted here. The modulated signal amplified by the power amplification unit 74 is transmitted via a transmission antenna 75 as a modulated radio signal.

[0178] As described above, according to the transmitting device 3 of another embodiment of the present invention, the BCH encoding unit 63 encodes the signal sequence generated from the DVB-ASI signal, which is the signal to be transmitted through processing by the DVB-ASI input I / F unit 61 and the FEC block configuration unit 62, using a shortened code of BCH (65535, 65343) with error correction capability t=12 as the outer code.

[0179] The LDPC encoding unit 65 encodes the energy-dispersed signal sequence generated from the encoded signal sequence by the processing of the energy dispersal unit 64 using an LDPC code with a predetermined coding rate (the coding rate is 1 / 2, 2 / 3, 3 / 4, or 5 / 6) as an inner code.

[0180] The mapping unit 67 performs mapping on the time-interleaved signal sequence generated from the coded signal sequence by the processing of the time interleaving unit 66, according to a preset mapping rule.

[0181] Then, through processing by the UW generation unit 68, SC block construction unit 69, band-limiting filter unit 70, orthogonal modulation unit 71, DA conversion unit 72, frequency conversion unit 73 and power amplification unit 74, a modulated signal is generated from the mapped data symbol, and the modulated radio signal is transmitted via the transmitting antenna 75.

[0182] Here, the mapping rule used in the mapping unit 67 is, when the modulation method is 16APSK, the signal point arrangement shown in FIG. 8 and the radius ratio R 12 In addition, the mapping rule is based on the signal point arrangement shown in FIG. 9 when the modulation method is 32APSK, and the radius ratio R 12 ,R 13 This is due to the signal point arrangement of

[0183] When the modulation method is 16APSK, the radius ratio R of each coding rate included in the mapping rule is 12 is the radius ratio r2 / r1 at the lowest point in the BER characteristics for the radius ratio r2 / r1 calculated for each CNR. By using such a signal point mapping rule, the BER is minimized, thereby improving transmission performance.

[0184] Also, when the modulation method is 32APSK, first, the radius ratio R when the modulation method is 16APSK 12 Using this, the lowest radius ratio r3 / r1 is searched for in the BER characteristics for the radius ratio r3 / r1 calculated for each CNR, and the CNR at this point is set to CNR1. Then, using this radius ratio r3 / r1, the lowest radius ratio r2 / r1 is set to the radius ratio R for 32APSK in the BER characteristics for the radius ratio r2 / r1 calculated at CNR1. 12 Then, this radius ratio R 12Using this, in the BER characteristics for the radius ratio r3 / r1 calculated at CNR1, the radius ratio r3 / r1 at the lowest point is taken as the radius ratio R 13 By using such a mapping rule for signal constellation, the BER is minimized, thereby improving transmission performance.

[0185] Therefore, in the SC-FDE method, by using an optimal signal point mapping rule according to the modulation method and error correction code, it is possible to improve transmission performance without significantly changing the configuration of the transmitting device 3, i.e., without adding new signal processing.

[0186] [Receiving device / other embodiments] Next, a receiving device according to another embodiment of the present invention will be described. In this example, an LDPC code is used as the inner code of the error correction code, and a BCH code is used as the outer code. Fig. 21 is a block diagram showing a schematic configuration example of a receiving device according to another embodiment of the present invention. This receiving device 4 is a device that uses a single carrier scheme that enables channel equalization based on the MMSE standard in the frequency domain in a SC-FDE wireless transmission system, and when the modulation scheme for the data part is 16APSK or 32APSK, it uses a mapping rule (the same mapping rule as used in the transmitting device 3) based on the signal point arrangement shown in Figs. 8, 9 and 19 described above.

[0187] The receiving device 4 includes a receiving antenna 81, a frequency conversion unit 82, an AD conversion unit 83, an orthogonal demodulation unit 84, a band-limiting filter unit 85, block synchronization units 86 and 87, a Fourier transform unit 88, a channel estimation unit 89, an S / N measurement unit 90, a frequency domain equalization unit 91, an inverse Fourier transform unit 92, a symbol determination unit 93, a time deinterleaving unit 94, an LDPC decoding unit 95, an energy despreading unit 96, a BCH decoding unit 97, a frame synchronization unit 98, and a DVB-ASI output I / F unit 99.

[0188] Here, the number of receiving branches is set to 1, but it may be set to 2 or more. When the number of receiving branches is set to 2 or more, diversity combining is assumed to be possible.

[0189] The receiving device 4 receives the modulated radio signal transmitted from the transmitting device 3 shown in Fig. 15 via a receiving antenna 81. Similar to the frequency conversion unit 32 shown in Fig. 14, the frequency conversion unit 82 converts the radio frequency of the modulated radio signal received via the receiving antenna 81 into an intermediate frequency and outputs the intermediate frequency signal to an AD conversion unit 83.

[0190] The AD conversion unit 83, the orthogonal demodulation unit 84, the band-limiting filter unit 85, the block synchronization units 86 and 87, the Fourier transform unit 88, the channel estimation unit 89, the S / N measurement unit 90, the frequency domain equalization unit 91, and the inverse Fourier transform unit 92 are similar to the AD conversion unit 33, the orthogonal demodulation unit 34, the band-limiting filter unit 35, the block synchronization units 36 and 37, the Fourier transform unit 38, the channel estimation unit 39, the S / N measurement unit 40, the frequency domain equalization unit 41, and the inverse Fourier transform unit 42 shown in FIG. 14 , and therefore their description will be omitted here.

[0191] The symbol decision unit 93 receives the time domain signal relating to the data and UW portions from the inverse Fourier transform unit 92, and extracts the time domain signal relating to the data portion from the time domain signal.

[0192] The symbol decision unit 93 performs symbol decision by demapping the time domain signal related to the data portion using a preset mapping rule (the same mapping rule as used in the transmitting device 3) and calculating bit likelihood.The symbol decision unit 93 then generates a bit likelihood sequence corresponding to the coded bit sequence and outputs the bit likelihood sequence to the time deinterleaving unit 94.

[0193] Specifically, when the modulation scheme is 16APSK, the symbol decision unit 93 uses a mapping rule according to the coding rate according to the signal constellations shown in Figures 8 and 19 to compare the time domain signal related to the data portion with the signal of the signal constellation in the mapping rule, and calculates the bit likelihood based on the distance between the signals.

[0194] Furthermore, when the modulation scheme is 32APSK, the symbol decision unit 93 uses a mapping rule according to the coding rate according to the signal constellations shown in FIGS. 9 and 19 to compare the time domain signal relating to the data portion with the signal of the signal constellation in the mapping rule, and calculates the bit likelihood based on the distance between the signals.

[0195] The time deinterleaving unit 94 receives the bit likelihood sequence from the symbol decision unit 93 and performs time deinterleaving in conjunction with the time interleaving unit 66 shown in Fig. 15, similar to the time deinterleaving unit 44 shown in Fig. 14. The time deinterleaving unit 94 then outputs the bit likelihood sequence after time deinterleaving to the LDPC decoding unit 95.

[0196] The LDPC decoding unit 95 receives the bit likelihood sequence after time deinterleaving from the time deinterleaving unit 94, and performs LDPC decoding in accordance with the aforementioned Non-Patent Document 2 using the bit likelihood to generate a bit sequence. The LDPC decoding unit 95 then outputs the bit sequence to the energy despreading unit 96. Please refer to the aforementioned Non-Patent Document 2 for details of the LDPC decoding process.

[0197] The energy despreading unit 96 inputs the bit sequence from the LDPC decoding unit 95, performs energy despreading on the bit sequence in a manner that is paired with the energy dispersal unit 64 shown in FIG. 15 , and outputs the bit sequence after energy despreading to the BCH decoding unit 97.

[0198] The BCH decoding unit 97 receives the bit sequence after energy despreading from the energy despreading unit 96, performs BCH decoding on the bit sequence in accordance with the aforementioned Non-Patent Document 2, and outputs the BCH-decoded bit sequence to a frame synchronization unit 98. Please refer to the aforementioned Non-Patent Document 2 for details of the BCH decoding process.

[0199] The frame synchronization unit 98 receives the bit sequence after BCH decoding from the BCH decoding unit 97. The frame synchronization unit 98 then adds a one-byte synchronization byte (0x47) to the input bit sequence, corresponding to the process in which the FEC block configuration unit 62 shown in FIG. 15 removes the synchronization byte 0x47 of the TS packets from the TS signal and stores the TS packet in the main signal area of ​​the FEC block, thereby reconstructing the TS packets, and outputs the TS signal to the DVB-ASI output I / F unit 99.

[0200] When the DVB-ASI input I / F unit 61 shown in FIG. 15 performs processing to insert null packets, the frame synchronization unit 98 deletes the null packets from the TS signal and outputs it.

[0201] The DVB-ASI output I / F unit 99 receives the TS signal from the frame synchronization unit 98 and performs processing on the TS signal in a manner that is paired with the DVB-ASI input I / F unit 61 shown in Fig. 15. The DVB-ASI output I / F unit 99 converts the TS signal into a DVB-ASI signal and outputs the DVB-ASI signal.

[0202] As described above, according to the receiving device 4 of another embodiment of the present invention, the modulated radio signal transmitted from the transmitting device 3 is received, and the symbol determination unit 93 performs demapping using a predetermined mapping rule on the time domain signal related to the data portion of the time domain signal related to the data and UW portions generated from the received signal through processing by the frequency conversion unit 82, AD conversion unit 83, orthogonal demodulation unit 84, band-limiting filter unit 85, block synchronization units 86, 87, Fourier transform unit 88, channel estimation unit 89, S / N measurement unit 90, frequency domain equalization unit 91 and inverse Fourier transform unit 92, and performs symbol determination by calculating the bit likelihood.

[0203] Then, a DVB-ASI signal is generated from the bit likelihood sequence through processing by a time deinterleaving unit 94, an LDPC decoding unit 95, an energy despreading unit 96, a BCH decoding unit 97, a frame synchronization unit 98, and a DVB-ASI output I / F unit 99, and is output.

[0204] Here, the mapping rule used in the symbol decision unit 93 is the same as that used by the transmitting device 3 shown in Fig. 15. That is, the mapping rule is, when the modulation method is 16APSK, the signal point arrangement shown in Fig. 8, and the radius ratio R 12 In addition, the mapping rule is based on the signal point arrangement shown in FIG. 9 when the modulation method is 32APSK, and the radius ratio R 12 ,R 13 This is due to the signal point arrangement of

[0205] As a result, in the SC-FDE method, by using an optimal signal point mapping rule according to the modulation method and error correction code, it is possible to improve transmission performance without significantly changing the configuration of the receiving device 4, i.e., without adding new signal processing.

[0206] Although the present invention has been described above with reference to the embodiments, the present invention is not limited to the above-described embodiments and can be modified in various ways without departing from the technical concept thereof. [Explanation of symbols]

[0207] 1,3 Transmitting device 2,4 Receiving device 11,61 DVB-ASI input I / F section 12,50,98 Frame synchronization section 13,64 Energy diffusion section 14 RS encoder 15-byte interleaved section 16 Convolutional coding section 17 Delay correction section 18-bit interleave section 19,66 Time Interleaving Section 20,67 Mapping section 21,68 UW generation unit 22,69 SC block components 23,70 Band-limiting filter section 24,71 Quadrature modulation section 25,72 DA conversion section 26,32,73,82 Frequency conversion section 27,74 Power amplifier section 28,75 transmitting antenna 31,81 Receiving antenna 33,83 AD conversion section 34,84 Quadrature demodulation section 35,85 Band limiting filter section 36, 37, 86, 87 Block synchronization section 38,88 Fourier transform section 39,89 Channel Estimation Unit 40,90 S / N measurement section 41,91 Frequency domain equalizer 42,92 Inverse Fourier transform section 43,93 Symbol decision section 44,94 time deinterleave section 45-bit deinterleave section 46 Viterbi decoding section 47-byte deinterleave section 48 RS decoding unit 49,96 Energy despreading section 51,99 DVB-ASI output I / F section 62 FEC block configuration section 63 BCH encoder 65 LDPC encoding section 95 LDPC decoder 97 BCH decoding unit

Claims

1. In an SC-FDE transmission device, a signal to be transmitted is subjected to error correction coding using a predetermined outer code and inner code, and is mapped according to a mapping rule of a predetermined modulation method. When the modulation method is 16APSK, two concentric circles are defined on the IQ axis, and on the circumference of the inner concentric circle, four signals are arranged at equal intervals of π / 2 from a position of π / 4 counterclockwise around the I axis, and on the circumference of the outer concentric circle, 12 signals are arranged at equal intervals of π / 6 from a position of π / 12 counterclockwise around the I axis. The radius of the inner concentric circle is defined as r 1 , the radius of the outer concentric circle is r 2 As, radius ratio R 12 =r 2 / r 1 performing mapping on the error-correction-coded signal sequence using the mapping rule according to the signal point arrangement of When the modulation method is 32APSK, assuming that three concentric circles are defined on the IQ axis, on the circumference of the innermost concentric circle, four signals are arranged at equal intervals of π / 2 from a position of π / 4 in a counterclockwise direction relative to the I axis, on the circumference of the concentric circle between the innermost and outermost concentric circles, 12 signals are arranged at equal intervals of π / 6 from a position of π / 12 in a counterclockwise direction relative to the I axis, and on the circumference of the outermost concentric circle, 16 signals are arranged at equal intervals of π / 8 from a position of π / 8 in a counterclockwise direction relative to the I axis, and the radius of the innermost concentric circle is defined as r 1 , the deformation of the concentric circles between the innermost concentric circle and the outermost concentric circle is defined as r 2 and the radius of the outermost concentric circle is r 3 As, radius ratio R 12 =r 2 / r 1 and radius ratio R 13 =r 3 / r 1 a mapping unit that performs mapping on the signal sequence that has been subjected to error correction coding using the mapping rule according to the signal point arrangement of When the outer code is an RS code and the inner code is a convolutional code, When the modulation method is 16APSK, when the coding rate of the convolutional code is 1 / 2, the radius ratio R 12 = 2.86, and when the coding rate of the convolutional code is 2 / 3, the radius ratio R 12 = 3.15, and when the coding rate of the convolutional code is 3 / 4, the radius ratio R 12 = 2.88, and when the coding rate of the convolutional code is 5 / 6, the radius ratio R 12 = 2.93, When the modulation method is 32APSK, when the coding rate of the convolutional code is 1 / 2, the radius ratio R 12 = 2.79 and the radius ratio R 13 = 5.29, and when the coding rate of the convolutional code is 2 / 3, the radius ratio R 12 = 3.16 and the radius ratio R 13 = 5.79, and when the coding rate of the convolutional code is 3 / 4, the radius ratio R 12 = 2.87 and the radius ratio R 13 = 5.20, and when the coding rate of the convolutional code is 5 / 6, the radius ratio R 12 = 2.91 and the radius ratio R 13 = 5.

11.

2. 2. The transmitting device according to claim 1, When the outer code is a BCH code and the inner code is an LDPC code, When the modulation method is 16APSK, when the coding rate of the LDPC code is 1 / 2, the radius ratio R 12 = 3.38, and when the coding rate of the LDPC code is 2 / 3, the radius ratio R 12 = 3.36, and when the coding rate of the LDPC code is 3 / 4, the radius ratio R 12 = 3.06, and when the coding rate of the LDPC code is 5 / 6, the radius ratio R 12 = 2.82, When the modulation method is 32APSK, when the coding rate of the LDPC code is 1 / 2, the radius ratio R 12 = 3.24 and the radius ratio R 13 = 7.00, and when the coding rate of the LDPC code is 2 / 3, the radius ratio R 12 = 3.35 and the radius ratio R 13 = 6.64, and when the coding rate of the LDPC code is 3 / 4, the radius ratio R 12 = 3.07 and the radius ratio R 13 = 5.87, and when the coding rate of the LDPC code is 5 / 6, the radius ratio R 12 = 2.81 and the radius ratio R 13 = 5.

05.

3. An SC-FDE receiving device receives a modulated radio signal from an SC-FDE transmitting device that has been error-corrected using a predetermined outer code and inner code and that has been mapped using a mapping rule for a predetermined modulation method, equalizes the received signal in the frequency domain, demaps a time domain signal related to a data portion after equalization using the same mapping rule as the mapping rule for the modulation method, calculates bit likelihoods, and decodes the bit likelihood sequence, When the modulation method is 16APSK, two concentric circles are defined on the IQ axis, and on the circumference of the inner concentric circle, four signals are arranged at equal intervals of π / 2 from a position of π / 4 counterclockwise around the I axis, and on the circumference of the outer concentric circle, 12 signals are arranged at equal intervals of π / 6 from a position of π / 12 counterclockwise around the I axis. The radius of the inner concentric circle is defined as r 1 , the radius of the outer concentric circle is r 2 As, radius ratio R 12 =r 2 / r 1 performing symbol decision by demapping a time domain signal relating to the equalized data portion using the mapping rule according to the signal constellation of When the modulation method is 32APSK, assuming that three concentric circles are defined on the IQ axis, on the circumference of the innermost concentric circle, four signals are arranged at equal intervals of π / 2 from a position of π / 4 in a counterclockwise direction relative to the I axis, on the circumference of the concentric circle between the innermost and outermost concentric circles, 12 signals are arranged at equal intervals of π / 6 from a position of π / 12 in a counterclockwise direction relative to the I axis, and on the circumference of the outermost concentric circle, 16 signals are arranged at equal intervals of π / 8 from a position of π / 8 in a counterclockwise direction relative to the I axis, and the radius of the innermost concentric circle is defined as r 1 , the deformation of the concentric circles between the innermost concentric circle and the outermost concentric circle is defined as r 2 and the radius of the outermost concentric circle is r 3 As, radius ratio R 12 =r 2 / r 1 and radius ratio R 13 =r 3 / r 1 a symbol decision unit that performs symbol decision by demapping a time domain signal related to the equalized data portion using the mapping rule according to the signal constellation of When the outer code is an RS code and the inner code is a convolutional code, When the modulation method is 16APSK, when the coding rate of the convolutional code is 1 / 2, the radius ratio R 12 = 2.86, and when the coding rate of the convolutional code is 2 / 3, the radius ratio R 12 = 3.15, and when the coding rate of the convolutional code is 3 / 4, the radius ratio R 12 = 2.88, and when the coding rate of the convolutional code is 5 / 6, the radius ratio R 12 = 2.93, When the modulation method is 32APSK, when the coding rate of the convolutional code is 1 / 2, the radius ratio R 12 = 2.79 and the radius ratio R 13 = 5.29, and when the coding rate of the convolutional code is 2 / 3, the radius ratio R 12 = 3.16 and the radius ratio R 13 = 5.79, and when the coding rate of the convolutional code is 3 / 4, the radius ratio R 12 = 2.87 and the radius ratio R 13 = 5.20, and when the coding rate of the convolutional code is 5 / 6, the radius ratio R 12 = 2.91 and the radius ratio R 13 = 5.

11.

4. 4. The receiving device according to claim 3, When the outer code is a BCH code and the inner code is an LDPC code, When the modulation method is 16APSK, when the coding rate of the LDPC code is 1 / 2, the radius ratio R 12 = 3.38, and when the coding rate of the LDPC code is 2 / 3, the radius ratio R 12 = 3.36, and when the coding rate of the LDPC code is 3 / 4, the radius ratio R 12 = 3.06, and when the coding rate of the LDPC code is 5 / 6, the radius ratio R 12 = 2.82, When the modulation method is 32APSK, when the coding rate of the LDPC code is 1 / 2, the radius ratio R 12 = 3.24 and the radius ratio R 13 = 7.00, and when the coding rate of the LDPC code is 2 / 3, the radius ratio R 12 = 3.35 and the radius ratio R 13 = 6.64, and when the coding rate of the LDPC code is 3 / 4, the radius ratio R 12 = 3.07 and the radius ratio R 13 = 5.87, and when the coding rate of the LDPC code is 5 / 6, the radius ratio R 12 = 2.81 and the radius ratio R 13 = 5.05.

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