Compression of soft metrics in ECC decoders

Abstract

An apparatus (20) includes a compressor (40), a memory (24), a decompressor (32) and a decoder (36). The compressor is configured to receive soft metrics of bits of a codeword of an Error Correction Code (ECC), and to convert a group of the soft metrics, which includes two or more soft metrics of bits associated with the same symbol, into a compressed representation (28). The memory is configured to store the compressed representation. The decompressor is configured to read the compressed representation from the memory and to decompress the compressed representation so as to produce decompressed soft metrics. The decoder is configured to decode the codeword using the decompressed soft metrics.

Description

[0001] COMPRESSION OF SOFT METRICS IN ECC DECODERS

[0002] CROSS-REFERENCE TO RELATED APPLICATIONS

[0003] This application claims the benefit of U.S. Provisional Patent Application 63 / 706,757, filed October 14, 2024, whose disclosure is incorporated herein by reference.

[0004] FIELD OF THE INVENTION

[0005] The present invention relates generally to error correction coding, and particularly to methods and systems for compression of soft metrics such as Log-Likelihood Ratios (LLRs).

[0006] BACKGROUND OF THE INVENTION

[0007] Error correction codes (ECCs) are widely used in digital communication systems and data storage devices to detect and correct errors that may occur during data transmission or storage. An ECC adds redundancy to the original data, allowing the receiver or reader to identify and correct errors. Soft decoding techniques, which utilize reliability information associated with each received bit, have become increasingly popular due to their superior error-correcting performance compared to hard decision decoding.

[0008] In soft decoding, soft metrics such as Log-Likelihood Ratios (LLRs), are commonly used to represent the reliability of each received bit. The LLR values are typically extracted from demodulated symbols and provide a measure of the probability that a particular bit is a 'O' or a T'. The magnitude of an LLR indicates the reliability of the corresponding bit, with larger magnitudes suggesting higher reliability.

[0009] SUMMARY OF THE INVENTION

[0010] An embodiment that is described herein provides an apparatus including a compressor, a memory, a decompressor and a decoder. The compressor is configured to receive soft metrics of bits of a codeword of an Error Correction Code (ECC), and to convert a group of the soft metrics, which includes two or more soft metrics of bits associated with the same symbol, into a compressed representation. The memory is configured to store the compressed representation. The decompressor is configured to read the compressed representation from the memory and to decompress the compressed representation so as to produce decompressed soft metrics. The decoder is configured to decode the codeword using the decompressed soft metrics.

[0011] In some embodiments, the soft metrics include Log Likelihood Ratios (LLRs). In some embodiments, the group consists of a pair of the soft metrics. In some embodiments, the soft metrics in the group are indicative of reliabilities of the corresponding bits as received from a communication channel. In some embodiments, the soft metrics in the group are indicative of reliabilities of the corresponding bits after undergoing one or more decoding iterations by the decoder.

[0012] In some embodiments, the compressor is configured to (i) maintain, for the two or more bits associated with the same symbol, a mapping that translates possible combinations of the soft metrics into respective values in the compressed representation, and (ii) convert the group of the soft metrics into the compressed representation using the mapping.

[0013] In some embodiments, the compressor is configured to modify the mapping adaptively. In an example embodiment, the compressor is configured to modify the mapping depending on an iteration number in a sequence of decoding iterations by the decoder. In another embodiment, the compressor is configured to modify the mapping depending on a Signal-to- Noise Ratio (SNR) of a received signal that conveys the codeword.

[0014] There is additionally provided, in accordance with an embodiment that is described herein, an apparatus including a compressor, a memory, a decompressor and a decoder. The compressor is configured to receive soft metrics of bits of a codeword of an Error Correction Code (ECC), and to convert a pair of the soft metrics, which includes two soft metrics of bits associated with the same symbol, into a compressed representation. The memory is configured to store the compressed representation. The decompressor is configured to read the compressed representation from the memory and to decompress the compressed representation so as to produce decompressed soft metrics. The decoder is configured to decode the codeword using the decompressed soft metrics.

[0015] There is also provided, in accordance with an embodiment that is described herein, a method including receiving soft metrics of bits of a codeword of an Error Correction Code (ECC), and converting a group of the soft metrics, which includes two or more soft metrics of bits associated with a same symbol, into a compressed representation. The compressed representation is stored in a memory. The compressed representation is read from the memory and decompressed so as to produce decompressed soft metrics. The codeword is decoded using the decompressed soft metrics.

[0016] There is further provided, in accordance with an embodiment that is described herein, a method including receiving soft metrics of bits of a codeword of an Error Correction Code (ECC), and converting a pair of the soft metrics, which includes two soft metrics of bits associated with a same symbol, into a compressed representation. The compressed representation is stored in a memory. The compressed representation is read from the memory and decompressed so as to produce decompressed soft metrics. The codeword is decoded using the decompressed soft metrics.

[0017] The present invention will be more fully understood from the following detailed description of the embodiments thereof, taken together with the drawings in which:

[0018] BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Fig. 1 is a block diagram that schematically illustrates an iterative Error Correction Code (ECC) decoder that uses LLR compression, in accordance with an embodiment of the present invention;

[0020] Fig. 2 is a diagram showing LLRs of bits in four-level Pulse- Amplitude modulation (PAM4) as a function of symbol value, in accordance with an embodiment of the present invention;

[0021] Fig. 3 is a diagram showing possible LLR pair values for different PAM4 symbol values, with and without clipping, in accordance with an embodiment of the present invention;

[0022] Fig. 4 is a diagram showing possible LLR pair values for different PAM4 symbol values, directly from the channel and following one or more decoding iterations, in accordance with an embodiment of the present invention;

[0023] Fig. 5 is a diagram showing a mapping of LLR pair values to respective compressed values, in accordance with an embodiment of the present invention; and

[0024] Fig. 6 is a flow chart that schematically illustrates a method for ECC decoding using LLR compression, in accordance with an embodiment of the present invention.

[0025] DETAILED DESCRIPTION OF EMBODIMENTS

[0026] OVERVIEW

[0027] Embodiments of present invention that are described herein provide improved methods and systems for processing and storing soft metrics used by soft Error Correction Code (ECC) decoders.

[0028] In soft decoding, soft metrics such as Log-Likelihood Ratios (LLRs) are used to represent the reliability of received bits, providing superior error-correcting performance compared to hard decoding. However, storing and processing soft metrics requires substantial memory resources, especially in iterative decoding systems where the soft metrics are repeatedly accessed and updated throughout multiple decoding iterations.

[0029] The disclosed techniques provide compression schemes specifically designed for soft metrics associated with multi-bit symbols. Rather than storing individual soft metrics separately, the system groups soft metrics corresponding to bits of the same symbol and converts these groups into compressed representations. This approach recognizes that bits belonging to the same symbol often exhibit correlated reliability characteristics, making their soft metrics suitable candidates for joint compression.

[0030] In some embodiments, the system comprises a compressor that receives soft metrics and converts groups of the metrics into compressed representations, a memory that stores the compressed representations, and a decompressor that reconstructs the soft metrics when needed by the decoder. The compression process may utilize mappings that translate possible combinations of soft metrics into compressed values, with these mappings potentially being modified based on factors such as the current decoding iteration number or the signal-to-noise ratio of the received signal.

[0031] The disclosed compression approach significantly reduces memory requirements while maintaining the essential reliability information needed for effective soft decoding. The reduced memory requirements in turn reduce the cost, size and power consumption of the iterative decoder.

[0032] SYSTEM DESCRIPTION

[0033] Fig. 1 is a block diagram that schematically illustrates an iterative Error Correction Code (ECC) decoder 20 that uses LLR compression, in accordance with an embodiment of the present invention. The embodiments described herein refer mainly to LLRs, as a demonstrative example of soft metrics. The disclosed techniques, however, are not limited to LLRs and can be used with various other types of soft metrics.

[0034] Decoder 20 receives a set of multi -bit input symbols. Each input symbol is modulated with two or more bits. Overall, the set of symbols carry the bits of a codeword of an ECC. Decoder 20 generates decodes the codeword in an iterative decoding process, which ultimately produces output bits of the decoded codeword.

[0035] Iterative ECC decoder 20 comprises a memory 24 configured to store compressed representations 28 of LLR pairs. A decompressor 32 is operatively connected to memory 24 and is configured to read compressed representations 28 and convert them back to LLR pairs when needed for decoding operations. The decompressed LLR pairs are provided to a decoder 36 that processes these soft metrics to perform error correction.

[0036] The system further includes a compressor 40 that receives LLR pairs from the decoder 36 and converts them into compressed representations for storage in memory 24. This creates a feedback loop where updated LLR values generated during iterative decoding can be compressed and stored back in memory 24 for subsequent iterations. Compressor 40 enables iterative decoder 20 to decode ECC codewords with high performance, while benefiting from the memory savings provided by the compression scheme.

[0037] The data flow through iterative ECC decoder 20 begins with input symbols entering the decoder 20, typically along with initial LLR values ("channel LLRs"). Compressor 40 compresses at least some of the LLRs and stores the compressed representations 28 in memory 24.

[0038] The compressed LLRs are decompressed by decompressor 32 to provide LLR pairs to decoder 36, which generates updated LLR values. The updated LLR values are then compressed by compressor 40 and fed back to memory 24 as updated compressed representations 28, completing the decoding iteration. This process is repeated multiple times, e.g., until the codeword is decoded successfully or until meeting some termination condition. When decoding is successful, decoder 36 outputs the bits of the decoded codeword.

[0039] The configuration of iterative decoder 20 shown in Fig. 1 is an example configuration that is chosen purely for the sake of conceptual clarity. Any other suitable configuration can be used in alternative embodiments. In various embodiments, iterative decoder 20 may be implemented using suitable software, using suitable hardware such as one or more Application-Specific Integrated Circuits (ASICs) or Field-Programmable Gate Arrays (FPGAs), or using a combination of hardware and software elements.

[0040] In some embodiments, certain functions of iterative decoder 20 may be implemented using one more general-purpose processors, which are programmed in software to carry out the techniques described herein. The software may be downloaded to the processors in electronic form, over a network, for example, or it may, alternatively or additionally, be provided and / or stored on non-transitory tangible media, such as magnetic, optical, or electronic memory.

[0041] JOINTLY COMPRESSING LLRS OF BITS ASSOCIATED WITH THE SAME SYMBOL

[0042] Consider a signal that is modulated using a multi-level modulation scheme, e.g., four- level Pulse- Amplitude Modulation (PAM4) or sixteen-level Quadrature Amplitude Modulation (QAM16). In multi-level modulation, each symbol conveys two or more data bits. A naive solution would be to calculate and store in memory a respective LLR for each bit, independently of other bits. Such a solution, however, neglects an important property that can be exploited - LLRs of bits that are associated with the same symbol are not statistically independent. The statistical correlation between LLRs associated with the same symbol implies that their joint values are more constrained than LLRs of bits belonging to different symbols. In some cases, some combinations of LLR values are not possible due to the structure of the modulation and the mapping from symbols to bits. For example, in PAM / QAM modulation schemes with Gray mapping, having one bit with a low absolute- value LLR (low reliability) may imply that LLRs of other bits in the symbol must have absolute values bounded from below by some number (high reliabilities). To give a specific example, in a PAM4 symbol (or a QAM16 symbol, which is equivalent to two independent PAM4 symbols for the purpose of LLR mapping), the symbol maps two data bits, whose LLR values are correlated as described above.

[0043] Fig. 2 is a diagram showing LLRs of bits in PAM4 as a function of symbol value, in accordance with an embodiment of the present invention. The horizontal axis gives the soft symbol value, and the vertical axis gives the normalized LLR value.

[0044] In this example, each symbol carries two bits denoted X and Y. Bit X is the Most Significant Bit (MSB), and bit Y is the Least Significant Bit (LSB). Gray mapping is used. The mapping of bits to symbol values is as follows:

[0045] The figure shows two plots. A plot 44 gives the LLR of bit X (denoted LLRX) as a function of the symbol value. A plot 48 gives the LLR of bit Y (denoted LLRY) as a function of the symbol value.

[0046] Plots 44 and 48 demonstrate the correlation between LLRX and LLRY. For example, in the segment of symbol values between -1 and 1 containing the LLRX non-saturated values between -1 and 1, LLRY has values greater than or equal to 1, which saturate to 1. This correlation can be used for jointly compressing LRRX and LLRY of a given symbol, thereby reducing the memory space needed for storing the LLRs in memory 24.

[0047] Fig. 3 is a diagram showing possible LLR pair values for different PAM4 symbol values, with and without clipping, in accordance with an embodiment of the present invention. This example demonstrates how the correlation between LLRX and LLRY can be exploited for joint compression. The horizontal axis of Fig. 3 gives the value of LLRX (with or without clipping). The vertical axis gives the value of LLRY (with or without clipping).

[0048] A set of dots (".") 52 shows the possible combinations of values of {LLRX, LLRY} of bits X and Y of the same symbol (according to the LLRX and LLRY values given in Fig. 2 above).

[0049] In the present example, a pair of {LLRX, LLRY} is compressed jointly by clipping the absolute value of each LLR to unity (to 1). The signs of the LLRs are retained. The clipped value of LLRX is denoted QLLRX, and the clipped value of LLRY is denoted QLLRY. A set of stars ("*") 56 shows the possible combinations of values of {QLLRX, QLLRY}.

[0050] As can be seen in the figure, the total number of stars 56 is considerably smaller than the total number of dots 52. Therefore, stars 56 (i.e., the two-dimensional coordinates of stars 56) can be represented by numerical values having fewer bits than needed for representing dots 52 (i.e., the two-dimensional coordinates of dots 52). As such, storing the numerical values that represent stars 56 (instead of numerical values that represent dots 52) requires less memory space.

[0051] Thus, in some embodiments, compressor 40 compresses each pair of {LLRX, LLRY} values (represented by a certain dot 52) by mapping the pair of {LLRX, LLRY} values to a numerical value that represents the corresponding pair of clipped values ({QLLRX, QLLRY} values, represented by a certain star 56). Compressor 40 stores the numerical value in memory 24 as the compressed representation of {LLRX, LLRY}.

[0052] When decoder 36 requires the pair of {LLRX, LLRY} values, decompressor 32 retrieves the compressed representation from memory 24 and provides the {QLLRX, QLLRY} values to decoder 36. The deviations of QLLRX and QLLRY from the original LLRX and LLRY values may cause some degradation in decoding performance, but this degradation is typically small and well worth the saving in memory space.

[0053] CORRELATION AND JOINT COMPRESSION OF LLRS FOLLOWING DECODING ITERATION(S)

[0054] The LLRX and LLRY values plotted in Figs. 2 and 3 above are "channel LLRS", i.e., LLRs that are calculated on the symbols received from the communication channel before starting the iterative decoding process. For channel LLRs, the correlation between LLRX and LLRY of the same symbol is well defined, and therefore the joint representation can be defined with a relatively small number of bits (efficient compression). As the iterative decoding process progresses in iterative decoder 20, decoder 36 modifies LLRX and LLRY from one iteration to the next. As a result, the correlation between LLRX and LLRY of the same symbol decreases. Nevertheless, joint compression is still possible and effective, possibly with a compressed representation having a larger number of bits.

[0055] Fig. 4 is a diagram showing possible LLR pair values for different PAM4 symbol values, directly from the channel and following one or more decoding iterations, in accordance with an embodiment of the present invention. The horizontal axis of Fig. 4 gives the value of LLRX, and the vertical axis gives the value of LLRY.

[0056] Stars ("*") 60 show the possible combinations of values of {LLRX, LLRY} calculated on symbols received from the channel ("channel LLRs"). Dots (".") 64 show the possible combinations of values of {LLRX, LLRY} following one or more decoding iterations. As seen, the number of dots 64 is larger than the number of stars 60. Therefore, joint compression of {LLRX, LLRY} pairs is more efficient for channel LLRs than for LLRs that underwent one or more decoding iterations.

[0057] LLR COMPRESSION SCHEMES

[0058] In various embodiments, compressor 40 may use various techniques for jointly compressing a pair of LLRs associated with the same symbol.

[0059] In some embodiments, compressor 40 represents a pair of LLRs using a quantized representation of the symbol value. The quantized representation may be the same ("native") representation with which the symbol value is received and processed, or it may use a different quantization. This implementation is useful, for example, when the quantized symbol representation has a smaller size (fewer bits) than the sum of the sizes of the individual LLRs. In such cases, memory requirements are reduced, and the LLRs can be delivered to decoder 36 using “on the fly” mapping. Consider, for example, a case in which a 4-ary modulation symbol is represented as a 6-bit quantized value, while each of the two bit LLRs is represented using four bits. In such a case, maintaining the 6-bit representation as a compressed representation of the two LLRs will save (8-6) / 8=25% of the memory requirement.

[0060] In other embodiments, compressor 40 maintains a mapping between pairs of LLR values (e.g., {LLRX, LLRY} values) and respective numerical values that represent the pairs of values in compressed form. Any suitable mapping can be used.

[0061] Fig. 5 is a diagram showing a mapping of LLR pair values to respective compressed values, in accordance with an embodiment of the present invention. The horizontal axis of Fig. 5 gives the value of LLRX, and the vertical axis gives the value of LLRY. Dots 68 show possible {LLRX, LLRY} value pairs. Arrowheads 72 show the corresponding compressed representations. Note that, for many of the arrows in the figure, multiple dots 68 along the arrow (multiple {LLRX, LLRY} pairs) are mapped to the same arrowhead 72 (same compressed representation value). The center point (LLRX=LLRY=0) may be left as-is or mapped to any suitable value.

[0062] Fig. 6 is a flow chart that schematically illustrates a method for ECC decoding using LLR compression, in accordance with an embodiment of the present invention. The method begins with iterative decoder 20 receiving PAM4 symbols that convey bits of an ECC codeword, at an input stage 80.

[0063] At an LLR generation stage 84, iterative decoder 20 calculates initial LLRs ("channel LLRs") for the bits of the received symbols. Alternatively, the initial LLRs may be calculated by some other system component and provided to decoder 20.

[0064] At a compression stage 88, compressor 40 jointly compresses pairs of LLRs associated with the same symbol. At a storage stage 92, compressor 40 stores compressed representations 28 of the LLR pairs in memory 24. At a decoding stage 96, decoder 36 performs a decoding iteration on the compressed representations of the LLRs stored in memory 24. In each decoding iteration, decoder 36 modifies the LLRs. The modified LLRs are compressed again by compressor 40 and the compressed representations 28 are written back to memory 24.

[0065] The process is typically repeated multiple times, until the codeword is decoded successfully or until a defined termination condition is met.

[0066] ADAPTIVE MAPPING MODIFICATION

[0067] In some embodiments, compressor 40 is configured to modify the compression scheme (the mapping between LLR pairs and compressed representations) adaptively based on various system parameters and operating conditions. This adaptive capability allows compressor 40 to optimize its performance across different scenarios and maintain effective compression ratios while preserving decoding accuracy.

[0068] The adaptive modification of the mapping may be implemented in various ways. In one embodiment, compressor 40 modifies the mapping depending on the iteration number in the sequence of decoding iterations performed by decoder 36. As the iterative decoding process progresses, the statistical characteristics of the LLR values (and in particular the extent of correlation between them) typically change. Modifying the mapping from one iteration to the next enables compressor 40 to control the strength at which the multiple bits are constrained by the modulation joint distribution. In late iterations the LLRs tend to converge to a true modulation symbol, and therefore the constraining may be stronger. In early iterations, weaker constraining may allow the decoder to explore farther in searching for the correct codeword.

[0069] In another embodiment, compressor 40 is configured to modify the mapping depending on a Signal-to-Noise Ratio (SNR) of the received signal that conveys the codeword. Given a certain channel output, the LLR values depend on SNR. When the SNR is low, a small change in the channel output results in small LLR changes. When the SNR is high, larger LLRs changes typically occur. Conversely, the mappings from LLRs to respective joint representations may also depend on the SNR.

[0070] In some implementations, the system may maintain multiple pre-computed mappings corresponding to different iteration numbers or SNR ranges, and select the appropriate mapping based on the current operating conditions. Alternatively, the mapping parameters may be continuously adjusted using algorithms that track the statistical properties of the LLR values in real-time.

[0071] ADDITIONAL EMBODIMENTS AND VARIATIONS

[0072] The embodiments described up to this point refer to PAM4 modulation and to joint compression of pairs of LLRs associated with the same PAM4 symbol. The disclosed techniques, however, are not limited to any specific modulation. Moreover, when using higher-level modulation (with more than two bits per symbol), the disclosed techniques can be used to jointly compress groups of more than two LLRs associated with the same symbol. For example, in a 3 bits / symbol modulation, compressor 40 may maintain and apply a mapping that jointly compresses groups of three LLR values, wherein in each group the three LLRs belong to the same symbol.

[0073] In the embodiments described up to this point, all the LLR pairs (or larger groups) undergo joint compression. This is, however, not mandatory, and hybrid schemes can also be used. In some embodiments, compressor 40 applies a hybrid version in which some LLR pairs are compressed jointly, and other pairs are not. For example, in some embodiments, for some symbols, the LLRs of the symbol are expected to be read from memory 24 together, and therefore compressor 40 applies joint compression to these LLRs. For other symbols, the LLRs of the symbol are expected to be read from memory 24 at different times, and therefore compressor 40 stores these LLRs individually in memory (possibly compressed individually). In some embodiments, it is desirable (although not mandatory) for the mapping to have a range of output values of a size that is an integer power of 2, so the representation power in binary format is fully utilized. Generally, however, any suitable range of output values can be used.

[0074] Although the embodiments described herein mainly address LLRs used for ECC decoding, the methods and systems described herein can also be used in other applications, such as in demodulators, detectors, machine-learning inference algorithms, and any application that uses likelihoods or other statistical measures of data being processed.

[0075] It will thus be appreciated that the embodiments described above are cited by way of example, and that the present invention is not limited to what has been particularly shown and described hereinabove. Rather, the scope of the present invention includes both combinations and sub-combinations of the various features described hereinabove, as well as variations and modifications thereof which would occur to persons skilled in the art upon reading the foregoing description and which are not disclosed in the prior art. Documents incorporated by reference in the present patent application are to be considered an integral part of the application except that to the extent any terms are defined in these incorporated documents in a manner that conflicts with the definitions made explicitly or implicitly in the present specification, only the definitions in the present specification should be considered.

Claims

CLAIMS1. An apparatus, comprising: a compressor, configured to receive soft metrics of bits of a codeword of an Error Correction Code (ECC), and to convert a group of the soft metrics, which comprises two or more soft metrics of bits associated with a same symbol, into a compressed representation; a memory, configured to store the compressed representation; a decompressor, configured to read the compressed representation from the memory and to decompress the compressed representation so as to produce decompressed soft metrics; and a decoder, configured to decode the codeword using the decompressed soft metrics.

2. The apparatus according to claim 1, wherein the soft metrics comprise Log Likelihood Ratios (LLRs).

3. The apparatus according to claim 1, wherein the group consists of a pair of the soft metrics.

4. The apparatus according to any of claims 1-3, wherein the soft metrics in the group are indicative of reliabilities of the corresponding bits as received from a communication channel.

5. The apparatus according to any of claims 1-3, wherein the soft metrics in the group are indicative of reliabilities of the corresponding bits after undergoing one or more decoding iterations by the decoder.

6. The apparatus according to any of claims 1-3, wherein the compressor is configured to: maintain, for the two or more bits associated with the same symbol, a mapping that translates possible combinations of the soft metrics into respective values in the compressed representation; and convert the group of the soft metrics into the compressed representation using the mapping.

7. The apparatus according to claim 6, wherein the compressor is configured to modify the mapping adaptively.

8. The apparatus according to claim 7, wherein the compressor is configured to modify the mapping depending on an iteration number in a sequence of decoding iterations by the decoder.

9. The apparatus according to claim 7, wherein the compressor is configured to modify the mapping depending on a Signal-to-Noise Ratio (SNR) of a received signal that conveys the codeword.

10. An apparatus, comprising: a compressor, configured to receive soft metrics of bits of a codeword of an Error Correction Code (ECC), and to convert a pair of the soft metrics, which comprises two soft metrics of bits associated with a same symbol, into a compressed representation; a memory, configured to store the compressed representation; a decompressor, configured to read the compressed representation from the memory and to decompress the compressed representation so as to produce decompressed soft metrics; and a decoder, configured to decode the codeword using the decompressed soft metrics.

11. A method, comprising: receiving soft metrics of bits of a codeword of an Error Correction Code (ECC), and converting a group of the soft metrics, which comprises two or more soft metrics of bits associated with a same symbol, into a compressed representation; storing the compressed representation in a memory; reading the compressed representation from the memory and decompressing the compressed representation so as to produce decompressed soft metrics; and decoding the codeword using the decompressed soft metrics.

12. The method according to claim 11, wherein the soft metrics comprise Log Likelihood Ratios (LLRs).

13. The method according to claim 11, wherein the group consists of a pair of the soft metrics.

14. The method according to any of claims 11-13, wherein the soft metrics in the group are indicative of reliabilities of the corresponding bits as received from a communication channel.

15. The method according to any of claims 11-13, wherein the soft metrics in the group are indicative of reliabilities of the corresponding bits after undergoing one or more decoding iterations.

16. The method according to any of claims 11-13, wherein converting the group of soft metrics into the compressed representation comprises: maintaining, for the two or more bits associated with the same symbol, a mapping that translates possible combinations of the soft metrics into respective values in the compressed representation; and converting the group of the soft metrics into the compressed representation using the mapping.

17. The method according to claim 16, wherein maintaining the mapping comprises modifying the mapping adaptively.

18. The method according to claim 17, wherein modifying the mapping is performed depending on an iteration number in a sequence of decoding iterations by the decoder.

19. The method according to claim 17, wherein modifying the mapping is performed depending on a Signal-to-Noise Ratio (SNR) of a received signal that conveys the codeword.

20. A method, comprising: receiving soft metrics of bits of a codeword of an Error Correction Code (ECC), and converting a pair of the soft metrics, which comprises two soft metrics of bits associated with a same symbol, into a compressed representation; storing the compressed representation in a memory; reading the compressed representation from the memory and decompressing the compressed representation so as to produce decompressed soft metrics; and decoding the codeword using the decompressed soft metrics.

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