Circular loop image display system, circular loop image generating method, and test and measurement device

Abstract

The test and measurement apparatus includes an input unit that receives a non-return-to-zero (NRZ) waveform signal from a device under test, a ramp generator that generates a ramp sweep signal using the NRZ waveform signal, a gate that generates gated X-axis and Y-axis data by gating the ramp sweep signal and the NRZ waveform signal, and a display that displays the gated X-axis and Y-axis data as a circular loop image. The circular loop image generation method receives an input waveform, generates a ramp sweep signal using the input waveform, gates the ramp sweep signal and the input waveform to generate gated X-axis and Y-axis data, and displays the gated X-axis and Y-axis data as a circular loop image.

Description

[Technical Field]

[0001] This disclosure claims the benefit of U.S. Provisional Patent Application No. 63 / 038,040, filed June 11, 2020, entitled "PAM4 Circular Eye Image Display of Waveform Data," U.S. Provisional Patent Application No. 63 / 039,360, filed June 15, 2020, entitled "Read / Write Burst Separation and Measurement Using Novel Circular Eye Plots and Machine Learning," U.S. Provisional Patent Application No. 63 / 041,041, filed June 18, 2020, entitled "Circular Eye Image Display of Waveform Data," and U.S. Provisional Patent Application No. 63 / 177,930, filed April 21, 2021, entitled "Circular Eye with Machine Learning for Measuring or Tuning Optical Transmitters," each of which is incorporated herein by reference in its entirety.

[0002] This disclosure is related to the following patent applications: U.S. Patent Application No. 17 / 345,342, filed June 11, 2021, entitled "System and Method for Signal Separation and Classification Using Recursive Loop Images" (Attorney Docket No. 12222-US1), U.S. Patent Application No. 17 / 345,283, filed June 11, 2021, entitled "Recursive Loop Image Display of Waveform Data" (Attorney Docket No. 12223-US1), and U.S. Patent Application No. 17 / 345,312, filed June 11, 2021, entitled "System and Method for Recursive Loop Image Display of Multilevel Signals for Measurement and Machine Learning" (Attorney Docket No. 12224-US2).

[0003] This disclosure relates to generating images for signal analysis and measurement, and more particularly to converting binary coded signal waveforms into images that can be used to separate and identify signals. [Background technology]

[0004] In some situations, it is useful to identify bursts of data captured on a bidirectional bus and classify which direction the data signal is traveling. Test and measurement equipment with unlimited channels, such as an oscilloscope, could capture from the necessary command bus lines and provide the ability to separate read and write bursts on such a bidirectional bus. However, this is difficult when only one or two probes are available.

[0005] An example of such signaling is in DDR5 memory, the Double Data Rate Version 5 memory standard, which represents the next big change in computing memory, increasing speed and density while maintaining similar DIMM (dual in-line memory module) dimensions. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] U.S. Patent No. 7,356,077 [Patent Document 2] European Patent Publication No. 0416289 [Patent Document 3] U.S. Patent Publication No. 2005 / 0186929 [Patent Document 4] U.S. Patent Publication No. 2004 / 0202267 [Patent Document 5] U.S. Patent No. 7,379,830 Summary of the Invention [Problem to be solved by the invention]

[0007] The system channel characteristics are significantly different between read and write operations, which can be seen at the probe points. Read signals must be processed and measured separately from write signals, so they must be separated.

[0008] Typically, the DQS clock strobe signal and the DQ data signals are the most important signals for analysis. A minimum of two probes is required. In previous versions of DDR, the DQS signal had a preamble that occurred before each burst, allowing the beginning of read or write data to be identified. In DDR5, the coding for this identification is on a separate command line, which cannot easily be connected to a probe.

[0009] Embodiments of the disclosed apparatus and method address shortcomings in the prior art. [Means for solving the problem]

[0010] Embodiments of the present disclosure address the challenge of identifying bursts of data on a bidirectional bus. These embodiments describe a method for creating a circular loop image used to identify signals and facilitate several measurements. The embodiments create a sparser XY image plot than a traditional eye diagram (so-called because it forms an eye-like appearance in a waveform). This circular loop differs from an eye diagram because it represents waveform data in time order, plotted from left to right along the horizontal time axis during one polarity of signal level transition (e.g., a rising edge) and then plotted back from right to left during the opposite polarity of signal level transition (e.g., a falling edge), forming a loop. The resulting circular loop image is highly suitable as input to existing pre-trained neural networks and other machine learning systems that can process and classify small images. [Brief explanation of the drawings]

[0011] [Figure 1] Figure 1 shows an example of a circular loop image for DDR5 read and write bursts. [Figure 2]FIG. 2 shows one embodiment of a system schematic for generating a circular loop image. [Figure 3] FIG. 3 shows one embodiment of a system diagram for generating a circular loop image. [Figure 4] FIG. 4 shows one embodiment of a system diagram for generating a circular loop image. [Figure 5] FIG. 5 shows one embodiment of a system diagram for generating a circular loop image. [Figure 6] FIG. 6 shows one embodiment of a system diagram for generating a circular loop image. [Figure 7] FIG. 7 shows an example of an oscilloscope screen of the waveform used to create the circulation loop diagram. [Figure 8] FIG. 8 shows an example of a circular loop image. [Figure 9] FIG. 9 shows a standard DQ waveform, a ramp signal created from it, and the resulting circular loop image. [Figure 10] Figure 10 shows an example of a DQ random data signal with no reflections or ISI and the resulting circular loop image. [Figure 11] FIG. 11 shows an example of a measurement in a standard YT trace display. [Figure 12] FIG. 12 shows an example of measuring the reflection delay. [Figure 13] FIG. 13 shows an example of measuring the coefficients. [Figure 14] FIG. 14 shows an example of measuring the reflection coefficient using a circular loop diagram. DETAILED DESCRIPTION OF THE INVENTION

[0012] Embodiments of the present application include several processes for creating an XY circular loop plot or image of a signal. The vertical axis of the plot comprises the input waveform signal, and the horizontal axis comprises a sweep signal created by processing the signal. Figure 1 shows an example XY circular loop plot 10 for a data burst signal on a bidirectional bus, such as a DDR5 read and write burst. The vertical axis is the input waveform signal. The horizontal axis is the sweep signal created from the input waveform signal.

[0013] These embodiments provide a novel method for creating linear or semi-linear ramp sweep signals only at edge transitions in the input data waveform. No ramp signals occur during long intervals of high or low values ​​of the input digital data. The embodiments automatically position and trigger these ramp signals so that the XY signal path forms a closed loop line, as shown in FIG. 1, that includes all rising edges on the upper side of the loop and all negative-going edges on the lower side of the loop. Those skilled in the art will appreciate that the plotting of these edges can be reversed, i.e., all rising edges can be plotted on the lower side of the loop and all falling edges can be plotted on the upper side of the loop.

[0014] The edges in a system contain most of the information that defines the system transfer function. Therefore, this circular loop image represents the data waveform, capturing all cycles of the waveform in one image, while eliminating many of the extraneous, unwanted data points that would be included in an eye diagram. The resulting plot can be similar in appearance to a magnetic hysteresis BH plot, depending on the waveform characteristics. The algorithmic specification for horizontal ramp generation is novel in how it is generated and applied to a PRBS (pseudo-random binary sequence) data pattern.

[0015] Its major advantages are its ease of implementation and robustness. Various embodiments include several methods for creating an X-axis ramp-like signal. Simpler methods can result in distorted edge shapes. For image recognition purposes in machine learning systems, these methods improve computational speed while allowing the machine learning algorithm to classify it. For example, classifying read and write operations in a memory system by examining only the DQS or DQ signals.

[0016] It should be noted that these embodiments are not limited to classifying signals in memory systems. The embodiments may be utilized for other bidirectional systems where system characteristics may differ depending on the direction of signal propagation. Additionally, the embodiments may be used to evaluate various characteristics for a single waveform.

[0017] The circular loop image is a simplified plot that shows signal characteristics such as system response, nonlinearity of the rising edge compared to the falling edge, SNR, amplitude, reflection delay, reflection coefficient, rise and fall times, etc.

[0018] These embodiments produce images well suited for waveform classification of systems where the system transfer function has bidirectional data that differs for each direction. A DDR memory with probes and interposers at its memory locations is one example. The resulting XY image reduces unnecessary waveform display and displays only the key characteristics needed to classify the differences between the system response for write operations and read operations. The reduced image size and simplified closed-loop path representing the system make it well suited for use as input for existing pre-trained image processing neural networks or other machine learning systems. Furthermore, multiple measurements can be made directly on the XY plot using a user-interactive cursor or custom software-based measurement algorithms operating on the image based on circular loop data. Some embodiments use only data lines, such as the DQS and DQ data lines, to identify whether a burst signal is a read or a write.

[0019] Figure 2 shows a general block diagram for a system that generates a recursive loop image. The input signal is typically a non-return-to-zero (NRZ) signal, but other binary-coded signals may also be used. The diagram shows the input signal as x. The system may optionally remove a DC offset from the input signal at 20, for example, by subtracting the signal's mean. Optionally, at 22, additional processing in the form of interpolation or decimation may be used to increase the number of samples filling the recursive loop image or to reduce the number of samples for other processing reasons.

[0020] Whether or not these optional processes are applied, a burst gate 28 receives the input data signal. The generator 24 generates a ramp sweep signal for the X-axis of a circular loop diagram that is displayed on the display 30. Figures 3-6 show a more detailed embodiment of this generator. The gate control interface 26 may also receive input from a user that determines which segment of the input waveform forms the Y-axis portion of the circular loop image.

[0021] For the following embodiments, the input data may be a continuous signal or a burst clock signal, such as DQS in a DDR5 memory system. The input signal may be a random data pattern, such as a DQ burst interval in a DDR5 memory system. The input signal may be any type of waveform with high / low levels with edge transitions at positions determined by the system clock. The X-axis signal may be a linear sweep linear ramp signal or a ramp signal derived from the input signal. This ramp signal is directly synchronous with the input signal due to how it is generated.

[0022] The embodiment produces a circular loop view that differs from a standard eye diagram because all positive edges are plotted in increasing time from left to right and all negative edges are plotted in increasing time from right to left. This produces a continuous, closed-loop circular path image on an XY display. This image contains all samples in the waveform, but is swept along the X-axis only during unit intervals (UIs) that contain edges. No X-axis sweep occurs during UIs that do not contain edge transitions.

[0023] In FIG. 3, the ramp generator employs a boxcar filter 32, which is applied to the input signal to integrate it and convert it into a ramp-like sweep signal relative to the horizontal x-axis. The length of the boxcar filter is equal to one UI, and the output signal delay is zero. When the signal loss is low and relatively rectangular, a relatively linear sweep ramp occurs that occurs only at edge transitions. When the signal loss is large, the linearity of the ramp decreases, and the plot of the edges becomes distorted. In some applications, these distortions may not cause problems for image classification performed by a machine learning system. Note that the term "machine learning," as used herein, refers to a subset of artificial intelligence and includes computer nodes, neural networks, and the like.

[0024] The exemplary system of Figure 3 is computationally simplest. The signal is applied to the XY display image data base and the Y axis of the display 30 via the burst gate 28 block. For the X axis path, the signal is transformed by a boxcar filter 32 with a length of 1 UI (unit interval). The boxcar filter 32 may be a finite impulse response (FIR) filter whose coefficients all have a value of 1 / N, where N is the number of coefficients. It essentially performs a local integration of the input waveform over a 1 UI interval. If the input signal has square corners and a flat top (such as multiple steps), the resulting waveform will contain ramps, each 1 UI wide, with the ramps occurring along the edges of the central region of the ramp. This assumes that the boxcar filter is computed with zero delay.

[0025] If the input signal has significant inter-symbol interference (ISI), the corners will become more rounded and the resulting ramp will be nonlinear. This will distort the edge display in the XY display. However, this distorted image may still be useful as an input image for classifying the signal and determining the difference between read and write operations.

[0026] The burst gate 28 determines the number of waveform samples that are stored in the recursive loop database and the resulting recursive loop image display 30. The gate control block 26 is essentially a trigger system that determines which portion of the signal to gate. This may consist of any type of control that is programmed to make this determination. This may include some type of trigger or user menu entry that defines which gate positions in the waveform should be included in the acquired data record.

[0027] This image consists of an XY plot image, which can be thought of as similar to an XY scope plot, with the input signal placed on the Y axis and a ramp-style sweep signal synchronized to the position of this signal, x, placed on the X axis. The signal x is on the vertical axis. The triggered ramp sweep signal is on the horizontal axis. If color mapping, intensity shading, or the like is used, it is placed on the Z axis. This plot is relatively low-resolution image data and can be used as input to a deep learning neural network for classification training. The system may store the plot as an image file, which may be used in machine learning and deep learning waveform classification algorithms.

[0028] The system controller 34 applies to all embodiments and may consist of one or more processors, such as a general-purpose processor in a separate computing device, a processor in a test and measurement instrument such as an oscilloscope, or may be distributed between two devices, or between one or both of these devices and cloud computing resources.

[0029] The ramp generator of the embodiment of Figure 4 also uses a boxcar filter 32, but now adds an element called a "clipper." The clipper 40 restores the ideal square-corner signal from the input signal, then applies a zero-delay boxcar filter 32 to the output signal. This results in a linear ramp for the X-axis ramp sweep signal. The ramp occurs only when there is an edge transition in the input waveform signal.

[0030] This embodiment generates a circular loop image that captures all edge transitions in a single closed-loop XY plot, which simply cycles along roughly the same circular path throughout the entire length of the input data record. Deviation from the circular loop path is determined by ISI, noise, reflections, etc. The image includes all data points in the record, but is captured in the mid-loop region, where only edge transitions are displayed. All UI samples of high and low intervals without transitions are overlaid at the ends of the X-axis sweep range. For all positive edges, the X-axis, in units of seconds, increases from left to right. For all negative edges, the X-axis, in units of seconds, increases from right to left. These left-to-right or right-to-left sweeps only occur in UI intervals that contain edge transitions. This differs from known Lissajous figures and from typical magnetic hysteresis loop diagram displays.

[0031] In the example embodiment of Figure 4, the horizontal sweep ramp is created by first passing the input signal through a clipper function block 40. This block multiplies the signal by a large number, such as 500, and then if the signal is greater than zero, it is assigned an ideal constant high value equal to the nominal high level of the normal input voltage. If the signal is less than zero, it is assigned a constant low value. This creates a representation of an ideal square pulse of the input signal.

[0032] The boxcar filter 32 functions as a short-term integrator. The width of the boxcar filter can be equal to one UI of the input signal. Because there are an integer number of coefficients, the number of coefficients at a given sample rate can be equal to the UI interval or a non-integer fraction of the sample interval less than the UI width. The boxcar filter delay can be zero. This creates a positive-going linear ramp during the positive edge of the input signal and a negative-going linear ramp during the falling edge of the input signal. For long periods of multiple UI where there are no edges, there is no ramp. This results in only positive and negative edge locations during the closed-loop path of the circular loop diagram, which is one of the differences of this approach.

[0033] All data for multiple UI intervals without edges is present in the graph, but is displayed at only two points on the screen, ensuring that only the edges characteristic of the system model are fully visible in a simple loop path on the screen. When ISI is large, the amount of path variation along the loop spreads out, making the loop appear more closed. For clock signals that vary every UI, the entire collection of waveform data repeatedly traces the same closed-loop path on the XY display. This is also a novel aspect of embodiments of the disclosed technology, because all edges are traced along the loop path. This creates a circular loop without much overlay between positive and negative transitions, which tends to obscure many of the signal details in a typical eye diagram.

[0034] The gate control 26 essentially operates like a trigger in a typical analog oscilloscope, except that it can be more complex under program control. It determines which portion of the input signal x to process into the circular loop display image. The burst gate 28 is shown as a multiplier that can utilize the input signal and a 1 or 0 from the gate control 26. The burst gate 28 determines how many waveform samples to store in the circular loop database and the resulting circular loop image display 30. The gate control 26 determines which portion of the signal to gate. Thus, the main system controller 34 may sequence the entire system so that only one burst is processed and classified at a time.

[0035] Figure 5 shows how a derivative process 42 of the clipper 40 output signal is used to create a trigger pulse that specifies where to start a fixed amplitude, constant slope ramp that sweeps across one UI interval. This allows for edge transitions that occur mid-interval. of This embodiment will typically not introduce edge distortion into the image. However, using a derivative of the clipper signal may introduce jitter into the displayed data, since only edges derived from the clipper signal are used.

[0036] The example embodiment of Figure 5 uses the derivative of the clipper output signal to generate multiple trigger spikes that indicate when the ramp generator 44 begins calculating a constant amplitude linear ramp with a width of one UI interval. If the trigger spike is positive, the ramp has a positive slope going from a low value to a high value. If the trigger spike is negative, the ramp has a negative slope going from a high value to a low value. The ramp output signal either remains high or remains low if there is no edge transition in the next UI. The ramp generator calculates a linear ramp with the same amplitude and slope that covers one UI interval.

[0037] The embodiment of Figure 6 avoids the jitter described above by using a classic clock recovery process 46 to recover the clock from the input signal. The added complexity of the additional elements likely requires more computing power and time than the other embodiments described above. Instead, this system uses a classic clock recovery algorithm that uses a phase-locked loop (PLL) and a fast Fourier transform (FFT) algorithm to track the spread-spectrum clock (SSC), if present, and generate the clock signal used by the differentiation block 42. The output signal of the clock recovery block 46 is a square wave, similar to the clipper output signal in the systems of Figures 4 and 5. This classic clock recovery 46 is associated with a user-input menu control for specifying the parameters used in the clock recovery system. This approach also allows the recovered clock to be used to directly send trigger spikes rather than generate them, which is also an option.

[0038] Figure 7 shows an example oscilloscope display of the waveform generated using a clipper followed by a boxcar filter to generate a circular loop diagram. In this display, the somewhat sinusoidal waveform 50 is the DQS clock signal. The output signal of the clipper is shown as a square wave 52. The ramp signal is the output signal of the boxcar filter 54.

[0039] Figure 8 shows an example of a circular loop diagram. The first plot on the left shows an example of a circular loop for the DQS signal for a write operation. The center diagram shows an example of a circular loop for the DQS signal for a read operation. The third plot on the right plots the DQS read and DQS write circular loops on the same axis.

[0040] Figure 9 shows an example of a random data pattern, shown as the lower trace 62, which is applied to the Y-axis. The X-axis ramp trace is the upper trace 60. The resulting cyclic loop 64 is shown on the XY plot.

[0041] Figure 10 shows a second example, a random quadrature pulse pattern 70 applied to the Y axis of an XY display, and a ramp signal 72 for the X axis. The resulting circular loop 74 is shown in the XY plot. The positive edges look the same as in a normal XT (X over time) display, except that many edges are overlaid. The negative-going pulses have the normal polarity but are swept from right to left on the reversed time axis.

[0042] The circular loop diagram allows the user to make measurements such as the reflection delay between the probe and the memory load. For example, a standard YT trace display such as that shown in Figure 11 would allow measurement of the interval T. The delay of the trace is then given by the formula "delay = T / 2".

[0043] The circular loop diagram in Figure 12 also provides the ability to make the same measurement. The diagram shows delay as a phase angle θ (in degrees). In both cases, for simplicity of presentation, the waveform is shown without ISI loss tracing, and the point at which the phase angle θ is measured is shown to calculate the return delay time. The delay can be calculated as "Delay = (θ / (360 * Bit Rate)", where the angle is in degrees and the delay is in seconds. The data rate of the signal is the bit rate.

[0044] The reflection coefficient for a short trace between the probe and memory can be measured with a standard YT-style waveform display as shown in Figure 13. The reflection coefficient is then calculated as Γ = (v2 - v1) / v1. Once the reflection coefficient is known, the load impedance Z or characteristic impedance Z0 can be calculated by Z = Z0 · (1 + Γ) / (1 - Γ), if either is known. The reflection coefficient can be measured by measuring the voltage levels of v1 and v2 using a circular loop diagram as shown in Figure 14.

[0045] This disclosure presents several methods for creating circular loop images that provide sparser data sets that better represent system characteristics than standard eye diagrams. Circular loop images are therefore suitable for use in machine learning and deep learning algorithms that perform waveform classification, such as classifying read and write operations in memory systems.

[0046] Aspects of the disclosed technology may operate on specially created hardware, firmware, digital signal processors, or specially programmed general-purpose computers, including processors that operate according to programmed instructions. The terms "controller" or "processor" herein contemplate microprocessors, microcomputers, ASICs, and dedicated hardware controllers, among others. Aspects of the disclosed technology may be implemented as computer-usable data and computer-executable instructions, such as one or more program modules, executed by one or more computers (including a monitoring module) or other devices. Generally, program modules include routines, programs, objects, components, data structures, etc., which, when executed by a processor in a computer or other device, perform particular tasks or implement particular abstract data formats. Computer-executable instructions may be stored in computer-readable storage media, such as hard disks, optical disks, removable storage media, solid-state memory, RAM, etc. Those skilled in the art will appreciate that the functionality of the program modules may be combined or distributed as desired in various embodiments. Furthermore, such functionality may be embodied in whole or in part in firmware or hardware equivalents, such as integrated circuits, field programmable gate arrays (FPGAs), etc. Certain data structures may be used to more effectively implement one or more aspects of the disclosed technology, and such data structures are considered within the scope of the computer-executable instructions and computer-usable data described herein.

[0047] The disclosed aspects may, in some cases, be implemented in hardware, firmware, software, or any combination thereof. The disclosed aspects may also be implemented as instructions carried by or stored on one or more computer-readable media, which may be read and executed by one or more processors. Such instructions may be referred to as a computer program product. As used herein, computer-readable media refers to any medium that can be accessed by a computing device. By way of example, and not limitation, computer-readable media may include computer storage media and communication media.

[0048] "Computer storage media" means any medium that can be used to store computer-readable information. By way of example and not limitation, computer storage media may include random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory and other memory technologies, compact disc read-only memory (CD-ROM), digital video disc (DVD) and other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage and other magnetic storage devices, and any other volatile or nonvolatile, removable or non-removable medium implemented in any technology. "Computer storage media" excludes signals themselves and transitory forms of signal transmission.

[0049] A communication medium means any medium usable for communicating computer-readable information. By way of example, and not limitation, communication media may include coaxial cable, fiber optic cable, air, or any other medium suitable for communicating electrical, optical, radio frequency (RF), infrared, acoustic, or other types of signals.

[0050] Additionally, the description of this application refers to specific features. It should be understood that the disclosure herein includes all possible combinations of these specific features. When a specific feature is disclosed in connection with a particular embodiment, that feature can also be used in connection with other embodiments, to the extent possible.

[0051] Furthermore, when this application refers to a method having two or more defined steps or processes, these defined steps or processes may be performed in any order or simultaneously, unless the circumstances preclude this possibility. Example

[0052] The following examples are provided to aid in understanding the technology disclosed in this application. Embodiments of the technology may include one or more of the examples described below, and any combination thereof.

[0053] Example 1 is a system comprising an input unit that receives a non-return-to-zero (NRZ) waveform signal and one or more processors configured to execute a program that causes the one or more processors to perform the following processes: generating a ramp sweep signal using the NRZ waveform signal; gating the ramp sweep signal and the NRZ waveform signal to generate gated X-axis and Y-axis data; and displaying the gated X-axis and Y-axis data as a cyclic loop image.

[0054] Example 2 is the system of example 1, further comprising a memory for storing the gated X-axis and Y-axis data.

[0055] Example 3 is a system of either Example 1 or 2, wherein the program that causes the one or more processors to perform the process of generating the ramp sweep signal includes a program that causes the one or more processors to perform the process of applying a boxcar filter to the input waveform.

[0056] Example 4 is the system of Example 3, wherein the program that causes the one or more processors to perform the process of generating the ramp sweep signal includes a program that causes the one or more processors to perform the process of clipping the NRZ waveform signal before the process of applying the boxcar filter.

[0057] Example 5 is a system of either Example 3 or 4, wherein the program that causes the one or more processors to perform the process of generating a ramp sweep signal includes a program that causes the one or more processors to perform the processes of clipping the NRZ waveform signal to generate a clipped waveform, using a derivative of the clipped waveform to generate a trigger spike that indicates a ramp start time in the ramp sweep signal, and generating the ramp as the ramp sweep signal based on the ramp start time.

[0058] Example 6 is a system of any of Examples 1 to 5, wherein the program that causes the one or more processors to perform the process of generating a ramp sweep signal includes a program that causes the one or more processors to perform the process of performing clock recovery to generate a clock signal, the process of using the clock signal to indicate a ramp start time, and the process of generating a ramp sweep signal based on the ramp start time.

[0059] Example 7 is a system of any of Examples 1 to 6, wherein the program that causes the one or more processors to perform the process of gating the ramp sweep signal and the NRZ waveform signal includes a program that causes the one or more processors to perform the process of gating the ramp sweep signal and the NRZ waveform signal in accordance with user input.

[0060] An eighth embodiment is the system of any one of the first to seventh embodiments, wherein the one or more processors are further configured to execute a program that causes the one or more processors to perform a process of performing a measurement using the circulatory loop image.

[0061] Example 9 is the system of Example 8, wherein the program that causes the one or more processors to perform a process of performing measurements using the cyclic loop image includes a program that causes the one or more processors to perform a process of measuring reflection delay by dividing the phase angle in the cyclic loop image by 360 multiplied by the data rate of the NRZ waveform signal.

[0062] Example 10 is the system of Example 9, wherein the program that causes the one or more processors to perform the process of performing the measurement includes a program that causes the one or more processors to perform a process of measuring a reflection coefficient based on the difference between voltages represented by values ​​on a circulating loop image.

[0063] Example 11 is a method for generating a cyclic loop image, the method including: receiving an input waveform; generating a ramp sweep signal using the waveform; gating the ramp sweep signal and the input waveform to generate gated X-axis and Y-axis data; and displaying the gated X-axis and Y-axis data as a cyclic loop image.

[0064] In a twelfth embodiment, the method of the eleventh embodiment further comprises storing the circular loop image in a memory.

[0065] Example 13 is the method of any of Examples 11 or 12, wherein generating the ramp sweep signal using the input waveform includes applying a boxcar filter to the input waveform.

[0066] Example 14 is the method of example 13, wherein generating the ramp sweep signal using the input waveform includes clipping the input waveform before applying the boxcar filter.

[0067] Example 15 is a method of any of Examples 11 to 14, wherein the process of generating the ramp sweep signal using the input waveform includes a process of clipping the input waveform to generate a clipped waveform, a process of using a derivative of the clipped waveform to generate a trigger spike indicative of a ramp start time in the ramp sweep signal, and a process of generating the ramp sweep signal based on the ramp start time.

[0068] Example 16 is a method of any of Examples 11 to 15, wherein the process of generating the ramp sweep signal using the input waveform includes a process of performing clock recovery to generate a clock signal, a process of using the clock signal to indicate a ramp start time in the ramp sweep signal, and a process of generating the ramp sweep signal based on the ramp start time.

[0069] Example 17 is the method of example 11, further comprising performing measurements with the cyclic loop images.

[0070] Example 18 is the method of example 17, wherein the process of performing the measurement includes a process of measuring the reflection delay by dividing the phase angle in the cyclic loop image by 360 multiplied by the data rate of the waveform signal.

[0071] Example 19 is the method of example 17, wherein the measuring step includes measuring a reflection coefficient by a difference between voltages represented by values ​​on the cyclic loop image.

[0072] Example 20 is a test and measurement apparatus comprising an input section for receiving a non-return-to-zero (NRZ) waveform signal, a ramp generating section for generating a ramp sweep signal using the NRZ waveform signal, a gate for gating the ramp sweep signal and the NRZ waveform signal to generate gated X-axis and Y-axis data, and a display for displaying the gated X-axis and Y-axis data as a cyclic loop image.

[0073] All features disclosed in the specification, including the claims, abstract, and drawings, and all steps in any disclosed method or process, may be combined in any combination, except where at least some of such features or steps are mutually exclusive combinations. Each feature disclosed in the specification, including the claims, abstract, and drawings, may be replaced by an alternative feature serving the same, equivalent, or similar purpose, unless expressly stated otherwise.

[0074] While specific embodiments have been illustrated and described for purposes of illustration, it will be understood that various modifications can be made without departing from the spirit and scope of the disclosure. Accordingly, the invention should not be limited except as by the appended claims.

Claims

1. an input for receiving a non-return-to-zero (NRZ) waveform signal; one or more processors wherein the one or more processors: generating a ramp sweep signal using the NRZ waveform signal; gating the ramp sweep signal to generate gated X-axis data; gating the NRZ waveform signal to generate gated Y-axis data; displaying the gated X-axis and Y-axis data as a circular loop image; a circular loop image display system configured to execute a program that causes the one or more processors to perform the steps of:

2. 2. The circular loop image display system of claim 1, wherein the program that causes the one or more processors to perform the process of generating a ramp sweep signal includes a program that causes the one or more processors to perform the process of applying a boxcar filter to the NRZ waveform signal.

3. a program for causing the one or more processors to perform a process for generating a ramp sweep signal, clipping the NRZ waveform signal to generate a clipped waveform; utilizing a derivative of the clipped waveform to generate a trigger spike in the ramp sweep signal that indicates the start of a ramp; generating the ramp as the ramp sweep signal based on a start time of the ramp; 2. The circular loop image display system according to claim 1, further comprising a program for causing said one or more processors to perform the steps of:

4. a program for causing the one or more processors to perform a process for generating a ramp sweep signal, performing clock recovery to generate a clock signal; using a clock signal to indicate a start time of a ramp in said ramp sweep signal; generating a ramp sweep signal based on a start time of the ramp; 2. The circular loop image display system according to claim 1, further comprising a program for causing said one or more processors to perform the steps of:

5. 2. The circular loop image display system of claim 1, wherein the program that causes the one or more processors to perform the process of gating the ramp sweep signal and the NRZ waveform signal includes a program that causes the one or more processors to perform the process of gating the ramp sweep signal and the NRZ waveform signal in accordance with user input.

6. receiving an input waveform; generating a ramp sweep signal using the input waveform; gating the ramp sweep signal to generate gated X-axis data; gating the input waveform to generate gated Y-axis data; displaying the gated X-axis and Y-axis data as a circular loop image; A circular loop image generation method comprising:

7. generating the ramp sweep signal using the input waveform, clipping the input waveform to generate a clipped waveform; generating a trigger spike indicating a ramp start time in the ramp sweep signal using a derivative of the clipped waveform; generating the ramp sweep signal based on a start time of the ramp; 7. The recursive loop image generation method of claim 6, comprising:

8. generating the ramp sweep signal using the input waveform, performing clock recovery to generate a clock signal; utilizing said clock signal to indicate a start time of a ramp in said ramp sweep signal; generating the ramp sweep signal based on a start time of the ramp; 7. The recursive loop image generation method of claim 6, comprising:

9. The method for generating a circular loop image of claim 6, further comprising a process for measuring reflection delay by dividing the phase angle in the circular loop image by 360 multiplied by the data rate of the input waveform.

10. The method of claim 6, further comprising the step of measuring a reflection coefficient based on the difference between voltages represented by values ​​on the circular loop image.

11. an input for receiving a non-return-to-zero (NRZ) waveform signal from a device under test; a ramp generator that generates a ramp sweep signal using the NRZ waveform signal; a first gate for gating the ramp sweep signal to generate gated X-axis data; a second gate for gating the NRZ waveform signal to generate gated Y-axis data; a display that displays the gated X-axis and Y-axis data as a circular loop image; A test and measurement device comprising:

Images