Composite wiring board

Abstract

To provide a wiring board that can easily achieve high connection reliability with narrower pitch of junction terminals used for junction with semiconductor chips, finer wiring in the substrate, and lower cost.SOLUTION: A composite wiring board 10 of the present invention has a first wiring board 11, a second wiring board 12 bonded to the first wiring board 11 so as to face the first wiring board 11, and whose periphery is a greater distance from the first wiring board 11 than the center portion, and a sealing resin layer 13 interposed between the first and second wiring boards 11,12 and covering the edge surface of the second wiring board 12.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a composite wiring board. [Background technology]

[0002] In recent years, as semiconductor devices have become faster and more highly integrated, there has been a demand for narrower pitches of the bonding terminals used to bond semiconductor chips and finer wiring within the substrate for wiring substrates for flip chip ball grid arrays (FC-BGA) that mount semiconductor chips. Meanwhile, bonding between FC-BGA substrates and motherboards requires bonding terminals arranged at roughly the same pitch as conventional bonding terminals. To meet these demands, a technology has been adopted in which a multilayer wiring substrate containing fine wiring, also known as an interposer, is provided between the FC-BGA substrate and the semiconductor chip.

[0003] One of them is silicon interposer technology, which manufactures an interposer by forming a multilayer wiring structure, each layer of which contains fine wiring, on a silicon wafer using semiconductor circuit manufacturing technology. This technology is disclosed in Patent Document 1.

[0004] Furthermore, a method has been developed in which the above-mentioned multilayer wiring structure is directly fabricated on an FC-BGA substrate, rather than being formed on a silicon wafer. This method involves forming the above-mentioned multilayer wiring structure using chemical mechanical polishing (CMP) or the like in the manufacture of an FC-BGA substrate whose core layer is made of, for example, a glass epoxy substrate. This method is disclosed in Patent Document 2.

[0005] Furthermore, there is also a method (hereinafter referred to as a transfer method) in which an interposer is formed on a support such as a glass substrate, the interposer is bonded to an FC-BGA substrate, and then the support is peeled off from the interposer to provide the above-mentioned multilayer wiring structure on the FC-BGA substrate. This method is disclosed in Patent Document 3. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Japanese Patent Application Laid-Open No. 2002-280490 [Patent Document 2] Japanese Patent Application Laid-Open No. 2014-225671 [Patent Document 3] International Publication No. 2018 / 047861 Summary of the Invention [Problem to be solved by the invention]

[0007] The present invention aims to provide a wiring board that can easily achieve a narrow pitch of bonding terminals used for bonding to a semiconductor chip, fine wiring within the board, and low cost, and can achieve high connection reliability. [Means for solving the problem]

[0008] According to one aspect of the present invention, there is provided a composite wiring board comprising: a first wiring board; a second wiring board joined to the first wiring board so as to face the first wiring board, the peripheral portion of which is farther from the first wiring board than the central portion; and a sealing resin layer interposed between the first and second wiring boards and covering an end face of the second wiring board.

[0009] According to another aspect of the present invention, there is provided a composite wiring board relating to the side surface, in which the second wiring board is bent so that the central portion protrudes relative to the peripheral edge portion toward the first board.

[0010] According to yet another aspect of the present invention, there is provided a composite wiring board according to any of the above aspects, wherein a difference between a distance from the first wiring substrate to the peripheral portion and a distance from the first wiring substrate to the central portion is within a range of 5 μm or more and 30 μm or less.

[0011] According to yet another aspect of the present invention, the second wiring substrate includes two or more layers stacked on top of each other, each of the two or more layers being made of a material containing an organic insulator, and including an insulating layer having a recess formed therein, and a conductor layer provided on the insulating layer and filling the recess. The composite wiring board according to the above aspect is provided.

[0012] According to yet another aspect of the present invention, there is provided a composite wiring board according to any of the above aspects, wherein the distance from the edge of the surface of the second wiring board facing the first wiring board to the multilayer wiring structure consisting of the conductor layers included in the two or more layers is 100 μm or more.

[0013] According to yet another aspect of the present invention, there is provided a composite wiring board according to the above aspect, wherein the distance from the edge to the multilayer wiring structure is 1000 μm or less.

[0014] According to yet another aspect of the present invention, there is provided the composite wiring board according to any one of the above aspects, wherein the second wiring board has a thickness in the range of 20 μm to 100 μm.

[0015] According to yet another aspect of the present invention, there is provided the composite wiring board according to any one of the above aspects, wherein the peripheral portion has a flexural modulus of elasticity in the range of 1.5 GPa to 20 GPa.

[0016] Here, the "flexural modulus" is a value obtained in accordance with the method specified in JIS K7171:2016 "Plastics - Determination of bending properties."

[0017] According to yet another aspect of the present invention, there is provided the composite wiring board according to any one of the above aspects, wherein the sealing resin layer has a linear expansion coefficient in the range of 20 ppm / °C or more and 35 ppm / °C or less.

[0018] According to yet another aspect of the present invention, in the composite wiring board according to any one of the above aspects, the first wiring board is a wiring board for a flip chip ball grid array, and the second wiring board is an interposer.

[0019] According to yet another aspect of the present invention, there is provided a packaged device comprising a composite wiring board according to any of the above aspects and a functional device mounted on the surface of the first wiring board opposite the second wiring board.

[0020] Here, a "functional device" refers to a device that operates when supplied with at least one of power and an electrical signal, a device that outputs at least one of power and an electrical signal in response to an external stimulus, or a device that operates when supplied with at least one of power and an electrical signal and outputs at least one of power and an electrical signal in response to an external stimulus. The functional device may be in the form of a chip, such as a semiconductor chip or a chip in which circuits and elements are formed on a substrate made of a material other than a semiconductor, such as a glass substrate. The functional device may include, for example, one or more of a large-scale integrated circuit (LSI), a memory, an imaging element, a light-emitting element, and a MEMS (Micro Electro Mechanical Systems). The MEMS may include, for example, one or more of a pressure sensor, an acceleration sensor, a gyro sensor, a tilt sensor, a microphone, and an acoustic sensor. According to one example, the functional device is a semiconductor chip including an LSI.

[0021] According to yet another aspect of the present invention, there is provided a method for manufacturing a composite wiring board, including joining a first wiring board and a second wiring board so that they face each other; injecting a sealing resin between the first and second wiring boards to form a sealing resin layer that is interposed between the first and second wiring boards and covers an end face of the second wiring board; and bending the second wiring board so that a central portion protrudes toward the first wiring board relative to a peripheral portion.

[0022] According to yet another aspect of the present invention, there is provided a method for manufacturing a composite wiring board according to the above aspect, wherein the joining of the first and second wiring boards includes transferring the second wiring board, which is releasably supported on a support, from the support to the first wiring board.

[0023] According to yet another aspect of the present invention, there is provided a method for manufacturing a composite wiring board, including: stacking a first wiring board and a second wiring board with a sealing resin sandwiched therebetween; and in this state, pressing the first wiring board and the second wiring board against each other to form a sealing resin layer interposed between the first and second wiring boards and covering an end face of the second wiring board; and bending the second wiring board so that a central portion protrudes toward the first wiring board relative to a peripheral portion.

[0024] According to yet another aspect of the present invention, there is provided a method for manufacturing a composite wiring board according to the above aspect, wherein the superposition of the first and second wiring boards includes transferring the second wiring board, which is releasably supported on a support, from the support to the first wiring board with the sealing resin sandwiched therebetween. [Brief explanation of the drawings]

[0025] [Figure 1] 1 is a cross-sectional view of a packaged device according to an embodiment of the present invention; [Figure 2] 2 is a cross-sectional view schematically showing an example of a structure that can be employed for a second wiring substrate included in the packaged device shown in FIG. 1. [Figure 3] FIG. 2 is an enlarged cross-sectional view of a portion of the packaged device shown in FIG. [Figure 4] 2A to 2C are cross-sectional views schematically illustrating a step in a method for manufacturing the packaged device shown in FIG. [Figure 5] 1. FIG. 4 is a cross-sectional view schematically illustrating another step in the method for manufacturing the packaged device shown in FIG. [Figure 6] 1. FIG. 4 is a cross-sectional view schematically illustrating still another step in the method for manufacturing the packaged device shown in FIG. [Figure 7] 1. FIG. 4 is a cross-sectional view schematically illustrating still another step in the method for manufacturing the packaged device shown in FIG. [Figure 8] 1. FIG. 4 is a cross-sectional view schematically illustrating still another step in the method for manufacturing the packaged device shown in FIG. [Figure 9]1. FIG. 4 is a cross-sectional view schematically illustrating still another step in the method for manufacturing the packaged device shown in FIG. [Figure 10] FIG. 10 is a cross-sectional view schematically showing a multilayer wiring substrate with a support body used in manufacturing a packaged device according to a modified example. [Figure 11] FIG. 10 is a cross-sectional view schematically showing a packaged device according to a modified example. DETAILED DESCRIPTION OF THE INVENTION

[0026] Hereinafter, embodiments of the present invention will be described with reference to the drawings. The embodiments described below are more specific embodiments of any of the above aspects. The embodiments described below are examples that embody the technical idea of ​​the present invention, and the technical idea of ​​the present invention is not limited to the materials, shapes, structures, arrangements, etc. of the components described below. Various modifications can be made to the technical idea of ​​the present invention within the technical scope defined by the claims.

[0027] In the drawings referred to in the following description, components having the same or similar functions are denoted by the same reference numerals. It should be noted that the drawings are schematic, and the relationship between the dimension in the thickness direction and the dimension in the direction perpendicular to the thickness direction, i.e., the in-plane direction, and the relationship between the dimensions of multiple layers in the thickness direction may differ from the actual dimensions. Therefore, specific dimensions should be determined with reference to the following description. It should also be noted that the dimensional relationship between two or more components may differ between multiple drawings. Furthermore, it should be noted that the same structure is depicted upside down in some drawings.

[0028] In this disclosure, the terms "top surface" and "bottom surface" refer to the two main surfaces of a plate-like member or a layer contained therein, i.e., the surface perpendicular to the thickness direction and having the largest area, and the back surface thereof, respectively, the surface shown at the top and the surface shown at the bottom in the drawings. Also, the term "side surface" refers to a surface that is perpendicular or inclined relative to an in-plane direction.

[0029] Furthermore, in this disclosure, the expression "AA on BB" is used regardless of the direction of gravity. The state specified by the expression "AA on BB" includes a state in which AA is in contact with BB. The expression "AA on BB" does not exclude the presence of one or more other components between AA and BB.

[0030] <Structure> FIG. 1 is a cross-sectional view that schematically illustrates a packaged device according to one embodiment of the present invention.

[0031] The packaged device 1 shown in FIG. 1 includes a composite wiring board 10, a functional device 20, a sealing resin layer 30, and a bonding electrode 40.

[0032] The functional device 20 is, for example, a semiconductor chip, or a chip in which circuits and elements are formed on a substrate made of a material other than a semiconductor, such as a glass substrate. Here, as an example, the functional device 20 is a semiconductor chip. That is, here, the packaged device 1 is a semiconductor package.

[0033] The packaged device 1 includes a plurality of functional devices 20. The packaged device 1 may include only one functional device 20.

[0034] The functional devices 20 are bonded to the composite wiring substrate 10 via bonding electrodes 40. Here, the functional devices 20 are bonded to the composite wiring substrate 10 by flip-chip bonding. One or more of the functional devices 20 may be bonded to the composite wiring substrate 10 by other bonding methods such as wire bonding.

[0035] The bonding electrodes 40 are arranged at a narrow pitch between the functional devices 20 and the composite wiring board 10. The bonding electrodes 40 are made of, for example, solder, a metal such as copper or gold, or an alloy. When one or more of the functional devices 20 are bonded to the composite wiring board 10 by wire bonding, the functional devices 20 can be electrically connected to the composite wiring board using, for example, gold wires.

[0036] The sealing resin layer 30 includes a portion interposed between the functional device 20 and the composite wiring board 10 and a portion at least partially covering the side surface of the functional device 20. The sealing resin layer 30 fixes the functional device 20 to the composite wiring board 10.

[0037] The composite wiring board 10 includes an FC-BGA substrate 11, a multilayer wiring board 12, a sealing resin layer 13, and a bonding electrode 14.

[0038] The FC-BGA substrate 11 is an example of a first wiring substrate. The FC-BGA substrate 11 is bonded to, for example, a motherboard (not shown).

[0039] The FC-BGA substrate 11 includes a core layer 111 , an insulating layer 112 , a conductor layer 113 , and an insulating layer 114 .

[0040] The core layer 111 is an insulating layer. The core layer 111 is, for example, a fiber-reinforced substrate made of woven or nonwoven fabric impregnated with a thermosetting insulating resin. The woven or nonwoven fabric may be made of, for example, glass fiber, carbon fiber, or aramid fiber. The insulating resin may be, for example, epoxy resin.

[0041] Through holes are provided in the core layer 111. Part of the conductor layer 113 covers the side walls of the through holes. Here, part of the conductor layer 113 covers the side walls of the through holes provided in the core layer 111 so as to produce through holes with side walls made of a conductor. These through holes with side walls made of a conductor may be filled with an insulator.

[0042] The remainder of the conductor layers 113 form multi-layer wiring structures on both major surfaces of the core layer 111. Each multi-layer wiring structure includes multiple conductor layers 113 stacked on top of each other.

[0043] Each insulating layer 112 included in the multilayer wiring structure is interposed between two adjacent conductive layers 113. The insulating layer 112 is, for example, an insulating resin layer. The insulating layer 112 has a through hole formed therein.

[0044] The conductor layer 113 is made of a metal such as copper or an alloy, and may have a single-layer structure or a multi-layer structure.

[0045] Each conductor layer 113 included in the multilayer wiring structure includes a wiring portion and a land portion. The conductor layer 113 facing the core layer 111 with the insulating layer 112 sandwiched therebetween further includes a via portion covering the sidewall of a through hole provided in the insulating layer 112.

[0046] The insulating layer 114 is provided on the laminate of the conductor layer 113 and the insulating layer 112. The insulating layer 114 is, for example, an insulating resin layer such as a solder resist. The insulating layer 114 has a through hole that communicates with the conductor layer 113 located on the outermost surface of the multilayer wiring structure.

[0047] The FC-BGA substrate 11 may further include a bonding conductor on a portion of the conductor layer 113 that is exposed at the position of the through-hole in the insulating layer 114. The bonding conductor is, for example, a metal bump provided on the portion of the conductor layer 113 that is exposed at the position of the through-hole in the insulating layer 114. The bonding conductor is also called a bonding terminal. The bonding conductor may be made of, for example, solder.

[0048] The multilayer wiring board 12 is a second wiring board. The multilayer wiring board 12 is bonded to the functional device 20 via bonding electrodes 40 so that its upper surface faces the functional device 20. The multilayer wiring board 12 is also bonded to the FC-BGA substrate 11 via bonding electrodes 14 so that its lower surface faces the FC-BGA substrate 11. In other words, the multilayer wiring board 12 is an interposer that mediates the bonding between the functional device 20 and the FC-BGA substrate 11.

[0049] The multilayer wiring substrate 12 has smaller dimensions than the FC-BGA substrate 11. The multilayer wiring substrate 12 has larger dimensions than the functional device 20. Specifically, the orthogonal projection of the multilayer wiring substrate 12 onto a plane perpendicular to the thickness direction of the FC-BGA substrate 11 is surrounded by the contour of the orthogonal projection of the FC-BGA substrate 11 onto this plane. The contour of the orthogonal projection of the multilayer wiring substrate 12 onto the above plane surrounds the orthogonal projection of the functional device 20 onto this plane. The multilayer wiring substrate 12 will be described in detail later.

[0050] The bonding electrodes 14 are arranged between the multilayer wiring substrate 12 and the functional device 20. The pitch of the bonding electrodes 14 is wider than the pitch of the bonding electrodes 40 and narrower than the pitch of the bonding conductors provided on the underside of the FC-BGA substrate 11. The bonding electrodes 14 are made of, for example, solder.

[0051] The sealing resin layer 13 includes a portion interposed between the FC-BGA substrate 11 and the multilayer wiring substrate 12. The sealing resin layer 13 is also called an underfill layer. The sealing resin layer 13 fixes the multilayer wiring substrate 12 to the FC-BGA substrate 11.

[0052] The multilayer wiring board 12 will be described in more detail with reference to FIGS. FIG. 2 is a cross-sectional view schematically showing an example of a structure that can be employed for the multilayer wiring substrate included in the packaged device shown in FIG.

[0053] The multilayer wiring substrate 12 shown in FIG. 2 includes two or more layers 120 stacked on top of each other. Each of these layers 120 is made of a material containing an organic insulator and includes an insulating layer having a recess, and a conductor layer 1203 provided on the insulating layer and filling the recess. Here, the insulating layer is a combination of a first insulating layer 1201 and a second insulating layer 1202. Each layer 120 further includes an adhesion layer 1204a and a seed layer 1204b. Hereinafter, an insulating layer made of a material containing an organic insulator may be referred to as an "organic insulating layer."

[0054] A laminate formed by alternately stacking first insulating layers 1201 and second insulating layers 1202 constitutes insulating layer 12I shown in Fig. 1. Furthermore, a laminate of conductor layers 1203 shown in Fig. 2 constitutes multilayer wiring structure 12C shown in Fig. 1.

[0055] 2 has, as part of the recess, a first through hole with a via portion 1203V provided therein. In the second insulating layer 1202, as other parts of the recess, there are provided: one or more second through holes communicating with the first through hole and with a land portion 1203L formed therein; and a groove connected to the second through hole and with a wiring portion 1203W formed therein. The bottom surface of the groove provided in the second insulating layer 1202 included in each layer 120 is part of the surface of the first insulating layer 1201 included in that layer 120.

[0056] The first insulating layer 1201 and the second insulating layer 1202 are made of, for example, a material containing an organic insulator. The material of the first insulating layer 1201 and the second insulating layer 1202 may be an inorganic material, but preferably contains an organic material. According to one example, the first insulating layer 1201 and the second insulating layer 1202 are insulating resin layers. These insulating resin layers preferably do not contain a filler. The material of the first insulating layer 1201 and the material of the second insulating layer 1202 may be the same or different. Even if the material of the first insulating layer 1201 and the material of the second insulating layer 1202 are the same, the interface between the first insulating layer 1201 and the second insulating layer 1202 can be confirmed by observing a cross section parallel to the thickness direction using, for example, a scanning electron microscope.

[0057] The first and second through holes and the grooves are filled with the conductor layer 1203. The upper and lower surfaces of the conductor layer 1203 are flush with the upper surface of the first insulating layer 1201 and the lower surface of the second insulating layer 1202, respectively.

[0058] The portion of the conductor layer 1203 that fills the first through hole is a via portion 1203V. The portion of the conductor layer 1203 that fills the second through hole is a land portion 1203L. And the portion of the conductor layer 1203 that fills the groove is a wiring portion 1203W.

[0059] The conductor layer 1203 is made of a metal such as copper or an alloy, and may have a single-layer structure or a multi-layer structure.

[0060] The adhesion layer 1204a includes a portion interposed between the conductor layer 1203 and the first insulating layer 1201, a portion interposed between the conductor layer 1203 and the second insulating layer 1202, and a portion covering the upper surface of the conductor layer 1203. The adhesion layer 1204a is a layer that improves the adhesion of the seed layer 1204b to the first insulating layer 1201 and the second insulating layer 1202, making it difficult for the seed layer 1204b to peel off.

[0061] The seed layer 1204b is provided on the adhesive layer 1204a. The seed layer 1204b is interposed between the adhesive layer 1204a and the conductor layer 1203. The seed layer 1204b serves as a power supply layer when the conductor layer 1203 is formed by electrolytic plating.

[0062] The packaged device 1 has the following structure. FIG. 3 is an enlarged cross-sectional view of a portion of the packaged device shown in FIG.

[0063] 1 and 3, the peripheral portion of the multilayer wiring substrate 12 is farther from the FC-BGA substrate 11 than the central portion of the multilayer wiring substrate 12. Here, the top surface of the FC-BGA substrate 11 is flat. Here, the multilayer wiring substrate 12 is bent so that the central portion protrudes toward the FC-BGA substrate 11 relative to the peripheral portion.

[0064] Specifically, the first portion of the multilayer wiring board 12 where the multilayer wiring structure 12C is provided is not deformed, and the surface of this first portion facing the FC-BGA substrate 11 is flat. In contrast, the portion of the multilayer wiring board 12 where the multilayer wiring structure 12C is not provided, i.e., the second portion of the multilayer wiring board 12 that surrounds the first portion, is deformed such that the distance from the FC-BGA substrate 11 increases as the distance from the first portion increases.

[0065] As will be described in detail later, this structure makes it difficult for the multilayer wiring board 12 to be damaged, and therefore makes it possible to achieve high connection reliability.

[0066] The thickness of the multilayer wiring board 12 is preferably in the range of 20 μm to 100 μm, and more preferably in the range of 25 μm to 60 μm. If the multilayer wiring board 12 is thin, it is difficult to obtain a multilayer wiring structure 12C including a sufficient number of conductor layers 1203.

[0067] The flexural modulus of the peripheral portion of the multilayer wiring substrate 12 is preferably in the range of 1.5 GPa to 20 GPa, and more preferably in the range of 2 GPa to 15 GPa. The smaller the flexural modulus, the easier it is to bend the multilayer wiring substrate 12 so that its central portion protrudes toward the FC-BGA substrate 11 relative to the peripheral portion. If the flexural modulus is too small, the shape of the multilayer wiring substrate 12 is likely to vary.

[0068] The distance D1 from the edge of the surface of the multilayer wiring board 12 facing the FC-BGA substrate 11 to the multilayer wiring structure 12C is preferably 100 μm or more, and more preferably 500 μm or more. The distance D1 is preferably 1000 μm or less, and more preferably 700 μm or less. Here, the distance D1 is the distance from the edge to the multilayer wiring structure 12C in a direction perpendicular to the thickness direction of the composite wiring board 10. A multilayer wiring board 12 with a short distance D1 is less likely to bend. If the distance D1 is sufficiently long, further increasing the distance D1 will not significantly improve connection reliability. Most preferably, the distance D1 is approximately 500 μm.

[0069] The difference D4 between the distance D2 from the FC-BGA substrate 11 to the peripheral edge of the multilayer wiring substrate 12 and the distance D3 from the FC-BGA substrate 11 to the center of the multilayer wiring substrate 12 is preferably in the range of 5 μm to 30 μm, and more preferably in the range of 10 μm to 25 μm. Increasing the difference D4 is advantageous for improving connection reliability. However, the greater the difference D4, the more the flatness of the multilayer wiring substrate 12 decreases.

[0070] Distance D3 from FC-BGA substrate 11 to the center of multilayer wiring substrate 12 is, for example, within a range of 50 μm to 150 μm. Furthermore, the angle that a portion of multilayer wiring substrate 12 near its end face on the surface facing FC-BGA substrate 11 makes with a plane perpendicular to the thickness direction of composite wiring substrate 10 is, for example, within a range of 5° to 30°.

[0071] The linear expansion coefficient of the material constituting the organic insulating layers included in insulating layer 12I, for example, first insulating layer 1201 and second insulating layer 1202, is preferably in the range of 40 ppm / °C to 65 ppm / °C, and the linear expansion coefficient of the material constituting sealing resin layer 13 is preferably in the range of 20 ppm / °C to 35 ppm / °C. The linear expansion coefficient of the material constituting the organic insulating layers included in insulating layer 12I is preferably greater than the linear expansion coefficient of the material constituting sealing resin layer 13. In this case, peeling of multilayer wiring substrate 12 from FC-BGA substrate 11 due to thermal expansion is particularly unlikely to occur.

[0072] <Manufacturing method> The multilayer wiring substrate 12 included in this packaged device 1 can be manufactured, for example, by the following method.

[0073] 4 to 9 are cross-sectional views that schematically illustrate a method for manufacturing the packaged device shown in FIG.

[0074] (1) Formation of a release layer 3 on a support 2 In this method, first, a release layer 3 is formed on one surface of a support 2 as shown in FIG.

[0075] Since light may be irradiated onto the release layer 3 through the support 2, it is advantageous to use a light-transmitting carrier substrate. For example, a rectangular glass plate can be used as the support 2. The rectangular glass plate is suitable for large sizes. Furthermore, the glass plate can achieve excellent flatness and high rigidity. Therefore, the rectangular glass plate as the support 2 is suitable for forming a fine pattern thereon.

[0076] Furthermore, since a glass plate has a small coefficient of thermal expansion (CTE) and is less likely to distort, it is excellent in ensuring pattern placement accuracy and flatness. When a glass plate is used as the support 2, it is desirable that the glass plate have a large thickness in order to suppress the occurrence of warping during the manufacturing process, and the thickness is, for example, in the range of 0.7 mm to 1.1 mm.

[0077] The CTE of the glass plate is preferably 3 ppm or more and 15 ppm or less, and from the viewpoint of compatibility with the CTE of the FC-BGA substrate 11 and the functional device 20, it is more preferably about 9 ppm.

[0078] On the other hand, if the support 2 does not need to be optically transparent when peeling it off, such as when a heat-foaming resin is used for the release layer 3, a material with little distortion, such as metal or ceramics, can be used for the support 2. When ceramics is used, it is easy to achieve the desired CTE.

[0079] Hereinafter, as an example, it is assumed that the material of the release layer 3 is a resin that absorbs ultraviolet light (UV light) and becomes peelable, and the support 2 is a glass plate.

[0080] The release layer 3 may be made of a resin that becomes peelable by absorbing light such as UV light and generating heat or changing in quality, or may be made of a resin that becomes peelable by foaming due to heat.

[0081] The release layer 3 may further contain additives such as a photodecomposition accelerator, a light absorber, a sensitizer, and a filler.

[0082] The release layer 3 may have a single-layer structure or a multilayer structure. For example, a protective layer may be provided on the release layer 3 for the purpose of protecting the multilayer wiring structure formed on the support 2, and a layer for improving adhesion between the support 2 and the release layer 3 may be further provided. A laser light reflective layer or a metal layer may further be provided between the release layer 3 and the multilayer wiring structure.

[0083] In addition, when a resin that can be peeled off by light such as UV light, for example laser light, is used as the material for the peeling layer 3, if the support 2 is translucent, the peeling layer 3 may be irradiated with light through the support 2.

[0084] (2) Formation of multilayer wiring substrate 12 on release layer 3 After forming a release layer 3 on the upper surface of the support 2, a multilayer wiring board 12 is formed on the release layer 3 as shown in Fig. 5. The structure including the support 2 and the multilayer wiring board 12 supported thereby is called a "multilayer wiring board with support."

[0085] The multilayer wiring board 12 can be formed by, for example, a semi-additive process (SAP process) or a damascene process.

[0086] For example, first, a photosensitive resin is applied by spin coating onto the release layer 3. Next, first through holes are formed in the coating by photolithography to obtain the first insulating layer 1201 shown in FIG.

[0087] Next, second insulating layer 1202 is formed on first insulating layer 1201. Second insulating layer 1202 can be formed using, for example, a photosensitive resin. For example, photosensitive resin is applied by spin coating to the surface on which first insulating layer 1201 is provided, and second insulating layer 1202 having second through-holes and grooves is obtained by photolithography.

[0088] Photosensitive epoxy resin is preferably used as the photosensitive resin used to form first insulating layer 1201 and second insulating layer 1202. Photosensitive epoxy resin can be cured at a relatively low temperature and shrinks little when cured, so that an insulating layer with excellent flatness can be obtained, which is advantageous for the subsequent formation of fine patterns.

[0089] Instead of forming the first insulating layer 1201 and the second insulating layer 1202 by applying a photosensitive resin, an insulating resin film can be formed by compression curing using a vacuum laminator. In this case, an insulating layer with excellent flatness can be obtained. Furthermore, if high flatness is not required, polyimide can also be used.

[0090] Next, an adhesion layer 1204a and a seed layer 1204b are formed in a vacuum. The adhesion layer 1204a is a layer that improves the adhesion of the seed layer 122b to the first insulating layer 1201 and the second insulating layer 1202, and prevents peeling of the seed layer 1204b. The seed layer 1204b also serves as a power supply layer in electrolytic plating for forming the conductor layer 1203.

[0091] Here, as an example, the adhesion layer 1204a and the seed layer 1204b are formed by sputtering. Also, as an example, a titanium layer with a thickness of 50 nm is formed as the adhesion layer 1204a, and a copper layer with a thickness of 300 nm is formed as the seed layer 1204b. Note that the seed layer 1204b may also be formed by electroless plating.

[0092] Next, a conductor layer is formed on the seed layer 1204b by electrolytic plating. Examples of electrolytic plating include nickel electrolytic plating, copper electrolytic plating, chromium electrolytic plating, palladium electrolytic plating, gold electrolytic plating, rhodium electrolytic plating, and iridium electrolytic plating. Copper electrolytic plating is preferred because it is simple, inexpensive, and can produce a conductor layer 1203 with good electrical conductivity.

[0093] Next, the above structure is polished by chemical mechanical polishing (CMP) or the like to remove the conductive layer, the seed layer 1204b, and the adhesion layer 1204a that are located outside the first or second through hole or groove, thereby forming the conductive layer 1203 and obtaining the layer 120.

[0094] Thereafter, the process for forming the layer 120 is repeated, thereby obtaining the multilayer wiring substrate 12 including the multilayer wiring structure 12C and the insulating layer 12I, as shown in FIGS.

[0095] (3) Manufacturing the Composite Wiring Board 10 Next, as shown in Fig. 5, a joining conductor 129 is provided on the exposed portion of the multilayer wiring structure 12C. The joining conductor 129 is, for example, a solder bump.

[0096] Next, as shown in Fig. 6, the multilayer wiring substrate 12 supported by the support 2 is bonded to the FC-BGA substrate 11. The FC-BGA substrate 11 shown in Fig. 6 includes a bonding conductor 115. The bonding conductor 115 is made of, for example, solder. The bonding conductors 115 and 129 are bonded to each other to form the bonding electrode 14 shown in Fig. 7.

[0097] Thereafter, the release layer 3 is irradiated with a laser beam to peel the support body 2 and the multilayer wiring substrate 12 from each other, as shown in Fig. 7. In this manner, the multilayer wiring substrate 12 is transferred from the support body 2 to the FC-BGA substrate 11. If the release layer 3 remains on the multilayer wiring substrate 12, it is removed by, for example, etching.

[0098] Next, the sealing resin layer 13 is formed as shown in Fig. 8. Here, the sealing resin layer 13 is formed after the above peeling, but the above peeling may be performed after the sealing resin layer 13 is formed.

[0099] The material for the encapsulating resin layer 13, i.e., the encapsulating resin (or underfill material), can be, for example, a mixture of a resin and a filler. The resin can be, for example, one of epoxy resin, urethane resin, silicone resin, polyester resin, oxetane resin, and maleimide resin, or a mixture of two or more of these resins. The filler can be, for example, one of silica, titanium oxide, aluminum oxide, magnesium oxide, and zinc oxide, or two or more of these.

[0100] The sealing resin layer 13 can be formed, for example, by filling a liquid sealing resin between the FC-BGA substrate 11 and the multilayer wiring substrate 12 and then curing it.

[0101] The liquid sealing resin used is, for example, one that easily wets the FC-BGA substrate 11 and the multilayer wiring board 12. When such a sealing resin is used, by injecting the sealing resin between the FC-BGA substrate 11 and the multilayer wiring board 12, the sealing resin spreads between the FC-BGA substrate 11 and the multilayer wiring board 12 by capillary action, and the end face of the multilayer wiring board 12 can be covered with the sealing resin.

[0102] During this process, the sealing resin attempts to reduce the surface area that comes into contact with the atmosphere. As described above, the peripheral portion of multilayer wiring board 12 is prone to bending. Therefore, the sealing resin located outside this peripheral portion pushes the peripheral portion of multilayer wiring board 12 upward and moves between the peripheral portion and FC-BGA substrate 11. As a result, a structure is obtained in which the center portion of multilayer wiring board 12 protrudes toward FC-BGA substrate 11 relative to the peripheral portion.

[0103] As the sealing resin, an anisotropic conductive film (ACF) or a non-conductive film (NCF) may be used.

[0104] That is, first, the FC-BGA substrate 11 and the multilayer wiring substrate 12 supported by the support member 2 are stacked together with ACF or NCF sandwiched between them as a sealing resin. Next, in this state, the FC-BGA substrate 11 and the multilayer wiring substrate 12 are pressed against each other to form a sealing resin layer 13 that is interposed between them and covers the end faces of the multilayer wiring substrate 12, and the multilayer wiring substrate 12 and the support member 2 are bent so that their central portions protrude toward the FC-BGA substrate 11 relative to their peripheral portions. Thereafter, the multilayer wiring substrate 12 and the support member 2 are peeled off from each other.

[0105] When forming the sealing resin layer 13 using ACF or NCF, if the support 2 is flexible, pressing the center of the multilayer wiring board 12 with a higher pressure than the peripheral edge will result in a structure in which the center of the multilayer wiring board 12 protrudes toward the FC-BGA substrate 11 relative to the peripheral edge. Alternatively, using an ACF or NCF whose peripheral edge is thicker than the center will result in a structure in which the center of the multilayer wiring board 12 protrudes toward the FC-BGA substrate 11 relative to the peripheral edge.

[0106] In this manner, a composite wiring board 10 including the FC-BGA substrate 11, the multilayer wiring board 12, and the like is obtained.

[0107] (4) Manufacturing of packaged device 1 9, the functional device 20 is bonded to the composite wiring board 10. For this bonding, for example, thermo compression bonding or mount reflow can be used.

[0108] Prior to bonding the functional device 20, a surface treatment layer such as an electroless Ni / Pd / Au plating layer, an OSP (Organic Solderability Preservative) film, i.e., a surface treatment layer using a water-soluble preflux, an electroless tin plating layer, or an electroless Ni / Au plating layer may be formed on the exposed portion of the multilayer wiring structure 12C for the purpose of preventing oxidation and improving wettability to solder.

[0109] Next, flux is removed from the joint between the functional device 20 and the composite wiring board 10. After that, the joint is sealed with the sealing resin layer 30 shown in FIG. As the material of the encapsulating resin layer 30, for example, the materials exemplified as the material of the encapsulating resin layer 13 can be used. The encapsulating resin layer 30 can be formed, for example, by the same method as that described above for the encapsulating resin layer 13. In this manner, the packaged device 1 shown in FIG. 1 is completed.

[0110] <Modification> Fig. 10 is a cross-sectional view schematically showing a multilayer wiring substrate with a support body used in manufacturing a packaged device according to a modified example. Fig. 11 is a cross-sectional view schematically showing a packaged device according to a modified example.

[0111] 10 is similar to the multilayer wiring board 12 described with reference to FIG. 5 etc., except that the multilayer wiring board 12 further includes a solder resist layer as an insulating layer 128. The packaged device 1 shown in FIG. 11 is similar to the packaged device 1 described with reference to FIGS. 1 to 9, except that the multilayer wiring board 12 further includes an insulating layer 128.

[0112] As shown in this example, the FC-BGA substrate 11, the multilayer wiring substrate 12, the composite wiring substrate 10, and the packaged device 1 can be modified in various ways.

[0113] <Effects> In the above-described packaged device 1, the functional device 20 is not directly mounted on the FC-BGA substrate 11, but rather a multilayer wiring substrate 12 is interposed therebetween. The pitch of the joining terminals in the multilayer wiring substrate 12 used to join the FC-BGA substrate 11 can be made sufficiently smaller than the pitch of the joining terminals in the FC-BGA substrate 11 used to join the motherboard. Therefore, in the multilayer wiring substrate 12, it is easy to achieve a narrower pitch of the joining terminals used to join the functional device 20 and finer wiring. Therefore, in the above-described composite wiring substrate 10, it is easy to achieve a narrower pitch of the joining terminals used to join the functional device 20 and finer wiring.

[0114] Interposers obtained using silicon interposer technology, so-called silicon interposers, are manufactured using silicon wafers and semiconductor front-end process equipment. Silicon wafers are limited in shape and size, and the number of interposers that can be manufactured from a single wafer is not necessarily large. Furthermore, the manufacturing equipment is expensive. Therefore, silicon interposers are expensive. Furthermore, because silicon wafers are semiconductors, the use of silicon interposers also presents the problem of degradation of transmission characteristics.

[0115] No silicon wafer is required to manufacture the above-described composite wiring board 10. Furthermore, in the composite wiring board 10, for example, most or all of the insulating layers can be insulating resin layers. Therefore, the above-described composite wiring board 10 can be manufactured using inexpensive materials and equipment, enabling cost reductions and achieving excellent transmission characteristics.

[0116] The technique of directly fabricating a multilayer wiring structure containing a conductor layer with a fine wiring pattern on an FC-BGA substrate minimizes the degradation of transmission characteristics seen with silicon interposers. However, this method has issues with the manufacturing yield of the FC-BGA substrate itself and the difficulty of forming a multilayer wiring structure containing a conductor layer with a fine wiring pattern on a core layer such as a glass epoxy substrate, resulting in low overall manufacturing yield. Furthermore, it is difficult to achieve high symmetry with this FC-BGA substrate across a plane that bisects its thickness. Therefore, such FC-BGA substrates are prone to warping and distortion when heated.

[0117] In manufacturing the above-described composite wiring board 10 and packaged device 1, a multilayer wiring board 12 is manufactured separately from the FC-BGA substrate 11, and then they are bonded together. A multilayer wiring structure 12C including a conductor layer with a fine wiring pattern is not formed in the FC-BGA substrate 11, but is formed in the multilayer wiring board 12. Furthermore, since the multilayer wiring board 12 is bonded to the FC-BGA substrate 11 while being supported by the support body 2, even if the multilayer wiring board 12 is thin, it can be bonded to the FC-BGA substrate 11. Therefore, the above-described composite wiring board 10 and packaged device 1 can be manufactured with a high yield.

[0118] Furthermore, in manufacturing the composite wiring board 10, the multilayer wiring structure 12C including a conductor layer having a fine wiring pattern is formed on the support 2, rather than on a core layer such as a glass epoxy substrate. Because a material with excellent smoothness can be used as the support 2, the fine patterns formed thereon can be formed with high shape accuracy. For these reasons as well, the above-described composite wiring board 10 and packaged device 1 can be manufactured with a high yield.

[0119] Furthermore, in the above-described composite wiring board 10 and packaged device 1, it is easy to achieve a high degree of symmetry with respect to a plane that bisects the thickness of the FC-BGA substrate 11, and it is also easy to achieve a high degree of symmetry with respect to a plane that bisects the thickness of the multilayer wiring board 12. Furthermore, in the above-described composite wiring board 10 and packaged device 1, the FC-BGA substrate 11 and multilayer wiring board 12 are bonded together, which are formed separately. Therefore, even if their CTEs differ, warping or the like due to this difference is unlikely to occur. Therefore, the above-described composite wiring board 10 and packaged device 1 are unlikely to warp or distort when heated.

[0120] Furthermore, the above-described composite wiring board 10 can achieve high connection reliability, as will be explained below.

[0121] As described above, in this composite wiring board 10, the peripheral portion of the multilayer wiring board 12 is farther from the FC-BGA substrate 11 than the central portion of the multilayer wiring board 12. That is, the sealing resin layer 13 is thicker at the peripheral portion of the multilayer wiring board 12 than at the central portion of the multilayer wiring board 12. The sealing resin layer 13 also covers the edge surfaces of the multilayer wiring board 12. Therefore, the sealing resin layer 13 has an excellent ability to protect the multilayer wiring board 12 from damage. Therefore, the composite wiring board 10 is less likely to develop cracks at the edges of the multilayer wiring board 12, for example, and can achieve high connection reliability. [Explanation of symbols]

[0122] 1...packaged device, 2...support, 3...peeling layer, 10...composite wiring board, 11...FC-BGA substrate, 12...multilayer wiring board, 12C...multilayer wiring structure, 12I...insulating layer, 13...encapsulating resin layer, 14...bonding electrode, 20...functional device, 30...encapsulating resin layer, 40...bonding electrode, 111...core layer, 112...insulating layer, 113...conductor layer, 114...insulating layer, 120...layer, 128...insulating layer, 129...bonding conductor, 1201...first insulating layer, 1202...second insulating layer, 1203...conductor layer, 1203L...land portion, 1203V...via portion, 1203W...wiring portion, 1204a...adhesion layer, 1204b...seed layer.

Claims

1. a first wiring substrate; a second wiring board joined to the first wiring board so as to face the first wiring board, the peripheral portion of which is farther from the first wiring board than a central portion thereof over the entire periphery; a sealing resin layer interposed between the first and second wiring substrates and covering an end surface of the second wiring substrate; A composite wiring board comprising:

2. The composite wiring board according to claim 1 , wherein the second wiring board is bent so that the central portion protrudes toward the first wiring board relative to the peripheral portion.

3. 3. The composite wiring board according to claim 1, wherein a difference between a distance from the first wiring board to the peripheral portion and a distance from the first wiring board to the central portion is within a range of 5 μm to 30 μm.

4. the second wiring substrate includes two or more layers stacked on top of each other; Each of the two or more layers comprises: an insulating layer made of a material containing an organic insulator and having a recess; a conductor layer provided on the insulating layer and filling the recess; The composite wiring board according to claim 1 , further comprising:

5. 5. The composite wiring board according to claim 4, wherein the distance from the edge of the surface of the second wiring board facing the first wiring board to the multilayer wiring structure consisting of the conductor layers included in the two or more layers is 100 μm or more.

6. 6. The composite wiring board according to claim 5, wherein the distance from the edge to the multilayer wiring structure is 1000 [mu]m or less.

7. 7. The composite wiring board according to claim 1, wherein the second wiring board has a thickness in the range of 20 [mu]m to 100 [mu]m.

8. 8. The composite wiring board according to claim 1, wherein the peripheral portion has a flexural modulus of elasticity in the range of 1.5 GPa to 20 GPa.

9. 9. The composite wiring board according to claim 1, wherein the sealing resin layer has a linear expansion coefficient in the range of 20 ppm / [deg.] C. to 35 ppm / [deg.] C.

10. 10. The composite wiring board according to claim 1, wherein the first wiring board is a wiring board for a flip chip ball grid array, and the second wiring board is an interposer.

11. The composite wiring board according to any one of claims 1 to 10, a functional device mounted on the surface of the first wiring substrate opposite to the second wiring substrate; A packaged device comprising:

12. bonding the first wiring board and the second wiring board so that they face each other; injecting a sealing resin between the first and second wiring substrates to form a sealing resin layer interposed between the first and second wiring substrates and covering an end face of the second wiring substrate, and bending the second wiring substrate so that a central portion thereof protrudes toward the first wiring substrate relative to the entire peripheral edge portion thereof; A method for manufacturing a composite wiring board comprising the steps of:

13. 13. The method for manufacturing a composite wiring board according to claim 12, wherein the bonding of the first and second wiring boards includes transferring the second wiring board, which is releasably supported on a support, from the support to the first wiring board.

14. overlapping the first wiring board and the second wiring board with a sealing resin therebetween; In this state, the first wiring board and the second wiring board are pressed against each other to form a sealing resin layer interposed between the first and second wiring boards and covering the end face of the second wiring board, and the second wiring board is bent so that a central portion thereof protrudes toward the first wiring board relative to the entire peripheral edge portion thereof. A method for manufacturing a composite wiring board comprising the steps of:

15. 15. The method for manufacturing a composite wiring board according to claim 14, wherein the superposition of the first and second wiring substrates includes transferring the second wiring substrate, which is releasably supported on a support, from the support to the first wiring substrate with the sealing resin sandwiched therebetween.

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