Semiconductor device manufacturing method

Abstract

To provide a technology that can reduce the self-inductance of a semiconductor device.SOLUTION: A semiconductor device has insulating substrates 4a, 4b with a circuit pattern 3b formed on an upper surface, semiconductor elements 5a, 5b mounted on an upper surface of the circuit pattern 3a, and a plurality of electrode terminals 6, 7, 8 with one end bonded to the upper surface of the circuit pattern 3a. The electrode terminals 6, 7 having mutually adjacent portions among the plurality of electrode terminals 6, 7, 8 are coated with an insulating film 11 thinner than 100 μm in thickness at least in the portions.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] This disclosure ,half Method for manufacturing semiconductor devices By law It is related to. [Background technology]

[0002] As a structure for reducing the internal inductance of a semiconductor device, the structure described in Patent Document 1 has been proposed.

[0003] In the semiconductor power module (corresponding to a semiconductor device) described in Patent Document 1, positive and negative terminals are arranged in parallel, and the same current flows in opposite directions. As a result, the magnetic fields generated by the currents in the space between each terminal cancel each other out, making it possible to reduce the inductance of the current path. In addition, space is secured between each terminal by inserting insulating resin, insulating paper, or laminate coating. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2015-213408 Summary of the Invention [Problem to be solved by the invention]

[0005] However, in the semiconductor power module described in Patent Document 1, insulating resin, insulating paper, or laminate coating is interposed between each terminal to provide insulation, so the insulating material needs to have a certain thickness, which causes the problem of increased self-inductance of the semiconductor power module.

[0006] Therefore, an object of the present disclosure is to provide a technique capable of reducing the self-inductance of a semiconductor device. [Means for solving the problem]

[0007] Semiconductor device according to the present disclosure Manufacturing method The semiconductor device includes an insulating substrate having a circuit pattern formed on its upper surface, a semiconductor element mounted on the upper surface of the circuit pattern, and a plurality of electrode terminals having one end joined to the upper surface of the circuit pattern. a base plate joined to the lower surface of the insulating substrate; a case fixed to the peripheral edge of the base plate; and a sealing material sealing the inside of the case. and the electrode terminals having portions adjacent to each other among the plurality of electrode terminals are coated with an insulating film having a thickness of less than 100 μm at least in the portions. a semiconductor device including a semiconductor element and a sealing material, the insulating film being made of an insulating coating material that bonds the electrode terminals having the portions adjacent to each other among the plurality of electrode terminals to the sealing material via a non-covalent bond, and covering the semiconductor element and one end of the electrode terminals having the portions adjacent to each other among the plurality of electrode terminals, the plurality of electrode terminals including a first electrode terminal and a second electrode terminal having the portions adjacent to each other, the semiconductor element including a first semiconductor element and a second semiconductor element, the one end of the electrode terminals being made of an insulating coating material that bonds the electrode terminals having the portions adjacent to each other among the plurality of electrode terminals to the sealing material via a non-covalent bond, the semiconductor element including a semiconductor element and a semiconductor element, the one end of the electrode terminals being made of an insulating coating material that bonds the electrode terminals having the portions adjacent to each other among the plurality of electrode terminals to the sealing material via a non-covalent bond, the The method includes: a step (a) of applying the insulating coating material to the first electrode terminal, which is joined to an upper surface of a first portion on which a first semiconductor element is mounted and whose other end is joined to the case, and to the first portion of the circuit pattern; a step (b) of joining one end of the second electrode terminal to an upper surface of a second portion of the circuit pattern on which the second semiconductor element is mounted, and joining the other end to the case, so as to have the portion adjacent to the first electrode terminal; and a step (c) of applying the insulating coating material to the second electrode terminal and the second portion of the circuit pattern. . [Effects of the Invention]

[0008] According to the present disclosure, an insulating film thinner than insulating resin, insulating paper, and laminate coating is interposed between adjacent electrode terminals, thereby reducing the self-inductance of the semiconductor device. [Brief explanation of the drawings]

[0009] [Figure 1] 1 is a cross-sectional view of a semiconductor device according to a first embodiment. [Figure 2] 10 is a graph showing the relationship between the inter-electrode pitch and self-inductance. [Figure 3] FIG. 10 is a cross-sectional view of a semiconductor device according to a second embodiment. [Figure 4] 10A and 10B are cross-sectional views illustrating a method for manufacturing a semiconductor device according to a third embodiment. [Figure 5] 10A and 10B are cross-sectional views illustrating a method for manufacturing a semiconductor device according to a third embodiment. [Figure 6] 10A and 10B are cross-sectional views illustrating a method for manufacturing a semiconductor device according to a third embodiment. [Figure 7] FIG. 10 is a cross-sectional view of a semiconductor device according to a modification of the first embodiment. [Figure 8] FIG. 10 is a block diagram showing a configuration of a power conversion system to which a power conversion device according to a fourth embodiment is applied. DETAILED DESCRIPTION OF THE INVENTION

[0010] <First Embodiment> <Overall structure> First Embodiment The first embodiment will be described below with reference to the drawings. Figure 1 is a cross-sectional view of a semiconductor device according to the first embodiment.

[0011] As shown in FIG. 1, the semiconductor device includes a base plate 1, insulating substrates 4a and 4b, semiconductor elements 5a and 5b, electrode terminals 6, 7 and 8, a case 9, and a sealing material .

[0012] The base plate 1 is made primarily of copper and has a rectangular shape when viewed from above.

[0013] The insulating substrates 4a and 4b are joined via solder 2 to the upper surface of the base plate 1, closer to the inner periphery than the peripheral edge. In FIG. 1, the insulating substrate 4a on the high-potential side is located on the right, and the insulating substrate 4b on the low-potential side is located on the left. Each of the insulating substrates 4a and 4b includes an insulating layer 3a and circuit patterns 3b and 3c. The insulating layer 3a is made primarily of, for example, ceramic. A plurality of conductive circuit patterns 3b are provided on the upper surface of the insulating layer 3a. A conductive circuit pattern 3c is provided on the lower surface of the insulating layer 3a. The circuit patterns 3b and 3c are made primarily of, for example, copper.

[0014] Semiconductor element 5a is mounted on the upper surface of circuit pattern 3b of insulating substrate 4a via solder 2. Semiconductor element 5b is mounted on the upper surface of circuit pattern 3b of insulating substrate 4b via solder 2. Semiconductor elements 5a and 5b are made of silicon and are, for example, IGBTs (Insulated Gate Bipolar Transistors). Here, semiconductor element 5a corresponds to a first semiconductor element, and semiconductor element 5b corresponds to a second semiconductor element.

[0015] 1, two semiconductor elements 5a and 5b are mounted, but the number of semiconductor elements 5a and 5b is not limited to 2. The same applies to the numbers of semiconductor elements 5a and 5b in the following embodiments.

[0016] The case 9 is formed in a rectangular frame shape in top view so as to have four sides. The case 9 is fixed to the peripheral edge of the base plate 1 using, for example, an adhesive (not shown), and surrounds the insulating substrates 4a and 4b and the semiconductor elements 5a and 5b.

[0017] Electrode terminal 6 is composed of one end 6a joined to the upper surface of circuit pattern 3b of insulating substrate 4a, the other end 6b fixed to a first side of case 9, and a middle portion 6c between one end 6a and the other end 6b. Electrode terminal 7 is composed of one end 7a joined to the upper surface of circuit pattern 3b of insulating substrate 4b, the other end 7b fixed to a first side of case 9, and a middle portion 7c between one end 7a and the other end 7b. Electrode terminal 8 is composed of one end 8a joined to the upper surface of circuit pattern 3b of insulating substrate 4b, the other end 8b fixed to a second side of case 9, and a middle portion 8c between one end 8a and the other end 8b.

[0018] Here, the electrode terminal 6 corresponds to the first electrode terminal, and the electrode terminal 7 corresponds to the second electrode terminal. The second side of the case 9 is the side opposite to the first side.

[0019] One end 6a of the electrode terminal 6 is joined to the upper surface of the circuit pattern 3b of the insulating substrate 4a via solder 2, and the other end 6b of the electrode terminal 6 is fixed to a first side of the case 9 via an adhesive (not shown). One end 7a of the electrode terminal 7 is joined to the upper surface of the circuit pattern 3b of the insulating substrate 4b via solder 2, and the other end 7b of the electrode terminal 7 is fixed to the first side of the case 9 via an insulating film 11.

[0020] One end of the electrode terminal 8 is joined to the upper surface of the circuit pattern 3b of the insulating substrate 4b via solder 2, and the other end 8b of the electrode terminal 8 is fixed to the second side of the case 9.

[0021] The sealing material 10 is filled inside the case 9 and covers the insulating substrates 4a and 4b and the semiconductor elements 5a and 5b. The sealing material 10 is, for example, silicone gel.

[0022] Next, the characteristic features of the semiconductor device according to the first embodiment will be described with reference to Figures 1 and 2. Figure 2 is a graph showing the relationship between the inter-electrode pitch and the self-inductance.

[0023] As shown in FIG. 1, the electrode terminals 6 and 7 are arranged parallel to each other to reduce self-inductance, and have adjacent portions. The electrode terminals 6 and 7 are coated with an insulating film 11 having a thickness of less than 100 μm at least in the portions adjacent to each other. As shown in FIG. 2, the thickness of the insulating member, which is the inter-electrode pitch, is generally proportional to the magnitude of self-inductance. In the first embodiment, the distance between the electrode terminals 6 and 7 is set to less than 100 μm, making it possible to achieve a low-inductance structure for the semiconductor device while maintaining the insulating distance between the electrode terminals 6 and 7.

[0024] Here, the mutually adjacent portions of the electrode terminals 6, 7 are the portions from the portions of the other ends 6b, 7b of the electrode terminals 6, 7 located on the inner periphery side of the case 9 to the intermediate portions 6c, 7c.

[0025] <Effects> As described above, the semiconductor device according to the first embodiment comprises insulating substrates 4a, 4b having a circuit pattern 3b formed on the upper surface thereof, semiconductor elements 5a, 5b mounted on the upper surface of the circuit pattern 3b, and a plurality of electrode terminals 6, 7, 8 having one end joined to the upper surface of the circuit pattern 3b, and among the plurality of electrode terminals 6, 7, 8, the electrode terminals 6, 7 having portions adjacent to each other are coated with an insulating film 11 having a thickness of less than 100 μm at least in the portions.

[0026] Therefore, since the insulating film 11, which is thinner than the insulating resin, insulating paper, and laminate coating, is interposed between the adjacent electrode terminals 6, 7, the self-inductance of the semiconductor device can be reduced.

[0027] <Embodiment 2> Next, a semiconductor device according to embodiment 2 will be described. Fig. 3 is a cross-sectional view of the semiconductor device according to embodiment 2. Note that in embodiment 2, the same components as those described in embodiment 1 are denoted by the same reference numerals and description thereof will be omitted.

[0028] 3, in the second embodiment, the other ends 6b, 7b, and 8b of the electrode terminals 6, 7, and 8 are insert-molded into the case 9. Specifically, the other end 6b of the electrode terminal 6 is integrally formed with a first side of the case 9. Similarly, the other end 7b of the electrode terminal 7 is integrally formed with the first side of the case 9. Furthermore, the other end 8b of the electrode terminal 8 is integrally formed with a second side of the case 9.

[0029] The insulating film 11 is coated on adjacent portions of the electrode terminals 6, 7. In this case, as long as the portions are coated, it is sufficient that the insulating film 11 is coated on either of the electrode terminals 6, 7. Furthermore, the portions of the electrode terminals 6, 7 that are integrally formed with the case 9 do not necessarily need to be coated as long as the insulating distance is ensured.

[0030] As described above, the semiconductor device of embodiment 2 further includes a base plate 1 joined to the underside of the insulating substrates 4a, 4b, and a case 9 fixed to the peripheral portion of the base plate 1, and the other ends of the multiple electrode terminals 6, 7, 8 are integrally formed with the case 9.

[0031] Therefore, each electrode terminal 6, 7 is firmly held in the case 9, which allows the electrode terminals 6, 7 to be spaced apart at a narrower pitch and also allows the terminal lengths of the electrode terminals 6, 7, 8 to be shortened, thereby contributing to the miniaturization of the semiconductor device.

[0032] <Third Embodiment> Next, a semiconductor device according to embodiment 3 will be described. Figures 4 to 6 are cross-sectional views for explaining a method for manufacturing a semiconductor device according to embodiment 3. Note that in embodiment 3, the same components as those explained in embodiments 1 and 2 are given the same reference numerals and explanations thereof will be omitted.

[0033] In the third embodiment, the material of the insulating film 11 is changed from that in the first embodiment. The insulating film 11 is made of an insulating coating material that has excellent heat resistance and bonds the electrode terminals 6, 7, which have adjacent portions, to the sealing material 10 via non-covalent bonds. This improves the adhesion between the electrode terminals 6, 7 and the sealing material 10. The insulating coating material is, for example, "HIMAL," a high heat-resistant coating material manufactured by Showa Denko Materials.

[0034] The semiconductor elements 5a and 5b are switching elements, and when a large current flows through the electrode terminals 6 and 7, the electrode terminals 6 and 7 also generate heat by themselves.

[0035] Furthermore, each component of a semiconductor device generally has the property of expanding and contracting with temperature fluctuations, and the degree of expansion and contraction differs depending on the material of each component. Heat generated by the electrode terminals 6, 7 and the semiconductor elements 5a, 5b causes each component to repeatedly expand and contract, which raises the concern that peeling may occur between the electrode terminals 6, 7 and the sealing material 10.

[0036] In contrast, the semiconductor device according to the third embodiment further comprises a base plate 1 joined to the underside of insulating substrates 4a and 4b, a case 9 fixed to the peripheral edge of the base plate 1, and a sealing material 10 that seals the inside of the case 9, and the insulating film 11 is made of an insulating coating material that bonds the electrode terminals 6 and 7, which have adjacent portions of the plurality of electrode terminals 6, 7, and 8, to the sealing material 10 via non-covalent bonds.

[0037] Therefore, the adhesion between the electrode terminals 6, 7 and the sealing material 10 is improved, which can prevent peeling between the electrode terminals 6, 7 and the sealing material 10. This contributes to high reliability of the semiconductor device.

[0038] Here, the insulating film 11 may not only coat adjacent portions of the electrode terminals 6 and 7, but also cover the semiconductor elements 5a and 5b and the one ends 6a and 7a of the electrode terminals 6 and 7. A manufacturing method for this case will be described below.

[0039] First, although not shown, insulating substrates 4a and 4b are joined via solder 2 to the upper surface of base plate 1 excluding the peripheral edges, and case 9 is fixed via adhesive (not shown) to the peripheral edges of the upper surface of base plate 1. Next, one end 8a of electrode terminal 8 formed integrally with case 9 is joined via solder 2 to the upper surface of circuit pattern 3b of insulating substrate 4b.

[0040] Next, as shown in FIG. 4, one end 6a of the electrode terminal 6 is joined via solder 2 to the upper surface of a first portion of the circuit pattern 3b on which the semiconductor element 5a is mounted, and the other end 6b is joined to the case 9 via an adhesive (not shown). Here, the first portion is the circuit pattern 3b of the insulating substrate 4a. Next, an insulating coating material that will become the insulating film 11 is applied to the electrode terminal 6 using a spray 20. At this time, the insulating coating material is also applied to the circuit pattern 3b of the insulating substrate 4a and the semiconductor element 5a.

[0041] 5, one end 7a of the electrode terminal 7 is joined via solder 2 to the upper surface of a second portion of the circuit pattern 3b on which the semiconductor element 5b is mounted, so as to have a portion adjacent to the electrode terminal 6, and the other end 7b is joined to the case 9. The other end 7b is joined to the case 9 via an insulating coating material applied to the electrode terminal 6. Here, the second portion is the circuit pattern 3b of the insulating substrate 4b.

[0042] Next, as shown in FIG. 6, an insulating coating material that will become the insulating film 11 is applied to the inside of the case 9 using a spray 20. Specifically, the insulating coating material is applied to the electrode terminals 7, the circuit pattern 3b on the insulating substrate 4b, and the semiconductor element 5b. Through the above steps, the upper surfaces of the circuit patterns 3b on the insulating substrates 4a and 4b, the semiconductor elements 5a and 5b, and the electrode terminals 6 and 7 are coated with the insulating film 11. Next, the inside of the case 9 is filled with a sealing material 10 (see FIG. 1), and the semiconductor device is completed.

[0043] Thus, in the semiconductor device according to the third embodiment, the insulating film 11 covers the semiconductor elements 5a, 5b and one end portion 6a, 7a of the electrode terminals 6, 7, 8, which have portions adjacent to each other.

[0044] In addition, the manufacturing method of the semiconductor device according to the third embodiment includes the steps of: (a) applying an insulating coating material to an electrode terminal 6, one end 6a of which is joined to the upper surface of a first portion of the circuit pattern 3b on which a semiconductor element 5a is mounted and the other end 6b of which is joined to a case 9, and to the first portion of the circuit pattern 3b; (b) joining one end 7a of an electrode terminal 7 to the upper surface of a second portion of the circuit pattern 3b on which a semiconductor element 5b is mounted, and joining the other end 7b to the case 9, so as to have the portion adjacent to the electrode terminal 6; and (c) applying an insulating coating material to the electrode terminal 7 and the second portion of the circuit pattern 3b.

[0045] Therefore, the adhesion between the semiconductor elements 5a, 5b and the sealing material 10, and between the ends 6a, 7a of the electrode terminals 6, 7 and the sealing material 10 is improved, which further contributes to improving the reliability of the semiconductor device.

[0046] <Modifications of Embodiments 1 to 3> The semiconductor elements 5a and 5b are made of silicon carbide. or The semiconductor device may be made of a wide bandgap semiconductor containing gallium nitride. Wide bandgap semiconductors are used at high temperatures, but tend to oscillate more easily than silicon. In the first to third embodiments, the self-inductance of the semiconductor device can be reduced, thereby suppressing oscillation.

[0047] In addition, in the first to third embodiments, insulating substrates 4a and 4b may be replaced with insulating substrates in which a base plate and a circuit pattern are integrally molded via a resin insulating layer. This configuration will now be described using a modified example of the first embodiment. Figure 7 is a cross-sectional view of a semiconductor device according to the modified example of the first embodiment.

[0048] 7, the semiconductor device includes an insulating substrate 15, semiconductor elements 5a and 5b, electrode terminals 6, 7 and 8, a case 9 and a sealing material 10. Only the configuration of insulating substrate 15 will be described here.

[0049] The insulating substrate 15 is composed of a base plate 12, a resin insulating layer 13 formed on the upper surface of the base plate 12, and a circuit pattern 14 formed on the upper surface of the resin insulating layer 13, and is molded as a single unit. The base plate 12 is mainly made of a metal material such as copper, iron, or aluminum. The resin insulating layer 13 is mainly made of epoxy resin, for example. The circuit pattern 14 is mainly made of copper, for example.

[0050] <Fourth Embodiment> In this embodiment, the semiconductor devices according to the above-described embodiments 1 to 3 are applied to a power conversion device. Although the application of the semiconductor devices according to the embodiments 1 to 3 is not limited to a specific power conversion device, the following will describe a case where the semiconductor devices according to the embodiments 1 to 3 are applied to a three-phase inverter as embodiment 4.

[0051] FIG. 8 is a block diagram showing the configuration of a power conversion system to which the power conversion device according to this embodiment is applied.

[0052] The power conversion system shown in Fig. 8 is composed of a power supply 100, a power conversion device 200, and a load 300. The power supply 100 is a DC power supply and supplies DC power to the power conversion device 200. The power supply 100 can be composed of various components, such as a DC system, a solar cell, or a storage battery, or it may be composed of a rectifier circuit connected to an AC system or an AC / DC converter. The power supply 100 may also be composed of a DC / DC converter that converts DC power output from a DC system into a predetermined power.

[0053] The power conversion device 200 is a three-phase inverter connected between the power source 100 and the load 300, and converts DC power supplied from the power source 100 into AC power and supplies the AC power to the load 300. As shown in Fig. 8, the power conversion device 200 includes a main conversion circuit 201 that converts DC power into AC power and outputs it, and a control circuit 203 that outputs a control signal to the main conversion circuit 201 to control the main conversion circuit 201.

[0054] The load 300 is a three-phase electric motor driven by AC power supplied from the power conversion device 200. The load 300 is not limited to a specific application, but is an electric motor mounted on various electrical devices, and is used as an electric motor for, for example, a hybrid vehicle, an electric vehicle, a railroad car, an elevator, or an air conditioning device.

[0055] The power conversion device 200 will be described in detail below. The main conversion circuit 201 includes switching elements (not shown) and freewheeling diodes (not shown). By switching the switching elements, DC power supplied from the power supply 100 is converted into AC power and supplied to the load 300. The main conversion circuit 201 can have a variety of specific circuit configurations. However, the main conversion circuit 201 according to this embodiment is a two-level, three-phase full-bridge circuit that can be configured with six switching elements and six freewheeling diodes connected in anti-parallel to each switching element. At least one of the switching elements and freewheeling diodes of the main conversion circuit 201 is configured using a semiconductor module 202 corresponding to any one of the above-described first to third embodiments. Two of the six switching elements are connected in series to form upper and lower arms, and each upper and lower arm forms one phase (U phase, V phase, W phase) of the full-bridge circuit. The output terminals of each upper and lower arm, i.e., the three output terminals of the main conversion circuit 201, are connected to the load 300.

[0056] The main conversion circuit 201 also includes a drive circuit (not shown) that drives each switching element, but the drive circuit may be built into the semiconductor module 202, or may be provided separately from the semiconductor module 202. The drive circuit generates drive signals that drive the switching elements of the main conversion circuit 201 and supplies them to the control electrodes of the switching elements of the main conversion circuit 201. Specifically, in accordance with control signals from a control circuit 203 (described later), the drive circuit outputs to the control electrodes of each switching element a drive signal that turns the switching element on and a drive signal that turns the switching element off. When maintaining a switching element in the on state, the drive signal is a voltage signal (on signal) that is equal to or greater than the threshold voltage of the switching element, and when maintaining a switching element in the off state, the drive signal is a voltage signal (off signal) that is equal to or less than the threshold voltage of the switching element.

[0057] The control circuit 203 controls the switching elements of the main conversion circuit 201 so that the desired power is supplied to the load 300. Specifically, it calculates the time (on time) that each switching element of the main conversion circuit 201 should be in the on state based on the power to be supplied to the load 300. For example, the main conversion circuit 201 can be controlled by PWM control, which modulates the on time of the switching elements according to the voltage to be output. Then, it outputs a control command (control signal) to a drive circuit provided in the main conversion circuit 201 so that an on signal is output to a switching element that should be in the on state at each time point, and an off signal is output to a switching element that should be in the off state at each time point. In accordance with this control signal, the drive circuit outputs an on signal or an off signal as a drive signal to the control electrode of each switching element.

[0058] In the power conversion device according to this embodiment, the semiconductor modules according to the first to third embodiments are applied as the switching elements and free wheel diodes of the main conversion circuit 201, thereby achieving improved reliability.

[0059] In the present embodiment, an example has been described in which the semiconductor device according to the first to third embodiments is applied to a two-level three-phase inverter, but the application of the semiconductor device according to the first to third embodiments is not limited to this and can be applied to various power conversion devices. In the present embodiment, a two-level power conversion device is described, but a three-level or multi-level power conversion device may also be used, and when power is supplied to a single-phase load, the semiconductor device according to the first to third embodiments may be applied to a single-phase inverter. Furthermore, when power is supplied to a DC load or the like, the semiconductor device according to the first to third embodiments can also be applied to a DC / DC converter or an AC / DC converter.

[0060] Furthermore, the power conversion device to which the semiconductor device according to the first to third embodiments is applied is not limited to the case where the load is an electric motor, but can also be used, for example, as a power supply device for an electric discharge machine, a laser processing machine, an induction heating cooker, or a contactless power supply system, and can also be used as a power conditioner for a solar power generation system, a power storage system, etc.

[0061] It should be noted that the embodiments can be freely combined, and each embodiment can be modified or omitted as appropriate.

[0062] Various aspects of the present disclosure are summarized below as appendices.

[0063] (Appendix 1) an insulating substrate having a circuit pattern formed on its upper surface; a semiconductor element mounted on the upper surface of the circuit pattern; a plurality of electrode terminals, one end of which is joined to the upper surface of the circuit pattern; The semiconductor device, wherein the electrode terminals having portions adjacent to each other among the plurality of electrode terminals are coated with an insulating film having a thickness of less than 100 μm at least in the portions.

[0064] (Appendix 2) a base plate joined to the lower surface of the insulating substrate; a case fixed to the peripheral edge of the base plate, 2. The semiconductor device according to claim 1, wherein the other ends of the plurality of electrode terminals are integrally formed with the case.

[0065] (Appendix 3) a base plate joined to the lower surface of the insulating substrate; a case fixed to a peripheral edge of the base plate; a sealant that seals the inside of the case, The semiconductor device described in Appendix 1, wherein the insulating film is composed of an insulating coating material that bonds the electrode terminals having the portions of the plurality of electrode terminals adjacent to each other to the sealing material via non-covalent bonds.

[0066] (Appendix 4) 4. The semiconductor device according to claim 3, wherein the insulating film covers the semiconductor element and one end of the electrode terminals having the portions adjacent to each other among the plurality of electrode terminals.

[0067] (Appendix 5) The semiconductor device described in Appendix 1, wherein the insulating substrate is composed of a base plate, a resin insulating layer formed on the upper surface of the base plate, and the circuit pattern formed on the upper surface of the resin insulating layer, and is integrally molded.

[0068] (Appendix 6) The semiconductor element is made of silicon carbide. or 6. The semiconductor device according to any one of claims 1 to 5, which is made of a wide band gap semiconductor containing gallium nitride.

[0069] (Appendix 7) A manufacturing method for manufacturing the semiconductor device according to Supplementary Note 4, comprising: the plurality of electrode terminals include a first electrode terminal and a second electrode terminal having the portions adjacent to each other; the semiconductor device includes a first semiconductor device and a second semiconductor device; (a) applying the insulating coating material to the first electrode terminal, one end of which is joined to an upper surface of a first portion of the circuit pattern on which the first semiconductor element is mounted and the other end of which is joined to the case, and to the first portion of the circuit pattern; (b) joining one end of the second electrode terminal to an upper surface of a second portion of the circuit pattern on which the second semiconductor element is mounted, and joining the other end of the second electrode terminal to the case, so as to have the portion adjacent to the first electrode terminal; (c) applying the insulating coating material to the second electrode terminal and the second portion of the circuit pattern; A method for manufacturing a semiconductor device comprising:

[0070] (Appendix 8) a main conversion circuit including the semiconductor device according to any one of Supplementary Note 1 to Supplementary Note 6, which converts input power and outputs the converted power; a control circuit that outputs a control signal to the main conversion circuit to control the main conversion circuit; A power conversion device comprising: [Explanation of symbols]

[0071] 1 base plate, 3b circuit pattern, 4a, 4b insulating substrate, 5a, 5b semiconductor element, 6, 7, 8 electrode terminal, 9 case, 10 sealing material, 11 insulating film, 12 base plate, 13 resin insulating layer, 14 circuit pattern, 15 insulating substrate, 200 power conversion device, 201 main conversion circuit, 202 semiconductor module, 203 control circuit.

Claims

1. An insulating substrate having a circuit pattern formed on its upper surface; a semiconductor element mounted on the upper surface of the circuit pattern; a plurality of electrode terminals, one end of which is joined to the upper surface of the circuit pattern; a base plate joined to the lower surface of the insulating substrate; a case fixed to a peripheral edge of the base plate; a sealant that seals the inside of the case, the electrode terminals having portions adjacent to each other among the plurality of electrode terminals are coated with an insulating film having a thickness of less than 100 μm at least in the portions; a method for manufacturing a semiconductor device, wherein the insulating film is made of an insulating coating material that bonds, via a non-covalent bond, the electrode terminals having the portions adjacent to each other among the plurality of electrode terminals and the sealing material, and covers the semiconductor element and one end of the electrode terminals having the portions adjacent to each other among the plurality of electrode terminals, the plurality of electrode terminals include a first electrode terminal and a second electrode terminal having the portions adjacent to each other; the semiconductor device includes a first semiconductor device and a second semiconductor device; (a) applying the insulating coating material to the first electrode terminal, one end of which is joined to an upper surface of a first portion of the circuit pattern on which the first semiconductor element is mounted and the other end of which is joined to the case, and to the first portion of the circuit pattern; (b) joining one end of the second electrode terminal to an upper surface of a second portion of the circuit pattern on which the second semiconductor element is mounted, and joining the other end of the second electrode terminal to the case, so as to have the portion adjacent to the first electrode terminal; (c) applying the insulating coating material to the second electrode terminal and the second portion of the circuit pattern; A method for manufacturing a semiconductor device comprising:

2. 2. The method for manufacturing a semiconductor device according to claim 1, wherein the semiconductor element is made of a wide bandgap semiconductor containing silicon carbide or gallium nitride.

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