Multilayer capacitor and its mounting substrate

Abstract

To provide a laminated capacitor capable of reducing cracks generated between an active region and a cover, and to provide a mounting substrate for the same.SOLUTION: A laminated capacitor includes: a capacitor main body that includes an active region including a plurality of dielectric layers and a plurality of internal electrodes alternately arranged between the dielectric layers, and covers formed respectively above and below the active region; and an external electrode arranged on the capacitor main body so as to be coupled with the internal electrodes. An internal electrode arranged adjacent to each cover, among the internal electrodes, has at least one incised part formed at a portion coupled with the external electrode. Also provided is a mounting substrate for the laminated capacitor.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to a multilayer capacitor and a mounting substrate thereof. [Background technology]

[0002] A multi-layered ceramic capacitor (MLCC) is a passive element that controls electrical signals in a circuit.

[0003] Such a multilayer capacitor is formed by stacking a plurality of dielectric layers and internal electrodes, and one of the main defects is cracks that occur between the cover and an active region including the internal electrodes.

[0004] There are various reasons why such cracks occur, but one of the biggest causes is delamination, which occurs when the bonding strength between the cover and the internal electrode weakens and the interfaces between the cover and the internal electrode separate or gaps form when the laminate is cut.

[0005] Such delamination causes the gap to become larger during the firing process, which is the main cause of cracks occurring between the active region and the cover. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Korean Patent Publication No. 2013-0056569 [Patent Document 2] Korean Patent Publication No. 2010-0036982 Summary of the Invention [Problem to be solved by the invention]

[0007] SUMMARY OF THE INVENTION An object of the present invention is to provide a multilayer capacitor and a mounting substrate thereof that can reduce cracks that occur between an active region and a cover. [Means for solving the problem]

[0008] One aspect of the present invention provides a multilayer capacitor including: an active region including a plurality of dielectric layers and a plurality of internal electrodes alternately arranged with the dielectric layers sandwiched therebetween; covers formed above and below the active region; and external electrodes arranged on the capacitor body to be connected to the internal electrodes, wherein one of the internal electrodes arranged adjacent to the cover has at least one cutout formed in a portion connected to the external electrode.

[0009] In one embodiment of the present invention, cutouts may be formed in two internal electrodes disposed adjacent to the cover.

[0010] In an embodiment of the present invention, the cutout may be filled with a portion of the dielectric layer.

[0011] In one embodiment of the present invention, the incision may be semicircular.

[0012] In an embodiment of the present invention, the internal electrode disposed adjacent to the cover may further include at least one hole formed in a portion adjacent to the cutout.

[0013] In one embodiment of the present invention, the hole may be circular.

[0014] In one embodiment of the present invention, when the width of the internal electrode disposed adjacent to the cover is defined as B and the portion of the internal electrode that is 1 / 10 or less of the length thereof is defined as C, the total area of ​​the cutout portion and the hole may be 50% or less of B×C.

[0015] In an embodiment of the present invention, a portion of the dielectric layer may be filled in the cutout, and the internal electrode disposed adjacent to the cover may further include at least one hole formed in a portion adjacent to the cutout.

[0016] In an embodiment of the present invention, the external electrode may include a connection portion formed on one end surface of the capacitor body, and a band portion extending from the connection portion to a portion of the circumferential surface of the capacitor body.

[0017] Another aspect of the present invention provides a multilayer capacitor mounting substrate including: a substrate having a plurality of electrode pads on one surface; and the multilayer capacitor mounted by connecting external electrodes to the electrode pads. [Effects of the Invention]

[0018] According to an embodiment of the present invention, by increasing the bonding strength between the internal electrode and the cover at the interface between the active region and the cover, it is possible to reduce the occurrence of cracks occurring between the active region and the cover. [Brief explanation of the drawings]

[0019] [Figure 1] 1 is a partially cutaway perspective view of a multilayer capacitor according to an embodiment of the present invention; [Figure 2] 2(a) and 2(b) are plan views showing the first and second internal electrodes of FIG. 1. [Figure 3] 2(a) and 2(b) are plan views showing the third and fourth internal electrodes of FIG. 1. [Figure 4] FIG. 2 is a cross-sectional view taken along line II' in FIG. [Figure 5] 1 shows the third side of the capacitor body. [Figure 6] 1 is a perspective view schematically showing a mounting structure of a multilayer capacitor and a substrate according to an embodiment of the present invention; DETAILED DESCRIPTION OF THE INVENTION

[0020] Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. However, the embodiments of the present invention can be modified into various other forms, and the scope of the present invention is not limited to the embodiments described below. Furthermore, the embodiments of the present invention are provided to more completely explain the present invention to those having average knowledge in the art. Therefore, the shapes and sizes of elements in the drawings may be enlarged or reduced (or highlighted or simplified) for clearer explanation.

[0021] In addition, components having the same function within the same concept shown in the drawings of each embodiment will be described using the same reference numerals.

[0022] Furthermore, throughout the specification, unless otherwise specified, "comprising" a certain element means that it can further include other elements, rather than excluding other elements.

[0023] Hereinafter, to clearly explain the embodiments of the present invention, the directions of the capacitor body will be defined as follows: X, Y, and Z shown in the drawings respectively indicate the length direction, width direction, and thickness direction of the capacitor body.

[0024] In addition, the Z direction can be used in the same concept as the stacking direction in which the dielectric layers are stacked in this embodiment.

[0025] The multilayer capacitor of the present invention includes a capacitor body including an active region including a plurality of dielectric layers and a plurality of internal electrodes alternately arranged with the dielectric layers sandwiched therebetween, covers formed above and below the active region, and external electrodes arranged on the capacitor body to be connected to the internal electrodes, wherein the internal electrodes arranged between the active region and the cover have at least one cutout formed in a portion connected to the external electrode.

[0026] FIG. 1 is a perspective view showing a cutaway schematic view of a multilayer capacitor according to an embodiment of the present invention, FIGS. 2(a) and 2(b) are plan views showing the first and second internal electrodes of FIG. 1, FIGS. 3(a) and 3(b) are plan views showing the third and fourth internal electrodes of FIG. 1, FIG. 4 is a cross-sectional view taken along line II' of FIG. 1, and FIG. 5 shows the third surface of the capacitor body.

[0027] 1 to 5, the multilayer capacitor 100 according to this embodiment includes a capacitor body 110 and first and second external electrodes 131 and 132. As shown in FIG.

[0028] The capacitor body 110 includes a plurality of dielectric layers 111, and a plurality of first internal electrodes 121 and second internal electrodes 122 that are alternately arranged in the Z direction with the dielectric layers 111 sandwiched therebetween.

[0029] The capacitor body 110 is formed by stacking a plurality of dielectric layers 111 in the Z direction and then firing them, and the boundaries between adjacent dielectric layers 111 of the capacitor body 110 can be so integrated that they are difficult to see without using a scanning electron microscope (SEM).

[0030] In this case, the capacitor body 110 may have a generally hexahedral shape, but the present invention is not limited thereto. Furthermore, the shape and dimensions of the capacitor body 110 and the number of laminated dielectric layers 111 are not limited to those shown in the drawings of this embodiment.

[0031] In this embodiment, for ease of explanation, the two surfaces of the capacitor body 110 facing each other in the Z direction are defined as the first and second surfaces (1, 2), the two surfaces connected to the first and second surfaces (1, 2) and facing each other in the X direction are defined as the third and fourth surfaces (3, 4), and the two surfaces connected to the first and second surfaces (1, 2) and the third and fourth surfaces (3, 4) and facing each other in the Y direction are defined as the fifth and sixth surfaces (5, 6).

[0032] In this embodiment, the mounting surface of the multilayer capacitor 100 may be the first surface ( 1 ) of the capacitor body 110 .

[0033] The dielectric layer 111 may include a ceramic material with a high dielectric constant, such as a barium titanate (BaTiO3)-based or strontium titanate (SrTiO3)-based ceramic powder, but the present invention is not limited thereto as long as sufficient capacitance can be obtained.

[0034] In addition to the ceramic powder, the dielectric layer 111 may contain a ceramic additive, an organic solvent, a plasticizer, a binder, a dispersant, and the like.

[0035] The ceramic additive may be, for example, a transition metal oxide or transition metal carbide, a rare earth element, magnesium (Mg), or aluminum (Al).

[0036] The capacitor body 110 may include an active region that contributes to forming the capacitance of the capacitor, and upper and lower covers 112 and 113 that are formed on the upper and lower surfaces of the active region in the Z direction as upper and lower margins.

[0037] The top and bottom covers 112, 113 may have the same material and composition as the dielectric layer 111, except that they do not include internal electrodes.

[0038] The upper and lower covers 112 and 113 may be formed by stacking a single dielectric layer or two or more dielectric layers in the Z direction on the upper and lower surfaces of the active region, respectively, and may essentially serve to prevent damage to the first and second internal electrodes 121 and 122 due to physical or chemical stress.

[0039] Here, a pair of internal electrodes disposed between the upper surface of the active region and the upper cover 112 and between the lower surface of the active region and the lower cover 113 are defined as third and fourth internal electrodes 123 and 124. The third and fourth internal electrodes 123 and 124 will be described in more detail below.

[0040] The first and second internal electrodes 121 and 122 are electrodes to which different polarities are applied, and are alternately arranged along the Z direction with the dielectric layer 111 sandwiched therebetween, and one end can be exposed to the third and fourth surfaces (3, 4) of the capacitor body 110, respectively.

[0041] At this time, the first and second internal electrodes 121 and 122 can be electrically insulated from each other by the dielectric layer 111 disposed therebetween.

[0042] In this manner, the ends of the first and second internal electrodes 121, 122 alternately exposed on the third and fourth surfaces (3, 4) of the capacitor body 110 can be electrically connected to the first and second external electrodes 131, 132, respectively, arranged on the third and fourth surfaces (3, 4) of the capacitor body 110, which will be described later.

[0043] The third and fourth internal electrodes 123 and 124 of this embodiment are electrodes to which different polarities are applied, and one end thereof may be exposed to the third and fourth surfaces (3, 4) of the capacitor body 110, respectively.

[0044] In this manner, the ends of the third and fourth internal electrodes 123, 124 alternately exposed on the third and fourth surfaces (3, 4) of the capacitor body 110 can be electrically connected to the first and second external electrodes 131, 132, respectively, arranged on the third and fourth surfaces (3, 4) of the capacitor body 110, which will be described later.

[0045] Referring to FIG. 3(a), the third internal electrode 123 may have at least one first cutout 123a formed in a portion connected to the first external electrode 131, i.e., a portion exposed to the third surface (3) of the capacitor body 110.

[0046] A plurality of first cutouts 123a may be formed at predetermined intervals along the Y direction.

[0047] Each first cutout 123a may be filled with a portion 111a of the dielectric layer 111 located at the top or bottom of the active region or a portion of the dielectric included in the upper cover 112 or the lower cover 113.

[0048] At this time, the first cutout 123a may be formed in a semicircular shape, but the present invention is not limited thereto.

[0049] When the first cutout 123a is semicircular, the loss of capacity due to the cutout can be minimized.

[0050] In addition, at least one first hole 123b may be further formed in the third internal electrode 123 adjacent to the first cutout 123a in the X direction.

[0051] A plurality of first holes 123b may be formed at predetermined intervals along the Y direction, and in this case, the first holes 123b may be formed at positions offset from the first cutouts 123a in the Y direction.

[0052] Each first hole 123b may be filled with a portion 111b of the dielectric layer 111 located at the top or bottom of the active region or a portion of the dielectric included in the upper cover 112 or the lower cover 113.

[0053] In this case, the first hole 123b may be formed in a circular shape, but the present invention is not limited thereto.

[0054] However, if the first hole 123b is formed in an angular shape, the possibility of deterioration of the BDV at the vertex may increase, so the first hole 123b is preferably formed in a circular shape.

[0055] The total area of ​​the plurality of first cutouts 123a and the plurality of first holes 123b is preferably 50% or less of the area (B×C) of the portion corresponding to D in FIG.

[0056] In FIG. 3(a), B is the length of the third internal electrode 123 in the Y direction. Since cracks that occur between the active region and the cover mainly occur at the top and bottom of the cut surface, taking this into consideration, C may be 1 / 10 or less of the length A of the third internal electrode 123 in the X direction, and preferably may be the distance between the third surface (3) of the capacitor body 110 and the end of the fourth internal electrode 124.

[0057] In this case, if the total area of ​​the first cutout 123a and the first hole 123b exceeds 50% of the area of ​​B×C, there is a high possibility that the electrodes will not be connected during the electrode shrinkage process after firing, and the electrodes may shrink unevenly, making them more susceptible to cracking.

[0058] Referring to FIG. 3(b), the fourth internal electrode 124 may have at least one second cutout 124a formed in a portion connected to the second external electrode 132, i.e., a portion exposed to the fourth surface (4) of the capacitor body 110.

[0059] A plurality of second cutouts 124a may be formed at predetermined intervals along the Y direction.

[0060] Each second cutout 124a may be filled with a portion 111a of the dielectric layer 111 located at the top or bottom of the active region or a portion of the dielectric included in the upper cover 112 or the lower cover 113.

[0061] At this time, the second cutout 124a may be formed in a semicircular shape, but the present invention is not limited thereto.

[0062] When the second cutout 124a is semicircular, the loss of capacity due to the cutout can be minimized.

[0063] In addition, at least one second hole 124b may be further formed in the fourth internal electrode 124 adjacent to the second cutout 124a in the X direction.

[0064] A plurality of second holes 124b may be formed at predetermined intervals along the Y direction, and in this case, the second holes 124b may be formed at positions offset in the Y direction from the second cutout portions 124a.

[0065] Each second hole 124b may be filled with a portion 111b of the dielectric layer 111 located at the top or bottom of the active region or a portion of the dielectric included in the upper cover 112 or the lower cover 113.

[0066] In this case, the second hole 124b may be formed in a circular shape, but the present invention is not limited thereto.

[0067] However, if the second hole 124b is formed in an angular shape, the possibility of deterioration of the BDV at the vertex may increase, so the second hole 124b is preferably formed in a circular shape.

[0068] The total area of ​​the plurality of second cutouts 124a and the plurality of second holes 124b is preferably 50% or less of the area (B' x C') of the portion corresponding to E in FIG.

[0069] In FIG. 3(b), B' is the length of the fourth internal electrode 124 in the Y direction, and C' may be 1 / 10 or less of the length A of the fourth internal electrode 124 in the X direction, and preferably may be the distance between the fourth surface (4) of the capacitor body 110 and the end of the third internal electrode 123.

[0070] In this case, if the total area of ​​the second cutout 124a and the second hole 124b exceeds 50% of the area of ​​B'×C', there is a high possibility that the electrodes will not be connected during the electrode shrinkage process after firing, and the electrodes may shrink unevenly, making them more susceptible to cracking.

[0071] In this embodiment, bonding between the dielectric sheet of the active region and the cover sheet of the covers 112 and 113 is induced through the first and second cutouts 123a and 124a and the first and second holes 123b and 124b, thereby improving the bonding strength at the interface between the covers 112 and 113 and the active region, and is expected to have the effect of preventing cracks that may occur during the firing process.

[0072] With the above configuration, when a predetermined voltage is applied to the first and second external electrodes 131, 132, charges are accumulated between the first and second internal electrodes 121, 122 and between the third and fourth internal electrodes 123, .

[0073] In this case, the capacitance of the multilayer capacitor 100 is proportional to the sum of the overlapping areas of the first and second internal electrodes 121 and 122 that overlap each other along the Z direction in the active region of the capacitor body 101, and the overlapping areas of the third and fourth internal electrodes 123 and 124.

[0074] Furthermore, the material for forming the first and second internal electrodes 121-124 is not particularly limited, and may be formed using a conductive paste made of one or more of precious metal materials such as platinum (Pt), palladium (Pd), and palladium-silver (Pd-Ag) alloy, nickel (Ni), and copper (Cu).

[0075] In this case, the conductive paste may be printed by a screen printing method or a gravure printing method, but the present invention is not limited thereto.

[0076] The first and second external electrodes 131 and 132 are provided with voltages of different polarities, are disposed at both ends of the capacitor body 110 in the X direction, and are electrically connected to the exposed portions of the first and second internal electrodes 121 and 122 and the exposed portions of the third and fourth internal electrodes 123 and 124, respectively.

[0077] In this case, the first and second external electrodes 131 and 132 may include a conductive layer formed on the capacitor body 110 and a plating layer formed on the conductive layer.

[0078] The plating layer may include a nickel (Ni) plating layer formed on the conductive layer and a tin (Sn) plating layer formed on the nickel (Ni) plating layer.

[0079] The first external electrode 131 may include a first connection portion 131a and a first band portion 131b.

[0080] The first connection portion 131a is formed on the third surface (3) of the capacitor body 110 and is connected to the exposed portion of the first internal electrode 121 and the exposed portion of the third internal electrode 123, and the first band portion 131b is extended from the first connection portion 131a to a portion of the first surface (1) of the capacitor body 110.

[0081] In this case, the first band portion 131b may be further extended to a part of the fifth and sixth surfaces (5, 6) and a part of the second surface (2) of the capacitor body 110 in order to improve the fixing strength.

[0082] The second external electrode 132 may include a second connection portion 132a and a second band portion 132b.

[0083] The second connection portion 132a is formed on the fourth surface (4) of the capacitor body 110 and is connected to the exposed portion of the second internal electrode 122 and the exposed portion of the fourth internal electrode 124, and the second band portion 132b is extended from the second connection portion 132a to a portion of the first surface (1) of the capacitor body 110.

[0084] In this case, the second band portion 132b may be further extended to a part of the fifth and sixth surfaces (5, 6) and a part of the second surface (2) of the capacitor body 110 in order to improve the fixing strength.

[0085] Generally, a multilayer capacitor is formed by stacking multiple dielectric layers and internal electrodes, and one of the main defects is a crack that occurs between an active region including the internal electrodes and a cover that does not include the internal electrodes.

[0086] To prevent such cracks, a conventional structure has been disclosed in which the resin content of the internal electrode is increased to increase the strength of the internal electrode, and a structure has been disclosed in which the bonding strength between the internal electrode and the cover is increased by such a structure.

[0087] Another method disclosed is to improve the plasticization / firing mismatch between the cover and the active region by adjusting the content of organic matter.

[0088] However, this method has limitations in preventing cracks from occurring between the active region and the cover.

[0089] Generally, in a capacitor body of a multilayer capacitor, an uppermost internal electrode and a lowermost internal electrode are in contact with an upper cover and a lower cover, respectively.

[0090] Cracks that occur between the active region and the cover occur when the cover and internal electrodes are damaged by stress during the process of cutting the laminate. At this time, tiny gaps or areas with weak bonding strength may occur between the interface of the active region and the cover, and these areas gradually grow larger during the firing process, causing cracks.

[0091] The solvent used in the internal electrodes is absorbed by the binder of the sheet, and during the drying process, deformation and tearing of the sheet occurs, which is called sheer attack.

[0092] Typically, to prevent sheer attack, internal electrodes use a low-polarity binder, dispersing nickel and other materials in a non-polar solvent. Furthermore, the binder content is also low, at 1 / 3 to 1 / 2, compared to dielectric sheets and cover sheets.

[0093] On the other hand, for the dielectric sheet of the active region and the cover sheet of the cover, a highly polymerized binder having an extremely strong polarity is basically used in a very high content.

[0094] For this reason, the bonding strength at the interface between the cover sheet that constitutes the cover and the internal electrode is much weaker than the bonding strength between the cover sheet that constitutes the cover and the dielectric sheet of the active region, which makes it easier for the cover and the internal electrode to separate.

[0095] Therefore, as long as the interface between the cover and the active region is firmly attached in the green chip state and no gaps or damage occurs due to cutting stress, cracks occurring between the active region and the cover can be reduced.

[0096] In this embodiment, taking into consideration that the bonding strength between the cover sheet constituting the cover and the dielectric layer constituting the active region is stronger than the bonding strength between the internal electrodes and the cover, as described above, the portions where the cut surfaces of the third and fourth internal electrodes located at the top and bottom of the active region touch and the portions adjacent to the cut surfaces are patterned to form cutouts and holes in the third and fourth internal electrodes, respectively.

[0097] Therefore, when the laminate is compressed, the cover sheet that constitutes the cover stretches through the cutouts and holes of the corresponding third and fourth internal electrodes, and the cover sheet that constitutes the cover and the dielectric sheet that constitutes the active region naturally bond to each other, thereby increasing the bonding strength.

[0098] When the cover sheet of the cover and the dielectric sheet of the active region are bonded to each other in this manner, not only is the bonding strength at the interface between the cover and the active region improved, but the internal electrodes between the cover sheet and the dielectric sheet are also held firmly in place to prevent separation, resulting in a further improvement in bonding strength.

[0099] Therefore, due to this function, according to an embodiment of the present invention, cracks between the active region and the cover, which is one of the chronic defects of the multilayer capacitor, can be effectively prevented.

[0100] FIG. 6 is a perspective view schematically showing a mounting structure of a multilayer capacitor and a substrate according to one embodiment of the present invention.

[0101] Referring to FIG. 6, the mounting substrate for the multilayer capacitor according to this embodiment includes a substrate 210 on which the multilayer capacitor 100 is mounted, and first and second electrode pads 221 and 222 spaced apart from each other on the upper surface of the substrate 210.

[0102] The multilayer capacitor 100 is mounted on the substrate 210 with the first and second external electrodes 131 and 132 connected in a state where they are positioned on and in contact with the first and second electrode pads 221 and 222, respectively.

[0103] At this time, the first external electrode 131 may be joined to the first electrode pad 221 by solder 231 to be electrically and physically connected, and the second external electrode 132 may be joined to the second electrode pad 222 by solder 232 to be electrically and physically connected.

[0104] Here, the multilayer capacitor 100 is the multilayer capacitor according to the embodiment of the present invention described above, and detailed description thereof will be omitted below to avoid duplication.

[0105] Although the embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and it is obvious to those skilled in the art that various modifications and variations are possible within the scope of the technical matters of the present invention described in the claims. [Explanation of symbols]

[0106] 100: Multilayer capacitor 110: Capacitor body 111, 111a, 111b: dielectric layers 112, 113: Upper and lower covers 121, 122: First and second internal electrodes 123, 124: third and fourth internal electrodes 123a, 124a: first and second incisions 123b, 124b: 1st and 2nd holes 131, 132: First and second external electrodes 131a, 132a: first and second connection parts 131b, 132b: first and second band portions 210: Substrate 221, 222: First and second electrode pads 231, 232: Solder

Claims

1. a capacitor body including an active region including a plurality of dielectric layers and a plurality of internal electrodes alternately arranged with the dielectric layers sandwiched therebetween, and covers formed above and below the active region; an external electrode disposed on the capacitor body to be connected to the internal electrode; Among the internal electrodes, an internal electrode disposed adjacent to the cover has at least one cutout formed at a portion connected to the external electrode, A multilayer capacitor, wherein, among the internal electrodes connected to the same external electrode, an internal electrode not adjacent to the cover does not have a cutout formed in a portion connected to the external electrode.

2. A stacked capacitor as described in claim 1, wherein an internal electrode arranged adjacent to the cover has multiple cutouts formed in the portion where it connects to the external electrode.

3. 3. The multilayer capacitor according to claim 1, wherein cutouts are formed in two internal electrodes disposed adjacent to the cover.

4. The multilayer capacitor according to claim 1 , wherein the cutout is filled with a portion of the dielectric layer.

5. The multilayer capacitor according to claim 1 , wherein the cutout is semicircular.

6. The multilayer capacitor of claim 1 , wherein the internal electrode disposed adjacent to the cover further includes at least one hole formed in a portion adjacent to the cutout.

7. 7. The multilayer capacitor according to claim 6, wherein the holes are circular.

8. 8. The multilayer capacitor according to claim 6, wherein, in the internal electrode disposed adjacent to the cover, when a width of the internal electrode is defined as B and a portion of the internal electrode that is 1 / 10 or less of a length of the internal electrode is defined as C, a total area of ​​the cutout portion and the hole is 50% or less of B×C.

9. The cutout is filled with a portion of the dielectric layer; The multilayer capacitor of claim 1 , wherein the internal electrode disposed adjacent to the cover further includes at least one hole formed in a portion adjacent to the cutout.

10. 10. The multilayer capacitor according to claim 9, wherein the cutout is semicircular.

11. 10. The stacked capacitor of claim 9, wherein the holes are circular.

12. 11. The multilayer capacitor according to claim 1, wherein the external electrode includes a connection portion formed on one end surface of the capacitor body, and a band portion extending from the connection portion to a portion of a circumferential surface of the capacitor body.

13. a substrate having a plurality of electrode pads on one surface; A mounting substrate for a multilayer capacitor, comprising: the multilayer capacitor according to claim 1 , which is mounted with external electrodes connected to the electrode pads.

14. The multilayer capacitor mounting substrate according to claim 13 , wherein the cutout is filled with a part of the dielectric layer.

Images