Signal processing device and signal processing method
The signal processing device and method allow for dynamic adjustment of time and frequency sampling intervals, addressing the limitations of conventional techniques by reducing computational complexity and enabling fine sampling in time-frequency analysis.
Patent Information
- Application Number
- JP2025518399
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2023-09-05
- Publication Date
- 2026-01-09
- Estimated Expiration
- 2043-09-05
Smart Images

Figure 0007796943000005 
Figure 0007796943000006 
Figure 0007796943000007
Abstract
Description
[Technical Field]
[0001] The disclosed technology relates to a signal processing technology that performs time-frequency analysis of a signal. [Background technology]
[0002] Time-frequency analysis (also commonly referred to as "time-frequency analysis") is a signal analysis technique that allows for the estimation of the time fluctuations of the frequency components of a signal (the fluctuations of frequency components over time). A wavelet transform is known as a typical process for such time-frequency analysis. Furthermore, a known transformation process related to wavelet transformation is called wavelet packet (Non-Patent Document 1). In wavelet transform, the sampling interval in the frequency direction increases for high frequency components of a signal, whereas in wavelet packet, the sampling interval in the frequency direction (hereinafter also referred to as "frequency sampling interval") is constant. In wavelet transform and wavelet packets, the sampling interval in the time direction (hereinafter also referred to as "time sampling interval") for low frequency components is wider than the time sampling interval for high frequency components.
[0003] Here, a technique for shortening the sampling interval in the time direction for wavelet transform has been disclosed (Patent Document 1 "Wavelet Transform Method and Wavelet Transform Device"). Specifically, Patent Document 1 states that "the wavelet transform device 1 comprises an input signal capturing unit 10, a coefficient multiplication unit 20, a delay unit 30, and an addition unit 40." "The input signal capturing unit 10 samples and acquires input data for each sampling period ST, and passes the data to the coefficient multiplication unit 20. As shown in FIG. 2, the coefficient multiplication unit 20 comprises multipliers 21, 22, . . . , 23 for multiplying the input data by n coefficients w0, w1, . . . , wn-1 of the basic wavelet, respectively, and outputs the n multipliers from the multipliers 21, 22, . . . , 23. The document states that "the n multiplied values are sent to the delay unit 30." "The delay unit 30 is composed of a plurality of delay units 31, as shown in FIG. 3. The delay units 31 realize a delay of the sampling period ST, and delay the n multiplied values by times nST, (n-1)ST, . . . , 2ST, ST. The n delayed signals are then sent to the adder unit 40." "The adder unit 40 is composed of adders 41 that calculate the sum of the n outputs from the delay unit 30, as shown in FIG. 4" (paragraphs 0024-0027 of Patent Document 1). With this configuration, the wavelet transform method and wavelet transform device of Patent Document 1 performs wavelet transform at a constant, fine time sampling interval. [Prior art documents] [Non-patent literature]
[0004] [Non-Patent Document 1] T. Guo, T. Zhang, E. Lim, M. Lopez-Benitez, F. Ma, and L. Yu, “A review of wavelet analysis and its applications: challenges and opportunities,” IEEE Access, vol.10, pp.58869-58903, June 2022. [Patent documents]
[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2002-103914 Summary of the Invention [Problem to be solved by the invention]
[0006] However, the conventional techniques have a problem in that it is difficult to realize a configuration that allows the time sampling interval to be changed along with the frequency sampling interval. The wavelet transform method and wavelet transform device of Patent Document 1 keep the number of time samples constant, and therefore cannot be simply expanded to the frequency sampling interval, and cannot be configured to make the frequency sampling interval finer.
[0007] The present disclosure solves the above problem by providing, in time-frequency analysis, The object is to provide a configuration that allows the time sampling interval to be changed along with the frequency sampling interval. [Means for solving the problem]
[0008] The signal processing device of the present disclosure includes: A signal processing device that performs time-frequency analysis of a signal, a phase multiplication unit that performs a plurality of phase multiplications on the received signal; a signal addition unit that adds up the signals obtained by the plurality of phase multiplications according to a synthesis interval that is a combination of time intervals related to time-frequency analysis to be performed on the signal; a frequency determination unit that acquires a first coefficient that defines a frequency and determines a frequency related to the time-frequency analysis using the first coefficient; a time interval determination unit that obtains a second coefficient that defines the time interval and determines the time interval related to time-frequency analysis using the second coefficient; Equipped with The signal addition unit using the frequency determined by the frequency determination unit and the time interval determined by the time interval determination unit, obtaining a time interval for each frequency related to a time-frequency analysis to be performed on the signal; adding together, for each frequency, signals related to a time interval for each frequency among the signals obtained by the plurality of phase multiplications; Signal processing device. [Effects of the Invention]
[0009] The present disclosure advantageously provides a configuration that allows the time sampling interval to be changed along with the frequency sampling interval in time-frequency analysis. [Brief explanation of the drawings]
[0010] [Figure 1] FIG. 1 is a diagram illustrating an example of a basic configuration of a signal processing device according to the present disclosure. [Figure 2] FIG. 2 is a flowchart showing an example of basic processing by the signal processing device of the present disclosure. [Figure 3] FIG. 3 is a diagram showing an image of a processing result by the signal processing device of the present disclosure and an image of a processing result by the conventional technology. [Figure 4] FIG. 4 is a diagram illustrating an example of the configuration of a signal processing device according to the first embodiment of the present disclosure. [Figure 5] FIG. 5 is a flowchart illustrating an example of processing by the signal processing device according to the first embodiment of the present disclosure. [Figure 6] FIG. 6 is a diagram illustrating a configuration example of a signal processing device according to a second embodiment of the present disclosure. [Figure 7] FIG. 7 is a flowchart illustrating an example of processing performed by the signal processing device according to the second embodiment of the present disclosure. [Figure 8] FIG. 8 is a flowchart illustrating an example of processing by the time interval information receiving unit in the signal processing device according to the second embodiment of the present disclosure. [Figure 9] FIG. 9 is a flowchart illustrating a detailed example of the signal addition process in the signal processing device according to the second embodiment of the present disclosure. [Figure 10] FIG. 10 is a diagram illustrating a configuration example of a signal processing device according to a third embodiment of the present disclosure. [Figure 11] FIG. 11 is a flowchart illustrating an example of processing by the signal processing device according to the third embodiment of the present disclosure. [Figure 12] FIG. 12 is a schematic diagram illustrating an image of processing that can be implemented by a signal processing device according to the third embodiment of the present disclosure. [Figure 13] FIG. 13 is a diagram illustrating a first example of a hardware configuration for realizing the functions according to the configuration of the present disclosure. [Figure 14] FIG. 14 is a diagram illustrating a second example of a hardware configuration for realizing the functions according to the configuration of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION
[0011] In order to explain the present disclosure in more detail, embodiments of the present disclosure will be described below with reference to the accompanying drawings.
[0012] Embodiment 1 In the first embodiment, a basic configuration of the present disclosure, processing by the configuration, a form including the basic configuration, and processing in the form will be described.
[0013] An example of the basic configuration of a signal processing device will be described. FIG. 1 is a diagram illustrating an example of a basic configuration of a signal processing device according to the present disclosure. The signal processing device 100 performs calculation processing related to time-frequency analysis of a signal and outputs the calculation results. The calculation result output by the signal processing device 100 is a value that allows for estimating the time fluctuation of the frequency components of the signal. The signal processing device 100 shown in FIG. 1 includes a phase multiplication unit 110 and a signal addition unit 120 (first signal addition unit).
[0014] The phase multiplication unit 110 performs a plurality of phase multiplications on the received signal. The multiple phase multiplications performed by the phase multiplication unit 110 are, for example, complex multiplications of the signal N×K times (first coefficient N, second coefficient K) as will be described in the embodiments below.
[0015] The signal addition unit 120 (first signal addition unit) adds up signals obtained by a plurality of phase multiplications according to a synthesis interval that combines time intervals related to the time-frequency analysis to be performed on the signals. The signal addition unit 120 acquires the time interval for each frequency related to the time-frequency analysis to be performed on the signal, and adds together the signals related to the time interval for each frequency from among the signals obtained by multiple phase multiplications. The time intervals for each frequency acquired by the signal adding unit 120 are stored in advance in, for example, a storage unit (not shown). Alternatively, the time interval for each frequency acquired by the signal adding unit 120 may be information that is determined based on information received from outside the signal processing device 100. In this case, the signal processing device 100 is configured, for example, as in a second embodiment described later.
[0016] The hardware configuration for realizing the functions of the above components of the present disclosure will be described later.
[0017] An example of processing by the signal processing device will be described. FIG. 2 is a flowchart showing an example of basic processing by the signal processing device 100 of the present disclosure. The processing shown in FIG. 2 is a signal processing method performed by the signal processing device of the present disclosure. According to the signal processing method, the phase multiplication unit 110 of the signal processing device 100 performs a plurality of phase multiplications on the received signal, and the signal addition unit 120 of the signal processing device 100 adds up the signals obtained by the phase multiplication unit 110 according to a synthesis interval that combines the time intervals related to the time-frequency analysis to be performed on the signal, thereby performing time-frequency analysis of the signal.
[0018] The signal processing device 100 starts the process shown in FIG. 2, for example, when it receives a command from a control unit (not shown) or a signal from outside the device.
[0019] First, the signal processing device 100 executes a phase multiplication process (step ST10). In the phase multiplication process, the phase multiplication unit 110 of the signal processing device 100 performs a plurality of phase multiplications on the received signal. The phase multiplication section 110 outputs the phase-multiplied signal to the signal addition section 120 .
[0020] Next, the signal processing device 100 executes a signal addition process (first signal addition process) (step ST20). In the signal addition process, the signal addition unit 120 of the signal processing device 100 receives the signal after phase multiplication. The signal adder 120 then adds up the signals obtained by the multiple phase multiplications in accordance with the synthesis interval that is the sum of the time intervals related to the time-frequency analysis to be performed on the signals. The signal addition unit 120 acquires the time interval for each frequency related to the time-frequency analysis to be performed on the signal, and adds together the signals related to the time interval for each frequency from among the signals obtained by multiple phase multiplications.
[0021] Next, the signal processing device 100 executes an end determination process (step ST30). In the termination determination process, a control unit (not shown) of the signal processing device 100 determines whether to terminate the process according to a program stored in a storage unit (not shown), for example.
[0022] When the control unit (not shown) determines not to end the process (step ST30 "NO"), the signal processing device 100 proceeds to the process of step ST10 and repeats the process shown in FIG.
[0023] When the control unit (not shown) determines to end the processing (step ST30 "YES"), the signal processing device 100 ends the processing shown in FIG.
[0024] FIG. 3 is a diagram showing an image of a processing result by the signal processing device 100 of the present disclosure and an image of a processing result by the conventional technology. FIG. 3 shows images of a time-frequency sampling interval 1000 according to the present disclosure, a time-frequency sampling interval 1010 according to a general wavelet transform, a time-frequency sampling interval 1020 according to a wavelet packet, and a time-frequency sampling interval 1030 according to the wavelet transform described in Patent Document 1.
[0025] In the time-frequency sampling interval 1010 associated with a typical wavelet transform, the frequency sampling interval for high frequency components is wider and coarser than the frequency sampling interval for low frequency components, and the time sampling interval for low frequency components is wider and coarser than the time sampling interval for high frequency components.
[0026] In the time-frequency sampling interval 1020 for the wavelet packet, the frequency sampling interval for high frequency components is finer than the frequency sampling interval for the time-frequency sampling interval 1010 for a general wavelet transform, but the time sampling interval for low frequency components is wider and coarser than the time sampling interval for high frequency components, similar to the time-frequency sampling interval 1010 for a general wavelet transform.
[0027] In the time-frequency sampling interval 1030 associated with the wavelet transform described in Patent Document 1, the time sampling interval for low frequency components is shorter than the time-frequency sampling interval 1010 associated with a general wavelet transform, but the frequency sampling interval is the same as the frequency sampling interval in the time-frequency sampling interval 1010 associated with a general wavelet transform.
[0028] In the time-frequency sampling interval 1000 according to the present disclosure, the frequency sampling interval can be smaller than any of the sampling intervals 1010, 1020, 1030 described above, and the time sampling interval can be smaller than any of the sampling intervals 1010, 1020, 1030 described above. Thus, the present disclosure allows the time sampling interval to be varied along with the frequency sampling interval.
[0029] An example of the configuration of a signal processing device 100A including the signal processing device 100 will be described. FIG. 4 is a diagram illustrating an example of a configuration of a signal processing device 100A according to the first embodiment of the present disclosure. The signal processing device 100A shown in FIG. 4 includes a signal receiving section 130A, a phase multiplication section 110A, a signal addition section 120A (first signal addition section), and an analysis result output section 140A.
[0030] The signal receiving unit 130A receives a signal input from outside the signal processing device 100A, and outputs the signal to the phase multiplication unit 110A.
[0031] The phase multiplication unit 110A receives the signal output from the signal receiving unit 130A. The phase multiplication unit 110A performs a plurality of phase multiplications on the received signal, similar to the phase multiplication unit 110 already described.
[0032] Similar to the signal addition unit 120 already described, the signal addition unit 120A (first signal addition unit) adds up signals obtained by multiple phase multiplications according to a synthesis interval that combines the time intervals related to the time-frequency analysis to be performed on the signals. Specifically, the signal adder 120A (first signal adder), like the already-described signal adder 120, acquires a time interval for each frequency related to the time-frequency analysis to be performed on the signal, and adds together the signals related to the time interval for each frequency among the signals obtained by the multiple phase multiplications. This makes it possible to perform time-frequency analysis according to a synthesis interval in which different time intervals for each frequency are synthesized. The signal addition unit 120A outputs the signal after the signal addition process to the analysis result output unit 140A.
[0033] The analysis result output unit 140A acquires the signal processed by the signal addition unit 120A and outputs it as the analysis result.
[0034] In addition to the above components, the signal processing device 100A also includes a control unit (not shown), a storage unit (not shown), and a communication unit (not shown). A control unit (not shown) controls the entire signal processing device 100A and each of its components. The control unit (not shown) starts up the signal processing device 100A in accordance with, for example, an external command. The control unit (not shown) also controls the state (operating state = start-up, shutdown, sleep, etc.) of the signal processing device 100A. A storage unit (not shown) stores each piece of data used in the signal processing device 100 A. The storage unit (not shown) stores, for example, output (output data) from each component in the signal processing device 100 A, and outputs data requested by each component to the requesting component. The communication unit (not shown) communicates with an external device. For example, communication is performed between the signal processing device 100A and a peripheral device (not shown). For example, when the signal processing device 100A and the peripheral device are not connected by wire, the communication unit (not shown) has a function of communicating between the signal processing device 100A and the peripheral device. The communication unit (not shown) also has a function of communicating with the external device (not shown). The control unit (not shown), the storage unit (not shown), and the communication unit (not shown) are the same in the embodiments described below.
[0035] The hardware configuration for realizing the functions of the above components of the present disclosure will be described later.
[0036] An example of processing by the signal processing device will be described. FIG. 5 is a flowchart showing an example of processing by the signal processing device 100A according to the first embodiment of the present disclosure. The signal processing device 100A starts the process shown in FIG. 5, for example, when it receives a command from a control unit (not shown) or a signal.
[0037] First, the signal processing device 100A executes a signal reception determination process (step ST110). In the signal reception determination process, if the signal reception unit 130A of the signal processing device 100A determines that a signal has not been received (step ST110 "NO"), it repeats the process of ST110 and waits until a signal is received.
[0038] If it is determined that the signal receiving unit 130A has received a signal ("YES" in step ST110), then the signal processing device 100A executes a phase multiplication process (step ST120). In the phase multiplication process, the phase multiplication unit 110A of the signal processing device 100A performs a plurality of phase multiplications on the received signal, similar to the phase multiplication process already described. The phase multiplication section 110A outputs the signal after the phase multiplication process to the signal addition section 120A.
[0039] Next, the signal processing device 100A executes a signal addition process (first signal addition process) (step ST130). In the signal addition process, the signal addition unit 120A of the signal processing device 100A adds up the signals obtained by multiple phase multiplications according to the synthesis interval that combines the time intervals related to the time-frequency analysis to be performed on the signals, similar to the signal addition process already described. The signal addition unit 120A outputs the signal after the signal addition process to the analysis result output unit 140A.
[0040] Next, the signal processing device 100A executes an analysis result output process (step ST140). In the analysis result output process, the analysis result output unit 140A of the signal processing device 100A outputs the signal after the signal addition process as the analysis result to, for example, an external device (not shown).
[0041] Next, the signal processing device 100A executes an end determination process (step 150). In the termination determination process, a control unit (not shown) of the signal processing device 100A determines whether to terminate the process according to a program stored in a storage unit (not shown), for example.
[0042] When the control unit (not shown) determines not to end the process ("NO" in step ST150), the signal processing device 100A proceeds to the process of step ST110 and repeats the process shown in FIG.
[0043] When the control unit (not shown) determines to end the processing ("YES" in step ST150), the signal processing device 100A ends the processing shown in FIG.
[0044] As described above, the signal processing according to the first embodiment of the present disclosure can achieve time-frequency analysis (time-frequency analysis) by multiplying phases and adding signals together. Here, as time sampling increases, the number of times the wavelet base is used increases, which in turn poses a problem of an increase in the number of multiplications in particular. However, in the present disclosure, the multiplications required for the sum of the products of each output are performed in advance as common phase multiplications, and by devising a way to add them up, the output results at different positions in the time sampling can be expressed, thereby reducing the number of multiplications and the amount of calculation. The time-frequency analysis by the signal processing of the present disclosure enables time-frequency analysis with a low amount of calculation using fine time sampling that is not possible with wavelet packets. Furthermore, the time-frequency analysis using signal processing according to the present disclosure does not involve the thinning process for obtaining a fixed number of sampling points, which is performed in the wavelet transform method described in Patent Document 1, and therefore enables time-frequency analysis in response to fine sampling in the frequency direction. The signal processing device according to the first embodiment of the present disclosure makes it possible to change the time sampling interval as well as the frequency sampling interval in the time-frequency analysis. Furthermore, the signal processing device according to the first embodiment of the present disclosure makes it possible to realize time-frequency analysis at fine sampling intervals without excessively increasing the amount of calculation.
[0045] The signal processing device of the present disclosure is configured, for example, as follows. A signal processing device that performs time-frequency analysis of a signal, a phase multiplication unit that performs a plurality of phase multiplications on the received signal; a signal addition unit that adds up the signals obtained by the plurality of phase multiplications according to a synthesis interval that is a combination of time intervals related to time-frequency analysis to be performed on the signal; A signal processing device comprising: As a result, the present disclosure provides an advantageous effect of providing a signal processing device that can change the time sampling interval as well as the frequency sampling interval in time-frequency analysis.
[0046] The signal processing method of the present disclosure is configured, for example, as follows. A signal processing method by a signal processing device, comprising: a phase multiplication unit of the signal processing device performing a plurality of phase multiplications on the received signal; a signal addition unit of the signal processing device adds the signals obtained by the phase multiplication unit in accordance with a synthesis interval that is a combination of a time interval related to the time-frequency analysis to be performed on the signal; and performing a time-frequency analysis of the signal by: As a result, the present disclosure has an effect of providing a signal processing method that can change the time sampling interval as well as the frequency sampling interval in time-frequency analysis.
[0047] The signal processing device of the present disclosure may further be configured, for example, as follows. The signal addition unit obtaining a time interval for each frequency related to a time-frequency analysis to be performed on the signal; adding together signals related to the time interval for each frequency among the signals obtained by the plurality of phase multiplications; A signal processing device comprising: As a result, the present disclosure further provides an advantageous effect of being able to provide a configuration capable of performing time-frequency analysis according to a synthesis interval in which different time intervals are synthesized for each frequency. Furthermore, the present disclosure achieves the same effects as those described above by applying the above configuration to the above method.
[0048] Embodiment 2 In the second embodiment, an example of detailed processing in the signal processing device of the present disclosure and a configuration that enables changing the processing conditions of the signal processing device will be described. In the second embodiment, among the components according to the second embodiment, those components that are the same as the components according to the first embodiment that have already been described will not be described again.
[0049] A configuration example of a signal processing device according to a second embodiment of the present disclosure will be described. FIG. 6 is a diagram illustrating an example of a configuration of a signal processing device 100B according to the second embodiment of the present disclosure. The signal processing device 100B shown in FIG. 6 includes a signal receiving unit 130B, a phase multiplication unit 110B, a signal adding unit 120B (first signal adding unit), an analysis result output unit 140B, a time interval receiving unit 150B, a frequency determining unit 160B, a time interval determining unit 170B, and a time width acquiring unit 180B.
[0050] The time interval receiving unit 150B receives time interval information indicating a time interval for each frequency related to the time-frequency analysis. The time interval receiving unit 150B receives and acquires, for example, a combination of a first coefficient related to a frequency and a second coefficient related to a time interval as time interval information. The first coefficient is a value that defines a frequency related to the time-frequency analysis to be performed by the signal processing device 100B. The first coefficient is, for example, a value indicating a frequency n (described later) or a value (for example, “N”) from which the frequency n can be derived. The second coefficient is a value that defines a time interval related to the time-frequency analysis to be performed by the signal processing device B. The second coefficient is, for example, a value indicating a time interval k (described later) or a value (e.g., "K") from which the time interval k can be derived. The time interval receiving unit 150B may be an internal component of the signal adding unit 120B.
[0051] The frequency determination unit 160B uses the time interval information to determine the frequency for the time-frequency analysis. Specifically, for example, the frequency determining unit 160B obtains a first coefficient that defines the frequency, and determines the frequency n related to the time-frequency analysis using the first coefficient. The frequency determining section 160B may be an internal component of the signal adding section 120B.
[0052] The time interval determination unit 170B uses the time interval information to determine the time interval for the time-frequency analysis. Specifically, for example, the time interval determination unit 170B obtains a second coefficient that defines the time interval, and determines the time interval k related to the time-frequency analysis using the second coefficient. The time interval determination unit 170B may be an internal component of the signal addition unit 120B.
[0053] With such a configuration, the signal processing device 100B can change the time interval for time-frequency analysis according to the frequency, and can adaptively change the desired time interval according to any frequency to perform time-frequency analysis.
[0054] The time width acquisition unit 180B receives the conditions for the time width and determines the time width of the time interval based on the conditions. The condition of the time width is, for example, "p(n)" of the time width 2p(n)+1 described later. With this configuration, the signal processing device 100B is configured to be able to change the duration of the time interval. The time width acquisition unit 180B may be an internal component of the signal addition unit 120B.
[0055] The signal receiving unit 130B has a configuration having the same functions as the signal receiving unit 130A already described, and therefore a description thereof will be omitted.
[0056] The phase multiplication unit 110B executes a phase multiplication process, which will be described later, and performs a plurality of phase multiplications on the received signal.
[0057] The signal addition unit 120B (first signal addition unit) executes a signal addition process described later, and adds up signals obtained by multiple phase multiplications according to a synthesis interval that combines time intervals related to the time-frequency analysis to be performed on the signals. The signal addition unit 120B uses the first coefficient and the second coefficient to obtain a time interval for each frequency related to the time-frequency analysis to be performed on the signal, and adds together the signals related to the time interval for each frequency from among the signals obtained by the multiple phase multiplications. The signal adding unit 120B further uses the time width determined by the time width acquiring unit 180B to add up the signals relating to the time interval for each frequency.
[0058] The analysis result output section 140B functions in the same way as the analysis result output section 140A already described, and acquires the signal processed by the signal addition section 120B and outputs it as the analysis result.
[0059] The hardware configuration for realizing the functions of the above components of the present disclosure will be described later.
[0060] A processing example of the action evaluation device according to the second embodiment of the present disclosure will be described. FIG. 7 is a flowchart showing an example of processing by the signal processing device 100B according to the second embodiment of the present disclosure. In the description, it is assumed that the signal processing device 100B processes a signal s(k) when the signal time is kΔT (k=1, . . . , K, ΔT is the sampling interval). In this embodiment, negative frequency components are taken into consideration and it is assumed that the design is such that the low frequency components are at the center of the frequency. It should be noted that the design may be such that the low frequency components remain as low frequency components without taking such negative frequencies into consideration.
[0061] The signal processing device 100B starts the process shown in FIG. 7, for example, when it receives a command from a control unit (not shown) or a signal.
[0062] First, the signal processing device 100B executes a signal reception determination process (step ST210). In the signal reception determination process, if the signal reception unit 130B of the signal processing device 100B determines that a signal has not been received (step ST210 "NO"), it repeats the process of step ST210 and waits until a signal is received.
[0063] If it is determined that the signal receiving unit 130B has received a signal ("YES" in step ST210), then the signal processing device 100B executes a phase multiplication process (step ST220). In the phase multiplication process, the phase multiplication unit 110B of the signal processing device 100B performs a plurality of phase multiplications on the received signal. The phase multiplication unit 110B multiplies the signal s(k) having a frequency of (n-1-N / 2) / (KΔT) (n=1, . . . , N) by the phase as shown in the following equation (1). TIFF0007796943000001.tif15166The signal S(n,k) that is the calculation result of equation (1) is obtained by performing N×K complex multiplications. The phase multiplication unit 110B outputs the signal S(n,k) to the signal addition unit 120B.
[0064] Next, the signal processing device 100B executes a signal addition process (first signal addition process) (step ST230). In the signal addition process, the signal addition unit 120B of the signal processing device 100B acquires time interval k for each frequency n related to the time-frequency analysis to be performed on the signal, and adds together the signals related to time interval k for each frequency n among the signals obtained by multiple phase multiplications. A signal S(n,k) can be subjected to a short-time Fourier transform by summing signals of any frequency n over a desired time interval k. In this case, a wavelet transform can be realized by adaptively changing the time interval of the signals to be summed depending on the frequency. In this case, if the window function used as the wavelet base is rectangular, the process of adding to the N x K complex multiplications performed previously is basically an addition, making it possible to perform wavelet transformation without excessively increasing the amount of calculations. Even if the time sampling becomes finer, it becomes possible to perform wavelet transform without increasing the number of complex multiplications. In this disclosure, the addition performed by the signal addition unit 120B to realize the wavelet transform of a rectangular window will be described. In order to find the interval in which the signals S(n, k) are added together, p(n) is defined as in the following equation (2). Note that, for the purpose of explaining this embodiment, p(n) is explained quantitatively, but p(n) may be changed to another equation depending on the application method. TIFF0007796943000002.tif49166 "r" in equation (2) is the lower limit of the time window width for obtaining a certain frequency resolution, and "floor( )" in equation (3) is the floor function. The rectangular window wavelet transform according to the present disclosure performs addition for each frequency n with a width of 2p(n)+1 centered at time k. This allows for a wavelet transform with a rectangular window basis of frequency n, time k, and time width 2p(n)+1. Therefore, the processed time frequency components ("time frequency components" are also expressed as "time-frequency components") Fr(n, k) are calculated using the following equations (4) and (5). TIFF0007796943000003.tif16166 In the above formula, the gain is adjusted according to the number of additions using "α", but the essential calculation related to the wavelet transform is performed using additions only. The gain "α" is given on the assumption that the time length of the wavelet base and the component to be extracted match. Since wavelet transform can be performed in any time interval, frequency analysis is possible without increasing the number of multiplications.
[0065] Here, the process of receiving the time interval information will be described. FIG. 8 is a flowchart showing an example of processing by the time interval information receiving unit B in the signal processing device 100B according to the second embodiment of the present disclosure. For example, when an operation for setting a time interval is accepted, the signal processing device 100B displays an operation screen on a display unit or a display device (not shown), and starts the processing shown in FIG. The signal processing device 100B executes a time interval information reception process (step ST260). The time interval information receiving unit B receives time interval information from a user via a terminal, for example. The time interval information is information indicating a time interval for each frequency, and is formed, for example, by a combination of a frequency and a time interval. Upon receiving the time interval information, the signal processing device 100B stores the time interval information in a storage unit (not shown) and ends the processing shown in FIG. Furthermore, upon receiving the time interval information, time interval information receiving section B sends the time interval information to time interval determining section 170B and frequency determining section 160B.
[0066] Here, processing related to the signal addition processing according to the second embodiment will be described. FIG. 9 is a flowchart showing a detailed example of the signal addition process in the signal processing device 100B according to the second embodiment of the present disclosure. For example, when the signal processing device 100B starts the signal addition processing shown in FIG. 8, it starts the processing shown in FIG. The signal processing device 100B acquires values to be used in the signal addition process. When the signal processing device 100B starts processing, the time interval receiving unit 150B of the signal processing device 100B receives the time interval for each frequency. Specifically, the time interval receiving unit 150B receives, for example, a combination of a first coefficient and a second coefficient. Furthermore, the time interval receiving unit 150B may acquire the first coefficient and the second coefficient included in the time interval information stored in advance in a storage unit (not shown). When the time interval receiving unit 150B is an internal component of the signal adding unit 120B, this processing is executed in the signal adding unit 120B.
[0067] Next, the signal processing device 100B determines the frequency for signal addition (step ST271). Specifically, the frequency determination unit 160B of the signal processing device 100B determines a frequency related to the time-frequency analysis using the time interval information. More specifically, for example, the frequency determination unit 160B obtains a first coefficient that defines the frequency, and determines a frequency n related to the time-frequency analysis using the first coefficient. The frequency determining unit 160B outputs the determined frequency to the signal adding unit 120B. When the frequency determination unit 160B is an internal component of the signal addition unit 120B, this processing is executed in the signal addition unit 120B.
[0068] Next, the signal processing device 100B determines a time interval for signal addition (step ST272). Specifically, the time interval determination unit 170B of the signal processing device 100B determines a time interval for the time-frequency analysis using the time interval information. More specifically, for example, the time interval determination unit 170B obtains a second coefficient that defines the time interval, and determines the time interval k for the time-frequency analysis using the second coefficient. The time interval determination unit 170B outputs the determined time interval to the signal addition unit 120B. If the time interval determination unit 170B is an internal component of the signal addition unit 120B, this processing is executed in the signal addition unit 120B.
[0069] Next, the signal processing device 100B executes a time duration acquisition process (step ST273). Specifically, the time width acquisition unit 180B of the signal processing device 100B receives the time width conditions, and determines and acquires the time width of the time interval based on the conditions. The time width acquisition unit 180B outputs the time width to the signal addition unit 120B. When the time width acquisition unit 180B is an internal configuration of the signal addition unit 120B, this processing is executed in the signal addition unit 120B.
[0070] Next, the signal processing device 100B executes a signal addition process (first signal addition process) (step ST274). In the signal addition process, the signal addition unit 120B of the signal processing device 100B acquires and uses the frequency related to the time-frequency analysis, the time interval related to the time-frequency analysis, and the time width related to the time-frequency analysis to perform the above-mentioned signal addition process. The signal addition process (first signal addition process) corresponds to the signal addition process (step ST240) already described.
[0071] After executing the signal addition process (first signal addition process), the signal processing device 100B ends the process shown in FIG.
[0072] Returning to the explanation of Figure 7. After executing the signal addition process, the signal processing device 100B then executes an analysis result output process (step ST240). In the analysis result output process, the analysis result output unit 140B of the signal processing device 100B acquires the signal processed by the signal adding unit 120B and outputs it as the analysis result.
[0073] Next, the signal processing device 100B executes an end determination process (step ST250). In the termination determination process, a control unit (not shown) of the signal processing device 100B determines whether to terminate the process according to a program stored in a storage unit (not shown), for example.
[0074] When the control unit (not shown) determines not to end the process (step ST250 "NO"), the signal processing device 100B proceeds to the process of step ST210 and repeats the process shown in FIG.
[0075] When the control unit (not shown) determines to end the process (step ST250 "YES"), the signal processing device 100B ends the process shown in FIG.
[0076] The time-frequency analysis by the signal processing according to the second embodiment of the present disclosure enables time-frequency analysis with a low amount of calculation using fine time sampling that is not provided by the wavelet packet. Furthermore, the time-frequency analysis by signal processing according to the second embodiment of the present disclosure does not involve the thinning process for obtaining a fixed number of sampling points, which is performed in the wavelet transform method described in Patent Document 1, and therefore enables time-frequency analysis in response to fine sampling in the frequency direction. Furthermore, the configuration according to the second embodiment of the present disclosure is capable of changing the time interval according to the frequency, and makes it possible to adaptively change the desired time interval according to an arbitrary frequency to perform time-frequency analysis. Furthermore, the configuration according to the second embodiment of the present disclosure makes it possible to change the duration of the time interval.
[0077] The signal processing device of the present disclosure may further be configured, for example, as follows. a frequency determination unit that acquires a first coefficient that defines a frequency and determines a frequency related to the time-frequency analysis using the first coefficient; a time interval determination unit that obtains a second coefficient that defines a time interval and determines a time interval related to the time-frequency analysis using the second coefficient; Furthermore, The signal addition unit using the frequency determined by the frequency determination unit and the time interval determined by the time interval determination unit, obtaining a time interval for each frequency related to a time-frequency analysis to be performed on the signal; adding together signals related to the time interval for each frequency among the signals obtained by the plurality of phase multiplications; A signal processing device comprising: As a result, the present disclosure has the advantage of being able to provide a configuration that is capable of changing the time interval according to the frequency and adaptively changing the desired time interval according to any frequency to perform time-frequency analysis. Furthermore, the present disclosure achieves the same effects as those described above by applying the above configuration to the above method.
[0078] The signal processing device of the present disclosure may further be configured, for example, as follows. a time width acquisition unit that receives a condition for a time width and determines the time width of the time section based on the condition; Furthermore, The signal addition unit adding up the signals related to the time interval for each frequency by further using the time width determined by the time width acquisition unit; A signal processing device comprising: As a result, the present disclosure has an effect of providing a configuration that allows the time width of a time interval to be changed. Furthermore, the present disclosure achieves the same effects as those described above by applying the above configuration to the above method.
[0079] Embodiment 3 In the third embodiment, a form will be described in which it is possible to perform a time-frequency analysis similar to that when a window function other than a rectangular window, such as a triangular window, is used as a wavelet basis. In embodiment 3, among the components of embodiment 3, those components that are similar to the components of embodiment 1 or embodiment 2 already described will be omitted from redundant description as appropriate.
[0080] A configuration example of a signal processing device according to a third embodiment of the present disclosure will be described. FIG. 10 is a diagram illustrating an example of a configuration of a signal processing device 100C according to the third embodiment of the present disclosure. The signal processing device 100C shown in FIG. 10 is configured to obtain the same effect as using, for example, a triangular window as a wavelet base, by using the signal S(n, k), which is the intermediate output in the signal processing device 100B as described in embodiment 2. The signal processing device 100C includes a signal receiving unit 130C, a phase multiplication unit 110C, a signal adding unit 120C (first signal adding unit), an analysis result output unit 140C, a time interval receiving unit 150C, a frequency determining unit 160C, a time interval determining unit 170C, a time width acquiring unit 180C, and a second signal adding unit 190C.
[0081] The signal receiving unit 130C, the phase multiplication unit 110C, and the analysis result output unit 140C are configured in the same manner as the signal receiving units 130A and 130B, the phase multiplication units 110A and 110B, and the analysis result output units 140A and 140B, which have already been described, and detailed description thereof will be omitted here.
[0082] The time interval receiving unit 150C, the frequency determining unit 160C, the time interval determining unit 170C, and the time width acquiring unit 180C are configured in the same manner as the time interval receiving unit 150B, the frequency determining unit 160B, the time interval determining unit 170B, and the time width acquiring unit 180B, which have already been explained, and detailed explanations thereof will be omitted here.
[0083] The signal addition section 120C (first signal addition section) has the same functions as the signal addition sections 120A and 120B already described. The signal addition section 120C (first signal addition section) outputs the signal after the signal addition process to the second signal addition section 190C.
[0084] The second signal adding section 190C further adds the signal output by the signal adding section C to the signal output by the signal adding section C. With this configuration, the signal processing device 100C has the same configuration as when a window function other than a rectangular window, such as a triangular window, is used as the wavelet base. Alternatively, the second signal adding section 190C performs a bit shift on a part of the signal output by the signal adding section 120C and adds the signal output by the signal adding section 120C. With this configuration, the signal processing device 100C has an advantage of being able to provide a configuration similar to that when a window function other than a rectangular window, such as a triangular window, is used for the wavelet base.
[0085] Analysis result output unit 140C is similar to analysis result output units 140A and 140B already described, and a description thereof will be omitted.
[0086] The hardware configuration for realizing the functions of the above components of the present disclosure will be described later.
[0087] A processing example of the action evaluation device according to the third embodiment of the present disclosure will be described. FIG. 11 is a flowchart showing an example of processing by the signal processing device 100C according to the third embodiment of the present disclosure. FIG. 12 is a schematic diagram illustrating an image of processing that can be implemented by a signal processing device 100C according to the third embodiment of the present disclosure. The signal processing device 100C starts the process shown in FIG. 11, for example, when it receives a command from a control unit (not shown) or a signal.
[0088] First, the signal processing device 100C executes a signal reception determination process (step ST310). In the signal reception determination process, if the signal reception unit 130C of the signal processing device 100C determines that a signal has not been received (step ST310 "NO"), as in the signal reception process already described, it repeats the processing of step ST310 and waits until a signal is received.
[0089] If it is determined that the signal receiving unit 130C has received a signal ("YES" in step ST310), then the signal processing device 100C executes a phase multiplication process (step ST320). In the phase multiplication process, the phase multiplication unit 110C of the signal processing device 100C performs a plurality of phase multiplications on the received signal, similar to the phase multiplication process already described.
[0090] Next, the signal processing device 100C executes a signal addition process (first signal addition process) (step ST330). In the signal addition process, the signal addition unit 120C of the signal processing device 100C, similar to the signal addition process (first signal addition process) already described, acquires time interval k for each frequency n related to the time-frequency analysis to be performed on the signal, and adds together the signals related to time interval k for each frequency n among the signals obtained by multiple phase multiplications. After executing the first signal addition processing, the signal addition section 120C (first signal addition section) of the signal processing device 100C outputs the signal S(n,k) after the first signal addition processing to the second signal addition section 190C.
[0091] Next, the signal processing device 100C executes the second signal addition process (step ST340). In the second signal addition process, the second signal addition section 190C of the signal processing device 100C further adds the signal output by the signal addition section 120C to the signal output by the signal addition section 120C. The second signal adding section 190C obtains the processing result Ft(n,k) based on the following equations (6) and (7). TIFF0007796943000004.tif22166In equations (6) and (7), a triangular window is realized by multiplying S(n,k+-(lp(n))-1) by "l" and then adding them. However, this multiplication can be substituted by adding signals obtained by changing the signal section with an equal gain. This principle will be explained with reference to FIG. FIG. 12 shows a schematic diagram of the weight 2000 when signals obtained by changing the signal section are added with equal gain. From this diagram, it can be seen that the signal obtained by adding signals with changed signal sections with equal gains, which is obtained from the processing up to second signal adding section 190C, is equivalent to a triangular window. This means that a triangular window can be used without multiplication. Since a result with a narrow time span can also be derived in the process of deriving a calculation result with a wide time span, it is possible to configure the system so that the number of additions does not increase excessively. The second signal adding section 190C outputs the processing result Ft(n,k) calculated based on this concept to the analysis result output section 140C as the time-frequency analysis result.
[0092] The second signal adding unit 190C may perform processing by bit shifting so that the triangular window becomes equivalent to a window with a changed gain without excessively increasing the amount of calculation, and the same effect as above can be obtained.
[0093] After the signal processing device 100C executes the second signal addition process, the signal processing device 100C then executes an analysis result output process (step ST350). In the analysis result output process, the analysis result output unit 140C of the signal processing device 100C executes the same process as the analysis result output process already described.
[0094] Next, the signal processing device 100C executes an end determination process (step ST360). In the termination determination process, a control unit (not shown) of the signal processing device 100C determines whether to terminate the process according to a program stored in a storage unit (not shown), for example.
[0095] When the control unit (not shown) determines not to end the process ("NO" in step ST360), the signal processing device 100C proceeds to the process of step ST310 and repeats the process shown in FIG.
[0096] When the control unit (not shown) determines to end the process (step ST360 "YES"), the signal processing device 100C ends the process shown in FIG.
[0097] The embodiments of the present disclosure allow for finer sampling intervals in both directions. Furthermore, the embodiment of the present disclosure is configured to be able to utilize a triangular window. That is, the embodiment of the present disclosure can provide a configuration similar to that when a window function other than a rectangular window, such as a triangular window, is used for the wavelet base. The embodiment of the present disclosure makes it possible to obtain the side lobe reduction effect using a triangular window without excessively increasing the amount of calculation. By adding addition, the embodiment of the present disclosure realizes a wavelet transform with fine time-frequency sampling equivalent to using a triangular window in the wavelet basis. In the patent documents, a wavelet transform with fine time sampling is realized, but there is a problem in that the basis is a rectangular window and the accuracy is low. The embodiment of the present disclosure shows a solution to this problem.
[0098] The signal processing device of the present disclosure may further be configured, for example, as follows. a second signal addition unit that further adds the signal output by the signal addition unit to the signal output by the signal addition unit; A signal processing device comprising: As a result, the present disclosure has an effect of being able to provide a configuration similar to that when a window function other than a rectangular window, such as a triangular window, is used for the wavelet base. Furthermore, the present disclosure achieves the same effects as those described above by applying the above configuration to the above method.
[0099] The signal processing device of the present disclosure may further be configured, for example, as follows. a second signal addition unit that performs a bit shift on a part of the signal output by the signal addition unit and adds the signal output by the signal addition unit; A signal processing device comprising: As a result, the present disclosure has an effect of being able to provide a configuration similar to that when a window function other than a rectangular window, such as a triangular window, is used for the wavelet base. Furthermore, the present disclosure achieves the same effects as those described above by applying the above configuration to the above method.
[0100] Here, a hardware configuration for realizing the functions of the present disclosure will be described. FIG. 13 is a diagram illustrating a first example of a hardware configuration for realizing the functions according to the configuration of the present disclosure. FIG. 14 is a diagram illustrating a second example of a hardware configuration for realizing the functions according to the configuration of the present disclosure. Each of the signal processing devices 100, 100A, 100B, and 100C of the present disclosure is realized by hardware such as that shown in FIG. 13 or FIG.
[0101] As shown in FIG. 13, each of the action evaluation devices 100, 100A, 100B, 100C, 100D, 100E, 100E', and 100E'' is configured with, for example, a processor 10001, a memory 10002, an input / output interface 10003, and a communication circuit 10004. The processor 10001 and the memory 10002 are, for example, installed in a computer. The memory 10002 stores programs for causing the computer to function as phase multiplication units 110, 110A, 110B, 110C, signal addition units 120, 120A, 120B, 120C, signal reception units (first signal addition units) 130A, 130B, 130C, analysis result output units 140A, 140B, 140C, time interval reception units 150B, 150C, frequency determination units 160B, 160C, time interval determination units 170B, 170C, time width acquisition units 180B, 180C, second signal addition unit 190C, and a control unit not shown. By having the processor 10001 read and execute the program stored in the memory 10002, the functions of the phase multiplication units 110, 110A, 110B, 110C, the signal addition units 120, 120A, 120B, 120C, the signal reception units (first signal addition units) 130A, 130B, 130C, the analysis result output units 140A, 140B, 140C, the time interval reception units 150B, 150C, the frequency determination units 160B, 160C, the time interval determination units 170B, 170C, the time width acquisition units 180B, 180C, the second signal addition unit 190C, and a control unit not shown are realized. Furthermore, a storage unit (not shown) is realized by the memory 10002 or another memory (not shown). Furthermore, the communication circuit 10004 realizes a communication unit (not shown).
[0102] The processor 10001 is, for example, a central processing unit (CPU), a graphics processing unit (GPU), a microprocessor, a microcontroller, or a digital signal processor (DSP). Memory 10002 may be a non-volatile or volatile semiconductor memory such as RAM (Random Access Memory), ROM (Read Only Memory), EPROM (Erasable Programmable ROM), EEPROM (Electrically Erasable Programmable Read Only Memory) or flash memory, or a magnetic disk such as a hard disk or flexible disk, or an optical disk such as a CD (Compact Disc) or DVD (Digital Versatile Disc), or a magneto-optical disk. The processor 10001 and the memory 10002 or the communication circuit 10004 are connected in a state where they can transmit data to each other. The processor 10001, the memory 10002, and the communication circuit 10004 are also connected in a state where they can transmit data to other hardware via the input / output interface 10003.
[0103] Alternatively, the functions of the phase multiplication units 110, 110A, 110B, 110C, signal addition units 120, 120A, 120B, 120C, signal reception units (first signal addition units) 130A, 130B, 130C, analysis result output units 140A, 140B, 140C, time interval reception units 150B, 150C, frequency determination units 160B, 160C, time interval determination units 170B, 170C, time width acquisition units 180B, 180C, second signal addition unit 190C, and a control unit (not shown) in the signal processing devices 100, 100A, 100B, 100C may be realized by a dedicated processing circuit 20001, as shown in FIG. 14.
[0104] The processing circuit 20001 may be, for example, a single circuit, a composite circuit, a programmed processor, a parallel programmed processor, an ASIC (Application Specific Integrated Circuit), a PLD (Programmable Logic Device), an FPGA (Field-Programmable Gate Array), an SoC (System-on-a-Chip), or a system LSI (Large-Scale Integration). Furthermore, the memory 20002 or another memory not shown implements a storage unit not shown. Memory 20002 may be a non-volatile or volatile semiconductor memory such as RAM (Random Access Memory), ROM (Read Only Memory), EPROM (Erasable Programmable ROM), EEPROM (Electrically Erasable Programmable Read Only Memory) or flash memory, or a magnetic disk such as a hard disk or flexible disk, or an optical disk such as a CD (Compact Disc) or DVD (Digital Versatile Disc), or a magneto-optical disk. Furthermore, the communication circuit 20004 realizes a communication unit (not shown). The processing circuit 20001 and the memory 20002 or the communication circuit 20004 are connected in a state where they can transmit data to each other. In addition, the processing circuit 20001, the memory 20002, and the communication circuit 20004 are connected in a state where they can transmit data to each other and to other hardware via the input / output interface 20003. In the signal processing devices 100, 100A, 100B, 100C, the functions of the phase multiplication units 110, 110A, 110B, 110C, signal addition units 120, 120A, 120B, 120C, signal reception units (first signal addition units) 130A, 130B, 130C, analysis result output units 140A, 140B, 140C, time interval reception units 150B, 150C, frequency determination units 160B, 160C, time interval determination units 170B, 170C, time width acquisition units 180B, 180C, second signal addition unit 190C, and a control unit (not shown) may be realized by separate processing circuits, or may be realized together by a processing circuit.
[0105] Alternatively, in the signal processing devices 100, 100A, 100B, 100C, some of the functions of the phase multiplication units 110, 110A, 110B, 110C, signal addition units 120, 120A, 120B, 120C, signal reception units (first signal addition units) 130A, 130B, 130C, analysis result output units 140A, 140B, 140C, time interval reception units 150B, 150C, frequency determination units 160B, 160C, time interval determination units 170B, 170C, time width acquisition units 180B, 180C, second signal addition unit 190C, and a control unit (not shown) may be realized by the processor 10001 and memory 10002, and the remaining functions may be realized by the processing circuit 20001.
[0106] It should be noted that, within the scope of this disclosure, the embodiments may be freely combined, any component of each embodiment may be modified, or any component of each embodiment may be omitted. [Industrial Applicability]
[0107] The signal processing device of the present disclosure can realize a configuration that allows the time sampling interval to be changed along with the frequency sampling interval in time-frequency analysis, and is therefore suitable for use in time-frequency analysis. [Explanation of symbols]
[0108] 100, 100A, 100B, 100C signal processing device, 110, 110A, 110B, 110C phase multiplication unit, 120, 120A, 120B, 120C signal addition unit (first signal addition unit), 130A, 130B, 130C signal reception unit, 140A, 140B, 140C analysis result output unit, 150B, 150C time interval reception unit, 160B, 160C frequency determination unit, 170B, 170C time interval determination unit, 180B, 180C time width acquisition unit, 190C second signal addition unit, 1000 time-frequency sampling interval according to the present disclosure, 1010 time-frequency sampling interval according to a general wavelet transform, 1020 time-frequency sampling interval according to a wavelet packet, 1030 time-frequency sampling interval according to the wavelet transform described in Patent Document 1, 2000 Weights when signals obtained by changing the signal section are added with equal gain, 10001 processor, 10002 memory, 10003 input / output interface, 10004 communication circuit, 20001 processing circuit, 20002 memory, 20003 input / output interface, 20004 communication circuit.
Claims
1. A signal processing device that performs time-frequency analysis of a signal, a phase multiplication unit that performs a plurality of phase multiplications on the received signal; a signal addition unit that adds up the signals obtained by the plurality of phase multiplications according to a synthesis interval that is a combination of time intervals related to time-frequency analysis to be performed on the signal; a frequency determination unit that obtains a first coefficient that defines a frequency and determines a frequency related to the time-frequency analysis using the first coefficient; a time interval determination unit that obtains a second coefficient that defines the time interval and determines the time interval related to time-frequency analysis using the second coefficient; Equipped with The signal addition unit using the frequency determined by the frequency determination unit and the time interval determined by the time interval determination unit, obtaining a time interval for each frequency related to a time-frequency analysis to be performed on the signal; adding together, for each frequency, signals related to a time interval for each frequency among the signals obtained by the plurality of phase multiplications; A signal processing device comprising:
2. a time width acquisition unit that receives a condition for a time width and determines the time width of the time section based on the condition; Furthermore, The signal addition unit further using the time width determined by the time width acquisition unit to add up, for each frequency, signals related to the time interval for each frequency; 2. The signal processing device according to claim 1.
3. a second signal addition unit that further adds the signal output by the signal addition unit to the signal output by the signal addition unit; The signal processing device according to claim 1 or 2, comprising:
4. a second signal addition unit that performs a bit shift on a part of the signal output by the signal addition unit and adds the signal output by the signal addition unit; The signal processing device according to claim 1 or 2, comprising:
5. A signal processing method by a signal processing device, comprising: a phase multiplication unit of the signal processing device performing a plurality of phase multiplications on the received signal; a frequency determination unit of the signal processing device obtains a first coefficient that defines a frequency, and determines a frequency related to time-frequency analysis using the first coefficient; a time interval determination unit of the signal processing device obtains a second coefficient that defines a time interval, and determines a time interval related to time-frequency analysis using the second coefficient; a signal adding unit of the signal processing device, using the frequency determined by the frequency determination unit and the time interval determined by the time interval determination unit, obtaining a time interval for each frequency related to a time-frequency analysis to be performed on the signal; Among the signals obtained by the plurality of phase multiplications, signals relating to the time intervals of the respective frequencies are added together, adding the signals obtained by the phase multiplication unit according to a synthesis interval that is a combination of a time interval related to the time-frequency analysis to be performed on the signal; and performing a time-frequency analysis of the signal by:
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