Resonant Power Converter

Abstract

To provide a resonant power converter.SOLUTION: A power converter (100) according to the present invention includes an inverter (101), a resonant circuit (LC), a transformer (T1) including a primary circuit (2) and a secondary circuit (3), and control means (4) for the inverter (101), and the inverter (101) includes a parallel resonant circuit connected to the resonant circuit (LC) intended to be connected to the output load (Rout) via the transformer (T1), and the inverter (101) includes a first half bridge (D1) and a second half bridge parallel to the first half bridge (D2), a first inductor (LC1) between the first half bridge (D1) and the resonant circuit (LC), and a second inductor (LC2) between the second half bridge (D2) and the resonant circuit (LC), and the first and second inductors (LC1, LC2) have the same inductance and are coupled to each other in opposite directions.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The technical field of the present invention relates to resonant power converters. The conversion of DC voltages is used in a wide variety of technical fields, ranging from the need to convert the supply voltage to a device, such as the conversion of the voltage supplied to a processor by a battery in a portable computer, to applications operating in much harsher environments, such as the space industry. The present invention is particularly useful in the space industry, but can also be used in other fields where flexibility is required in the load to be powered or in the input voltage, in particular in the automotive field. [Background technology]

[0002] In general, the function of the output of a power converter is to provide the voltage and current required for the operation of a target.

[0003] Resonant converters are designed to obtain a given range of input voltages and output currents. In conventional resonant structures, operation at or near the resonant frequency is guaranteed. Under these conditions, and to have a sufficiently high level of selectivity, the current in the structure is sinusoidal or quasi-sinusoidal in form.

[0004] The input voltage or load is often varied by changing the operating frequency of the power supply to the resonant converter, which affects the ratio of active to reactive power and prevents optimization of the output over the entire operating range of the resonant converter bank.

[0005] Varying the operating frequency of the power supply to the resonant converter also makes sizing of the magnetic components and filters around the resonant power converter difficult.

[0006] Furthermore, with such a wide operating range, it becomes difficult to ensure efficient operation in all usage scenarios.

[0007] A structure known from the prior art is shown in Figure 1. Conventionally, a resonant power converter 1 comprises: - inverter 10 with two switches Qi1, Qi2, a series resonant circuit LC comprising an inductor Lr and a capacitor Cr; a transformer T1 including a primary circuit 2 with a winding including N1 turns and a secondary rectifier circuit 3 with a winding including N2 turns, the primary circuit 2 being capable of performing a DC isolation function; and - includes control means 4 for the inverter 10;

[0008] Here, the inverter 10 operates at a (DC) input voltage V in can be chopped to generate a square wave signal. If the square wave signal is at the correct frequency, i.e., at or close to the resonant frequency of the Lr, Cr pair, the current will be considered strictly sinusoidal to have sufficiently high level selectivity. The current then flows through a transformer T1, which provides DC isolation, and is sent to the output load Rout via a secondary rectifier circuit 3.

[0009] The two resonances can be separated by adding an inductor Lm in parallel with the transformer T1, as shown in Figure 1. By varying the frequency to operate between these two resonances, the output load Rout can be varied to accommodate input and output voltage variations. Summary of the Invention [Problem to be solved by the invention]

[0010] The greater the difference between the loads mentioned above, the greater the difference between the required gains and the greater the desired output voltage range V out This increases the need to vary the frequency to sweep the frequency. This has four drawbacks. The first drawback concerns the magnetic elements, i.e., inductors and transformers, which are designed to operate at precise frequencies and can fail if the operating frequency is outside the operating range of the inductors and transformers.

[0011] The second drawback is related to dynamic range: sweeping a wide frequency range can reduce the dynamic range of the system.

[0012] Increasing reactive power in the cell can lead to increased currents (energy exchange between the converter and the power source) and therefore increased losses.

[0013] Finally, changing the operating frequency can cause the output current to become discontinuous, increasing the amount of current delivered to the secondary circuit and therefore increasing losses. [Means for solving the problem]

[0014] The present invention aims to solve all or part of the above-mentioned problems by proposing an innovative series-parallel resonant power converter structure whose use can be extended to a wider operating range while still guaranteeing good performance. The present invention therefore provides a resonant power converter that is operable for all loads and has a high dynamic range.

[0015] For the above purposes, the present invention provides: an inverter; a resonant circuit; a transformer having a primary circuit and a secondary circuit; - control means of said inverter, said inverter being connected to a resonant circuit intended to be connected to an output load via a transformer, The inverter is a first half-bridge and a second half-bridge in parallel with the first half-bridge; a first inductor between the first half-bridge and the resonant circuit; -A power converter with a parallel resonant circuit, characterized in that it includes a second inductor between the second half bridge and the resonant circuit, and the first and second inductors have the same inductance and are coupled in opposite directions to each other.

[0016] According to one aspect of the present invention, the second half bridge is out of phase with the first half bridge when operating under low load.

[0017] According to one aspect of the present invention, the current I flowing through the first and second inductorsC is given by the following equation:

number

[0018] Here is V in is the input voltage at the terminals of the first and second half bridges, L C is the inductance of the first and second inductors, f dec is the chopping frequency of the resonant circuit when operating under light load.

[0019] According to one aspect of the invention, the first half bridge includes a first switch and a second switch, the second half bridge includes a third switch and a fourth switch, the first half bridge and the second half bridge are configured to carry a current and generate a voltage, and the control means of the first half bridge and the second half bridge are configured to delay the current relative to the voltage to provide soft switching.

[0020] According to one aspect of the present invention, a dead time t is defined as a time for discharging a first capacitor having a capacitance C1, a second capacitor having a capacitance C2, a third capacitor having a capacitance C3, a fourth capacitor having a capacitance C4, and resetting a first switch, a second switch, a third switch, and a fourth switch. m is defined as follows: t m =16L C C OSS f dec

[0021] Here is C OSS are the output capacitances of the first, second, third and fourth switches.

[0022] According to one aspect of the present invention, the resonant circuit is an LC circuit.

[0023] According to one aspect of the present invention, the resonant circuit is an LLC circuit.

[0024] According to one aspect of the invention, the second half bridge is in phase with the first half bridge when operating under full load.

[0025] The invention will be better understood and other advantages will become apparent on reading the detailed description of one exemplary embodiment, said description being illustrated in the accompanying drawings. [Brief explanation of the drawings]

[0026] [Figure 1] 1 shows a schematic representation of a structure known in the prior art. [Figure 2] 1 shows a schematic diagram of a power converter structure according to the present invention; [Figure 3] 1 shows a schematic diagram of an inverter of a power converter structure according to the present invention; [Figure 4] 10A and 10B show schematic diagrams of a variation of the power converter structure. [Figure 5] 10 shows a schematic diagram of another variation of the power converter structure. DETAILED DESCRIPTION OF THE INVENTION

[0027] For clarity, the same reference numerals have been used throughout the various drawings to refer to the same elements.

[0028] In the following description, the term "in parallel" means that elements that do not belong to the same branch are grouped according to whether their ends have the same polarity and operate simultaneously. The term "in series" means that elements belong to the same current branch and operate consecutively. The term "in anti-parallel" means that elements are oriented in parallel with each other but carry currents in opposite directions.

[0029] FIG. 1, mentioned above, conventionally shows a power converter structure 1 known from the prior art.

[0030] 2 shows a schematic diagram of a power converter 100 according to the present invention. As in the prior art, the power converter 100 includes: - input voltage V in an inverter 101 capable of chopping the input voltage Vout and thus generating a square wave signal; a series resonant circuit LC including an inductor Lr and a capacitor Cr connected to the inverter 101; a transformer T1 comprising a primary circuit 2 with a winding comprising N1 turns and a secondary rectifier circuit 3 with windings comprising N2 and N3 turns, making it possible to perform a DC isolation function; - includes control means 4 for the inverter 101;

[0031] Unlike the prior art, the inverter 101 includes four switches Q1, Q2, Q3, and Q4. The switches Q1 and Q2 form a first half-bridge D1, and the switches Q3 and Q4 form a second half-bridge D2. The first half-bridge D1 is connected in parallel with the second half-bridge D2. The first inductor L C1 is arranged in series with the first half bridge D1 and connects the first half bridge D1 to the resonant circuit LC. C2 is arranged in series with the second half bridge D2 and connects the second half bridge D2 to the resonant circuit LC. Without limitation, the switches Q1, Q2, Q3, and Q4 may be transistors as shown in FIG.

[0032] To efficiently manage the current delivered to the output load Rout, a first inductor L C1 and the second inductor L C2 is the same inductance L C and are coupled in opposite directions to each other. That is, the first inductor L C1 and the second inductor L C2 is in parallel with the second inductor L C2 is the first inductor L C1 Therefore, the first inductor L C1 and the second inductor L C2 are realized in the same magnetic circuit, i.e., the first inductor L C1and the second inductor L C2 The first inductor L C1 and the second inductor L C2 can be understood as carrying the same current flux resulting from the signed sum of the currents flowing through

[0033] Therefore, during operation under full load, the first half-bridge D1 is in phase with the second half-bridge D2, and the first inductor L C1 and the second inductor L C2 is not visible to the power converter structure 100. This is because the first inductor L C1 and the second inductor L C2 Since the current in the first inductor L C1 and the second inductor L C2 This is because the current flux across the first inductor L C1 and the second inductor L C2 is not visible to the power converter architecture 100.

[0034] Conversely, during operation under low load, the first half-bridge D1 and the second half-bridge D2 operate in anti-phase, and the currents are opposite but equal. The current applied to the load is the sum of the currents, which is zero. The opposite current flows through the first inductor L C1 and the second inductor L C2 This limits the current flowing between the first and second half-bridges D1, D2, creating a maximum current flux at the inductor. The amplitude of this current is limited by the value of the inductance chosen to ensure soft switching, with the following effects:

[0035] The control means 4 manages the two above-mentioned operations and allows intermediate operations between the two presented types of operation. The control means 4 is configured to adjust the phase difference between the first half-bridge D1 and the second half-bridge D2 to adjust the output voltage depending on the load and the input voltage. The control means 4 can, as an example, perform intermediate operations based on a linear management model of the current between the two types of operation. To do this, the control means 4 adjusts the current or the output voltage V at the output of the inverter 101. out and controls the first half-bridge D1 and the second half-bridge D2 of the inverter 101 based on the detected current.

[0036] As mentioned above, the output load Rout of the power converter 100 is no longer managed by utilizing a change in frequency, and thus by moving the operating frequency of the power converter 100 away from the resonant frequency, but rather via a variation in the phase shift seen between the currents flowing through the first and second half-bridges D1 and D2 of the inverter 101. The power converter 100 is therefore, as shown, in all possible cases operated at or near the resonant frequency, i.e., at a frequency that ensures efficient operation.

[0037] Another drawback of the prior art shown in Figure 1 is loss management. This is because when the operating frequency of the power supply is increased to eliminate operation near the resonant frequency, some of the current flowing in the resonant circuit is not delivered to the load, generating reactive power. Now, the greater the deviation of the operating frequency from the resonant frequency, the greater the losses in the switches, especially in the magnetic elements.

[0038] In contrast to hard switching, when the current or voltage in the switch is zero or these two elements are opposite, the power in the switch is zero. This situation has the advantage that there is no power to dissipate, and therefore only a small amount of loss occurs with each switching operation in the switch. Therefore, the energy stored in the stray capacitance of the switch flows, allowing the switch to turn on without loss, which is called soft switching. Conversely, when the current and voltage in the switch are not zero, the power in the switch is dissipated, which is called hard switching.

[0039] When the voltage during the switching operation is zero, this is referred to by those skilled in the art as zero voltage switching (ZVS), and when the current is zero (ZCS), this is also referred to as zero current switching. Generally, this phenomenon is called soft switching.

[0040] The power converter structure 100 according to the invention, shown in Figure 2, has advantages over soft switching, since the control means 4 of the inverter 101 are arranged to delay the current with respect to the voltage so as to obtain soft switching.

[0041] Extending the above, the power converter structure 100 according to the present invention allows soft switching operation over the entire load range of the power supply. The advantages of this are, firstly, improved power output by reducing losses in the switches Q1, Q2, Q3 and Q4, and, secondly, reduced electromagnetic and electrical disturbances caused by the power supply. As mentioned above, the present invention allows for a reduction in the size of the filters attached to the power converter 100.

[0042] Furthermore, each switch Q1, Q2, Q3, and Q4 may have a diode (Di1 for Q1, Di2 for Q2, Di3 for Q3, and Di4 for Q4) in anti-parallel with the switch, and a capacitance (C1 for Q1, C2 for Q2, C3 for Q3, and C4 for Q4) in parallel. These capacitances C1, C2, C3, and C4 may be stray capacitances of the switches or stray capacitances of added capacitors as shown in FIG. 2. This allows the power converter 100 to operate in a soft switching (ZVS) manner, even without a load.

[0043] Furthermore, the power converter 100 may include two transistors D5 and D6 in parallel with the secondary rectifier circuit 3 between the secondary rectifier circuit 3 and the output load Rout.

[0044] Another advantage of the power converter structure 100 is illustrated in Figure 3. Figure 3 shows a schematic diagram of the inverter 101 of the power converter structure 100 according to the invention when operating without load, with the first inductor L C1 and the second inductor L C2 More precisely, the current flows in the opposite direction in the first inductor L C1 The first half-bridge D1 is made up of switches Q1 and Q2 connected in series with the second inductor L C2 In parallel with this is shown a second half-bridge D2, which is made up of switches Q3 and Q4 connected in series.

[0045] As mentioned above, the first inductor L C1 and the second inductor L C2 Current I between C The current I C is calculated according to the following equation, and the first inductor L C1 The value of the second inductor L C2 and the input voltage V in is directly connected to

number

[0046] Here is L Cis the first inductor L C1 and the second inductor L C2 The value of V in is the value of the input voltage, and f dec is the operating frequency or chopping frequency of the power converter 100.

[0047] The above equation is valid for no-load operation because the first and second inductors L are coupled as shown in Figure 3. C1 , L C2 This is the case when the currents are in opposite phase within the

[0048] Furthermore, the current I C is the first inductor L C1 and the value of the second inductor L C2 Since it depends on the value of Cpkpk The current range I Cpkpk is the current I based on the operation of the power converter 100. C The normalized value of .lamda.

[0049] Another advantage of the power converter 100 design according to the present invention is that the dead time t m More precisely, the dead time t m is defined as the shortest time that can discharge the capacitances C1, C2, C3 and C4 and reset the switches Q1, Q2, Q3 and Q4. The reason is that the power converter 100 according to the present invention can reduce the dead time t m is the input voltage V in This is because the control of the switches Q1, Q2, Q3, and Q4 can be simplified by making them independent of each other. m is the output capacitance C of the switches Q1, Q2, Q3 and Q4 OSS Based on this, the following equation can be defined for all operations: t m =16L C C OSS f dec

[0050] The dead time can be interpreted as the maximum time that can be fixed for operation under low load or no load, and can be reduced when operating under heavy load.

[0051] FIG. 4 shows a schematic diagram of a variation of the power converter structure 100. As shown in FIG. - input voltage V in an inverter 101 capable of chopping a voltage, thereby generating a square wave signal, and comprising four switches Q1, Q2, Q3 and Q4, the switches Q1 and Q2 forming a first half-bridge D1 and the switches Q3 and Q4 forming a second half-bridge D2; a series resonant circuit connected to the inverter 101; a transformer T1 comprising a primary circuit 2 with a winding comprising N1 turns and a secondary rectifier circuit 3 with windings comprising N2 and N3 turns, making it possible to perform a DC isolation function; - includes control means 4 for the inverter 101;

[0052] In the above-described variant of the power converter 100 structure, the two resonances can be separated by adding an inductor Lm in parallel with the transformer T1. By using an inductor Lm in parallel with the transformer T1, the magnetic inductance occurring within the transformer T1 can be reduced. The series resonant circuit is then an LLC circuit with two inductors Lr, Lm and a capacitor Cr.

[0053] First and second coupled inductors L C1 , L C2 can suppress the current exchanged between the first half-bridge D1 and the second half-bridge D2 in the case of antiphase, and can add current in the case of in-phase without affecting the power converter.

[0054] Advantageously, the power supply operates near the resonant frequency.

[0055] The capacitor Cr of the series resonant circuit can be divided into a first secondary capacitance Cr1 and a second secondary capacitance Cr2, each of which corresponds to half the initial capacitance of the capacitor Cr, as shown in Figure 5. The first secondary capacitance Cr1 is connected to the first half-bridge D1 and the first inductor L C1 Similarly, a second secondary capacitance Cr2 is placed between the second half bridge D2 and the second inductor L C2 This configuration makes the system insensitive to asymmetries in the control. [Explanation of symbols]

[0056] 1 Resonant Power Converter 2 Primary circuit 3 Secondary rectifier circuit 4. Control Measures 10,101 Inverter 100 Power Converter C1, C2, C3, C4 capacitance Cr capacitor C OSS Output Capacitance D1, D2 half bridge D5, D6 transistors Di1, Di2, Di3, Di4 diodes I C current I Cpkpk Current Range Lm,Lr,L C1 ,L C2 inductor LC series resonant circuit N1, N2 turn Q1, Q2, Q3, Q4 switches Qi1, Qi2 switches Rout Output Load T1 transformer t m Dead time V in Input voltage V out Output Voltage

Claims

1. an inverter (101), - Resonant circuit (L Ｃ )and, a transformer (T1) with a primary circuit (2) and a secondary circuit (3), - control means (4) of said inverter (101), said inverter (101) being connected to an output load (Rout) via said transformer (T1) through said resonant circuit (L Ｃ 1. A power converter (100) having a parallel resonant circuit connected to a The power converter (100) includes an inductor (Lm) in parallel with the transformer (T1), and the inverter (101) a first half-bridge (D1) and a second half-bridge (D2) in parallel with said first half-bridge (D1); - the first half-bridge (D1) and the resonant circuit (L Ｃ ) between the first inductor (L Ｃ１ )and, - the second half-bridge (D2) and the resonant circuit (L Ｃ ) between the second inductor (L Ｃ２ ), and the first and second inductors (L Ｃ１ , L Ｃ２ ) have the same inductance and are coupled in opposite directions to each other, the second half-bridge (D2) is in anti-phase with the first half-bridge (D1) when operating under low load, and the current I C flowing through the first and second inductors (LC1, LC2) is given by: [Equation 1] wherein V in is the input voltage at the terminals of the first half-bridge (D1) and the second half-bridge (D2), L C is the inductance of the first and second inductors (L C1 , L C2 ), and f dec is the chopping frequency of the resonant circuit (L C ) when operating under low load.

2. 2. The power converter (100) of claim 1, wherein the first half-bridge (D1) comprises a first switch (Q1) and a second switch (Q2), the second half-bridge (D2) comprises a third switch (Q3) and a fourth switch (Q4), the first half-bridge (D1) and the second half-bridge (D2) are configured to carry a current and generate a voltage, and control means (4) for the first half-bridge (D1) and the second half-bridge (D2) are configured to delay the current with respect to the voltage to provide soft switching (ZVS).

3. the first switch (Q1) includes a first capacitor having a capacitance C1, the second switch (Q2) includes a second capacitor having a capacitance C2, the third switch (Q3) includes a third capacitor having a capacitance C3, and the fourth switch (Q4) includes a fourth capacitor having a capacitance C4, and a dead time t is defined as a time for discharging the first capacitor having the capacitance C1, the second capacitor having the capacitance C2, the third capacitor having the capacitance C3, and the fourth capacitor having the capacitance C4 and resetting the first switch (Q1), the second switch (Q2), the third switch (Q3), and the fourth switch (Q4). ｍ is defined as follows: t ｍ =16L Ｃ C ＯＳＳ f ｄｅｃ C ＯＳＳ 3. The power converter (100) of claim 2, wherein Q is the output capacitance of the first, second, third and fourth switches (Q1, Q2, Q3, Q4).

4. The power converter of claim 3 , wherein the resonant circuit is an LC circuit.

5. The power converter of claim 3 , wherein the resonant circuit is an LLC circuit.

6. The power converter (100) of claim 1, wherein the second half-bridge (D2) is in phase with the first half-bridge (D1) when operating under full load.

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