Display panel

Abstract

To provide a display panel.SOLUTION: A display panel disclosed herein comprises an electrostatic protection circuit including at least one thin-film transistor having an active layer with a channel portion. Disposing at least one auxiliary electrode on the channel portion and bringing the auxiliary electrode into direct contact with the channel portion may allow the added auxiliary electrode to be used to improve uniformity of plasma acting on the channel portion, such that a leakage current of the thin-film transistor is reduced to improve display quality of the display panel.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present application relates to the field of display technology, and in particular to display panels. [Background technology]

[0002] During the production, testing and transportation of display panels, static electricity inevitably occurs. Friction and contact can cause instantaneous high voltages of up to several kilovolts, which can destroy the display panel and lead to breakdowns of the components inside the display panel.

[0003] In related art, an electrostatic protection circuit is usually provided in a display panel to release high levels of static electricity and prevent damage to components in the display panel due to static electricity. However, when the display panel is operating normally, a leakage current may occur in the thin film transistor in the electrostatic protection circuit, which may cause the display panel to be unable to display normal grayscales and brightness, thereby affecting the display quality of the display panel.

[0004] Therefore, it is necessary to provide a display panel that can improve this drawback. Summary of the Invention [Problem to be solved by the invention]

[0005] The embodiments of the present application provide a display panel that can reduce the leakage current of the thin film transistor in the electrostatic protection circuit and improve the display quality of the display panel. [Means for solving the problem]

[0006] An embodiment of the present application provides a display panel, the display panel including an electrostatic protection circuit, the electrostatic protection circuit including at least one thin film transistor, the thin film transistor including an active layer, the active layer having a channel portion; Here, at least one auxiliary electrode is provided on the channel portion, and the auxiliary electrode is in direct contact with the channel portion.

[0007] According to one embodiment of the present application, the channel portion is provided with a plurality of auxiliary electrodes distributed at intervals along the channel length direction.

[0008] According to one embodiment of the present application, the channel portion is at least partially curved.

[0009] According to one embodiment of the present application, the channel portion has a plurality of curved segments, and any two adjacent curved segments have different curvature directions.

[0010] According to one embodiment of the present application, each of the plurality of curved segments is provided with an auxiliary electrode.

[0011] According to one embodiment of the present application, the channel portion has at least two sub-channel portions spaced apart along the channel width direction.

[0012] According to one embodiment of the present application, two adjacent sub-channel portions are arranged parallel to or symmetrical with each other.

[0013] According to an embodiment of the present application, the thin film transistor further includes a source and a drain, and the auxiliary electrode is provided in the same layer as the source and the drain.

[0014] According to one embodiment of the present application, the thin film transistor includes a gate, and the auxiliary electrode is provided on a surface of the active layer closer to the gate or on a surface farther from the gate.

[0015] According to one embodiment of the present application, the material of the active layer is an oxide semiconductor or a silicon semiconductor. [Effects of the Invention]

[0016] The beneficial effects of the embodiments of the present application are as follows: The embodiments of the present application provide a display panel, the display panel including an electrostatic protection circuit, the electrostatic protection circuit including at least one thin film transistor, the thin film transistor including an active layer, the active layer having a channel portion, at least one auxiliary electrode is provided on the channel portion, and the auxiliary electrode is in direct contact with the channel portion, so that the added auxiliary electrode can improve the uniformity of plasma acting on the channel portion, thereby reducing the leakage current of the thin film transistor, and thereby improving the display quality of the display panel. [Brief explanation of the drawings]

[0017] [Figure 1] 1 is a partial schematic diagram of a display panel according to a first embodiment of the present invention; [Figure 2] 2 is a cross-sectional view taken along the line AA' of the display panel of the first embodiment shown in FIG. 1. FIG. [Figure 3] FIG. 10 is a partial schematic diagram of a display panel according to a second embodiment of the present invention; [Figure 4] FIG. 10 is a partial schematic diagram of a display panel according to a third embodiment of the present invention; [Figure 5] FIG. 10 is a partial schematic diagram of a display panel according to a fourth embodiment of the present invention; [Figure 6] FIG. 10 is a partial schematic diagram of a display panel according to a fifth embodiment of the present invention; [Figure 7] FIG. 10 is a cross-sectional view taken along the AA' direction of a display panel according to a sixth embodiment of the present invention; DETAILED DESCRIPTION OF THE INVENTION

[0018] The following description of each embodiment refers to the accompanying drawings to illustrate specific embodiments in which the present application can be implemented. Directional terms such as "upper," "lower," "front," "rear," "left," "right," "inner," "outer," and "side" used in the present application refer only to directions in the accompanying drawings. Therefore, the directional terms used are not intended to limit the present application, but are used to explain and understand the present application. In the drawings, units with similar structures are designated by the same reference numerals.

[0019] The present application will now be further described in conjunction with the accompanying drawings and specific examples.

[0020] The embodiments of the present application provide a display panel that can reduce the leakage current of the thin film transistor in the electrostatic protection circuit, thereby improving the display quality of the display panel.

[0021] 1 and 2, the display panel includes a substrate 10 and an electrostatic protection circuit provided on the substrate 10. In the embodiment of the present application, the display panel is a liquid crystal display panel, and the substrate 10 is a glass substrate.

[0022] Specifically, the display panel may be a liquid crystal display panel in a fringe field switching (FFS) mode, and the display panel may include a display area and a non-display area surrounding the display area, and the electrostatic protection circuit may be provided at the four corners surrounding the display area of ​​the non-display area and at the tip of the non-display area.

[0023] Furthermore, the electrostatic protection circuit includes at least one thin film transistor 20, the thin film transistor 20 includes an active layer 21, the active layer 21 has a source contact portion 211, a drain contact portion 212, and a channel portion 210, and the channel portion 210 is provided between the source contact portion 211 and the drain contact portion 212.

[0024] The thin film transistor 20 further includes a gate 22, a source 23, and a drain 24, the gate 22 being disposed on the substrate 10, the source 23 and the drain 24 being disposed on the side of the active layer 21 away from the gate 22, the source 23 contacting a source contact portion 211 of the active layer 21, and the drain 24 contacting a drain contact portion 212 of the active layer 21.

[0025] In addition, when the gate 22 is provided on the substrate 10, the gate 22 may be located above the substrate 10 and in direct contact with the substrate 10, or the gate 22 may be located above the substrate 10 but spaced apart from the substrate 10, with another film layer (e.g., a barrier layer, a buffer layer, etc.) separating the gate 22 from the substrate 10.

[0026] In the embodiment shown in FIG. 2 , the gate 22 is located above the substrate 10 and is in direct contact with the substrate 10, the gate insulating layer 11 is provided above the gate 22, the active layer 21 is provided on a surface of the gate insulating layer 11 remote from the gate 22, and the source 23 and the drain 24 are provided on a surface of the active layer 21 remote from the gate insulating layer 11.

[0027] Furthermore, at least one auxiliary electrode 30 is provided on the channel portion 210 , and the auxiliary electrode 30 is in direct contact with the channel portion 210 .

[0028] In one embodiment, the channel portion 210 is provided with a plurality of auxiliary electrodes 30 distributed at intervals along the channel length.

[0029] In the embodiments of the present application, the channel length direction is the first direction X shown in Fig. 1, the channel width direction is the second direction Y shown in Fig. 1, and the thickness direction of the display panel is the third direction Z shown in Fig. 2. In the embodiments of the present application, the first direction X is perpendicular to the second direction Y, and the third direction Z is perpendicular to the first direction X and the second direction Y, respectively. In actual applications, the first direction X and the second direction Y may intersect but not be perpendicular to each other, and are not limited to these directions.

[0030] 1, in a plane defined by the first direction X and the second direction Y, the channel portion 210 has a linear, elongated shape, and four auxiliary electrodes 30 are provided in the channel portion 210, and the four auxiliary electrodes 30 are distributed at intervals along the first direction X in the channel portion 210. The four auxiliary electrodes 30 are not connected to each other, and the auxiliary electrodes 30 are not connected to other signal wiring except for those in contact with the channel portion 210.

[0031] In one embodiment, the auxiliary electrodes 30 may be distributed at equal intervals along the first direction X in the channel portion 210 .

[0032] In one embodiment, the length of the auxiliary electrode 30 in the second direction Y is greater than the length of the channel portion 210, thereby increasing the contact area between the auxiliary electrode 30 and the channel portion 210, reducing the electrical resistance between the auxiliary electrode 30 and the channel portion 210, and ensuring that the auxiliary electrode 30 conducts adjacent short channels. In another embodiment, the length of the auxiliary electrode 30 in the second direction Y may be equal to the length of the channel portion 210.

[0033] As shown in FIG. 2, all four auxiliary electrodes 30 are located on the surface of the channel portion 210 away from the substrate 10 and are in direct contact with the channel portion 210. There is a notch between two adjacent auxiliary electrodes 30, which exposes a portion of the channel portion 210.

[0034] In this embodiment, the auxiliary electrode 30 is provided in the same layer as the source 23 and the drain 24, and the auxiliary electrode 30 may be manufactured and formed using the same metal film formation process as the source 23 and the drain 24.

[0035] In this embodiment, the material of the active layer is an oxide semiconductor. Specifically, the material of the active layer is indium gallium zinc oxide (IGZO). In another embodiment, the material of the active layer may be a silicon semiconductor such as amorphous silicon or polycrystalline silicon.

[0036] Taking FIG. 2 as an example, assuming that the auxiliary electrode 30 is not provided above the channel portion 210, after the source 23 and drain 24 are formed in the active layer 21, an insulating layer of silicon oxide material needs to be formed on the active layer 21, the source 23, and the drain 24 by chemical vapor deposition. Because the channel portion 210 is long, the plasma cannot act uniformly on each region of the channel portion 210 during the chemical vapor deposition process. This results in uneven oxygen replenishment in the channel portion 210, which is likely to cause a large leakage current in the thin film transistor, thereby affecting the display effect of the display panel.

[0037] In this embodiment, four auxiliary electrodes 30 are provided above the channel portion 210, which shield part of the surface of the channel portion 210 and divide the long channel portion 210 into five short channels, with the auxiliary electrodes 30 electrically connecting two adjacent short channels. In the subsequent chemical vapor deposition process, the plasma can act more uniformly on the five shorter short channels, making the oxygen replenishment to the short channels more uniform, thereby reducing the leakage current of the thin film transistor and thereby improving the display effect of the display panel and the protection effect of the electrostatic protection circuit.

[0038] In practical applications, the number of auxiliary electrodes 30 provided above the channel portion 210 may be set according to the channel length of the channel portion 210, and is not limited to four as in the above embodiment, and one, two, three or more auxiliary electrodes 30 may be set in the channel portion 210.

[0039] In one embodiment, the channel portion 210 is at least partially curved.

[0040] As shown in Figure 3, the structure of the display panel of the second embodiment shown in Figure 3 is almost the same as the structure of the display panel of the first embodiment shown in Figure 1, with the following differences: the channel portion 210 in the display panel of the second embodiment shown in Figure 3 has a plurality of curved segments 2101, and any two adjacent curved segments 2101 have different curvature directions, one of the two adjacent curved segments 2101 protrudes along the second direction Y and the other protrudes along the direction opposite to the second direction Y, and the multiple curved segments 2101 are sequentially connected to form the wavy channel portion 210.

[0041] Compared with the embodiment shown in FIG. 1, the embodiment shown in FIG. 3 curves at least a portion of the channel portion 210 without increasing the size of the thin film transistor, thereby increasing the channel length of the thin film transistor and improving the impedance of the thin film transistor, thereby further reducing the leakage current of the thin film transistor, further improving the display effect of the display panel, and also improving the protection effect of the electrostatic protection circuit.

[0042] Furthermore, each of the plurality of curved segments 2101 is provided with one auxiliary electrode 30 .

[0043] As shown in FIG. 3, the channel portion 210 has four curved segments 2101 connected in series, and one auxiliary electrode 30 is provided above the central region of each curved segment 2101.

[0044] In one embodiment, the channel portion 210 has at least two sub-channel portions, which are spaced apart in the channel width direction.

[0045] As shown in Fig. 4, the structure of the display panel of the third embodiment shown in Fig. 4 is almost the same as the structure of the display panel of the first embodiment shown in Fig. 1, with the following differences: The channel portion 210 in the display panel of the third embodiment shown in Fig. 4 has two sub-channel portions, namely a first sub-channel portion 2102 and a second sub-channel portion 2103, each of which has a linear, elongated shape, is spaced apart from the first sub-channel portion 2102 in the second direction Y, and is parallel to the second sub-channel portion 2103.

[0046] A first end of the first sub-channel portion 2102 and a first end of the second sub-channel portion 2103 are connected to the same source contact portion, and a second end of the first sub-channel portion 2102 and a second end of the second sub-channel portion 2103 are connected to the same drain contact portion.

[0047] Compared to the embodiment shown in FIG. 1, the embodiment shown in FIG. 4 divides the channel portion 210 into two sub-channel portions spaced apart from each other in the channel width direction, thereby reducing the channel width of the channel portion 210, thereby reducing the risk of device failure due to heat accumulation caused by large static voltages or large currents.

[0048] In one embodiment, the widths of the first sub-channel portion 2102 and the second sub-channel portion 2103 in the second direction Y are equal.

[0049] In practical applications, the channel portion 210 may be divided into two sub-channel portions as in the above embodiment, or into three or more sub-channel portions spaced apart from each other, which can also achieve technical effects similar to those of the above embodiment, and is not limited thereto.

[0050] As shown in Fig. 5, the structure of the display panel of the fourth embodiment shown in Fig. 5 is almost the same as the structure of the display panel of the third embodiment shown in Fig. 4, with the following differences: In the display panel of the fourth embodiment shown in Fig. 5, the auxiliary electrode 30 spans at least two adjacent sub-channel portions.

[0051] 5, a plurality of auxiliary electrodes 30 are disposed above the channel portion 210, and each of the auxiliary electrodes 30 spans over the first sub-channel portion 2102 and the second sub-channel portion 2103, and electrically connects the first sub-channel portion 2102 to the second sub-channel portion 2103. This structure not only reduces the risk of thermal breakdown of the device due to high voltage or current, but also improves the uniformity of plasma acting on the channel portion 210 in subsequent processes, thereby reducing the leakage current of the thin film transistor, improving the display effect of the display panel, and improving the protection effect of the electrostatic protection circuit.

[0052] In other embodiments, multiple auxiliary electrodes may be provided in different sub-channel portions, and the auxiliary electrodes on the different sub-channel portions may be spaced apart. For example, multiple auxiliary electrodes 30 may be provided in the first sub-channel portion 2102 and the second sub-channel portion 2103, respectively, and the auxiliary electrodes 30 on the first sub-channel portion 2102 are not connected to the auxiliary electrodes 30 on the second sub-channel portion 2103.

[0053] In one embodiment, two adjacent sub-channel portions are arranged symmetrically with respect to each other.

[0054] As shown in Fig. 6, the structure of the display panel of the fifth embodiment shown in Fig. 6 is almost the same as the structure of the display panel of the fourth embodiment shown in Fig. 5, with the following differences: all of the sub-channel portions in the display panel of the fourth embodiment shown in Fig. 5 are linear and elongated, while at least a portion of the sub-channel portions in the display panel of the fifth embodiment shown in Fig. 6 are curved.

[0055] In the embodiment shown in Figure 6, the channel portion 210 includes a first sub-channel portion 2102 and a second sub-channel portion 2103, which are spaced apart from each other in the second direction Y, and each of the first sub-channel portion 2102 and the second sub-channel portion 2103 includes a plurality of curved segments, and the curvature direction of any curved segment in the first sub-channel portion 2102 is opposite to the curvature direction of the corresponding curved segment in the second sub-channel portion 2103, so that the first sub-channel portion 2102 and the second sub-channel portion 2103 are arranged symmetrically to each other.

[0056] As shown in Fig. 7, the structure of the display panel of the sixth embodiment shown in Fig. 7 is almost the same as the structure of the display panel of the first embodiment shown in Fig. 1 and Fig. 2, with the following differences: the display panel of the first embodiment shown in Fig. 1 and Fig. 2 has a bottom gate structure, while the display panel shown in Fig. 7 has a top gate structure, and an auxiliary electrode 30 is provided on the surface of the active layer 21 close to the gate 22.

[0057] Specifically, in the embodiment shown in FIG. 7 , the active layer 21 is located above the substrate 10 and is in direct contact with the substrate 10, the source 23, the drain 24 and the auxiliary electrode 30 are provided on a surface of the active layer 21 remote from the substrate 10, the gate insulating layer 11 is provided on a surface of the source 23, the drain 24 and the auxiliary electrode 30 remote from the substrate 10, and the gate 22 is provided on a surface of the gate insulating layer 11 remote from the substrate 10.

[0058] It should be noted that the electrostatic protection circuit in the embodiments of the present application may have one or more thin film transistors, and when the electrostatic protection circuit has multiple thin film transistors, the structure of the multiple thin film transistors may be the same as the structure of the thin film transistor 20 in the embodiments of the present application. The circuit structure of the electrostatic protection circuit in the embodiments of the present application may refer to the circuit structure of a conventional electrostatic protection circuit and is not limited thereto.

[0059] The beneficial effects of the embodiments of the present application are as follows: The embodiments of the present application provide a display panel, the display panel including an electrostatic protection circuit, the electrostatic protection circuit including at least one thin film transistor, the thin film transistor including an active layer, the active layer having a channel portion, at least one auxiliary electrode is provided on the channel portion, and the auxiliary electrode is in direct contact with the channel portion, so that the added auxiliary electrode can improve the uniformity of plasma acting on the channel portion, thereby reducing the leakage current of the thin film transistor, and thereby improving the display quality of the display panel.

[0060] In summary, although the present application has been disclosed above with preferred embodiments, the above preferred embodiments are not intended to limit the present application, and those skilled in the art can make various changes and modifications without departing from the spirit and scope of the present application, and therefore the scope of protection of the present application shall be based on the scope defined in the claims.

Claims

1. A display panel including an electrostatic protection circuit, the electrostatic protection circuit including at least one thin film transistor, the thin film transistor including an active layer, the active layer having a channel portion; At least one auxiliary electrode is provided on the channel portion, and the auxiliary electrode is in direct contact with the channel portion; the channel portion is at least partially curved; The channel portion has a plurality of curved segments, and any two adjacent curved segments have different curvature directions; A display panel, wherein each of the plurality of curved segments is provided with an auxiliary electrode.

2. 2. The display panel according to claim 1, wherein the thin film transistor further includes a source and a drain, and the auxiliary electrode is provided in the same layer as the source and the drain.

3. 2. The display panel according to claim 1, wherein the thin film transistor includes a gate, and the auxiliary electrode is provided on a surface of the active layer close to the gate or on a surface far from the gate.

4. 2. The display panel according to claim 1, wherein the material of the active layer is an oxide semiconductor or a silicon semiconductor.

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