Display substrate and manufacturing method thereof, display device

Abstract

A display substrate, its manufacturing method, and a display device, the display substrate comprising a base (10), at least one insulating film layer provided on the base (10), and a first electrode provided on a side of the insulating film layer away from the base (10), wherein a concave-convex structure is provided on the side of the at least one insulating film layer away from the base (10), and an overlapping region is formed between an orthogonal projection of the concave-convex structure on the base (10) and an orthogonal projection of the first electrode on the base (10).

Description

[Technical Field]

[0001] TECHNICAL FIELD The embodiments of the present disclosure relate to, but are not limited to, the display technology field, and more particularly to a display substrate and a manufacturing method thereof, and a display device. [Background technology]

[0002] Organic Light Emitting Diodes (OLEDs) are active light-emitting display elements that have the advantages of being luminous, ultra-thin, wide viewing angle, high brightness, high contrast, low power consumption, and extremely fast response speed. Depending on the driving method, OLEDs can be divided into two types: passive matrix (PM) type and active matrix (AM) type. AMOLEDs are current drivers that use independent thin film transistors (TFTs) to control each sub-pixel, allowing each sub-pixel to emit light continuously and independently. Summary of the Invention

[0003] The following is a general overview of the subject matter discussed in detail in the text, which is not intended to limit the scope of protection of the claims.

[0004] An embodiment of the present disclosure provides a display substrate, comprising: a base; at least one insulating film layer provided on the base; and a first electrode provided on a side of the insulating film layer away from the base, wherein a concave-convex structure is provided on the side of the at least one insulating film layer away from the base, and an orthogonal projection of the concave-convex structure on the base and an orthogonal projection of the first electrode on the base have an overlapping region.

[0005] In an exemplary embodiment, the display substrate includes a planar layer, a light-emitting structure layer, a package layer, and a color filter layer, which are sequentially formed on the base, the light-emitting structure layer including a pixel definition layer, an anode, a cathode, and an organic light-emitting layer located between the anode and the cathode, the pixel definition layer including a plurality of pixel openings, the pixel openings exposing at least a portion of the anode, and the cathode covering the pixel definition layer; The color filter layer comprises a black matrix and color filters arranged at intervals, the black matrix having a plurality of opening areas arranged in a matrix, at least a portion of the color filters being filled in the opening areas, the color filters and the black matrix having at least a partial overlap area, and the color filters covering the black matrix in the overlap area.

[0006] In an exemplary embodiment, at least one of the insulating film layers comprises the pixel defining layer and the first electrode comprises the cathode.

[0007] In an exemplary embodiment, the pixel definition layer includes a plurality of first raised portions, and first recesses are formed between adjacent first raised portions.

[0008] In an exemplary embodiment, the first recess is a groove surrounding the pixel opening, and the distance between adjacent grooves is 1 / 8 to 7 / 8 of the distance between the edge of the opening region of the black matrix and the edge of the pixel opening formed in the pixel definition layer.

[0009] In an exemplary embodiment, the distance between adjacent grooves is 1 to 2 micrometers.

[0010] In an exemplary embodiment, the width of the groove is 0.8 to 1.5 micrometers.

[0011] In an exemplary embodiment, the first recess is an opening surrounding the pixel opening, and the opening has a width of 0.5 to 1.8 micrometers.

[0012] In an exemplary embodiment, the plurality of apertures constitute a plurality of annular structural units, at least one of which comprises N annular structures arranged around the pixel opening and parallel to each other, the innermost annular structure comprising a plurality of first apertures, the first apertures and the pixel opening being adjacent to each other, and N being a natural number greater than 1.

[0013] In an exemplary embodiment, sawtooth protrusions are formed between the first apertures, and the width of the sawtooth protrusions is 0.8 to 1.5 micrometers.

[0014] In an exemplary embodiment, N is a natural number between 1 and 50.

[0015] In an exemplary embodiment, at least one of the insulating film layers comprises the planarization layer and the first electrode comprises the anode.

[0016] In an exemplary embodiment, the flat layer includes a plurality of second raised portions, and second recesses are formed between adjacent second raised portions.

[0017] In an exemplary embodiment, the second protrusion is saw-toothed.

[0018] In an exemplary embodiment, the step between the second protruding portion and the second recessed portion is 1 / 8 to 7 / 8 of the thickness of the flat layer.

[0019] In an exemplary embodiment, the step between the second protrusion and the second recess is 0.2 to 0.8 micrometers.

[0020] In an exemplary embodiment, at least one of the insulating film layers comprises the pixel definition layer and the planar layer, the first electrode comprises the cathode and the anode, a first uneven structure is provided on a side of the pixel definition layer away from the base, and a normal projection of the first uneven structure on the base and a normal projection of the cathode on the base have an overlapping area, and a second uneven structure is provided on a side of the planar layer away from the base, and a normal projection of the second uneven structure on the base and a normal projection of the anode on the base have an overlapping area.

[0021] In an exemplary embodiment, the display substrate further comprises a touch structure layer disposed between the package layer and the color filter layer, the touch structure layer comprising a plurality of touch electrodes, and the orthogonal projection of the black matrix on the base comprises the orthogonal projection of the touch electrodes on the base.

[0022] An embodiment of the present disclosure further provides a display device, comprising any one of the display substrates described above.

[0023] An embodiment of the present disclosure provides a method for manufacturing a display substrate, including forming at least one insulating film layer on a base, providing a concave-convex structure on a side of the at least one insulating film layer away from the base, and forming a first electrode on a side of the insulating film layer away from the base, wherein a normal projection of the concave-convex structure on the base and a normal projection of the first electrode on the base have an overlapping area.

[0024] Other aspects may be understood after reading and understanding the accompanying drawings and detailed description. [Brief explanation of the drawings]

[0025] The drawings are intended to facilitate a better understanding of the technical solutions of the present disclosure, constitute a part of the specification, and are used to explain the technical solutions of the present disclosure together with the embodiments of the present disclosure, but are not intended to limit the technical solutions of the present disclosure. The shapes and sizes of the components in the drawings do not reflect actual scale, and are intended only to schematically explain the contents of the present disclosure.

[0026] [Figure 1] FIG. 1 is a structural schematic diagram of a display device. [Figure 2] FIG. 2 is a schematic plan view of the display substrate. [Figure 3] 3a and 3b are schematic diagrams of the two color separation phenomena. [Figure 4] FIG. 4 is a structural schematic diagram of a display substrate according to an embodiment of the present disclosure. [Figure 5]5a and 5b are schematic illustrations of the results after improved color separation according to the present disclosure. [Figure 6] FIG. 6 is a schematic diagram of a display substrate structure after a flexible base pattern is fabricated according to an embodiment of the present disclosure. [Figure 7] FIG. 7 is a schematic diagram of a display substrate structure after a driving structure layer pattern is fabricated according to an embodiment of the present disclosure. [Figure 8] FIG. 8 is a schematic diagram of a display substrate structure after a flat layer pattern is formed according to an embodiment of the present disclosure. [Figure 9] FIG. 9 is a schematic diagram of a display substrate structure after an anode pattern is formed according to an embodiment of the present disclosure. [Figure 10] FIG. 10 is a schematic diagram of a display substrate structure after a pixel definition layer pattern is formed according to an embodiment of the present disclosure. [Figure 11] FIG. 11 is a structural schematic diagram of a pixel definition layer according to an embodiment of the present disclosure. [Figure 12] FIG. 12 is a structural schematic diagram of a pixel definition layer according to an embodiment of the present disclosure. [Figure 13] FIG. 13 is a schematic diagram of a display substrate structure after a spacer layer pattern is formed according to an embodiment of the present disclosure. [Figure 14] FIG. 14 is a schematic diagram of a display substrate structure after a cathode pattern is formed according to an embodiment of the present disclosure. [Figure 15] FIG. 15 is a schematic diagram of a display substrate structure after a package layer pattern is formed according to an embodiment of the present disclosure. [Figure 16] FIG. 16 is a schematic diagram of a display substrate structure after a touch structure layer pattern is formed according to an embodiment of the present disclosure. [Figure 17] FIG. 17 is a schematic diagram of a display substrate structure after a color filter layer pattern is formed according to an embodiment of the present disclosure. [Figure 18] FIG. 18 is a schematic diagram of a display substrate structure after a cover plate is attached according to an embodiment of the present disclosure. [Figure 19] FIG. 19 is a structural schematic diagram of a test model of color separation optical improvement according to an embodiment of the present disclosure. [Figure 20a] FIG. 20a is a schematic diagram showing the simulation results when the incident light in FIG. 19 is along the major axis direction of the color filter. [Figure 20b] FIG. 20b is a schematic diagram showing the simulation results when the incident light in FIG. 19 is along the major axis direction of the color filter. [Figure 21a] FIG. 21a is a schematic diagram showing the simulation results when the incident light in FIG. 19 is along the minor axis direction of the color filter. [Figure 21b] FIG. 21b is a schematic diagram showing the simulation results when the incident light in FIG. 19 is along the minor axis direction of the color filter. DETAILED DESCRIPTION OF THE INVENTION

[0027] To clarify the objectives, technical solutions, and advantages of the present disclosure, the following detailed description of the embodiments of the present disclosure is provided with reference to the accompanying drawings. The embodiments may be implemented in a variety of different forms. As those skilled in the art can readily understand, the manner and content may be transformed into various forms without departing from the spirit and scope of the present disclosure. Therefore, the present disclosure should not be construed as being limited to the content described in the following embodiments. Unless there is a conflict, the embodiments and features of the embodiments in the present disclosure may be arbitrarily combined.

[0028] The proportions in the drawings in this disclosure may be used as a reference for actual processes, but are not limited thereto. For example, the aspect ratio of the channel, the thickness and pitch of each film layer, and the width and pitch of each signal line may be adjusted according to actual needs. The number of pixels on the display substrate and the number of subpixels in each pixel are not limited to the numbers shown in the drawings. The drawings in this disclosure are structural schematics, and the methods of this disclosure are not limited to the shapes or values ​​shown in the drawings.

[0029] In this specification, ordinal numbers such as "first," "second," and "third" are used to avoid confusion of elements and are not intended to limit the number of elements.

[0030] For convenience, the present specification uses terms indicating orientations or positional relationships, such as "middle," "upper," "lower," "front," "rear," "vertical," "horizontal," "top," "bottom," "inner," and "outer," to describe the positional relationships of components with reference to the drawings. However, these terms are merely for the purpose of simplifying the description of the specification and do not explicitly or implicitly indicate that the indicated devices or elements necessarily have a specific orientation or are constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present disclosure. The positional relationships of components are appropriately changed depending on the direction in which each component is described. Therefore, no limitation is imposed on the terms described in the specification, and they can be appropriately substituted depending on the situation.

[0031] In this specification, unless otherwise clearly specified or limited, the terms "attached" and "connected" should be understood in a broad sense. For example, they may mean fixedly connected, detachably connected, or integrally connected, may be mechanically connected or electrically connected, may be directly connected, may be indirectly connected via an intermediate member, or may be in communication within two elements. Those skilled in the art can understand the specific meanings of the above terms in the present disclosure depending on the specific circumstances.

[0032] In this specification, a transistor refers to an element having at least three terminals: a gate electrode, a drain electrode, and a source electrode. A transistor has a channel region between a drain electrode (drain electrode terminal, drain region, or drain electrode) and a source electrode (source electrode terminal, source region, or source electrode), and current can flow through the drain electrode, channel region, and source electrode. However, in this specification, the channel region refers to a region through which current mainly flows.

[0033] In this specification, the first electrode may be a drain electrode and the second electrode may be a source electrode, or the first electrode may be a source electrode and the second electrode may be a drain electrode. When a transistor with reversed polarity is used, or when the current direction changes during circuit operation, the functions of a "source electrode" and a "drain electrode" may be interchangeable. Therefore, in this specification, the terms "source electrode" and "drain electrode" are interchangeable, and the terms "source terminal" and "drain terminal" are interchangeable.

[0034] In this specification, "electrical connection" includes cases where components are connected via an element having some electrical function. The "element having some electrical function" is not particularly limited as long as it can transmit and receive electrical signals between the connected components. Examples of the "element having some electrical function" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other elements having various functions.

[0035] In this specification, "parallel" refers to a state in which the angle between two lines is -10° or more and 10° or less, and therefore also includes a state in which the angle is -5° or more and 5° or less. "Perpendicular" refers to a state in which the angle between two lines is 80° or more and 100° or less, and therefore also includes a state in which the angle is 85° or more and 95° or less.

[0036] In this specification, the terms "film" and "layer" can be used interchangeably. For example, a "conductive layer" can be substituted with a "conductive film" in some cases. Similarly, an "insulating film" can be substituted with an "insulating layer" in some cases.

[0037] The terms "triangle, rectangle, trapezoid, pentagon, hexagon, etc." used in this specification are not intended to be strict and may be approximate triangle, rectangle, trapezoid, pentagon, hexagon, etc., and may have small deformations due to tolerances, chamfers, arc edges, deformations, etc.

[0038] In this disclosure, "about" refers to not strictly limiting the limits but allowing for numerical values ​​within the error range of process and measurement.

[0039] FIG. 1 is a structural schematic diagram of a display device. As shown in FIG. 1, the display device may include a timing controller, a data signal driver, a scan signal driver, and a pixel array. The timing controller is connected to the data signal driver and the scan signal driver, respectively. The data signal drivers are connected to a plurality of data signal lines (D1 to Dn), and the scan signal drivers are connected to a plurality of scan signal lines (S1 to Sm). The pixel array may include a plurality of sub-pixels Pxij, where i and j may be natural numbers. At least one sub-pixel Pxij may include a circuit unit and a light-emitting element connected to the circuit unit. The circuit unit may include at least one scan signal line, at least one data signal line, and a pixel driving circuit. In some exemplary embodiments, the timing controller may provide grayscale values ​​and control signals conforming to the specifications of the data signal driver to the data signal driver, and may provide clock signals, scan start signals, etc. conforming to the specifications of the scan signal driver to the scan signal driver. The data signal driver may generate data voltages to be provided to the data signal lines D1, D2, D3, ..., and Dn using the grayscale values ​​and control signals received from the timing controller. For example, the data signal driver may sample grayscale values ​​using a clock signal and apply data voltages corresponding to the grayscale values ​​to the data signal lines D1 to Dn in units of pixel rows, where n may be a natural number. The scan signal driver may receive a clock signal, a scan start signal, etc. from a timing controller to generate scan signals to be provided to the scan signal lines S1, S2, S3, ..., and Sm. For example, the scan signal driver may sequentially provide scan signals having an on-level pulse to the scan signal lines S1 to Sm. For example, the scan signal driver may be configured in the form of a shift register and may generate scan signals such that the scan start signal provided in the form of an on-level pulse is sequentially transmitted to the next circuit under the control of the clock signal, where m may be a natural number.

[0040] 2 is a schematic diagram showing the planar structure of a display substrate. As shown in FIG. 2, the display substrate may include a plurality of pixel units P arranged in a matrix, at least one of which includes a first sub-pixel P1 emitting a first color light, a second sub-pixel P2 emitting a second color light, a third sub-pixel P3 emitting a third color light, and a fourth sub-pixel P4 emitting a fourth color light. Each of the four sub-pixels may include a circuit unit and a light-emitting element. The circuit unit may include scanning signal lines, data signal lines, and a pixel driving circuit. The pixel driving circuits are connected to the scanning signal lines and the data signal lines, respectively. The pixel driving circuits are configured to receive data voltages transmitted from the data signal lines under the control of the scanning signal lines and output corresponding currents to the light-emitting elements. The light-emitting elements of each sub-pixel are connected to the pixel driving circuit of the corresponding sub-pixel, and the light-emitting elements are configured to emit light of a corresponding brightness in response to the current output from the pixel driving circuit of the corresponding sub-pixel.

[0041] In some exemplary embodiments, the first sub-pixel P1 may be a red sub-pixel (R) that emits red light, the second sub-pixel P2 may be a green sub-pixel (G) that emits green light, the third sub-pixel P3 may be a white sub-pixel (W) that emits white light, and the fourth sub-pixel P4 may be a blue sub-pixel (B) that emits blue light.

[0042] In some exemplary embodiments, the shape of the sub-pixel may be rectangular, diamond, pentagonal, or hexagonal. In one exemplary embodiment, the four sub-pixels may be arranged in a horizontal parallel manner to form a RWBG pixel array. In other exemplary embodiments, the four sub-pixels may be arranged in a square, diamond, vertical parallel manner, etc., and the present disclosure is not limited thereto.

[0043] In some other exemplary embodiments, at least one of the plurality of pixel units P may include one red (R) subpixel emitting red light, one green (G) subpixel emitting green light, and one blue (B) subpixel emitting blue light, or one red subpixel emitting red light, two green subpixels emitting green light, and one blue subpixel emitting blue light, although the present disclosure is not limited thereto. If the pixel unit includes three subpixels, the three subpixels may be arranged in a horizontal parallel, vertical parallel, or square manner, and if the pixel unit includes four subpixels, the four subpixels may be arranged in a horizontal parallel, vertical parallel, or square manner, although the present disclosure is not limited thereto.

[0044] In some exemplary embodiments, a plurality of sub-pixels arranged sequentially in the horizontal direction are referred to as a pixel row, and a plurality of sub-pixels arranged sequentially in the vertical direction are referred to as a pixel column, and the plurality of pixel rows and the plurality of pixel columns form an array of pixels.

[0045] Currently, the most prominent feature of OLED panels compared to liquid crystal displays (LCDs) is their all-solid-state display (no liquid crystals), which offers clear advantages in bending and folding capabilities. To improve the folding performance of OLED products, module thickness must be continually reduced. However, the anti-reflection circular polarizer and laminated touch module account for a significant portion of the overall thickness. To address this issue, methods of integrating the touch and color filter structures into the OLED packaging layer—namely, touch-on-thin-film-packaging (TOT) technology and color resistive (COE) technology—have been adopted, significantly reducing module thickness. However, COE technology suffers from the problem of color separation in the dark. When the screen is off, as shown in Figures 3a and 3b, there is obvious color separation of reflected light under light source illumination, affecting the user's experience of a completely black screen.

[0046] Through analysis and verification, it was found that the main reason for the color separation phenomenon in the dark state is that after the circular polarizer is removed, the ambient light passes through the red, green, and blue pixel reflections and the directional reflections of the light from the cathode and anode, and the intensity distribution is changed to different degrees.Some techniques to improve the color separation phenomenon involve scattering light by doping scattering particles into the coating protective layer (OC), but the introduction of scattering particles reduces the light transmittance, thereby losing the advantage of the high transmittance of the COE.

[0047] An embodiment of the present disclosure provides a display substrate, comprising: a base; at least one insulating film layer provided on the base; and a first electrode provided on a side of the insulating film layer away from the base, wherein a concave-convex structure is provided on the side of the at least one insulating film layer away from the base, and an orthogonal projection of the concave-convex structure on the base and an orthogonal projection of the first electrode on the base have an overlapping region.

[0048] The display substrate according to the embodiment of the present disclosure improves the color separation phenomenon by processing at least one insulating film layer at a position opposite to the first electrode to form a concave-convex structure, interfering with the path of ambient light reflection and destroying the emission of ambient light. Moreover, the manufacturing process of the display substrate according to the present disclosure has advantages such as a simple manufacturing process, high production efficiency, low production cost, and high yield rate, and has good prospects for application.

[0049] FIG. 4 is a cross-sectional structural schematic diagram of a display substrate according to an embodiment of the present disclosure. As shown in FIG. 4, the display substrate according to the embodiment of the present disclosure includes a base, a flat layer 95 and a light-emitting structure layer sequentially formed on the base, the light-emitting structure layer including an anode 51, at least one insulating film layer including the flat layer 95, and a first electrode including the anode 51. A second relief structure is provided on the side of the flat layer 95 away from the base, and the orthogonal projection of the second relief structure at the base and the orthogonal projection of the anode 51 at the base have an overlapping region.

[0050] In the display substrate according to this embodiment, the flat layer 95 opposite the anode 51 is processed to have a gentle undulation, so that the anode 51 forms a certain degree of undulation wave shape, i.e., forms a diffuse reflective anode, interferes with the path of ambient light reflection, disrupts the emission of ambient light, and improves the color separation phenomenon. As shown in Figures 5a and 5b, the display substrate according to the embodiment of the present disclosure significantly reduces the color separation phenomenon and can maintain good black color even under strong light irradiation in a dark state. User experience tests have shown that this is an obvious effect.

[0051] In some exemplary embodiments, the second relief structure includes a plurality of second raised portions, and second recessed portions are formed between adjacent second raised portions.

[0052] In some exemplary embodiments, the second protrusion may be sawtooth.

[0053] In some exemplary embodiments, the step between the second raised portion and the second recessed portion may be 0.2 to 0.8 micrometers.

[0054] In some exemplary embodiments, the light-emitting structure layer further comprises a pixel definition layer 96, the pixel definition layer 96 comprising a plurality of pixel openings, the pixel openings exposing the anode 51, and a first uneven structure provided on a side of the pixel definition layer 96 away from the base.

[0055] In this embodiment, at least one insulating film layer comprises a pixel defining layer 96, and the first electrode comprises a cathode. The pixel defining layer 96 is also processed to have a gently undulating shape, so that the pixel defining layer 96 has an uneven shape. As a result, when the cathode is evaporated, the cathode also has an uneven shape. That is, a scattering cathode surface is formed, which interferes with the reflection path of the ambient light and destroys the emission of the ambient light, thereby further improving the color separation phenomenon.

[0056] In some exemplary embodiments, the first relief structure includes a plurality of first raised portions, and first recessed portions are formed between adjacent first raised portions.

[0057] In some exemplary embodiments, the first recess is a groove surrounding the pixel opening, the width of the groove is 0.8 to 1.5 micrometers, and the distance between adjacent grooves is 1 to 2 micrometers.

[0058] In some exemplary embodiments, the distance between adjacent grooves is 1 / 8 to 7 / 8 of the distance between the edge of the opening area of ​​the black matrix and the edge of the pixel opening formed in the pixel definition layer.

[0059] In some other exemplary embodiments, the first recess is an aperture surrounding the pixel opening, and the aperture has a width of 0.5 to 1.8 micrometers.

[0060] In some exemplary embodiments, the plurality of apertures form a plurality of annular structural units, each annular structural unit including N annular structures arranged around a pixel aperture and parallel to each other, the innermost annular structure including a plurality of first apertures, the first apertures being adjacent to the pixel aperture, sawtooth protrusions being formed between the plurality of first apertures, the width of each sawtooth protrusion being 0.8 to 1.5 micrometers, and N being a natural number greater than 1.

[0061] In some exemplary embodiments, N is a natural number between 1 and 50.

[0062] In some example embodiments, N is three.

[0063] In some exemplary embodiments, the light-emitting structure layer further includes an organic light-emitting layer 52 and a cathode 53, the organic light-emitting layer 52 is disposed on the anode 51, the cathode 53 is disposed on the organic light-emitting layer 52, the organic light-emitting layer 52 and the anode 51 are connected, and the cathode 53 and the organic light-emitting layer 52 are connected, and the organic light-emitting layer 52 emits light of a corresponding color under the driving of the anode 51 and the cathode 53. The organic light-emitting layer 52 and the cathode 53 have uneven surfaces at positions corresponding to the first uneven structure and / or the second uneven structure.

[0064] In some exemplary embodiments, the organic light-emitting layer 52 may include a stacked hole-injection layer (HIL), a hole-transport layer (HTL), an electron-blocking layer (EBL), an emissive layer (EML), a hole-blocking layer (HBL), an electron-transport layer (ETL), and an electron-injection layer (EIL). In some exemplary embodiments, the hole-injection layer, the hole-transport layer, the electron-blocking layer, the hole-blocking layer, the electron-transport layer, and the electron-injection layer of all subpixels may be a common layer connected to each other, and the light-emitting layers of all subpixels may be a common layer connected to each other or may be separated from each other, and the light-emitting layers of adjacent subpixels may have a small amount of overlap. In some possible implementations, the display substrate may include other film layers, and the present disclosure is not limited in this regard.

[0065] In some exemplary embodiments, the display substrate further includes a package layer 98 disposed on a side of the light-emitting structure layer away from the base. The package layer 98 may include a first package layer, a second package layer, and a third package layer stacked together, where the first package layer and the third package layer may be made of inorganic materials, and the second package layer may be made of organic materials, and the second package layer is disposed between the first package layer and the third package layer to ensure that external water vapor cannot enter the light-emitting structure layer.

[0066] In some exemplary embodiments, the base includes a base 10 and a driving structure layer 102 disposed on the base 10. The base 10 may be a flexible base or a rigid base. The driving structure layer 102 of each subpixel may include a pixel driving circuit consisting of a plurality of transistors and a storage capacitor. The anode 51 is connected to a first thin film transistor in the driving structure layer through a via disposed in the planar layer 95.

[0067] 4, the display substrate further includes a color filter layer disposed on the side of the package layer 98 away from the base, the color filter layer including a black matrix 71 and a color filter 72 spaced apart from each other, the black matrix 71 having a plurality of opening areas arranged in a matrix, and the color filter 72 filling the opening areas. In some exemplary embodiments, the color filter 72 and the black matrix 71 have at least a partial overlapping area. In the overlapping area between the black matrix 71 and the color filter 72, the color filter 72 covers the black matrix 71.

[0068] In some exemplary embodiments, the display substrate further comprises a touch structure layer 103 disposed between the package layer 98 and the color filter layer, and the touch structure layer 103 may comprise a plurality of touch electrodes, and the orthogonal projection at the base of the black matrix 71 includes the orthogonal projection at the base of the touch electrodes.

[0069] Next, the display of this embodiment substrateThe technical solution of this embodiment will be further explained through the manufacturing process of the present invention. The "patterning process" referred to in this embodiment includes processes such as film layer deposition, photoresist coating, mask exposure, development, etching, and photoresist stripping. The "photolithography process" referred to in this embodiment includes processes such as film layer coating, mask exposure, and development, and is a mature manufacturing process in the relevant technology. Deposition can be any one or more of sputtering, evaporation, and chemical vapor deposition; coating can be any one or more of spray coating and spin coating; and etching can be any one or more of dry etching and wet etching. A "thin film" refers to a layer of a thin film fabricated by a deposition or coating process based on a certain material. If the "thin film" does not require a patterning process during the entire manufacturing process, the "thin film" may also be referred to as a "layer." If the "thin film" requires a patterning process during the entire manufacturing process, it is referred to as a "thin film" before the patterning process and as a "layer" after the patterning process. After the patterning process, a "layer" contains at least one "pattern." In this disclosure, "arranging A and B in the same layer" refers to forming A and B simultaneously through the same patterning process. "The orthogonal projection of A includes the orthogonal projection of B" refers to the orthogonal projection of B being within the range of the orthogonal projection of A, or the orthogonal projection of A covering the orthogonal projection of B.

[0070] In some exemplary embodiments, the manufacturing process of the display substrate of FIG. 4 may include the following steps (1) to (12).

[0071] (1) A flexible base 10 is manufactured on a glass substrate 1.

[0072] In one embodiment of the present disclosure, the flexible base 10 may have a two-layer flexible layer structure, and the flexible base 10 includes a first flexible material layer, a first inorganic material layer, a semiconductor layer, a second flexible material layer, and a second inorganic material layer laminated on a glass substrate 1. The first and second flexible material layers may be made of materials such as polyimide (PI), polyethylene terephthalate (PET), or a surface-treated polymer film, and the first and second inorganic material layers may be made of materials such as silicon nitride (SiNx) or silicon oxide (SiOx), which are used to enhance the water and oxygen resistance of the base. The first and second inorganic material layers are also called barrier layers, and the semiconductor layer may be made of amorphous silicon (a-Si).

[0073] In some exemplary embodiments, taking the laminated structure PI1 / Barrier1 / a-Si / PI2 / Barrier2 as an example, the manufacturing process of the flexible base 10 may include: first coating one layer of polyimide on the glass substrate 1, and curing and forming a film to form a first flexible (PI1) layer, as shown in FIG. 6 ; then depositing one layer of barrier thin film on the first flexible layer to form a first barrier (Barrier1) layer covering the first flexible layer; then depositing one layer of amorphous silicon thin film on the first barrier layer to form an amorphous silicon (a-Si) layer covering the first barrier layer; then coating another layer of polyimide on the amorphous silicon layer, and curing and forming a film to form a second flexible (PI2) layer; then depositing one layer of barrier thin film on the second flexible layer to form a second barrier (Barrier2) layer covering the second flexible layer, thereby completing the manufacturing of the flexible base 10.

[0074] In another example, the flexible base 10 may adopt a single flexible layer structure, for example, the flexible base 10 includes a laminated flexible (PI) layer and a barrier layer.

[0075] (2) A pattern of the driving structure layer 102 is fabricated on the flexible base 10. The driving structure layer includes a plurality of gate lines and a plurality of data lines, which intersect perpendicularly to define a plurality of pixel units arranged in a matrix. Each pixel unit includes at least three sub-pixels, at least one of which includes at least one first thin film transistor (TFT). (In one possible embodiment, in the camera area under the screen, at least one sub-pixel does not include a TFT and only includes an anode.) The first thin film transistor may have a bottom-gate structure or a top-gate structure, and may be an amorphous silicon (a-Si) thin film transistor, a low-temperature polysilicon (LTPS) thin film transistor, or an oxide thin film transistor, but is not limited thereto. In this embodiment, one pixel unit includes three sub-pixels: a red sub-pixel R, a green sub-pixel G, and a blue sub-pixel B. Of course, the proposal of this embodiment also applies to the case where one pixel unit includes four sub-pixels (red sub-pixel R, green sub-pixel G, blue sub-pixel B, and white sub-pixel W). In some exemplary embodiments, the manufacturing process of the driving structure layer may include the following steps:

[0076] On the flexible base 10, a first insulating thin film and an active layer thin film are sequentially deposited, and the active layer thin film is patterned by a patterning process to form a first insulating layer 91 covering the entire flexible base 10 and an active layer pattern disposed on the first insulating layer 91, and the active layer comprises at least a first active layer 11. In one exemplary embodiment, the first insulating layer 91 is called a buffer layer and is used to enhance the water and oxygen resistance capability of the base.

[0077] Next, a second insulating thin film and a first metal thin film are sequentially deposited, and the first metal thin film is patterned by a patterning process to form a second insulating layer 92 covering the active layer and a first gate electrode layer pattern provided on the second insulating layer 92, where the first gate electrode layer includes at least a first gate electrode 21 and a first capacitor electrode 22, a plurality of gate lines (not shown), and a plurality of gate lead lines (not shown). In one exemplary embodiment, the second insulating layer 92 is called a first gate insulating (GI1) layer.

[0078] Next, a third insulating film and a second metal film are sequentially deposited, and the second metal thin film is patterned by a patterning process to form a third insulating layer 93 covering the first gate electrode layer and a second gate electrode layer pattern provided on the third insulating layer 93, the second gate electrode layer including at least a second capacitor electrode 31 and a second gate lead (not shown), and the position of the second capacitor electrode 31 corresponds to the position of the first capacitor electrode 22. In one exemplary embodiment, the third insulating layer 93 is also called a second gate insulating (GI2) layer.

[0079] Next, a fourth insulating thin film is deposited, and the fourth insulating thin film is patterned by a patterning process to form a pattern of a fourth insulating layer 94 covering the second gate electrode layer, wherein a plurality of first vias are provided in the fourth insulating layer 94, the positions of the plurality of first vias respectively correspond to the positions of both ends of the first active layer, and the fourth insulating layer 94, the third insulating layer 93 and the second insulating layer 92 in the plurality of first vias are etched to respectively expose the surfaces of the first active layers. In one exemplary embodiment, the fourth insulating layer 94 is also called an interlayer dielectric (ILD) layer.

[0080] Next, a third metal thin film is deposited and patterned through a patterning process to form a source-drain metal layer (SD) pattern on the fourth insulating layer 94, where the source-drain metal layer has at least a pattern of a first source electrode 41, a first drain electrode 42, a low-voltage (VSS) line (not shown), a plurality of data lines (not shown), and a plurality of data lead lines (not shown), and the first source electrode 41 and the first drain electrode 42 are respectively connected to both ends of the first active layer 11 through first vias. In one exemplary embodiment, the source-drain metal layer may further include one or more of a power supply line (VDD), a compensation line, and an auxiliary cathode according to actual needs.

[0081] This completes the fabrication of the driving structure layer pattern on the flexible base 10, as shown in Figure 7. The first active layer 11, the first gate electrode 21, the first source electrode 41, and the first drain electrode 42 constitute a first thin film transistor, the first capacitor electrode 22 and the second capacitor electrode 31 constitute a storage capacitor, and the multiple gate leads and data leads constitute driving leads of the array substrate gate driver (GOA).

[0082] (3) A first flat thin film is coated on the flexible base on which the above-mentioned pattern is formed, and the first flat thin film is patterned by a patterning process to form a flat (PLN) layer 95 covering the entire flexible base 10. As shown in Figure 8, a second via V2 is formed in the flat layer 95, and the flat layer 95 in the second via V2 is etched to expose the surface of the first drain electrode 42 of the first thin film transistor. A second uneven structure 951 is formed on the side of the flat layer 95 away from the flexible base 10, and the orthogonal projection of the second uneven structure 951 on the flexible base 10 and the orthogonal projection of the anode 51 formed thereafter on the flexible base 10 have an overlapping area, i.e., a shape with varying undulations is formed on the flat layer 95 at the position corresponding to the anode 51.

[0083] In some exemplary embodiments, the second uneven structure 951 includes a plurality of second raised portions, and second recessed portions are formed between adjacent second raised portions.

[0084] In this embodiment, when patterning the first flat thin film, the opening pattern on the photomask can be made to correspond to the second recess of the second uneven structure 951, so that the position, shape and arrangement method of the opening pattern on the photomask can be designed according to the desired second uneven structure 951, which is beneficial to simplifying the manufacturing process of the display substrate.

[0085] In some exemplary embodiments, the second protrusion may be sawtooth.

[0086] In some exemplary embodiments, as shown in FIG. 4, the step height h1 between the second protrusion and the second recess may be 1 / 8 to 7 / 8 of the thickness h2 of the flat layer 95.

[0087] In some exemplary embodiments, the step height h1 between the second protrusion and the second recess may be 0.2 to 0.8 micrometers. In this embodiment, the step height h1 between the second protrusion and the second recess refers to the difference in height between the highest point of the second protrusion and the lowest point of the second recess.

[0088] (4) A transparent conductive thin film is deposited on the base on which the above-mentioned pattern is formed, and the transparent conductive thin film is patterned by a patterning process to form a pattern of the anode 51, which is connected to the first drain electrode D through the second via V2. Since the flat layer 95 at the position corresponding to the anode 51 has an undulating shape on the side away from the flexible base, the anode 51 can also have an undulating shape, thereby forming a diffuse reflective anode surface.

[0089] In some exemplary embodiments, forming the pattern of the anode 51 includes depositing a fourth metal thin film on the base on which the pattern is formed, coating a layer of photoresist on the fourth metal thin film, exposing the photoresist using a monochrome photomask to form unexposed areas where the anode 51 is located and fully exposed areas in other areas, developing and removing the photoresist in the fully exposed areas, and then etching the fourth metal thin film in the fully exposed areas, and peeling off the photoresist, thereby forming the pattern of the anode 51, as shown in FIG.

[0090] Display of this Example substrate Since this device has a top-emission structure, the anode 51 is a reflective electrode and may be made of a metal with high reflectivity, such as silver (Ag), gold (Au), palladium (Pd), platinum (Pt), or an alloy or composite layer of these metals. In practice, a composite layer structure of an indium tin oxide (ITO) layer and a metal reflective layer may also be used, which has good conductivity, high reflectivity, and good dimensional stability.

[0091] (5) A pixel-defining thin film is coated on the base on which the pattern is formed, and a pattern of a pixel-defining (PDL) layer 96 is formed by a masking, exposing, and developing process, so that a pixel opening K is formed in the pixel-defining layer 96, and the pixel-defining thin film in the pixel opening K is developed to expose at least a portion of the surface of the anode 51, and a first uneven structure 961 is formed on the side of the pixel-defining layer 96 away from the flexible base 10, as shown in Figure 10. The pixel opening K and the first uneven structure 961 can be realized by a gradation mask design.

[0092] In some exemplary embodiments, the orthogonal projection of the first relief structure 961 on the flexible base 10 and the orthogonal projection of the pixel aperture K on the flexible base 10 do not overlap.

[0093] In some exemplary embodiments, the first uneven structure 961 is located on the side of the pixel definition layer 96 that is closer to the organic light-emitting layer 52 to be formed later, thereby forming an undulating wave shape at the edge position close to the light-emitting area of ​​the pixel definition layer 96.

[0094] 10, the first uneven structure 961 includes a plurality of first protrusions 96a, and first recesses 96b are formed between adjacent first protrusions 96a. In the embodiments of the present disclosure, the pixel defining layer within the pixel opening K is entirely developed, and the pixel defining layer within the first recesses 96b is partially developed to prevent the cathode and anode to be formed later from shorting out through the first recesses 96b.

[0095] In some exemplary embodiments, as shown in FIGS. 4 and 11 , the first recess 96b is a groove surrounding the pixel opening K, the width d1 of the groove may be determined based on the resolution limit of the current exposure device, and the distance d2 between adjacent grooves is 1 / 8 to 7 / 8 of the distance d3 between the edge of the opening area of ​​the black matrix 71 to be formed later and the edge of the pixel opening K formed in the pixel definition layer 96.

[0096] In some exemplary embodiments, as shown in FIG. 11, the first recess 96b is a groove surrounding the pixel opening K, the width d1 of the groove is 0.8 to 1.5 micrometers, and the distance d2 between adjacent grooves is 1 to 2 micrometers.

[0097] 4 and 12, the first recess 96b includes an opening surrounding the pixel opening K, and the width d4 of the opening may be determined based on the resolution limit of the current exposure device. The distance d5 between adjacent openings is 1 / 8 to 7 / 8 of the distance d3 between the edge of the opening region of the black matrix 71 to be formed later and the edge of the pixel opening K formed in the pixel definition layer 96.

[0098] Illustratively, the width d4 of the aperture may be 0.5 to 1.8 micrometers.

[0099] In some example embodiments, as shown in FIG. 12 , the plurality of apertures form a plurality of annular structural units 96c, each annular structural unit 96c having N annular structures arranged around a pixel opening K and parallel to each other, the innermost annular structure having a plurality of first apertures 96b1, the first apertures 96b1 and the pixel opening K being adjacent to each other, and sawtooth protrusions 96a1 being formed between the plurality of first apertures 96b1, where N is a natural number greater than 1.

[0100] 12, the width d6 of the sawtooth-shaped protrusions 96a1 may be determined based on the resolution limit of the current exposure device. The distance d7 between adjacent sawtooth-shaped protrusions 96a1 is 1 / 8 to 7 / 8 of the distance between the edge of the opening region of the black matrix 71 to be formed later and the edge of the pixel opening K formed in the pixel definition layer 96.

[0101] For example, the width d6 of the sawtooth projections 96a1 is 0.8 to 1.5 micrometers.

[0102] In some exemplary embodiments, N is between 1 and 50. Illustratively, N may be 3.

[0103] In this embodiment, the width of the aperture is set to 0.5 to 1.8 micrometers, so that even if the pixel aperture is exposed, the designed aperture is not exposed to light. This allows a roughened shape to be formed in the pixel defining layer 96. This allows the cathode 53 to have a roughened shape when it is subsequently vapor-deposited, thereby forming a scattering cathode surface.

[0104] (6) As shown in FIG. 13, a thin film of organic material is coated on the base on which the above-mentioned pattern is formed, and a pattern of a spacer (PS) layer 97 is formed by masking, exposure, and development processes.

[0105] (7) As shown in FIG. 14 , an organic light-emitting layer 52 and a cathode 53 are sequentially formed on the patterned base. The organic light-emitting layer 52 includes a stacked hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, and an electron injection layer. The organic light-emitting layer 52 is formed within the pixel opening, and the organic light-emitting layer 52 is connected to the anode 51. The anode 51 is connected to the first drain electrode 42 of the first transistor, thereby controlling the light emission of the organic light-emitting layer 52. The cathode 53 is connected to the organic light-emitting layer 52. Since the anode 51 and the pixel defining layer 96 both have a wavy shape, the organic light-emitting layer 52 and the cathode 53 can also each have a wavy shape, thereby forming a scattering cathode surface. In an exemplary embodiment, the cathode 53 may be an integral structure that is interconnected.

[0106] This completes the fabrication of the light emitting structure layer pattern in the driving circuit layer, and the light emitting structure layer includes an anode, a pixel definition layer, a spacer layer, an organic light emitting layer, and a cathode, and the organic light emitting layer is respectively connected to the anode and the cathode.

[0107] (8) As shown in FIG. 15, a pattern of a package layer 98 is formed on the base on which the above-mentioned pattern is formed. The package layer 98 may adopt a laminated structure of inorganic material / organic material / inorganic material, and the organic material layer is disposed between two inorganic material layers.

[0108] In some exemplary embodiments, forming the pattern of the package layer 98 may include: first depositing a first inorganic thin film using an open mask plate by plasma-enhanced chemical vapor deposition (PECVD) to form a first package layer; then inkjet-printing an organic material on the first package layer using an inkjet printing process and curing the organic material to form a film; and then depositing a second inorganic thin film using an open mask plate to form a third package layer, where the package layer is composed of the first package layer, the second package layer, and the third package layer. In some exemplary embodiments, the first package layer and the third package layer may be made of any one or more of silicon oxide (SiOx), silicon nitride (SiNx), and silicon oxynitride (SiON), and may be a single layer, a multilayer, or a composite layer. The second package layer may be made of a resin material to form an inorganic / organic / inorganic laminate structure, and the organic material layer may be disposed between two inorganic material layers to prevent external water vapor from entering the light-emitting structure layer.

[0109] (9) As shown in FIG. 16, a pattern of the touch structure layer 103 is formed on the base on which the above-mentioned pattern is formed.

[0110] In some example embodiments, the touch structure layer 103 may include a buffer layer, a first touch electrode layer (i.e., a bridge layer), a touch insulation layer (TLD), a second touch electrode layer, and a protection layer stacked on the package layer 98, and the plurality of first touch electrodes, the plurality of second touch electrodes, and the plurality of first connecting portions may be co-layered on the second touch electrode layer and formed by the same patterning process, and the first touch electrodes and the first connecting portions may be an integral structure connected to each other. The second connecting portions may be provided on the first touch electrode layer, and adjacent second touch electrodes are connected to each other through vias, and a touch insulation layer is provided between the second touch electrode layer and the first touch electrode layer.

[0111] In some possible implementations, the plurality of first touch electrodes, the plurality of second touch electrodes, and the plurality of second connection parts may be arranged in the same layer on the second touch electrode layer, the second touch electrodes and the second connection parts may be an integral structure connected to each other, and the first connection parts may be provided on the first touch electrode layer, and adjacent first touch electrodes are connected to each other through vias.

[0112] (10) A color filter layer pattern is formed on the base on which the above-mentioned pattern is formed. As shown in FIG. 17, the color filter layer has a black matrix 71 and color filters 72 arranged in the same layer, the black matrix 71 has a plurality of opening areas arranged in a matrix, the color filters 72 are filled in the opening areas, the color filters 72 and the black matrix 71 have at least a partial overlap area, and the color filters 72 cover the black matrix 71 in the overlap area.

[0113] In some exemplary embodiments, forming the color filter layer pattern includes first coating a polymer photoresist layer mixed with a black matrix material on the patterned base, exposing and developing the polymer photoresist layer to form a black matrix pattern 71, then coating a polymer photoresist layer mixed with a red pigment on the patterned base, exposing and developing the polymer photoresist layer to form a red region pattern, and then using the same method and procedure to sequentially form a green region pattern and a blue region pattern, ultimately forming a color filter 72 of the three primary colors of red, green, and blue arranged according to a certain rule.

[0114] (11) A thin film packaging process is performed on the base on which the above-mentioned pattern is formed, and a pattern of a coating protection layer 99 is formed, as shown in Figure 18, and an optical adhesive 100 is coated on the base on which the pattern of the coating protection layer 99 is formed, and a cover plate 101 is bonded to the optical adhesive 100.

[0115] (12) After the manufacturing of the above-mentioned film layer structure is completed, the display substrate is peeled off from the glass substrate 1 by a peeling process as shown in FIG. 4, and then, using a roller lamination method, one layer of base film is attached to the back surface of the display substrate (the surface of the flexible base 10 away from the film layer).

[0116] The above process completes the manufacturing of the display substrate shown in FIG. substrate Although the above description is based on a top emission structure, the present invention can be applied to a bottom emission structure or a double-sided emission structure, and can be applied to large or small size displays. substrate can also be applied to

[0117] The structures and fabrication processes described in this disclosure are merely illustrative. In the exemplary embodiments, the corresponding structures may be modified and the patterning process may be increased or decreased according to actual needs. For example, each display unit may have three or four subpixels. For example, the pixel driving circuit may be a 5T1C or 7T1C. For example, other electrodes or leads may be provided in the film layer structure, and the present disclosure does not specifically limit this. In an exemplary embodiment, the source / drain metal layer may have a two-layer structure. That is, in a plane perpendicular to the display substrate, the display substrate includes a first insulating layer, an active layer, a second insulating layer, a first gate electrode layer, a third insulating layer, a second gate electrode layer, a fourth insulating layer, a first source / drain electrode layer, a first planar layer, a second source / drain electrode layer, and a second planar layer, which are sequentially formed on the base. The second source / drain electrode layer includes at least an anode connecting electrode, which is connected to the drain electrode of the first thin film transistor through a via in the first planar layer and to the anode through a via in the second planar layer.

[0118] As can be seen from the structure and manufacturing process of the display substrate described above, in the display substrate of the present disclosure, the flat layer opposite the anode is processed to have a gently undulating shape, so that the anode has a certain degree of undulating wave shape, i.e., forms a diffuse reflective anode. The pixel defining layer is also processed to have a gently undulating shape, so that the pixel defining layer has a concave-convex shape. As a result, when the cathode is evaporated, the cathode can also have a concave-convex shape, i.e., forms a scattering cathode surface. As a result, when external ambient light enters the screen in the screen-off state, the scattering cathode / anode scatters the light, disrupting the outgoing direction of the ambient light, improving color separation and achieving a good screen-off effect. This avoids the problem of transmittance reduction caused by doping scattering particles into the coating protective layer, without increasing costs, and maintains the advantage of high transmittance of COE, thereby meeting the future demands of 5G and low-power flexible products.

[0119] In the optical improvement color separation test model, when the incident light is along the long axis direction of the color filter (CF) as shown in FIG. 19, the simulation results are as shown in FIG. 20a, FIG. 20b and Table 1, and when the incident light is along the short axis direction of the color filter (CF), the simulation results are as shown in FIG. 21a, FIG. 21b and Table 2.

[0120] [Table 1]

[0121] [Table 2]

[0122] The manufacturing process of a display substrate according to an embodiment of the present disclosure can be realized using existing mature manufacturing equipment, requires only small improvements over the existing process, can improve color separation in dark conditions without adding any additional processes or steps, has good compatibility with existing manufacturing processes, is simple and easy to implement, has high production efficiency, low production costs, and a high yield rate.

[0123] In an exemplary embodiment, the display substrate of the present disclosure may be applied to a display device having a pixel driving circuit, such as an OLED, a quantum dot display (QLED), a light-emitting diode display (Micro LED or Mini LED), or a quantum dot light-emitting diode display (QDLED), and the present disclosure is not limited thereto.

[0124] An exemplary embodiment of the present disclosure further provides a method for manufacturing a display substrate, wherein the display substrate may include a plurality of sub-pixels, and the manufacturing method includes: forming at least one insulating film layer on a base, and providing a concave-convex structure on a side of the at least one insulating film layer away from the base; The method includes forming a first electrode on a side of the insulating film layer away from the base, and an orthogonal projection of the concave-convex structure on the base and an orthogonal projection of the first electrode on the base having an overlapping region.

[0125] The embodiments of the present disclosure further provide a display device, substrate The display device may be any product or component having a display function, such as a mobile phone, a tablet PC, a television, a display, a notebook PC, a digital photo frame, or a navigation system.

[0126] Although the embodiments disclosed in the present disclosure are as above, the contents of the description are merely embodiments adopted for understanding the present disclosure and are not intended to limit the present invention. Those skilled in the art may make modifications and changes in the implementation form and details without departing from the spirit and scope disclosed in the present disclosure, but the patent protection scope of the present invention should be in accordance with the scope described in the claims. [Explanation of symbols]

[0127] 1. Glass substrate 10 base 10 Flexible Base 11 First active layer 21 First gate electrode 22 First capacitor electrode 31 Second capacitor electrode 41 first source electrode 42 first drain electrode 51 Anode 52 Organic light-emitting layer 53 Cathode 71 Black Matrix 72 color filters 91 First insulating layer 92 Second insulating layer 93 Third insulating layer 94 4th insulating layer 95 flat layer 96 Pixel Definition Layer 96a 1st convex part 96a1 Sawtooth protrusion 96b First recess 96b1 1st hole 96c Ring structural unit 97 Spacer Layer 98 Package Layer 99 Coating protection layer 100 Optical Adhesives 101 Cover Plate 102 Driving Structure Layer 103 Touch Structure Layer 951 Second uneven structure 961 First uneven structure

Claims

1. A display substrate comprising: a base; at least one insulating film layer provided on the base; and a first electrode provided on a side of the insulating film layer away from the base; a concave-convex structure is provided on a side of at least one of the insulating film layers away from the base, and an orthogonal projection of the concave-convex structure on the base and an orthogonal projection of the first electrode on the base have an overlapping region; the display substrate includes a planar layer, a light-emitting structure layer, a package layer, and a color filter layer, which are sequentially formed on the base, the light-emitting structure layer including a pixel defining layer, an anode, a cathode, and an organic light-emitting layer disposed between the anode and the cathode; the at least one insulating film layer comprises the planarization layer, and the first electrode comprises the anode; the flat layer includes a plurality of second protrusions, and second recesses are formed between adjacent second protrusions; a step between the second protrusion and the second recess is 1 / 8 to 7 / 8 of the thickness of the flat layer;

2. The pixel definition layer has a plurality of pixel openings, the pixel openings exposing at least a portion of the anode, and the cathode covering the pixel definition layer; 2. The display substrate of claim 1, wherein the color filter layer comprises a black matrix and color filters spaced apart from each other, the black matrix having a plurality of opening areas arranged in a matrix, at least a portion of the color filters being filled in the opening areas, the color filters and the black matrix having at least a partial overlap area, and the color filters covering the black matrix in the overlap area.

3. The display substrate of claim 2 , wherein at least one of the insulating layers comprises the pixel defining layer and the first electrode comprises the cathode.

4. The display substrate of claim 3 , wherein the pixel definition layer comprises a plurality of first protrusions, and a first recess is formed between adjacent first protrusions.

5. 5. The display substrate of claim 4, wherein the first recess is a groove surrounding the pixel opening, and the distance between adjacent grooves is 1 / 8 to 7 / 8 of the distance between an edge of the opening region of the black matrix and an edge of the pixel opening formed in the pixel definition layer.

6. 6. The display substrate according to claim 5, wherein the distance between adjacent grooves is 1 to 2 micrometers.

7. 6. The display substrate of claim 5, wherein the width of the groove is 0.8 to 1.5 micrometers.

8. 5. The display substrate of claim 4, wherein the first recess is an opening surrounding the pixel opening, and the opening has a width of 0.5 to 1.8 micrometers.

9. 9. The display substrate of claim 8, wherein the plurality of apertures constitute a plurality of annular structural units, at least one of the annular structural units having N annular structures arranged around the pixel opening and parallel to each other, the innermost annular structure having a plurality of first apertures, the first apertures and the pixel openings being adjacent to each other, and N being a natural number greater than 1.

10. 10. The display substrate of claim 9, wherein sawtooth protrusions are formed between the plurality of first openings, and the width of the sawtooth protrusions is 0.8 to 1.5 micrometers.

11. 11. The display substrate according to claim 10, wherein N is a natural number between 1 and 50.

12. The display substrate according to claim 1 , wherein the second protrusions are sawtooth-shaped.

13. 2. The display substrate of claim 1, wherein the step between the second protrusion and the second recess is 0.2 to 0.8 micrometers.

14. At least one of the insulating film layers comprises the pixel definition layer and the planarization layer, and the first electrode comprises the cathode and the anode; a first unevenness structure is provided on a side of the pixel definition layer away from the base, and an orthogonal projection of the first unevenness structure on the base and an orthogonal projection of the cathode on the base have an overlapping region; 3. The display substrate according to claim 2, wherein a second uneven structure is provided on the flat layer on a side away from the base, and an orthogonal projection of the second uneven structure on the base and an orthogonal projection of the anode on the base have an overlapping region.

15. 7. The display substrate of claim 6, further comprising a touch structure layer disposed between the package layer and the color filter layer, the touch structure layer comprising a plurality of touch electrodes, and a positive projection of the black matrix on the base comprising a positive projection of the touch electrodes on the base.

16. A display device comprising the display substrate according to claim 1.

17. A method for manufacturing a display substrate, forming at least one insulating film layer on a base, and providing a concave-convex structure on a side of the at least one insulating film layer away from the base; forming a first electrode on a side of the insulating film layer away from the base, and an orthogonal projection of the concave-convex structure on the base and an orthogonal projection of the first electrode on the base have an overlapping region; The manufacturing method includes sequentially forming a planar layer, a light-emitting structure layer, a package layer, and a color filter layer on a base, the light-emitting structure layer including a pixel defining layer, an anode, a cathode, and an organic light-emitting layer disposed between the anode and the cathode, the at least one insulating film layer including the planar layer, and the first electrode including the anode; the flat layer includes a plurality of second protrusions, and second recesses are formed between adjacent second protrusions; a step between the second protrusion and the second recess is 1 / 8 to 7 / 8 of the thickness of the flat layer;

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