Multilayer ceramic electronic components

Abstract

Provided is a layered ceramic electronic component 1 with which migration of Ag included in a resin electrode can be suppressed, and thus the occurrence of short-circuits between electrodes can be suppressed. In the layered ceramic electronic component 1, a first external electrode 20 extends to first and second main surface sides, and a second external electrode 21 extends to the first and second main surface sides. Between a first conductive resin layer 34 and a first main surface M1 of a layered body 2, there is a first Ni plating wraparound layer in which a first Ni plating layer 36 is disposed. Between the first conductive resin layer 34 and a second main surface M2 of the layered body 2, there is a second Ni plating wraparound layer in which the first Ni plating layer 36 is disposed. Between a second conductive resin layer 35 and the first main surface M1 of the layered body 2, there is a third Ni plating wraparound layer in which a second Ni plating layer 37 is disposed. Between the second conductive resin layer 35 and the second main surface M2 of the layered body 2, there is a fourth Ni plating wraparound layer in which the second Ni plating layer 37 is disposed.

Description

[Technical Field]

[0001] The present invention relates to a multilayer ceramic electronic component. [Background technology]

[0002] One example of a multilayer ceramic electronic component is a multilayer ceramic capacitor. Patent Document 1 describes a multilayer ceramic capacitor that uses resin electrodes as external electrodes. The resin electrodes include a thick Cu layer as a base electrode layer, a conductive resin layer, a Ni plating layer, and a Sn plating layer. The conductive resin layer includes a conductive filler and a resin. Ag is used as the conductive filler. Epoxy resin is used as the resin. The conductive fillers are in contact with each other, ensuring electrical continuity within the conductive resin layer. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 11-162771 Summary of the Invention [Problem to be solved by the invention]

[0004] However, in conventional resin electrodes, Ag migration can occur when voltage is applied in a high-temperature environment, especially when voltage is applied in a high-temperature, high-humidity environment. The migrated Ag can connect between terminal electrodes. The Ag that connects between terminal electrodes can cause a short circuit between the terminal electrodes.

[0005] Therefore, an object of the present invention is to provide a multilayer ceramic electronic component that can suppress migration caused by filler materials such as Ag contained in resin electrodes, and thereby suppress the occurrence of short circuits between electrodes. [Means for solving the problem]

[0006] The multilayer ceramic electronic component of the present invention comprises: a laminate including a plurality of laminated dielectric layers and internal electrode layers, the laminate having a first main surface M1 and a second main surface M2 opposing each other in a height direction, a first side surface S1 and a second side surface S2 opposing each other in a width direction perpendicular to the height direction, and a first end surface E1 and a second end surface E2 opposing each other in a length direction perpendicular to the height direction and the width direction; a first external electrode disposed on the first end surface; a second external electrode disposed on the second end surface, The internal electrode layer is a first internal electrode layer disposed on the plurality of dielectric layers and exposed at the first end surface; a second internal electrode layer disposed on the plurality of dielectric layers and exposed at the second end surface, The first external electrode is a first base electrode layer containing a metal component; a first conductive resin layer disposed on the first base electrode layer and containing a thermosetting resin and a filler; a first Ni plating layer disposed on the first conductive resin layer; a first Sn-plated layer disposed on the first Ni-plated layer; The second external electrode is a second base electrode layer containing a metal component; a second conductive resin layer disposed on the second base electrode layer and containing a thermosetting resin and a filler; a second Ni plating layer disposed on the second conductive resin layer; a second Sn-plated layer disposed on the second Ni-plated layer; the first external electrode extends to the first and second principal surfaces, the second external electrode extends to the first and second principal surfaces, a first Ni plating wraparound layer, in which the first Ni plating layer is disposed, between the first conductive resin layer and the first main surface of the laminate; a second Ni-plated wraparound layer, on which the first Ni-plated layer is disposed, is provided between the first conductive resin layer and the second main surface of the laminate; a third Ni-plated wraparound layer, in which the second Ni-plated layer is disposed, between the second conductive resin layer and the first main surface of the laminate; A fourth Ni-plated wraparound layer, in which the second Ni-plated layer is disposed, is provided between the second conductive resin layer and the second main surface of the laminate. [Effects of the Invention]

[0007] According to the present invention, it is possible to provide a multilayer ceramic electronic component that can suppress migration due to filler material such as Ag contained in a resin electrode, and thus can suppress the occurrence of short circuits between electrodes. [Brief explanation of the drawings]

[0008] [Figure 1] 1 is a perspective view of a multilayer ceramic capacitor according to an embodiment of the present invention; [Figure 2] FIG. 2 is a cross-sectional view taken along line II in FIG. [Figure 3] FIG. 2 is a cross-sectional view taken along line II-II in FIG. [Figure 4] 10 is a LT cross-sectional view of a laminate showing an example of a floating internal electrode layer. FIG. [Figure 5] 10 is a LT cross-sectional view of a laminate showing an example of a floating internal electrode layer. FIG. [Figure 6] 10 is a LT cross-sectional view of a laminate showing an example of a floating internal electrode layer. FIG. [Figure 7] FIG. 3 is an enlarged view of a region R1 in FIG. 2. [Figure 8] FIG. 1 is a diagram showing a conventional multilayer ceramic capacitor. [Figure 9] FIG. 1 is a diagram showing characteristics of a multilayer ceramic capacitor. DETAILED DESCRIPTION OF THE INVENTION

[0009] An embodiment of the present invention will be described based on a multilayer ceramic capacitor 1, which is an example of a multilayer ceramic electronic component. Fig. 1 is a perspective view of the multilayer ceramic capacitor 1 of this embodiment. (Laminate) The laminate 2 includes a plurality of laminated dielectric layers and a plurality of internal electrode layers. The laminate 2 has an approximately rectangular parallelepiped shape. In the laminate 2, the direction in which the dielectric layers and internal electrode layers are laminated is defined as the height direction T. The direction perpendicular to the height direction T is defined as the width direction W. The direction perpendicular to the height direction T and the width direction W is defined as the length direction L.

[0010] In the laminate 2, two surfaces facing each other in the height direction T are designated as a first main surface M1 and a second main surface M2. In addition, in the laminate 2, two surfaces facing each other in the width direction W are designated as a first side surface S1 and a second side surface S2. In addition, they are designated as a first end surface E1 and a second end surface E2 facing each other in the length direction L. The mounting surface of the multilayer ceramic capacitor 1 is the second main surface M2. The mounting surface is the surface that faces the wiring board when the multilayer ceramic capacitor 1 is mounted on a wiring board or the like.

[0011] Regarding the cross section of the laminate 2, the cross section taken along line II in Fig. 1 is referred to as the LT cross section, and the cross section taken along line II-II in Fig. 1 is referred to as the WT cross section.

[0012] The corners and ridges of the laminate 2 are preferably rounded. Corners are portions where three surfaces of the laminate 2 intersect. Ridges are portions where two surfaces of the laminate 2 intersect. In addition, unevenness may be formed on some or all of the main surfaces, side surfaces, and end surfaces.

[0013] (dielectric layer) The total number of dielectric layers stacked in the laminate 2 is preferably 15 to 200. The dielectric layers are mainly made of a ceramic material. For example, a dielectric ceramic composed mainly of BaTiO3, CaTiO3, SrTiO3, CaZrO3, etc. may be used as the ceramic material. Alternatively, a dielectric ceramic containing these main components with a secondary component such as a Mn compound, an Fe compound, a Cr compound, a Co compound, or a Ni compound may be used as the ceramic material.

[0014] In this embodiment, various explanations will be given regarding the multilayer ceramic capacitor 1. As described above, the multilayer ceramic capacitor 1 is an example of a multilayer ceramic electronic component. When a piezoelectric ceramic is used for the laminate 2, the multilayer ceramic electronic component functions as a ceramic piezoelectric element. Specific examples of piezoelectric ceramic materials include PZT (lead zirconate titanate) ceramic materials.

[0015] The multilayer ceramic electronic component functions as a thermistor element when a semiconducting ceramic is used for the laminate 2. Specific examples of semiconducting ceramic materials include spinel ceramic materials.

[0016] When a magnetic ceramic is used for the laminate 2, the multilayer ceramic electronic component functions as an inductor element. When the multilayer ceramic electronic component functions as an inductor element, the internal electrode layers become coil-shaped conductors. Specific examples of magnetic ceramic materials include ferrite ceramic materials.

[0017] The thickness of one dielectric layer is preferably 0.5 μm or more and 10 μm or less.

[0018] (Classification of laminates) The division of the laminate 2 in the height direction T and length direction L will be described with reference to Figure 2. Figure 2 is a cross-sectional view taken along line II in Figure 1. The laminate 2 can be divided into a first outer layer portion T1, an effective layer portion T2, and a second outer layer portion T3 in the height direction T. The first outer layer portion T1, the effective layer portion T2, and the second outer layer portion T3 are arranged in this order in the height direction T from the first main surface M1 to the second main surface M2.

[0019] The first outer layer portion T1 is the portion between the first main surface M1 and the internal electrode closest to the first main surface M1. The effective layer portion T2 is the portion where two internal electrodes face each other. The second outer layer portion T3 is the portion between the second main surface M2 and the internal electrode closest to the second main surface M2. The effective layer portion T2 is the portion sandwiched between the first outer layer portion T1 and the second outer layer portion T3.

[0020] Specifically, the first outer layer portion T1 is an assembly of multiple dielectric layers located between the first main surface M1 and the internal electrode layer closest to the first main surface M1, and the second outer layer portion T3 is an assembly of multiple dielectric layers located between the second main surface M2 and the internal electrode layer closest to the second main surface M2.

[0021] Of the dielectric layers, the dielectric layers arranged in the first outer layer portion T1 and the second outer layer portion T3 are referred to as outer dielectric layers 4. Of the dielectric layers, the dielectric layer arranged in the effective layer portion T2 is referred to as inner dielectric layers 5.

[0022] The dimensions of the laminate 2 are not particularly limited. The dimension of the laminate 2 in the length direction L is defined as the L dimension. The L dimension is preferably 0.2 mm or more and 10 mm or less. The dimension of the laminate 2 in the width direction W is defined as the W dimension. The W dimension is preferably 0.1 mm or more and 10 mm or less. The dimension of the laminate 2 in the height direction T is defined as the T dimension. The T dimension is preferably 0.1 mm or more and 5 mm or less.

[0023] The division of the laminate 2 in the longitudinal direction L will be described. The laminate 2 can be divided into a first end portion L1, an L counter electrode portion L2, and a second L end portion L3 in the longitudinal direction L. The first end portion L1, the L counter electrode portion L2, and the second L end portion L3 are arranged in this order in the longitudinal direction L from the first end face E1 to the second end face E2.

[0024] The L opposing electrode portion L2 is the portion where the internal electrode layers face each other in the height direction T. The first end portion L1 is the portion between the L opposing electrode portion L2 and the first end face E1. The second end portion L3 is the portion between the L opposing electrode portion L2 and the second end face E2. The L opposing electrode portion L2 is the portion corresponding to the opposing electrode portion of the internal electrode layer. The first end portion L1 and the second end portion L3 are portions corresponding to the lead electrode portions of the internal electrode layer. The opposing electrode portion and the lead electrode portion will be explained later. The first end portion L1 and the second end portion L3 are also called the L gap.

[0025] The L counter electrode portion L2 is a portion corresponding to the counter electrode portion of the internal electrode layer, and is therefore also called an inner layer portion.

[0026] The division of the laminate 2 in the width direction W will be described with reference to Figure 3. Figure 3 is a cross-sectional view taken along line II-II in Figure 1. The laminate 2 can be divided into a first side portion W1, a W counter electrode portion W2, and a second W end portion W3 in the width direction W. The first side portion W1, the W counter electrode portion W2, and the second W end portion W3 are arranged in this order in the width direction W from the first side surface S1 to the second side surface S2.

[0027] The W opposing electrode portion W2 is the portion where the internal electrode layers face each other in the height direction T. The first side portion W1 is the portion between the W opposing electrode portion W2 and the first side surface S1. The second side portion W3 is the portion between the W opposing electrode portion W2 and the second side surface S2. The first side portion W1 and the second side portion W3 are also referred to as the W gap.

[0028] The W counter electrode portion W2 is a portion where an internal electrode layer is disposed, and is therefore also called an internal layer portion.

[0029] The first side portion W1 and the second side portion W3 are portions where no internal electrode layers exist in the height direction T. Specifically, the first side portion W1 is located on the first side surface S1 side and is a portion including multiple dielectric layers located between the first side surface S1 and the outermost surface W11 of the internal layer portion on the first side surface S1 side. The first side portion W1 is also referred to as the first side surface side outer layer portion.

[0030] Similarly, the second side portion W3 is located on the second side surface S2 side and includes multiple dielectric layers located between the second side surface S2 and the outermost surface W12 of the inner layer portion on the second side surface S2 side. The second side portion W3 is also referred to as the second side surface outer layer portion.

[0031] (Internal electrode layer) The internal electrode layers include a plurality of first internal electrode layers 6 and a plurality of second internal electrode layers 7. The first internal electrode layers 6 are internal electrodes exposed at the first end face E1. The second internal electrode layers 7 are internal electrodes exposed at the second end face E2.

[0032] The first internal electrode layer 6 includes a first opposing electrode portion 8 that faces the second internal electrode layer 7, and a first extension electrode portion 10 that is extended from the first opposing electrode portion 8 to the first end face E1 of the laminate 2. An end portion of the first extension electrode portion 10 on the first end face E1 side is extended to the surface of the first end face E1 of the laminate 2. The end portion of the first extension electrode portion 10 that is extended to the first end face E1 is exposed at the first end face E1.

[0033] The second internal electrode layer 7 includes a second opposing electrode portion 9 facing the first internal electrode layer 6, and a second extraction electrode portion 11 extending from the second opposing electrode portion 9 to the second end face E2 of the laminate 2. The end of the second extraction electrode portion 11 on the second end face E2 side is extended to the surface of the second end face E2 of the laminate 2. The end of the second extraction electrode portion 11 extended to the second end face E2 is exposed at the second end face E2.

[0034] The shapes of the first counter electrode portion 8 and the second counter electrode portion 9 are not particularly limited. The shapes of the first counter electrode portion 8 and the second counter electrode portion 9 are preferably rectangular. However, the corners of the first counter electrode portion 8 and the second counter electrode portion 9 may be rounded. Furthermore, the corners of the first counter electrode portion 8 and the second counter electrode portion 9 may be formed at an angle. Forming at an angle means forming them in a tapered shape.

[0035] The shapes of the first extension electrode 10 and the second extension electrode 11 are not particularly limited. The shapes of the first extension electrode 10 and the second extension electrode 11 are preferably rectangular. However, the corners of the first extension electrode 10 and the second extension electrode 11 may be rounded. The corners of the first extension electrode 10 and the second extension electrode 11 may be formed at an angle. Forming at an angle means forming them in a tapered shape.

[0036] The width of the first opposing electrode portion 8 and the width of the first extension electrode portion 10 may be the same, or one of the widths of the first opposing electrode portion 8 and the first extension electrode portion 10 may be narrower than the other.

[0037] Similarly, the width of the second opposing electrode portion 9 and the width of the second extension electrode portion 11 may be the same, or one of the widths of the second opposing electrode portion 9 and the second extension electrode portion 11 may be narrower than the other.

[0038] (Floating internal electrode layer) The floating internal electrode layers 12 will be described with reference to Figs. 4 to 6. Figs. 4 to 6 are LT cross-sectional views of the laminate 2. Figs. 4 to 6 show different configurations of the floating internal electrode layers 12. The floating internal electrode layers 12 refer to internal electrode layers in the first internal electrode layers 6 and the second internal electrode layers 7 that are not drawn out to either the first end face E1 or the second end face E2. Both the first internal electrode layers 6 and the second internal electrode layers 7 can be provided with floating internal electrode layers 12.

[0039] The first counter electrode portion 8 or the second counter electrode portion 9 may have a structure divided into multiple portions by including a floating internal electrode layer 12. The first counter electrode portion 8 or the second counter electrode portion 9 may have, for example, a two-, three-, or four-section structure by dividing the first counter electrode portion 8 or the second counter electrode portion 9. FIG. 4 is a diagram showing an example of a two-section structure. FIG. 5 is a diagram showing an example of a three-section structure. FIG. 6 is a diagram showing an example of a four-section structure. It goes without saying that the first counter electrode portion 8 or the second counter electrode portion 9 may have a four- or more-section structure.

[0040] For example, as shown in FIGS. 4 to 6, the first opposing electrode portion 8 or the second opposing electrode portion 9 has a structure in which the first opposing electrode portion 8 or the second opposing electrode portion 9 is divided into multiple pieces, which can provide the following effects. That is, multiple capacitor components are formed between the opposing internal electrodes. These capacitor components are then connected in series to form the overall capacitor. Therefore, the voltage applied to each capacitor component is reduced. As a result, the multilayer ceramic capacitor can have a high withstand voltage.

[0041] The first internal electrode layer 6 and the second internal electrode layer 7 can be made of an appropriate conductive material, for example, a metal such as Ni, Cu, Ag, Pd, or Au, or an alloy containing at least one of these metals, such as an Ag-Pd alloy.

[0042] In the multilayer ceramic capacitor 1 of this embodiment, capacitance is formed by the first opposing electrode portion 8 and the second opposing electrode portion 9 facing each other via the inner dielectric layer 5. This allows the multilayer ceramic capacitor 1 to exhibit capacitor characteristics.

[0043] The thickness of each of the first internal electrode layers 6 and the second internal electrode layers 7 is preferably, for example, about 0.2 μm or more and 2.0 μm or less. The total number of the first internal electrode layers 6 and the second internal electrode layers 7 is preferably 15 or more and 200 or less.

[0044] (external electrode) The external electrodes include a first external electrode 20 and a second external electrode 21. The first external electrode 20 is connected to the first internal electrode layer 6. The first external electrode 20 is arranged from the first end face E1 to a part of the first main face M1, a part of the second main face M2, a part of the first side face S1, and a part of the second side face S2.

[0045] The first external electrode 20 on the first end face E1 is referred to as the first first end face external electrode 22, the first external electrode 20 on the first main face M1 is referred to as the first first main face external electrode 23, the first external electrode 20 on the second main face M2 is referred to as the first second main face external electrode 24, the first external electrode 20 on the first side face S1 is referred to as the first first side face external electrode 25, and the first external electrode 20 on the second side face S2 is referred to as the first second side face external electrode 26.

[0046] The second external electrode 21 is connected to the second internal electrode layer 7. The second external electrode 21 is arranged from the second end face E2 to a part of the first main face M1, a part of the second main face M2, a part of the first side face S1, and a part of the second side face S2.

[0047] The second external electrode 21 on the first end face E1 is referred to as the second first end face external electrode 27, the second external electrode 21 on the first main face M1 is referred to as the second first main face external electrode 28, the second external electrode 21 on the second main face M2 is referred to as the second second main face external electrode 29, the second external electrode 21 on the first side face S1 is referred to as the second first side face external electrode 30, and the second external electrode 21 on the second side face S2 is referred to as the second second side face external electrode 31.

[0048] The first external electrode 20 includes a first base electrode layer 32, a first conductive resin layer 34, a first inner plating layer 36, and a first outer plating layer 38. The second external electrode 21 includes a second base electrode layer 33, a second conductive resin layer 35, a second inner plating layer 37, and a second outer plating layer 39.

[0049] The first and second base electrode layers 32 and 33 are layers containing conductive metal and glass components. The first and second conductive resin layers 34 and 35 are layers containing metal components and made of thermosetting resin. The first and second inner plating layers 36 and 37 can be, for example, Ni plating layers. The first and second outer plating layers 38 and 39 can be, for example, Sn plating layers. Each layer will be described in turn below.

[0050] (base electrode layer) The base electrode layers include a first base electrode layer 32 and a second base electrode layer 33. The first base electrode layer 32 is disposed from the first end face E1 to a portion of the first main surface M1 and a portion of the second main surface M2, and a portion of the first side surface S1 and a portion of the second side surface S2. The second base electrode layer 33 is disposed from the second end face E2 to a portion of the first main surface M1 and a portion of the second main surface M2, and a portion of the first side surface S1 and a portion of the second side surface S2.

[0051] The first and second base electrode layers 32 and 33 contain a conductive metal and a glass component. The conductive metal includes at least one selected from Cu, Ni, Ag, Pd, an Ag-Pd alloy, Au, etc. The glass component includes at least one selected from B, Si, Ba, Mg, Al, Li, etc.

[0052] The first base electrode layer 32 and the second base electrode layer 33 may each be formed as a multi-layer structure. Alternatively, the first base electrode layer 32 and the second base electrode layer 33 may be formed by applying a conductive paste containing glass and metal to the laminate and then baking the layer. This baking may be performed simultaneously with the baking of the internal electrodes, or after the baking of the internal electrodes. Thus, the first base electrode layer 32 and the second base electrode layer 33 are configured as baked layers.

[0053] The thickness of the first base electrode layer 32 at the center in the height direction T of the first base electrode layer 32 located on the first end face E1 is preferably, for example, about 10 μm to 150 μm. Similarly, the thickness of the second base electrode layer 37 at the center in the height direction T of the second base electrode layer 37 located on the second end face E2 is preferably, for example, about 10 μm to 150 μm.

[0054] When the first base electrode layer 32 and the second base electrode layer 33 are provided on the first main surface M1 and the second main surface M2, and the first side surface S1 and the second side surface S2, it is preferable that the thickness of the first base electrode layer 32 or the second base electrode layer 33 at the center in the longitudinal direction L of the first base electrode layer 32 or the second base electrode layer 33 located on the first main surface M1 and the second main surface M2, and the first side surface S1 and the second side surface S2 is, for example, approximately 5 μm or more and 50 μm or less.

[0055] (Conductive resin layer) A conductive resin layer is disposed on the base electrode layer. The conductive resin layer contains a resin component and a metal component. The conductive resin layer has a first conductive resin layer 34 and a second conductive resin layer 35. The first conductive resin layer 34 and the second conductive resin layer 35 contain a thermosetting resin as a resin component. Therefore, the first conductive resin layer 34 and the second conductive resin layer 35 are more flexible than the base electrode layer. This is because the base electrode layer is made of, for example, a plating film or a fired product of a metal component and a glass component.

[0056] Therefore, even if a bending stress is applied to the mounting substrate and a physical impact is applied to the multilayer ceramic capacitor, or even if an impact due to a thermal cycle is applied to the multilayer ceramic capacitor, the occurrence of cracks in the multilayer ceramic capacitor can be suppressed because the conductive resin layer functions as a buffer layer.

[0057] Specific examples of the thermosetting resin contained in the conductive resin layer include various known thermosetting resins such as epoxy resin, phenolic resin, urethane resin, silicone resin, and polyimide resin. Among them, epoxy resin is one of the most suitable resins because epoxy resin has excellent heat resistance, moisture resistance, adhesion, etc.

[0058] The first conductive resin layer 34 is disposed on the first base electrode layer 32. More specifically, the first conductive resin layer 34 is disposed so as to cover the first base electrode layer 32. An end of the first conductive resin layer 34 is in contact with the laminate 2.

[0059] Similarly, the second conductive resin layer 35 is disposed on the second base electrode layer 33. More specifically, the second conductive resin layer 35 is disposed so as to cover the second base electrode layer 33. An end of the second conductive resin layer 35 is in contact with the laminate 2.

[0060] The metal component contained in the first conductive resin layer 34 and the second conductive resin layer 35 is preferably a metal filler. The metal component particularly preferably contains Ag. Ag may be simple Ag or an alloy containing Ag.

[0061] Ag may be coated on the surface of a metal powder other than Ag. When using a metal powder whose surface is coated with Ag, it is preferable to use a powder of Cu, Ni, Sn, Bi, or an alloy thereof as the metal powder.

[0062] The use of Ag as a metal filler has the following advantages. Ag has the lowest resistivity of all metals. Therefore, it is possible to form electrodes with low electrical resistance. Furthermore, because Ag is a noble metal, it is resistant to oxidation. Therefore, it is possible to improve the weather resistance of the conductive resin layer. By using Ag as a metal filler, it is possible to use a cheaper base metal while maintaining the properties of Ag.

[0063] The shape of the metal filler contained in the first conductive resin layer 34 and the second conductive resin layer 35 is not particularly limited. The metal filler may be spherical, flat, or the like. The metal filler may be a mixture of spherical metal powder and flat metal powder.

[0064] The average particle size of the metal filler contained in the first conductive resin layer 34 and the second conductive resin layer 35 is not particularly limited. The average particle size of the metal filler can be, for example, 0.3 μm or more and 10 μm or less. The average particle size of the metal filler contained in the conductive resin layer can be calculated by laser diffraction particle size measurement (based on ISO 13320). This method of calculating the average particle size can be applied regardless of the shape of the filler.

[0065] The metal fillers contained in the first conductive resin layer 34 and the second conductive resin layer 35 are mainly responsible for the electrical conductivity of the conductive resin layers. Specifically, the metal fillers come into contact with each other, forming electrical paths within the conductive resin layers.

[0066] As described above, examples of the resin contained in the first conductive resin layer 34 and the second conductive resin layer 35 include various known thermosetting resins such as epoxy resin, phenoxy resin, phenol resin, urethane resin, silicone resin, polyimide resin, etc. Among these, epoxy resin is one of the most suitable resins due to its excellent heat resistance, moisture resistance, adhesion, etc.

[0067] The first conductive resin layer 34 and the second conductive resin layer 35 preferably contain a curing agent in addition to the thermosetting resin. When an epoxy resin is used as the base resin, various known compounds such as phenol-based, amine-based, acid anhydride-based, imidazole-based, active ester-based, and amide-imide-based compounds can be used as the curing agent.

[0068] The thickness of the first conductive resin layer 34 and the second conductive resin layer 35 is preferably, for example, about 10 μm or more and 200 μm or less.

[0069] (plating layer) The plating layer will now be described. As described above, the plating layer includes an inner plating layer and an outer plating layer. That is, the plating layer includes two layers. However, the plating layer may be a single layer or multiple layers.

[0070] (Inner plating layer) The inner plating layer is disposed on the conductive resin layer. The inner plating layer covers at least a portion of the conductive resin layer. The inner plating layer includes a first inner plating layer 36 and a second inner plating layer 37. The first inner plating layer 36 is disposed on the first conductive resin layer 34. The second inner plating layer 37 is disposed on the second conductive resin layer 35.

[0071] The first inner plating layer 36 and the second inner plating layer 37 may be Ni plating layers. By using Ni plating layers as the inner plating layers, it is possible to prevent the base electrode layer and the like from being eroded by solder when the multilayer ceramic capacitor 1 is mounted.

[0072] (Outer plating layer) The outer plating layer is disposed on the inner plating layer. The outer plating layer covers at least a portion of the inner plating layer. The outer plating layer includes a first outer plating layer 38 and a second outer plating layer 39. The first outer plating layer 38 is disposed on the first inner plating layer 36. The second outer plating layer 39 is disposed on the second inner plating layer 37.

[0073] The first outer plating layer 38 and the second outer plating layer 39 may be Sn plating layers. Sn plating layers have good solder wettability. Therefore, by using Sn plating layers for the outer plating layers, mounting of the multilayer ceramic capacitor 1 on a substrate or the like can be facilitated.

[0074] The metals used to form the inner and outer plating layers are not limited to the examples described above. The plating layers, including the inner and outer plating layers, may contain at least one selected from metals such as Cu, Ni, Ag, Pd, Au, and Sn, and alloys such as Ag-Pd alloys.

[0075] The thickness of each plating layer is preferably 3 μm or more and 9 μm or less.

[0076] The ceramic capacitor 1 of this embodiment is characterized by its inner plating layer. In the following description, the first inner plating layer 36 and the second inner plating layer 37 will be described as Ni plating layers. Therefore, the first inner plating layer 36 may be referred to as the first Ni plating layer 36, and the second inner plating layer 37 may be referred to as the second Ni plating layer 37.

[0077] In the following description, the first outer plating layer 38 and the second outer plating layer 39 will be described as Sn plating layers. Therefore, the first outer plating layer 38 may be referred to as the first Sn plating layer 38, and the second outer plating layer 39 may be referred to as the second Sn plating layer 39.

[0078] The Ni plating layer of this embodiment has a Ni plating wraparound layer. The Ni plating wraparound layer refers to a portion of the Ni plating layer disposed between the surface of the laminate 2 and the conductive resin layer. This will be explained based on FIG. 7, which is an enlarged view of region R1 in FIG. 2. The Ni plating wraparound layer includes four Ni plating wraparound layers, first to fourth.

[0079] The first Ni plating wraparound layer is a part of the first Ni plating layer 36 arranged between the first conductive resin layer 34 and the first main surface M1 of the laminate 2. The second Ni plating wraparound layer is a part of the first Ni plating layer 36 arranged between the first conductive resin layer 34 and the second main surface M2 of the laminate 2. The third Ni plating wraparound layer 43 is a part of the second Ni plating layer 37 arranged between the second conductive resin layer 35 and the first main surface M1 of the laminate 2. The fourth Ni plating wraparound layer is a part of the second Ni plating layer 37 arranged between the second conductive resin layer 35 and the second main surface M2 of the laminate 2.

[0080] 7 shows the third Ni plating wraparound layer 43 out of the first to fourth Ni plating wraparound layers. The Ni plating wraparound layers will be described below using the third Ni plating wraparound layer 43 as an example. The first, second, and fourth Ni plating wraparound layers have the same configuration as the third Ni plating wraparound layer 43.

[0081] As shown in region R2 of Figure 7, the second Ni plating layer 37 covers the second conductive resin layer 35 and has a third Ni plating wraparound layer 43 extending on the first main surface M1 in the direction of the second end face E2.

[0082] In addition, in the LT cross section, the portion where the second Sn plating layer 39 contacts the laminate 2 is located closer to the first end face E1 than the position of the third main surface conductive resin layer 47 closest to the first end face E1.

[0083] Furthermore, in the LT cross section, the portion where the second Sn plating layer 39 contacts the laminate 2 is located closer to the first end face E1 than the position of the third main surface conductive resin layer 47 closest to the first end face E1.

[0084] In addition, in the LT cross section, the portion where the second Sn plating layer 39 contacts the laminate 2 is located closer to the first end face E1 than the position of the second Ni plating layer 37 closest to the first end face E1. In other words, the second Sn plating layer 39 does not extend between the second Ni plating layer 37 and the laminate 2.

[0085] Ag migration can be suppressed by providing the third Ni-plated wraparound layer 43. This will be explained below.

[0086] The conductive filler in the resin electrode contains Ag. This Ag can be ionized when voltage is applied at high temperatures or in a high-temperature, high-humidity environment. The ionized Ag can react with reactants such as water and halogens, causing Ag migration.

[0087] Figure 8 shows a multilayer ceramic capacitor that does not have a third Ni-plated wraparound layer. The component numbers shown in Figure 8 are marked with an '. This is to distinguish them from the multilayer ceramic capacitor 1 of this embodiment, which has a third Ni-plated wraparound layer 43. The component numbers with the ' removed correspond to the component numbers of this embodiment.

[0088] As shown in FIG. 8, in a multilayer ceramic capacitor not provided with a third Ni plating wraparound layer, water and the like easily penetrated into the second conductive resin layer 35′ through the interface between the first main surface M1′ of the laminate 2′ and the second Sn plating layer 39′ and the interface between the first main surface M1′ of the laminate 2′ and the second Ni plating layer 37′.

[0089] In contrast, the multilayer ceramic capacitor 1 of this embodiment has a configuration in which the conductive resin layer 35 is covered with the third Ni-plated wraparound layer 43. This makes it difficult for ionized Ag to react with reactants such as water and halogens, thereby suppressing the occurrence of Ag migration.

[0090] The second conductive resin layer 35 covers the second base electrode layer 33, and a portion of the second conductive resin layer 35 is disposed directly on the first main surface M1 of the laminate 2. The third Ni-plated wraparound layer 43 is disposed between the second conductive resin layer 35 disposed directly on the first main surface M1 of the laminate 2 and the first main surface M1 of the laminate 2.

[0091] This configuration can further enhance the effect of suppressing Ag migration. It also makes it easier to arrange the third Ni-plated wraparound layer 43 directly on the first main surface M1 of the laminate 2. This makes it possible to further suppress water and other contaminants from traveling over the first main surface M1 of the laminate 2 and reaching the second conductive resin layer 35.

[0092] The dimensions of the third Ni plating wraparound layer 43 will be described. In the third Ni plating wraparound layer 43, the portion where extension on the first main surface M1 toward the second end face E2 begins is referred to as a starting end 44. In addition, the portion of the third Ni plating wraparound layer 43 where extension on the first main surface M1 toward the second end face E2 ends is referred to as a terminal end 45. The terminal end 45 corresponds to the end of the third Ni plating wraparound layer 43.

[0093] 7, the dimension in the length direction L of the third Ni-plated extending layer 43 is indicated by dimension D1. Dimension D1 is the distance in the length direction L from the starting end 44 to the ending end 45 of the third Ni-plated extending layer 43. Dimension D1 is preferably 5 μm or more.

[0094] 7, the dimension of the third Ni-plated extending layer 43 in the height direction T is indicated by dimension D3. Dimension D3 is the distance in the height direction T of the third Ni-plated extending layer 43 from the starting end 44 of the third Ni-plated extending layer 43. Dimension D3 is preferably 2 μm or more.

[0095] By setting the dimensions D1 and D3 of the third Ni-plated wraparound layer 43 within the above-mentioned ranges, the occurrence of Ag migration can be more significantly suppressed.

[0096] By making the dimension D1 equal to or greater than a predetermined value, it becomes possible to better prevent water and the like from flowing over the first main surface M1 of the laminate 2 and reaching the second conductive resin layer 35.

[0097] By making the dimension D3 equal to or greater than a predetermined value, it becomes possible to better prevent water and the like from passing through the third Ni plating wraparound layer 43 in the height direction T and reaching the second conductive resin layer 35.

[0098] 7 shows the dimension in the length direction L of the third principal surface conductive resin layer 47 on the first principal surface M1 as dimension D2. The dimension in the length direction L of the third principal surface conductive resin layer 47 on the first principal surface M1 means the distance in the direction parallel to the length direction L between the position of the third principal surface conductive resin layer 47 closest to the first end face E1 and the position of the portion of the third principal surface conductive resin layer 47 in contact with the first principal surface M1 closest to the second end face E2 in the LT cross section. Dimension D1 is preferably 56% or more of dimension D2.

[0099] By making the dimension D1 56% or more of the dimension D2, the occurrence of Ag migration can be more significantly suppressed. By making the ratio of the dimension D1 to the dimension D2 a predetermined value or more, the length of the third Ni-plated wraparound layer 43, which is preferable for suppressing the arrival of water and the like at the third principal surface conductive resin layer 47, can be sufficiently secured.

[0100] The thickness of the third Ni-plated wraparound layer 43 in the height direction T preferably becomes thinner as the third Ni-plated wraparound layer 43 moves toward the second end face E2 in the length direction L. The dimension of the third Ni-plated wraparound layer 43 in the height direction T at the end portion 45 is defined as dimension D4. When the change in thickness of the third Ni-plated wraparound layer 43 has the above-mentioned tendency, dimension D4 is smaller than dimension D3.

[0101] By reducing the thickness in the height direction T of the third Ni-plated wraparound layer 43 as described above, it is possible to more significantly suppress the occurrence of Ag migration. By reducing the thickness of the third Ni-plated wraparound layer 43 near the end portion 45, it becomes easier to improve the adhesion between the third Ni-plated wraparound layer 43 and the first main surface M1 of the laminate 2. This makes it easier to further suppress the arrival of water and the like at the third main surface conductive resin layer 47.

[0102] The arrangement of the Ni plating wraparound layer in the width direction W will be described with reference to Fig. 3. As described above, the laminate 2 can be divided into a first side portion W1, a W counter electrode portion W2, and a second side portion W3 in the width direction W. Also, as described above, the first side portion W1 is also referred to as a first side surface side outer layer portion, the W counter electrode portion W2 is also referred to as an inner layer portion, and the second side portion W3 is also referred to as a second side surface side outer layer portion.

[0103] The Ni-plated wrap-around layer is preferably disposed on the surface of the first main surface M1 corresponding to the first side portion W1 and the surface of the second side portion W3 in the width direction W of the laminate 2. Similarly, the Ni-plated wrap-around layer is preferably disposed on the surface of the second main surface M2 corresponding to the first side portion W1 and the surface of the second main surface M2 corresponding to the second side portion W3 in the width direction W of the laminate 2.

[0104] 3, the portion of the first main surface M1 corresponding to the first side portion W1 is indicated by arrow A. The portion of the first main surface M1 corresponding to the second side portion W3 is indicated by arrow B. Furthermore, the portion of the second main surface M2 corresponding to the first side portion W1 is indicated by arrow C. The portion of the second main surface M2 corresponding to the second side portion W3 is indicated by arrow D.

[0105] As shown by arrows A to D in FIG. 3, the multilayer ceramic capacitor 1 has Ni plating wraparound layers provided on the main surfaces of the first side surface outer layer portion and the second side surface outer layer portion.

[0106] By disposing a Ni plating wraparound layer on the main surfaces indicated by arrows A to D in Figure 3, it is possible to more significantly suppress the occurrence of Ag migration. The main surfaces of the first side surface outer layer portion and the main surfaces of the second side surface outer layer portion are near the corners of the laminate 2. Near the corners of the laminate 2, water and other substances are likely to penetrate between the surface of the laminate 2 and the external electrodes.

[0107] In the multilayer ceramic capacitor 1 of this embodiment, the Ni plating wraparound layer is provided in the aforementioned portion where water and the like are likely to penetrate, which makes it possible to more significantly suppress the occurrence of Ag migration.

[0108] The dimensions of the multilayer ceramic capacitor 1 are not particularly limited. The dimension in the length direction L of the multilayer ceramic capacitor 1, including the laminate 2 and external electrodes, is referred to as dimension L. The dimension L is preferably 0.2 mm or more and 10 mm or less. The dimension in the height direction T of the multilayer ceramic capacitor 1, including the laminate 2 and external electrodes, is referred to as dimension T. The dimension T is preferably 0.1 mm or more and 5 mm or less. The dimension in the width direction of the multilayer ceramic capacitor 1, including the laminate 2 and external electrodes, is referred to as dimension W. The dimension W is preferably 0.1 mm or more and 10 mm or less.

[0109] (Manufacturing method of multilayer ceramic capacitors) An example of a method for manufacturing the multilayer ceramic capacitor 1 will now be described. (1) Prepare a conductive paste for the dielectric sheet and the internal electrodes. The conductive paste for the dielectric sheet and the internal electrodes contains a binder and a solvent. These binders and solvents can be known organic binders and organic solvents.

[0110] (2) An internal electrode pattern is formed by printing a conductive paste for the internal electrodes in a predetermined pattern on the dielectric sheet. The printing can be performed by, for example, screen printing or gravure printing.

[0111] (3) A predetermined number of dielectric sheets for the outer layer portions are stacked. The dielectric sheets for the outer layer portions do not have internal electrode patterns printed on them. Dielectric sheets with internal electrode patterns printed on them are stacked in order on top of them. Furthermore, a predetermined number of dielectric sheets for the outer layer portions are stacked on top of them. This produces a laminated sheet.

[0112] (4) The laminated sheet is pressed in the height direction to produce a laminated block. Pressing is performed by means of a hydrostatic press or the like.

[0113] (5) The laminated block is cut to a predetermined size, thereby cutting out laminated chips. At this time, the corners and ridges of the laminated chips may be rounded. The rounding can be achieved by barrel polishing or the like.

[0114] (6) The laminated chip is fired to produce a laminate. The firing temperature is preferably 900° C. or higher and 1400° C. The firing temperature can be changed depending on the materials of the dielectric and internal electrodes.

[0115] (Base electrode) (7) A conductive paste that will become the base electrode is applied to both end surfaces of the laminate to form a base electrode layer. In this embodiment, a baked layer is formed as the base electrode layer. When forming the baked layer, the conductive paste is applied to a predetermined position of the laminate. The conductive paste contains a glass component and a metal. The application can be performed by a method such as dipping. After application, a baking process is performed to form the base electrode layer. The temperature of the baking process is preferably 700°C or higher and 950°C or lower.

[0116] (Conductive resin layer) (8) The conductive resin layer is formed on the base electrode layer. To form the conductive resin layer, a conductive resin paste is first prepared. The conductive resin paste contains a resin component and a metal component. This conductive resin paste is applied to the base electrode layer. This application can be performed by a dipping method. After application, a heat treatment is performed at a temperature of 200°C or higher and 550°C or lower. This heat treatment thermally hardens the resin. This forms the conductive electrode layer. The atmosphere during the heat treatment is preferably a nitrogen gas atmosphere. Furthermore, to prevent the resin from scattering and the various metal components from oxidizing, it is preferable to keep the oxygen concentration below 100 ppm.

[0117] (9) After forming the conductive resin layer, Ni plating layers are formed on the surface of the conductive resin layer as first and second inner plating layers. The first and second Ni plating layers can be formed by electrolytic plating. Furthermore, barrel plating is preferably used as the plating method.

[0118] (Method of forming a Ni plating wraparound layer) An example of a method for forming the Ni plating wraparound layer will be described below, although the method for forming the Ni plating wraparound layer is not limited to this.

[0119] When forming the conductive resin layer, adjusting at least one of the resin curing temperature and curing time allows for control of the shape of the gap between the conductive resin layer and the laminate, where the Ni-plated wraparound layer will later be placed. For example, a higher curing temperature and a longer curing time make it easier for peeling to occur between the conductive resin layer and the base body, i.e., the laminate. The Ni-plated layer then penetrates into this peeling area.

[0120] (10) An Sn plating layer is further formed on the Ni plating layer. That is, a first Sn plating layer is formed on the first Ni plating layer, and a second Sn plating layer is formed on the second Ni plating layer. This improves the wettability of the solder used for mounting when mounting the multilayer ceramic capacitor on a substrate or the like. As a result, the multilayer ceramic capacitor can be easily mounted on a substrate or the like. Electrolytic plating can be used as a method for forming the Sn plating layer. Furthermore, barrel plating is preferably used as the plating method.

[0121] (Example) According to the above-described manufacturing method, a multilayer ceramic capacitor was fabricated as an example of a multilayer ceramic electronic component. The fabricated multilayer ceramic capacitor was then used as a sample to evaluate characteristics such as the number of occurrences of migration and the number of occurrences of mechanical strength defects. The samples and evaluation conditions are as follows. Multilayer ceramic capacitor dimensions: L×W×T=1.0mm×0.5mm×0.5mm Ceramic material: BaTiO3 ·Capacity: 0.01μF Rated voltage: 50V

[0122] External electrode structure (1) Base electrode layer Base electrode layer: Contains Cu as a conductive metal and a glass component. Thickness of the base electrode layer at the center in the height direction T located at the first end face E1 and the second end face E2: 15 μm Thickness of the base electrode layer at the center in the length direction L of the base electrode layer located on the first principal surface M1, the second principal surface M2, the first side surface S1, and the second side surface S2: 4 μm

[0123] (2) Conductive resin layer Metal filler: Ag Resin: Epoxy Heat curing temperature: 200℃ Thickness of the conductive resin layer at the center in the height direction of the first conductive resin layer portion located on the first end face E1 and the second end face E2: 20 μm Thickness of the conductive resin layer at the center in the length direction of the conductive resin layer located on the first principal surface M1, the second principal surface M2, the first side surface S1, and the second side surface S2: 20 μm

[0124] (3) Ni plating layer Thickness of the Ni plating layer at the center in the height direction T of the Ni plating layer located on the first end face E1 and the second end face E2: 2 μm Thickness of the Ni plating layer at the center in the length direction L of the Ni plating layer located on the first principal surface M1, the second principal surface M2, and the first side surface S1, and the second side surface S2: 2.0 μm

[0125] (4) Sn plating layer Thickness of the Sn plating layer at the center in the height direction T of the Sn plating layer located on the first end face E1 and the second end face E2: 1.5 μm Thickness of the Sn plating layer at the center in the length direction L of the Sn plating layer located on the first main surface M1, the second main surface M2, and the first side surface S1, and the second side surface S2: 1.0 μm

[0126] (Method for evaluating short circuits caused by Ag migration) A humidity load test was performed on the multilayer ceramic capacitor by applying a DC voltage of 50 V in an environment with a humidity of 90% RH to 95% RH and a temperature of 85° C. The test time was 4000 hours.

[0127] After this test, a direct current voltage of 50 V was applied to the chip (multilayer ceramic capacitor) in an environment with a humidity of 90% to 95% RH and a temperature of 85°C, and a humidity load test was performed. The test time was 4000 hours. During this test, the insulation resistance value was measured.

[0128] The measured insulation resistance is 1×10 6 Ω or less and dendritic Ag precipitates on the first principal surface, the second principal surface, the first side surface, and the second side surface, it was determined that a short circuit due to migration of Ag ions had occurred. The conditions for measuring the insulation resistance value and observing the appearance were as follows: Insulation resistance measurement Equipment: IR meter Measurement time: 60 seconds ·Appearance observation (check for dendritic deposits) Equipment: Metallurgical microscope Field of view: bright field or polarized light Magnification: 500x ·Appearance observation (Ag confirmation) Equipment: SEM-EDX Electron image: Backscattered electrons Accelerating voltage: 15 kV Magnification: 2000x Detected element: Ag In the appearance observation, first, the presence or absence of dendritic precipitates is confirmed using a metallurgical microscope. If the presence of dendritic precipitates is confirmed using the metallurgical microscope, it is then confirmed using SEM-EDX whether the precipitates are Ag.

[0129] (Method for evaluating the dimensions of the Ni plating wraparound layer) The chip was cross-section polished and resin hardened, and the cross section of the W-direction end of the LT cross section was photographed at 5000x magnification using an SEM. The dimensions of the Ni plating wraparound layer were measured in the photographed image and the average value was calculated. The chip's length (L) was 3.2 mm.

[0130] The evaluation results are shown in Figure 9. The criteria for the evaluation shown in Figure 9 were as follows. ·Judgment criteria 〇: Zero shorts (number of shorts / total number = 0 / 77), △: Short occurrence rate is less than 10% (number of shorts / total number = 7 / 77), ×: Short occurrence rate is 10% or more

[0131] As shown in Figure 9, the incidence of short circuits was suppressed in the samples with the Ni plating wraparound layer described above. Furthermore, the incidence of short circuits was further suppressed in samples with an A / C ratio of 0.56 or higher.

[0132] In the multilayer ceramic capacitor 1 of this embodiment, a desired Ni plating layer is disposed between the conductive resin layer and the main surface of the laminate 2, and therefore the conductive filler contained in the resin electrode is coated with Ni plating. Therefore, when Ag is ionized by application of voltage at high temperature or in a high-temperature, high-humidity environment, the ionized Ag cannot react with reactants such as water or halogens. Therefore, it has been confirmed that migration of Ag can be suppressed, and therefore short circuits between electrodes can be suppressed.

[0133] Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments and various modifications and variations are possible. For example, the Ni plating wraparound layer can be formed on the side surfaces as well as on the main surfaces as described above.

[0134] <1> a laminate including a plurality of laminated dielectric layers and internal electrode layers, the laminate having a first main surface M1 and a second main surface M2 opposing each other in a height direction, a first side surface S1 and a second side surface S2 opposing each other in a width direction perpendicular to the height direction, and a first end surface E1 and a second end surface E2 opposing each other in a length direction perpendicular to the height direction and the width direction; a first external electrode disposed on the first end surface; a second external electrode disposed on the second end surface, The internal electrode layer is a first internal electrode layer disposed on the plurality of dielectric layers and exposed at the first end surface; a second internal electrode layer disposed on the plurality of dielectric layers and exposed at the second end surface, The first external electrode is a first base electrode layer containing a metal component; a first conductive resin layer disposed on the first base electrode layer and containing a thermosetting resin and a filler; a first Ni plating layer disposed on the first conductive resin layer; a first Sn-plated layer disposed on the first Ni-plated layer; The second external electrode is a second base electrode layer containing a metal component; a second conductive resin layer disposed on the second base electrode layer and containing a thermosetting resin and a filler; a second Ni plating layer disposed on the second conductive resin layer; a second Sn-plated layer disposed on the second Ni-plated layer; the first external electrode extends to the first and second principal surfaces, the second external electrode extends to the first and second principal surfaces, a first Ni plating wraparound layer, in which the first Ni plating layer is disposed, between the first conductive resin layer and the first main surface of the laminate; a second Ni-plated wraparound layer, on which the first Ni-plated layer is disposed, is provided between the first conductive resin layer and the second main surface of the laminate; a third Ni-plated wraparound layer, in which the second Ni-plated layer is disposed, between the second conductive resin layer and the first main surface of the laminate; a fourth Ni-plated wraparound layer, in which the second Ni-plated layer is disposed, between the second conductive resin layer and the second main surface of the laminate; Multilayer ceramic electronic components.

[0135] <2> a portion of the first conductive resin layer is disposed directly above the first main surface and directly above the second main surface of the laminate; a portion of the second conductive resin layer is disposed directly above the first main surface and directly above the second main surface of the laminate; <1> The multilayer ceramic electronic component according to claim 1.

[0136] <3> The length of each of the first Ni plating wraparound layer, the second Ni plating wraparound layer, the third Ni plating wraparound layer, and the fourth Ni plating wraparound layer is 5 μm or more, and the height of each of the first Ni plating wraparound layer, the second Ni plating wraparound layer, the third Ni plating wraparound layer, and the fourth Ni plating wraparound layer is 2 μm or more. <1> or <2> The multilayer ceramic electronic component according to claim 1.

[0137] <4> the ratio of the lengthwise dimension of each of the first Ni-plated wraparound layer and the second Ni-plated wraparound layer to the lengthwise dimension of the first conductive resin layer is 56% or more; the ratio of the lengthwise dimension of each of the third Ni-plated wraparound layer and the fourth Ni-plated wraparound layer to the lengthwise dimension of the second conductive resin layer is 56% or more; <1> from <3> 10. The multilayer ceramic electronic component according to claim 9, wherein the first and second electrodes are formed on the first and second substrates.

[0138] <5> the thicknesses of the first Ni-plated wraparound layer and the second Ni-plated wraparound layer in a height direction become thinner toward the first end face in a length direction; the thicknesses in the height direction of the third Ni-plated wraparound layer and the fourth Ni-plated wraparound layer become thinner in the length direction toward the second end face; <1> from <4> 10. The multilayer ceramic electronic component according to claim 9, wherein the first and second electrodes are formed on the first and second substrates.

[0139] <6> The laminate includes an inner layer portion where the plurality of internal electrodes face each other, a first side surface side outer layer portion located on the first side surface side and including the plurality of dielectric layers located between the first side surface and an outermost surface of the inner layer portion on the first side surface side; a second side surface side outer layer portion located on the second side surface side and including the plurality of dielectric layers located between the second side surface and an outermost surface of the inner layer portion on the second side surface side, the first and second side surface outer layer portions have first and second main surfaces on the first and second main surface sides of the laminate, the first and second Ni-plated wraparound layers are disposed on the first and second main surfaces of the first and second side surface outer layer portions, the third and fourth Ni-plated wraparound layers are disposed on the first and second main surfaces of the first and second side surface outer layer portions; <1> from <5> 10. The multilayer ceramic electronic component according to claim 9, wherein the first and second electrodes are formed on the first and second substrates. [Explanation of symbols]

[0140] 1. Multilayer ceramic capacitors (multilayer ceramic electronic components) 2. Laminate 4. Outer dielectric layer (dielectric layer) 5 Inner dielectric layer (dielectric layer) 12 Floating internal electrode layer 20 First external electrode 21 Second external electrode 43 Third Ni plating wraparound layer 44 Starting end of the third Ni plating wraparound layer 45 End of third Ni plating wraparound layer 47 Third principal surface conductive resin layer

Claims

1. a laminate including a plurality of laminated dielectric layers and internal electrode layers, the laminate having a first main surface M1 and a second main surface M2 opposing each other in a height direction, a first side surface S1 and a second side surface S2 opposing each other in a width direction perpendicular to the height direction, and a first end surface E1 and a second end surface E2 opposing each other in a length direction perpendicular to the height direction and the width direction; a first external electrode disposed on the first end surface; a second external electrode disposed on the second end surface, The internal electrode layer is a first internal electrode layer disposed on the plurality of dielectric layers and exposed at the first end surface; a second internal electrode layer disposed on the plurality of dielectric layers and exposed at the second end surface, The first external electrode is a first base electrode layer containing a metal component; a first conductive resin layer disposed on the first base electrode layer and containing a thermosetting resin and a filler; a first Ni plating layer disposed on the first conductive resin layer; a first Sn-plated layer disposed on the first Ni-plated layer; The second external electrode is a second base electrode layer containing a metal component; a second conductive resin layer disposed on the second base electrode layer and containing a thermosetting resin and a filler; a second Ni plating layer disposed on the second conductive resin layer; a second Sn-plated layer disposed on the second Ni-plated layer; the first external electrode extends to the first and second principal surfaces, the second external electrode extends to the first and second main surfaces, a first Ni-plated wraparound layer, in which the first Ni-plated layer is disposed, between the first conductive resin layer and the first main surface of the laminate; a second Ni-plated wraparound layer having the first Ni-plated layer disposed between the first conductive resin layer and the second main surface of the laminate; a third Ni-plated wraparound layer having the second Ni-plated layer disposed between the second conductive resin layer and the first main surface of the laminate; a fourth Ni-plated wraparound layer, in which the second Ni-plated layer is disposed, between the second conductive resin layer and the second main surface of the laminate; Multilayer ceramic electronic components.

2. a portion of the first conductive resin layer is disposed directly above the first main surface and directly above the second main surface of the laminate; a portion of the second conductive resin layer is disposed directly above the first main surface and directly above the second main surface of the laminate; The multilayer ceramic electronic component according to claim 1 .

3. The length of each of the first Ni-plated wraparound layer, the second Ni-plated wraparound layer, the third Ni-plated wraparound layer, and the fourth Ni-plated wraparound layer is 5 μm or more, and the thickness of each of the first Ni-plated wraparound layer and the fourth Ni-plated wraparound layer is 2 μm or more.

3. The multilayer ceramic electronic component according to claim 1 or 2.

4. a ratio of the lengthwise dimension of each of the first Ni-plated wraparound layer and the second Ni-plated wraparound layer to the lengthwise dimension of the first conductive resin layer is 56% or more; the ratio of the lengthwise dimension of each of the third Ni-plated wraparound layer and the fourth Ni-plated wraparound layer to the lengthwise dimension of the second conductive resin layer is 56% or more; 3. The multilayer ceramic electronic component according to claim 1 or 2.

5. the thicknesses of the first Ni-plated wraparound layer and the second Ni-plated wraparound layer in a height direction become thinner toward the first end face in a length direction; the thicknesses of the third Ni-plated wraparound layer and the fourth Ni-plated wraparound layer in the height direction become thinner toward the second end face in the length direction; 3. The multilayer ceramic electronic component according to claim 1 or 2.

6. The laminate includes an inner layer portion where the plurality of internal electrodes face each other, a first side surface side outer layer portion located on the first side surface side and including the plurality of dielectric layers located between the first side surface and an outermost surface of the inner layer portion on the first side surface side; a second side surface side outer layer portion located on the second side surface side and including the plurality of dielectric layers located between the second side surface and an outermost surface of the inner layer portion on the second side surface side, the first and second side surface outer layer portions have first and second main surfaces on the first and second main surface sides of the laminate, the first and second Ni-plated wraparound layers are disposed on the first and second main surfaces of the first and second side surface outer layer portions, the third and fourth Ni-plated wraparound layers are disposed on the first and second main surfaces of the first and second side surface outer layer portions; 3. The multilayer ceramic electronic component according to claim 1 or 2.

Images