Multilayer electronic components

Abstract

To provide a multilayer electronic component in which the distance between a ground conductive layer and a non-ground conductor can be increased while a connection part is connected to a ground terminal at a desired position.SOLUTION: An electronic component 1 includes a multilayer body 50 including a plurality of conductors, and a ground terminal 113 provided at an outer peripheral part of the multilayer body 50. The conductors include a plurality of ground conductors and a plurality of non-ground conductors. The ground conductors include a ground conductor layer 541 and a plurality of connection parts CN1. The connection parts CN1 are disposed between the ground conductive layer 541 and the non-ground conductors in a stacking direction T of dielectric layers 51 to 74.SELECTED DRAWING: Figure 8

Description

[Technical Field]

[0001] The present invention relates to a multilayer electronic component in which a ground conductor layer is provided inside a laminate. [Background technology]

[0002] One type of electronic component used in communication devices is a bandpass filter having a plurality of resonators. Each of the resonators is configured, for example, by a distributed constant line. The distributed constant line is configured to have a predetermined line length. Furthermore, bandpass filters used in small communication devices in particular are required to be miniaturized. A known bandpass filter suitable for miniaturization is one that uses a laminate including a plurality of stacked dielectric layers and a plurality of stacked conductor layers.

[0003] Patent Document 1 discloses a multilayer LC filter including a laminate formed by stacking multiple dielectric layers, a line-like conductor pattern, a capacitor conductor pattern, a ground conductor pattern, and via conductors. The ground conductor pattern is disposed between the line-like conductor pattern and the bottom surface of the laminate. The ground conductor pattern also includes a connecting conductor pattern for connection to a ground terminal formed on a side surface of the laminate. The via conductor connects the line-like conductor pattern and the ground conductor pattern. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] International Publication No. 2018 / 066339 Summary of the Invention [Problem to be solved by the invention]

[0005] In a multilayer electronic component in which a distributed constant line and a ground conductor layer that constitute a resonator are provided inside a laminate, such as the multilayer LC filter disclosed in Patent Document 1, it is preferable to increase the distance between the distributed constant line and the ground conductor layer. However, increasing the distance between the distributed constant line and the ground conductor layer reduces the distance between the ground conductor layer and the bottom surface of the laminate. In the course of research, the inventors of the present application found that as the distance between the ground conductor layer and the bottom surface of the laminate decreases, cracks are more likely to occur in the laminate, starting from the portion where the ground conductor layer is connected to the terminal on the side of the laminate.

[0006] The above problem is not limited to multilayer electronic components in which the distributed constant lines and ground conductor layers that constitute the resonators are provided inside the laminate, but applies to all multilayer electronic components in which ground conductor layers and non-ground conductors are provided inside the laminate and ground terminals are provided on the outer periphery of the laminate.

[0007] The present invention has been made in view of the above problems, and an object of the present invention is to provide a multilayer electronic component in which ground conductor layers and non-ground conductors are provided inside a laminate and ground terminals are provided on the outer periphery of the laminate, and which can increase the distance between the ground conductor layers and the non-ground conductors while connecting conductors to the ground terminals at desired positions to electrically connect the ground conductor layers and the ground terminals. [Means for solving the problem]

[0008] The multilayer electronic component of the present invention includes a laminate formed of a plurality of stacked dielectric layers and including a plurality of conductors, and at least one ground terminal provided on the outer periphery of the laminate and connected to ground. The plurality of conductors includes a plurality of ground conductors and a plurality of non-ground conductors. The plurality of ground conductors includes a ground conductor layer and at least one connection portion electrically connecting the ground conductor layer and the at least one ground terminal. The at least one connection portion is disposed between the ground conductor layer and the plurality of non-ground conductors in the stacking direction of the plurality of dielectric layers. [Effects of the Invention]

[0009] In the multilayer electronic component of the present invention, the ground conductors include a ground conductor layer and at least one connection portion. The at least one connection portion is disposed between the ground conductor layer and the non-ground conductors in the stacking direction of the dielectric layers. This makes it possible to connect the connection portion to the ground terminal at a desired position while increasing the distance between the ground conductor layer and the non-ground conductors. [Brief explanation of the drawings]

[0010] [Figure 1] 1 is a circuit diagram showing a circuit configuration of a multilayer electronic component according to a first embodiment of the present invention. [Figure 2] 1 is a perspective view showing the appearance of a multilayer electronic component according to a first embodiment of the present invention. [Figure 3] FIG. 2 is an explanatory view showing the pattern-forming surfaces of the first to fifth dielectric layers in the laminate of the multilayer electronic component according to the first embodiment of the present invention. [Figure 4] FIG. 2 is an explanatory view showing the pattern-forming surfaces of the sixth to eleventh dielectric layers in the laminate of the multilayer electronic component according to the first embodiment of the present invention. [Figure 5] FIG. 2 is an explanatory diagram showing pattern-forming surfaces of twelfth to fourteenth dielectric layers in the laminate of the multilayer electronic component according to the first embodiment of the present invention. [Figure 6] FIG. 2 is an explanatory view showing the pattern-forming surfaces of the 15th to 20th dielectric layers in the laminate of the multilayer electronic component according to the first embodiment of the present invention. [Figure 7] FIG. 2 is an explanatory diagram showing pattern-forming surfaces of the 21st to 24th dielectric layers in the laminate of the multilayer electronic component according to the first embodiment of the present invention. [Figure 8] 1 is a perspective view showing the inside of a laminate of a multilayer electronic component according to a first embodiment of the present invention. [Figure 9] 1 is a perspective view showing a part of the interior of a laminate of a multilayer electronic component according to a first embodiment of the present invention. [Figure 10] FIG. 4 is a perspective view showing another part of the interior of the laminate of the multilayer electronic component according to the first embodiment of the present invention. [Figure 11] FIG. 10 is an explanatory view showing the pattern-forming surfaces of the fourth to sixth dielectric layers in the laminate of the multilayer electronic component according to the second embodiment of the present invention. [Figure 12] FIG. 10 is an explanatory view showing the pattern-forming surfaces of the 20th to 22nd dielectric layers in the laminate of the multilayer electronic component according to the second embodiment of the present invention. [Figure 13] FIG. 10 is a perspective view showing a part of the inside of a laminate of a multilayer electronic component according to a second embodiment of the present invention. [Figure 14] FIG. 10 is an explanatory view showing pattern-forming surfaces of the fourth, fifth, and twenty-first dielectric layers in the laminate of the multilayer electronic component according to the third embodiment of the present invention. [Figure 15] FIG. 10 is a perspective view showing a part of the inside of a laminate of a multilayer electronic component according to a third embodiment of the present invention. [Figure 16] FIG. 10 is an explanatory view showing pattern-forming surfaces of the fifth and twenty-first dielectric layers in a laminate of a multilayer electronic component according to a fourth embodiment of the present invention. [Figure 17] FIG. 10 is a perspective view showing a part of the inside of a laminate of a multilayer electronic component according to a fourth embodiment of the present invention. [Figure 18]FIG. 10 is an explanatory view showing pattern-forming surfaces of the fourth, fifth, and twenty-first dielectric layers in the laminate of the multilayer electronic component according to the fifth embodiment of the present invention. [Figure 19] FIG. 11 is a perspective view showing a part of the inside of a laminate of a multilayer electronic component according to a fifth embodiment of the present invention. [Figure 20] FIG. 4 is a characteristic diagram showing the passing attenuation characteristics of the model of the first embodiment. [Figure 21] FIG. 10 is a characteristic diagram showing the passing attenuation characteristics of the model of the second embodiment. [Figure 22] FIG. 10 is a characteristic diagram showing the passing attenuation characteristics of the model of the third embodiment. [Figure 23] FIG. 10 is a characteristic diagram showing the passing attenuation characteristics of the model of the fourth embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0011] [First embodiment] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. First, the configuration of a multilayer electronic component (hereinafter simply referred to as electronic component) 1 according to a first embodiment of the present invention will be described with reference to Fig. 1. Fig. 1 is a circuit diagram showing the circuit configuration of electronic component 1. Electronic component 1 is configured to function as a bandpass filter that selectively passes signals within a predetermined frequency band.

[0012] The electronic component 1 includes a first port 2, a second port 3, and a plurality of resonators. The first port 2 and the second port 3 function as input and output ports of a bandpass filter, respectively. The plurality of resonators are arranged between the first port 2 and the second port 3 in terms of the circuit configuration. Note that in this application, the expression "in terms of the circuit configuration" refers to the arrangement on a circuit diagram, not the arrangement in a physical configuration.

[0013] Each of the resonators is a distributed constant line. Each of the resonators has a first end and a second end located at both ends in the longitudinal direction of the line. Each of the resonators may be a quarter-wave resonator in which one of the first end and the second end is short-circuited and the other is open, or a half-wave resonator in which both the first end and the second end are open.

[0014] In this embodiment, the plurality of resonators particularly includes three resonators 11, 12, and 13. The three resonators 11, 12, and 13 are arranged in this order from the first port 2 side in terms of the circuit configuration. The resonators 11 to 13 are configured such that the resonators 11 and 12 are adjacent to each other in terms of the circuit configuration and are electromagnetically coupled, and the resonators 12 and 13 are adjacent to each other in terms of the circuit configuration and are electromagnetically coupled.

[0015] In this embodiment, each of the resonators 11 to 13 is a quarter-wave resonator. A second end of each of the resonators 11 to 13 is connected to ground.

[0016] The electronic component 1 further includes capacitors C1, C2, C3, C4, C5, and C6. One end of the capacitor C1 is connected to the first port 2. One end of the capacitor C2 is connected to the other end of the capacitor C1. The other end of the capacitor C2 is connected to the second port 3. One end of the capacitor C3 is connected to the connection point between the first port 2 and the capacitor C1. The other end of the capacitor C3 is connected to the connection point between the second port 3 and the capacitor C2.

[0017] Capacitor C4 is provided between the first end of resonator 11 and ground. Capacitor C5 is provided between the first end of resonator 12 and ground. Capacitor C6 is provided between the first end of resonator 13 and ground.

[0018] The resonators 11 and 12 are capacitively coupled via a capacitor C1. The resonators 12 and 13 are capacitively coupled via a capacitor C2. The resonators 11 and 13 are capacitively coupled via a capacitor C3.

[0019] Next, other configurations of the electronic component 1 will be described with reference to Fig. 2. Fig. 2 is a perspective view showing the appearance of the electronic component 1.

[0020] The electronic component 1 further includes a laminate 50. The laminate 50 includes a plurality of laminated dielectric layers, and a plurality of conductor layers and a plurality of through holes formed in the plurality of dielectric layers. The first port 2, the second port 3, the resonators 11 to 13, and the capacitors C1 to C3 are integrated into the laminate 50. The resonators 11 to 13 are formed using a plurality of conductor layers.

[0021] The laminate 50 has a first surface 50A and a second surface 50B located at both ends in the stacking direction T of the multiple dielectric layers, and four side surfaces 50C to 50F connecting the first surface 50A and the second surface 50B. The side surfaces 50C and 50D face in opposite directions from each other, and the side surfaces 50E and 50F also face in opposite directions from each other. The side surfaces 50C to 50F are perpendicular to the first surface 50A and the second surface 50B.

[0022] Here, the X direction, Y direction, and Z direction are defined as shown in FIG. 2. The X direction, Y direction, and Z direction are perpendicular to each other. In this embodiment, a direction parallel to the stacking direction T is defined as the Z direction. The direction opposite to the X direction is defined as the -X direction, the direction opposite to the Y direction is defined as the -Y direction, and the direction opposite to the Z direction is defined as the -Z direction. In this application, the expression "when viewed from the stacking direction T" means that the object is viewed from a position away in the Z direction or the -Z direction.

[0023] As shown in FIG. 2, the first surface 50A is located at the end of the laminate 50 in the -Z direction. The first surface 50A is also the bottom surface of the laminate 50. The second surface 50B is located at the end of the laminate 50 in the Z direction. The second surface 50B is also the top surface of the laminate 50. The side surface 50C is located at the end of the laminate 50 in the -X direction. The side surface 50D is located at the end of the laminate 50 in the X direction. The side surface 50E is located at the end of the laminate 50 in the -Y direction. The side surface 50F is located at the end of the laminate 50 in the Y direction.

[0024] The electronic component 1 further includes signal terminals 111 and 112 and ground terminals 113 and 114. The signal terminal 111 is arranged from the first surface 50A, via the side surface 50C, to the second surface 50B. The signal terminal 112 is arranged from the first surface 50A, via the side surface 50D, to the second surface 50B. The ground terminal 113 is arranged from the first surface 50A, via the side surface 50F, to the second surface 50B. The ground terminal 114 is arranged from the first surface 50A, via the side surface 50E, to the second surface 50B.

[0025] The signal terminal 111 corresponds to the first port 2, and the signal terminal 112 corresponds to the second port 3. The ground terminals 113 and 114 are connected to ground.

[0026] Next, an example of the plurality of dielectric layers and the plurality of conductor layers constituting the laminate 50 will be described with reference to Figures 3(a) to 7(c). In this example, the laminate 50 has 24 laminated dielectric layers. Hereinafter, these 24 dielectric layers will be referred to as the 1st to 24th dielectric layers, in order from the bottom up. The 1st to 24th dielectric layers will be denoted by reference numerals 51 to 74.

[0027] 3(a) shows the patterned surfaces of the first to third dielectric layers 51 to 53. The dielectric layers 51 to 53 have no conductor layers or through holes formed thereon.

[0028] 3(b) shows the pattern formation surface of the fourth dielectric layer 54. A ground conductor layer 541 is formed on the pattern formation surface of the dielectric layer 54. The dielectric layer 54 also has a plurality of through holes 54T1 connected to the ground conductor layer 541, and a plurality of through holes 54T2 connected to the ground conductor layer 541. In this embodiment, the number of the through holes 54T1 and the number of the through holes 54T2 are both five.

[0029] FIG. 3(c) shows the pattern-formed surface of the fifth dielectric layer 55. A plurality of through holes 55T1 and a plurality of through holes 55T2 are formed in the dielectric layer 55. In this embodiment, the number of the plurality of through holes 55T1 and the number of the plurality of through holes 55T2 are both five. The plurality of through holes 54T1 formed in the dielectric layer 54 are each connected to the plurality of through holes 55T1. The plurality of through holes 54T2 formed in the dielectric layer 54 are each connected to the plurality of through holes 55T2.

[0030] 4(a) shows the pattern formation surface of the sixth dielectric layer 56. Conductor layers 561 and 562 are formed on the pattern formation surface of the dielectric layer 56. The conductor layer 561 is connected to the ground terminal 113 shown in FIG. 2. The conductor layer 562 is connected to the ground terminal 114 shown in FIG. 2. A plurality of through holes 55T1 formed in the dielectric layer 55 are connected to the conductor layer 561. A plurality of through holes 55T2 formed in the dielectric layer 55 are connected to the conductor layer 562.

[0031] 4(b) shows the pattern-formed surfaces of the seventh to tenth dielectric layers 57 to 60. The dielectric layers 57 to 60 do not have any conductor layers or through-holes formed thereon.

[0032] 4(c) shows the pattern formation surface of the eleventh dielectric layer 61. Conductor layers 611, 612, 613, and 614 are formed on the pattern formation surface of the dielectric layer 61. The conductor layer 611 is connected to the signal terminal 111 shown in FIG. 2. The conductor layer 612 is connected to the signal terminal 112 shown in FIG. 2. The conductor layer 613 is connected to the ground terminal 113 shown in FIG. 2. The conductor layer 614 is connected to the ground terminal 114 shown in FIG. 2.

[0033] Furthermore, through holes 61T1, 61T2, 61T3A, 61T3B, 61T3C, and a plurality of through holes 61T4 are formed in the dielectric layer 61. The through holes 61T1 and 61T2 are connected to the conductor layers 611 and 612, respectively. The through holes 61T3A, 61T3B, 61T3C are connected to the conductor layer 613. The plurality of through holes 61T4 are connected to the conductor layer 614. Particularly in this embodiment, the number of the plurality of through holes 61T4 is five.

[0034] 5(a) shows the pattern-formed surface of the twelfth dielectric layer 62. Conductor layers 621, 622, and 623 are formed on the pattern-formed surface of the dielectric layer 61. Through holes 61T3A, 61T3B, and 61T3C formed in the dielectric layer 61 are connected to the conductor layers 621, 622, and 623, respectively.

[0035] Furthermore, through holes 62T1 and 62T2 and a plurality of through holes 62T4 are formed in the dielectric layer 62. The through holes 61T1 and 61T2 formed in the dielectric layer 61 are connected to the through holes 62T1 and 62T2, respectively. In this embodiment in particular, the number of the plurality of through holes 62T4 is five. The plurality of through holes 61T4 formed in the dielectric layer 61 are each connected to a plurality of through holes 62T4.

[0036] FIG. 5(b) shows the pattern-formed surface of the thirteenth dielectric layer 63. On the pattern-formed surface of the dielectric layer 63, conductor layers 631, 632, and 633 for resonators and conductor layers 634, 635, and 636 are formed. Each of the conductor layers 631 to 633 has a first end and a second end located at both ends in the longitudinal direction. The conductor layer 634 is connected to the second end of each of the conductor layers 631 to 633. The conductor layer 635 is connected to the conductor layer 631 at a position between the first end and the second end of the conductor layer 631. The conductor layer 636 is connected to the conductor layer 632 at a position between the first end and the second end of the conductor layer 632. In FIG. 5(b), the boundary between two conductor layers is indicated by a dotted line.

[0037] The through holes 62T1 and 62T2 formed in the dielectric layer 62 are connected to the conductor layers 635 and 636, respectively. The plurality of through holes 62T4 formed in the dielectric layer 62 are connected to the conductor layer 634. Furthermore, the dielectric layer 63 has a through hole 63T1 formed therein that is connected to the conductor layer 632.

[0038] 5(c) shows the pattern formation surface of the fourteenth dielectric layer 64. A conductor layer 641 is formed on the pattern formation surface of the dielectric layer 64. A through hole 64T1 is also formed in the dielectric layer 64. The through hole 63T1 formed in the dielectric layer 63 and the through hole 64T1 are connected to the conductor layer 641.

[0039] 6(a) shows the pattern formation surface of the 15th dielectric layer 65. Conductor layers 651 and 652 are formed on the pattern formation surface of the dielectric layer 65. A through hole 64T1 formed in the dielectric layer 64 is connected to the conductor layer 651.

[0040] 6(b) shows the pattern-formed surfaces of the 16th to 19th dielectric layers 66 to 69. The dielectric layers 66 to 69 do not have any conductor layers or through-holes formed thereon.

[0041] 6(c) shows the pattern formation surface of the 20th dielectric layer 70. Conductor layers 701 and 702 are formed on the pattern formation surface of the dielectric layer 70. The conductor layer 701 is connected to the ground terminal 113 shown in FIG. 2. The conductor layer 702 is connected to the ground terminal 114 shown in FIG. 2.

[0042] Furthermore, the dielectric layer 70 is formed with a plurality of through holes 70T1 each connected to the conductor layer 701 and a plurality of through holes 70T2 each connected to the conductor layer 702. In particular, in this embodiment, the number of the plurality of through holes 70T1 and the number of the plurality of through holes 70T2 are both five.

[0043] FIG. 7(a) shows the pattern-formed surface of the 21st dielectric layer 71. A plurality of through holes 71T1 and a plurality of through holes 71T2 are formed in the dielectric layer 71. In this embodiment in particular, the number of the plurality of through holes 71T1 and the number of the plurality of through holes 71T2 are both five. The plurality of through holes 70T1 formed in the dielectric layer 70 are each connected to a plurality of through holes 71T1. The plurality of through holes 70T2 formed in the dielectric layer 70 are each connected to a plurality of through holes 71T2.

[0044] 7(b) shows the pattern formation surface of the 22nd dielectric layer 72. A ground conductor layer 721 is formed on the pattern formation surface of the dielectric layer 72. A plurality of through holes 71T1 and a plurality of through holes 71T2 formed in the dielectric layer 71 are connected to the ground conductor layer 721.

[0045] 7(c) shows the patterned surfaces of the 23rd and 24th dielectric layers 73 and 74. The dielectric layers 73 and 74 have no conductor layers or through holes formed thereon.

[0046] The laminate 50 shown in Figure 2 is constructed by stacking the first to twenty-fourth dielectric layers 51 to 74 so that the pattern-forming surface of the first dielectric layer 51 becomes the first surface 50A of the laminate 50, and the surface opposite the pattern-forming surface of the twenty-fourth dielectric layer 74 becomes the second surface 50B of the laminate 50.

[0047] Fig. 8 shows the inside of the laminate 50, which is formed by stacking the 1st to 24th dielectric layers 51 to 74. As shown in Fig. 8, inside the laminate 50, the multiple conductor layers and multiple through holes shown in Figs. 3(b) to 7(b) are stacked.

[0048] The following describes the correspondence between the circuit components of the electronic component 1 shown in Fig. 1 and the internal components of the laminate 50. The resonator 11 is composed of a conductor layer 631 for the resonator. The conductor layer 631 is connected to the signal terminal 111 via the conductor layer 611, through holes 61T1 and 62T1, and a conductor layer 635. The conductor layer 631 is also connected to the ground terminal 114 via the conductor layer 614, a plurality of through holes 61T4, a plurality of through holes 62T4, and a conductor layer 634.

[0049] The resonator 12 is configured by a conductor layer 632 for the resonator. The conductor layer 632 is connected to the ground terminal 114 via the conductor layer 614, a plurality of through holes 61T4, a plurality of through holes 62T4, and the conductor layer 634.

[0050] The resonator 13 is configured by a conductor layer 633 for the resonator. The conductor layer 633 is connected to the signal terminal 112 via the conductor layer 612, through holes 61T2 and 62T2, and a conductor layer 636. The conductor layer 633 is also connected to the ground terminal 114 via the conductor layer 614, a plurality of through holes 61T4, a plurality of through holes 62T4, and a conductor layer 634.

[0051] Capacitor C1 is composed of conductor layers 631 and 651 and dielectric layers 63 and 64 between these conductor layers. Capacitor C2 is composed of conductor layers 633 and 651 and dielectric layers 63 and 64 between these conductor layers. Capacitor C3 is composed of conductor layers 631, 633, and 652 and dielectric layers 63 and 64 between these conductor layers.

[0052] Capacitor C4 is composed of conductor layers 621 and 631 and a dielectric layer 62 between these conductor layers. Capacitor C5 is composed of conductor layers 622 and 632 and a dielectric layer 62 between these conductor layers. Capacitor C6 is composed of conductor layers 623 and 633 and a dielectric layer 62 between these conductor layers.

[0053] Next, structural features of the electronic component 1 according to this embodiment will be described with reference to Figures 2 to 10. Figure 9 is a perspective view showing a portion of the interior of the laminate 50. Figure 10 is a perspective view showing another portion of the interior of the laminate 50. Figure 9 mainly shows the multiple conductor layers and multiple through holes formed in the 11th to 15th dielectric layers 61 to 65. Figure 10 mainly shows the multiple conductor layers and multiple through holes formed in the 4th to 6th and 20th to 22nd dielectric layers 54 to 56 and 70 to 72.

[0054] The electronic component 1 includes a laminate 50, signal terminals 111 and 112, and ground terminals 113 and 114. The laminate 50 is composed of a plurality of laminated dielectric layers 51 to 74, and also includes a plurality of conductor layers and a plurality of through holes. The signal terminals 111 and 112 and the ground terminals 113 and 114 are provided on the outer periphery of the laminate 50. Hereinafter, the plurality of conductor layers and the plurality of through holes will be collectively referred to as a plurality of conductors. The plurality of conductors are provided inside the laminate 50.

[0055] The multiple conductors include multiple ground conductors and multiple non-ground conductors. In this embodiment, a specific conductor used as at least one of a ground and a shield in the laminate 50 is referred to as a ground conductor. In addition, a conductor connected to the specific conductor in the laminate 50 without going through the ground terminals 113 and 114 is also referred to as a ground conductor. In addition, a conductor other than the ground conductor is referred to as a non-ground conductor.

[0056] First, the multiple ground conductors will be described. In particular, in this embodiment, the multiple ground conductors include ground conductor layers 541 and 721. The ground conductor layers 541 and 721 correspond to the specific conductors described above. As shown in FIG. 10, the ground conductor layer 541 has a first end 541a and a second end 541b located at opposite ends in a direction parallel to the Y direction. The ground conductor layer 721 has a first end 721a and a second end 721b located at opposite ends in a direction parallel to the Y direction. The first ends 541a and 721a are located near the side surface 50F (see FIG. 2). The second ends 541b and 721b are located near the side surface 50E (see FIG. 2).

[0057] The ground conductors further include at least one connection portion that electrically connects at least one of the ground conductor layers (541, 721) and at least one of the ground terminals (113, 114).

[0058] In this embodiment, the at least one connection portion is a plurality of connection portions CN1, a plurality of connection portions CN2, a plurality of connection portions CN3, and a plurality of connection portions CN4. Particularly in this embodiment, the number of the plurality of connection portions CN1, the number of the plurality of connection portions CN2, the number of the plurality of connection portions CN3, and the number of the plurality of connection portions CN4 are all five.

[0059] As shown in FIG. 10, the plurality of connection portions CN1 are arranged along the first end portion 541a of the ground conductor layer 541, and electrically connect the ground conductor layer 541 and the ground terminal 113 (see FIG. 2). The plurality of connection portions CN1 are configured by a plurality of through holes 54T1 (see FIG. 3(b)), a plurality of through holes 55T1 (see FIG. 3(c)), and a conductor layer 561 (see FIG. 4(a)). As shown in FIG. 4(a), the conductor layer 561 includes a plurality of first conductor portions 561A and a plurality of second conductor portions 561B. Particularly in this embodiment, the number of the plurality of first conductor portions 561A is five, and the number of the plurality of second conductor portions 561B is four.

[0060] The plurality of first conductor portions 561A are arranged along the side surface 50F and connected to the ground terminal 113. Each of the plurality of second conductor portions 561B connects two adjacent first conductor portions 561A. Particularly in the present embodiment, each of the plurality of second conductor portions 561B is also connected to the ground terminal 113.

[0061] Each of the plurality of connection portions CN1 is composed of one through hole 54T1, one through hole 55T1, and one first conductor portion 561A. One through hole 54T1 and one through hole 55T1 are stacked in the stacking direction T.

[0062] As shown in FIG. 10, the plurality of connection portions CN2 are arranged along the second end portion 541b of the ground conductor layer 541, and electrically connect the ground conductor layer 541 and the ground terminal 114 (see FIG. 2). The plurality of connection portions CN2 are configured by a plurality of through holes 54T2 (see FIG. 3(b)), a plurality of through holes 55T2 (see FIG. 3(c)), and a conductor layer 562 (see FIG. 4(a)). As shown in FIG. 4(a), the conductor layer 562 includes a plurality of first conductor portions 562A and a plurality of second conductor portions 562B. In this embodiment, the number of the plurality of first conductor portions 562A is five, and the number of the plurality of second conductor portions 562B is four.

[0063] The multiple first conductor portions 562A are lined up along the side surface 50E and connected to the ground terminal 114. Each of the multiple second conductor portions 562B connects two adjacent first conductor portions 562A. In this embodiment in particular, each of the multiple second conductor portions 562B is also connected to the ground terminal 114.

[0064] Each of the plurality of connection portions CN2 is composed of one through hole 54T2, one through hole 55T2, and one first conductor portion 562A. One through hole 54T2 and one through hole 55T2 are stacked in the stacking direction T.

[0065] The plurality of connection portions CN1 and the plurality of connection portions CN2 are arranged symmetrically with respect to a virtual plane (XZ plane) parallel to the stacking direction T.

[0066] As shown in FIG. 10, the plurality of connection parts CN3 are arranged along the first end 721a of the ground conductor layer 721, and electrically connect the ground conductor layer 721 and the ground terminal 113 (see FIG. 2). The plurality of connection parts CN3 are configured by the conductor layer 701 (see FIG. 6(c)), a plurality of through holes 70T1 (see FIG. 6(c)), and a plurality of through holes 71T1 (see FIG. 7(a)). As shown in FIG. 6(c), the conductor layer 701 includes a plurality of first conductor portions 701A and a plurality of second conductor portions 701B. In this embodiment, the number of the plurality of first conductor portions 701A is five, and the number of the plurality of second conductor portions 701B is four.

[0067] The multiple first conductor portions 701A are lined up along the side surface 50F and connected to the ground terminal 113. Each of the multiple second conductor portions 701B connects two adjacent first conductor portions 701A. Particularly in this embodiment, each of the multiple second conductor portions 701B is also connected to the ground terminal 113.

[0068] Each of the plurality of connection portions CN3 is composed of one first conductor portion 701A, one through hole 70T1, and one through hole 71T1. One through hole 70T1 and one through hole 71T1 are stacked in the stacking direction T.

[0069] As shown in FIG. 10, the plurality of connection parts CN4 are arranged along the second end 721b of the ground conductor layer 721, and electrically connect the ground conductor layer 721 and the ground terminal 114 (see FIG. 2). The plurality of connection parts CN4 are configured by the conductor layer 702 (see FIG. 6(c)), a plurality of through holes 70T2 (see FIG. 6(c)), and a plurality of through holes 71T2 (see FIG. 7(a)). As shown in FIG. 6(c), the conductor layer 702 includes a plurality of first conductor portions 702A and a plurality of second conductor portions 702B. In this embodiment, the number of the plurality of first conductor portions 702A is five, and the number of the plurality of second conductor portions 702B is four.

[0070] The multiple first conductor portions 702A are lined up along the side surface 50E and connected to the ground terminal 113. Each of the multiple second conductor portions 702B connects two adjacent first conductor portions 702A. In this embodiment in particular, each of the multiple second conductor portions 702B is also connected to the ground terminal 114.

[0071] Each of the plurality of connection portions CN4 includes one first conductor portion 702A, one through hole 70T2, and one through hole 71T2. The one through hole 70T2 and the one through hole 71T2 are stacked in the stacking direction T.

[0072] The plurality of connection portions CN3 and the plurality of connection portions CN4 are arranged symmetrically with respect to a virtual plane (XZ plane) parallel to the stacking direction T.

[0073] Next, the multiple non-ground conductors will be described. The multiple non-ground conductors include a main portion that constitutes an element. In this embodiment, the main portion is the conductor layers 621-623, 631-633, 641, 651, and 652 that constitute the resonators 11-13 and the capacitors C1-C6, and the through holes 63T1 and 64T1 (see FIGS. 5(a) to 6(a) and 9). Each of the conductor layers 631-633 for the resonators is a distributed constant resonator. That is, the main portion includes a multiple distributed constant resonators (conductor layers 631-633).

[0074] The multiple non-ground conductors further include input / output portions that connect the main portion to at least one of the signal terminals 111 and 112. In this embodiment, the input / output portions are conductor layers 611, 612, 635, and 636 and through holes 61T1, 61T2, 62T1, and 62T2 (see FIGS. 4(c) to 5(b) and 9).

[0075] The plurality of non-ground conductors further include end portions that connect the main portions to at least one of the ground terminals 113 and 114. In this embodiment, the end portions are conductor layers 613, 614, and 634, through holes 61T3A, 61T3B, and 61T3C, a plurality of through holes 61T4, and a plurality of through holes 62T4 (see FIGS. 4(c) to 5(b) and 9).

[0076] Next, the relationship between the multiple ground conductors and the multiple non-ground conductors will be described. The ground conductor layer 541 is arranged between the multiple non-ground conductors (the above-mentioned multiple conductor layers and multiple through holes) and the first surface 50A of the laminate 50 in the stacking direction T. The ground conductor layer 721 is arranged between the multiple non-ground conductors and the second surface 50B of the laminate 50 in the stacking direction T. The ground conductor layer 721 is also arranged in a position such that the multiple non-ground conductors are sandwiched between the ground conductor layer 721 and the ground conductor layer 541 in the stacking direction T.

[0077] The multiple connection portions CN1 and the multiple connection portions CN2 are arranged between the ground conductor layer 541 and the multiple non-ground conductors in the stacking direction T. The multiple connection portions CN3 and the multiple connection portions CN4 are arranged between the ground conductor layer 721 and the multiple non-ground conductors in the stacking direction T.

[0078] The input / output portions of the multiple non-ground conductors (conductor layers 611, 612, 635, 636 and through holes 61T1, 61T2, 62T1, 62T2) are arranged in the stacking direction T between the multiple connection portions CN1 and CN2 and the main portions of the multiple non-ground conductors (conductor layers 621-623, 631-633, 641, 651, 652 and through holes 63T1, 64T1).

[0079] The terminal portions of the multiple non-ground conductors (conductor layers 613, 614, 634, through holes 61T3A, 61T3B, 61T3C, multiple through holes 61T4 and multiple through holes 62T4) are arranged in the stacking direction T between the multiple connection portions CN1 and multiple connection portions CN2 and the main portions of the multiple non-ground conductors (conductor layers 621-623, 631-633, 641, 651, 652 and through holes 63T1, 64T1).

[0080] Next, the operation and effect of electronic component 1 according to this embodiment will be described. In this embodiment, as described above, the plurality of connection portions CN1 and the plurality of connection portions CN2 are arranged between ground conductor layer 541 and the plurality of non-ground conductors, such as conductor layers 631-633, in stacking direction T. The positions where the plurality of connection portions CN1 are connected to ground terminal 113 and the positions where the plurality of connection portions CN2 are connected to ground terminal 114 are farther from first surface 50A than ground conductor layer 541. Furthermore, ground conductor layer 541 is located farther from the plurality of non-ground conductors than are the plurality of connection portions CN1 and CN2. Thus, according to this embodiment, the plurality of connection portions CN1 can be connected to ground terminal 113 at desired positions, and the plurality of connection portions CN2 can be connected to ground terminal 114 at desired positions, while increasing the distance between ground conductor layer 541 and the plurality of non-ground conductors.

[0081] The above description of the ground conductor layer 541, the multiple connection portions CN1, and the multiple connection portions CN2 also applies to the ground conductor layer 721, the multiple connection portions CN3, and the multiple connection portions CN4. That is, according to this embodiment, it is possible to connect the multiple connection portions CN3 to the ground terminal 113 at desired positions and connect the multiple connection portions CN4 to the ground terminal 114 at desired positions, while increasing the distance between the ground conductor layer 721 and the multiple non-ground conductors.

[0082] [Second embodiment] Next, an electronic component 1 according to a second embodiment of the present invention will be described. The configuration of the electronic component 1 according to this embodiment differs from that of the first embodiment in the following respects. In this embodiment, the laminate 50 includes dielectric layers 84, 85, 86, 90, 91, and 92, instead of the fourth to sixth and twentieth to twenty-second dielectric layers 54-56 and 70-72 of the first embodiment. The dielectric layers 84, 85, and 86 may be the fourth to sixth dielectric layers, respectively. Alternatively, the dielectric layers 84 and 85 may be the fifth and sixth dielectric layers, respectively, and the dielectric layer 86 may be the fourth dielectric layer. Furthermore, the dielectric layers 90, 91, and 92 may be the twentieth to twenty-second dielectric layers, respectively. Alternatively, the dielectric layers 91 and 92 may be the twentieth and twenty-first dielectric layers, respectively, and the dielectric layer 90 may be the twenty-second dielectric layer.

[0083] The following description will be given taking as an example a case where the dielectric layers 84, 85, and 86 are the fourth to sixth dielectric layers, respectively, and the dielectric layers 90, 91, and 92 are the twentieth to twenty-second dielectric layers, respectively.

[0084] 11(a) shows the pattern formation surface of the fourth dielectric layer 84. A ground conductor layer 841 is formed on the pattern formation surface of the dielectric layer 84. Furthermore, the dielectric layer 84 is formed with a plurality of through holes 84T1 ​​each connected to the ground conductor layer 841 and a plurality of through holes 84T2 each connected to the ground conductor layer 841. Particularly in this embodiment, the number of the plurality of through holes 84T1 ​​and the number of the plurality of through holes 84T2 are both five.

[0085] 11(b) shows the pattern formation surface of the fifth dielectric layer 85. Conductor layers 851 and 852 are formed on the pattern formation surface of the dielectric layer 85. The conductor layer 851 is connected to the ground terminal 113 (see FIG. 2). The conductor layer 852 is connected to the ground terminal 114 (see FIG. 2). A plurality of through holes 84T1 ​​formed in the dielectric layer 84 are connected to the conductor layer 851. A plurality of through holes 84T2 formed in the dielectric layer 84 are connected to the conductor layer 852.

[0086] Fig. 11(c) shows the patterned surface of the sixth dielectric layer 86. Fig. 12(a) shows the patterned surface of the twentieth dielectric layer 90. No conductor layers or through holes are formed on the dielectric layers 86 and 90.

[0087] 12(b) shows the pattern formation surface of the 21st dielectric layer 91. Conductor layers 911 and 912 are formed on the pattern formation surface of the dielectric layer 91. The conductor layer 911 is connected to the ground terminal 113 (see FIG. 2). The conductor layer 912 is connected to the ground terminal 114 (see FIG. 2).

[0088] Furthermore, the dielectric layer 91 is formed with a plurality of through holes 91T1 each connected to the conductor layer 911 and a plurality of through holes 91T2 each connected to the conductor layer 912. In particular, in this embodiment, the number of the plurality of through holes 91T1 and the number of the plurality of through holes 91T2 are both five.

[0089] 12(c) shows the pattern formation surface of the 22nd dielectric layer 92. A ground conductor layer 921 is formed on the pattern formation surface of the dielectric layer 92. A plurality of through holes 91T1 and a plurality of through holes 91T2 formed in the dielectric layer 91 are connected to the ground conductor layer 921.

[0090] Fig. 13 shows part of the inside of laminate 50, which is formed by laminating 1st to 24th dielectric layers 51-53, 84-86, 57-69, 90-92, 73, and 74. Fig. 13 mainly shows a plurality of conductor layers and a plurality of through holes formed in 4th, 5th, 21st, and 22nd dielectric layers 84, 85, 91, and 92.

[0091] Next, structural features of the electronic component 1 according to this embodiment will be described with reference to FIGS. 11 to 13. In this embodiment, the configuration of the multiple ground conductors is different from that of the first embodiment. In this embodiment, the multiple ground conductors include ground conductor layers 841 and 921. As shown in FIG. 13, the ground conductor layer 841 has a first end 841a and a second end 841b located at both ends in a direction parallel to the Y direction. The ground conductor layer 921 has a first end 921a and a second end 921b located at both ends in a direction parallel to the Y direction. The first ends 841a and 921a are located near the side surface 50F (see FIG. 2). The second ends 841b and 921b are located near the side surface 50E (see FIG. 2).

[0092] In this embodiment, the plurality of connection parts CN1 are arranged along the first end 841a of the ground conductor layer 841, and electrically connect the ground conductor layer 841 and the ground terminal 113 (see FIG. 2). In this embodiment, the number of connection parts CN1 is five. The plurality of connection parts CN1 is composed of a plurality of through holes 84T1 ​​(see FIG. 11(a)) and a conductor layer 851 (see FIG. 11(b)). As shown in FIG. 11(a), the conductor layer 851 includes five first conductor portions 851A and four second conductor portions 851B. Each of the plurality of connection parts CN1 is composed of one through hole 84T1 ​​and one first conductor portion 851A.

[0093] The five first conductor portions 851A are lined up along the side surface 50F and connected to the ground terminal 113. Each of the four second conductor portions 851B connects two adjacent first conductor portions 851A. Each of the four second conductor portions 851B is also connected to the ground terminal 113.

[0094] In this embodiment, the plurality of connection parts CN2 are arranged along the second end 841b of the ground conductor layer 841, and electrically connect the ground conductor layer 841 and the ground terminal 114 (see FIG. 2). In this embodiment, the number of connection parts CN2 is five. The plurality of connection parts CN2 is formed by a plurality of through holes 84T2 (see FIG. 11(a)) and a conductor layer 852 (see FIG. 11(b)). As shown in FIG. 11(a), the conductor layer 852 includes five first conductor portions 852A and four second conductor portions 852B. Each of the plurality of connection parts CN2 is formed by one through hole 84T2 and one first conductor portion 852A.

[0095] The five first conductor portions 852A are aligned along the side surface 50E and connected to the ground terminal 114. Each of the four second conductor portions 852B connects two adjacent first conductor portions 852A. Each of the four second conductor portions 852B is also connected to the ground terminal 114.

[0096] In this embodiment, the plurality of connection parts CN3 are arranged along the first end 921a of the ground conductor layer 921, and electrically connect the ground conductor layer 921 and the ground terminal 113 (see FIG. 2). In this embodiment, the number of connection parts CN3 is five. The plurality of connection parts CN3 is configured by the conductor layer 911 and a plurality of through holes 91T1 (see FIG. 12(b)). As shown in FIG. 12(b), the conductor layer 911 includes five first conductor portions 911A and four second conductor portions 911B. Each of the plurality of connection parts CN3 is configured by one first conductor portion 911A and one through hole 91T1.

[0097] The five first conductor portions 911A are aligned along the side surface 50F and connected to the ground terminal 113. Each of the four second conductor portions 911B connects two adjacent first conductor portions 911A. Each of the four second conductor portions 911B is also connected to the ground terminal 113.

[0098] In this embodiment, the plurality of connection parts CN3 are arranged along the second end 921b of the ground conductor layer 921, and electrically connect the ground conductor layer 921 and the ground terminal 114 (see FIG. 2). Also, in this embodiment, the number of connection parts CN4 is five. The plurality of connection parts CN4 is configured by the conductor layer 912 and a plurality of through holes 91T2 (see FIG. 12(b)). As shown in FIG. 12(b), the conductor layer 912 includes five first conductor portions 912A and four second conductor portions 912B. Each of the plurality of connection parts CN4 is configured by one first conductor portion 912A and one through hole 91T2.

[0099] The five first conductor portions 912A are aligned along the side surface 50E and connected to the ground terminal 114. Each of the four second conductor portions 912B connects two adjacent first conductor portions 912A. Each of the four second conductor portions 912B is also connected to the ground terminal 114.

[0100] Other configurations, actions, and effects of this embodiment are the same as those of the first embodiment.

[0101] [Third embodiment] Next, an electronic component 1 according to a third embodiment of the present invention will be described. The configuration of the electronic component 1 according to this embodiment differs from that of the second embodiment in the following respects. In this embodiment, the laminate 50 includes dielectric layers 104, 105, and 121 instead of the dielectric layers 84, 85, and 91 in the second embodiment. The dielectric layers 104 and 105 may be the fourth and fifth dielectric layers, respectively, or the fifth and sixth dielectric layers, respectively. Alternatively, the dielectric layer 121 may be the twenty-first dielectric layer, and the dielectric layer 92 in the second embodiment (see FIG. 12(c)) may be the twenty-second dielectric layer. Alternatively, the dielectric layer 121 may be the twentieth dielectric layer, and the dielectric layer 92 may be the twenty-first dielectric layer.

[0102] The following description will be given taking as an example a case where the dielectric layers 104, 105, and 121 are the fourth, fifth, and twenty-first dielectric layers, respectively.

[0103] 14(a) shows the pattern formation surface of the fourth dielectric layer 104. A ground conductor layer 1041 is formed on the pattern formation surface of the dielectric layer 104. The dielectric layer 104 also has a plurality of through holes 104T1 each connected to the ground conductor layer 1041 and a plurality of through holes 104T2 each connected to the ground conductor layer 1041. In this embodiment, the number of the plurality of through holes 104T1 and the number of the plurality of through holes 104T2 are both three.

[0104] 14(b) shows the pattern formation surface of the fifth dielectric layer 105. Conductor layers 1051 and 1052 are formed on the pattern formation surface of the dielectric layer 105. The conductor layer 1051 is connected to the ground terminal 113 (see FIG. 2). The conductor layer 1052 is connected to the ground terminal 114 (see FIG. 2). A plurality of through holes 104T1 formed in the dielectric layer 104 are connected to the conductor layer 1051. A plurality of through holes 104T2 formed in the dielectric layer 104 are connected to the conductor layer 1052.

[0105] 14(c) shows the pattern formation surface of the 21st dielectric layer 121. Conductor layers 1211 and 1212 are formed on the pattern formation surface of the dielectric layer 121. The conductor layer 1211 is connected to the ground terminal 113 (see FIG. 2). The conductor layer 1212 is connected to the ground terminal 114 (see FIG. 2).

[0106] Furthermore, the dielectric layer 121 is formed with a plurality of through holes 121T1 each connected to the conductor layer 1211 and a plurality of through holes 121T2 each connected to the conductor layer 1212. Particularly in this embodiment, the number of the plurality of through holes 121T1 and the number of the plurality of through holes 121T2 are both three. The plurality of through holes 91T1 and the plurality of through holes 91T2 are connected to the ground conductor layer 921 shown in FIG. 12(c).

[0107] Fig. 15 shows part of the inside of a laminate 50 formed by laminating the first to twenty-fourth dielectric layers 51 to 53, 104, 105, 86, 57 to 69, 90, 121, 92, 73, and 74. Fig. 15 mainly shows a plurality of conductor layers and a plurality of through holes formed in the fourth, fifth, twenty-first, and twenty-second dielectric layers 104, 105, 121, and 92.

[0108] Next, structural features of the electronic component 1 according to this embodiment will be described with reference to FIGS. 14 and 15. In this embodiment, the configuration of the multiple ground conductors is different from that of the second embodiment. In this embodiment, the multiple ground conductors include ground conductor layers 1041 and 921. As shown in FIG. 15, the ground conductor layer 1041 has a first end 1041a and a second end 1041b located at opposite ends in a direction parallel to the Y direction. The first end 1041a is located near the side surface 50F (see FIG. 2). The second end 1041b is located near the side surface 50E (see FIG. 2).

[0109] In this embodiment, the plurality of connection parts CN1 are arranged along the first end 1041a of the ground conductor layer 1041, and electrically connect the ground conductor layer 1041 and the ground terminal 113 (see FIG. 2). In this embodiment, the number of connection parts CN1 is three. The plurality of connection parts CN1 is composed of a plurality of through holes 104T1 (see FIG. 14(a)) and a conductor layer 1051 (see FIG. 14(b)). As shown in FIG. 14(b), the conductor layer 1051 includes three first conductor parts 1051A and two second conductor parts 1051B. Each of the plurality of connection parts CN1 is composed of one through hole 104T1 and one first conductor part 1051A.

[0110] The three first conductor portions 1051A are lined up along the side surface 50F and connected to the ground terminal 113. Each of the two second conductor portions 1051B connects two adjacent first conductor portions 1051A. Each of the two second conductor portions 1051B is also connected to the ground terminal 113.

[0111] In this embodiment, the plurality of connection parts CN2 are arranged along the second end 1041b of the ground conductor layer 1041, and electrically connect the ground conductor layer 1041 and the ground terminal 114 (see FIG. 2). In this embodiment, the number of connection parts CN2 is three. The plurality of connection parts CN2 is formed by a plurality of through holes 104T2 (see FIG. 14(a)) and a conductor layer 1052 (see FIG. 14(b)). As shown in FIG. 14(a), the conductor layer 1052 includes three first conductor portions 1052A and two second conductor portions 1052B. Each of the plurality of connection parts CN2 is formed by one through hole 104T2 and one first conductor portion 1052A.

[0112] The three first conductor portions 1052A are aligned along the side surface 50E and connected to the ground terminal 114. Each of the two second conductor portions 1052B connects two adjacent first conductor portions 1052A. Each of the two second conductor portions 1052B is also connected to the ground terminal 114.

[0113] In this embodiment, the number of the plurality of connection parts CN3 is three. The plurality of connection parts CN3 is configured by a conductor layer 1211 and a plurality of through holes 121T1 (see FIG. 14(c)). As shown in FIG. 14(c), the conductor layer 1211 includes three first conductor portions 1211A and two second conductor portions 1211B. Each of the plurality of connection parts CN3 is configured by one first conductor portion 1211A and one through hole 121T1.

[0114] The three first conductor portions 1211A are lined up along the side surface 50F and connected to the ground terminal 113. Each of the two second conductor portions 1211B connects two adjacent first conductor portions 1211A. Each of the two second conductor portions 1211B is also connected to the ground terminal 113.

[0115] In this embodiment, the number of the plurality of connection parts CN4 is three. The plurality of connection parts CN4 is configured by a conductor layer 1212 and a plurality of through holes 121T2 (see FIG. 14(c)). As shown in FIG. 14(c), the conductor layer 1212 includes three first conductor portions 1212A and two second conductor portions 1212B. Each of the plurality of connection parts CN4 is configured by one first conductor portion 1212A and one through hole 121T2.

[0116] The three first conductor portions 1212A are aligned along the side surface 50E and connected to the ground terminal 114. Each of the two second conductor portions 1212B connects two adjacent first conductor portions 1212A. Each of the two second conductor portions 1212B is also connected to the ground terminal 114.

[0117] Other configurations, actions, and effects of this embodiment are the same as those of the second embodiment.

[0118] [Fourth embodiment] Next, an electronic component 1 according to a fourth embodiment of the present invention will be described with reference to FIGS. 16(a), 16(b), and 17. FIG. 16(a) is an explanatory diagram showing a pattern-formed surface of the fifth dielectric layer 105 in this embodiment. FIG. 16(b) is an explanatory diagram showing a pattern-formed surface of the twenty-first dielectric layer 121 in this embodiment. FIG. 17 is a perspective view showing a portion of the interior of the laminate 50 in this embodiment. FIG. 17 mainly shows multiple conductor layers and multiple through-holes formed in the fourth, fifth, twenty-first, and twenty-second dielectric layers 104, 105, 121, and 92.

[0119] The configuration of electronic component 1 according to this embodiment differs from that of the third embodiment in the following respects: In this embodiment, conductor layer 1051 does not include the two second conductor portions 1051B (see FIG. 14(b)) in the third embodiment; while the multiple connection portions CN1 in the third embodiment are not physically separated, the multiple connection portions CN1 in this embodiment are physically separated from one another.

[0120] In the present embodiment, the conductor layer 1052 does not include the two second conductor portions 1052B (see FIG. 14(b)) in the third embodiment. The multiple connection portions CN2 in the third embodiment are not physically separated, but the multiple connection portions CN2 in the present embodiment are physically separated from one another.

[0121] Furthermore, in the present embodiment, the conductor layer 1211 does not include the two second conductor portions 1211B (see FIG. 14(c)) in the third embodiment. The multiple connection portions CN3 in the third embodiment are not physically separated, but the multiple connection portions CN3 in the present embodiment are physically separated from one another.

[0122] In addition, in the present embodiment, the conductor layer 1212 does not include the two second conductor portions 1212B (see FIG. 14(c)) in the third embodiment. The multiple connection portions CN4 in the third embodiment are not physically separated, but the multiple connection portions CN4 in the present embodiment are physically separated from one another.

[0123] Other configurations, actions, and effects of this embodiment are the same as those of the third embodiment.

[0124] [Fifth embodiment] Next, an electronic component 1 according to a fifth embodiment of the present invention will be described. The configuration of the electronic component 1 according to this embodiment differs from that of the second embodiment in the following respects. In this embodiment, the laminate 50 includes dielectric layers 124, 125, and 131 instead of the dielectric layers 84, 85, and 91 in the second embodiment. The dielectric layers 124 and 125 may be the fourth and fifth dielectric layers, respectively, or the fifth and sixth dielectric layers, respectively. Alternatively, the dielectric layer 131 may be the twenty-first dielectric layer, and the dielectric layer 92 in the second embodiment (see FIG. 12(c)) may be the twenty-second dielectric layer. Alternatively, the dielectric layer 131 may be the twentieth dielectric layer, and the dielectric layer 92 may be the twenty-first dielectric layer.

[0125] The following description will be given taking as an example a case where the dielectric layers 124, 125, and 131 are the fourth, fifth, and twenty-first dielectric layers, respectively.

[0126] 18(a) shows the pattern formation surface of the fourth dielectric layer 124. A ground conductor layer 1241 is formed on the pattern formation surface of the dielectric layer 124. Furthermore, through holes 124T1 and 124T2 connected to the ground conductor layer 1241 are formed in the dielectric layer 124.

[0127] 18(b) shows the pattern formation surface of the fifth dielectric layer 125. Conductor layers 1251 and 1252 are formed on the pattern formation surface of the dielectric layer 125. The conductor layer 1251 is connected to the ground terminal 113 (see FIG. 2). The conductor layer 1252 is connected to the ground terminal 114 (see FIG. 2). A through-hole 124T1 formed in the dielectric layer 124 is connected to the conductor layer 1251. A through-hole 124T2 formed in the dielectric layer 124 is connected to the conductor layer 1252.

[0128] 18(c) shows the pattern formation surface of the 21st dielectric layer 131. Conductor layers 1311 and 1312 are formed on the pattern formation surface of the dielectric layer 131. The conductor layer 1311 is connected to the ground terminal 113 (see FIG. 2). The conductor layer 1312 is connected to the ground terminal 114 (see FIG. 2).

[0129] Furthermore, through holes 131T1 and 131T2 connected to the conductor layers 1311 and 1312, respectively, are formed in the dielectric layer 131. The through holes 131T1 and 131T2 are connected to the ground conductor layer 921 shown in FIG.

[0130] Fig. 19 shows part of the inside of laminate 50 formed by laminating 1st to 24th dielectric layers 51-53, 124, 125, 86, 57-69, 90, 131, 92, 73, and 74. Fig. 19 mainly shows a plurality of conductor layers and a plurality of through holes formed in 4th, 5th, 21st, and 22nd dielectric layers 124, 125, 131, and 92.

[0131] Next, structural features of the electronic component 1 according to this embodiment will be described with reference to FIGS. 18 and 19. In this embodiment, the configuration of the multiple ground conductors is different from that of the second embodiment. In this embodiment, the multiple ground conductors include ground conductor layers 1241 and 921. As shown in FIG. 19, the ground conductor layer 1241 has a first end 1241a and a second end 1241b located at opposite ends in a direction parallel to the Y direction. The first end 1241a is located near the side surface 50F (see FIG. 2). The second end 1241b is located near the side surface 50E (see FIG. 2).

[0132] In this embodiment, the number of connection portions CN1, CN2, CN3, and CN4 is all one. In addition, in this embodiment, the connection portion CN1 electrically connects the ground conductor layer 1241 and the ground terminal 113 (see FIG. 2). The connection portion CN1 is composed of a through-hole 124T1 (see FIG. 18(a)) and a conductor layer 1251 (see FIG. 18(b)).

[0133] In this embodiment, the connection part CN2 electrically connects the ground conductor layer 1241 and the ground terminal 114 (see FIG. 2). The connection part CN2 is composed of a through-hole 124T2 (see FIG. 18(a)) and a conductor layer 1252 (see FIG. 18(b)).

[0134] In this embodiment, the connection part CN3 is composed of a conductor layer 1311 and a through-hole 131T1 (see FIG. 18(c)). The connection part CN4 is composed of a conductor layer 1312 and a through-hole 131T2 (see FIG. 18(c)).

[0135] Other configurations, actions, and effects of this embodiment are the same as those of the second embodiment.

[0136] [simulation] Next, an example of the characteristics of the electronic component 1 according to the present embodiment will be described with reference to the results of a simulation. In the simulation, a model of a first example, a model of a second example, a model of a third example, and a model of a fourth example were used. The model of the first example is a model of the electronic component 1 according to the first embodiment. The model of the second example is a model of the electronic component 1 according to the second embodiment. The model of the third example is a model of the electronic component 1 according to the third embodiment. The model of the fourth example is a model of the electronic component 1 according to the fourth embodiment. In the simulation, the pass attenuation characteristics were obtained for each of the models of the first to fourth examples.

[0137] Fig. 20 is a characteristic diagram showing the pass attenuation characteristics of the model of the first embodiment. Fig. 21 is a characteristic diagram showing the pass attenuation characteristics of the model of the second embodiment. Fig. 22 is a characteristic diagram showing the pass attenuation characteristics of the model of the third embodiment. Fig. 23 is a characteristic diagram showing the pass attenuation characteristics of the model of the fourth embodiment. In Figs. 20 to 23, the horizontal axis represents frequency, and the vertical axis represents attenuation.

[0138] Focusing on the frequency band (2 GHz to 4 GHz) lower than the passband, it can be seen that the absolute value of the attenuation increases in the order of the model of the fourth embodiment, the model of the third embodiment, the model of the second embodiment, and the model of the first embodiment. This result demonstrates the following first to third features related to the connection parts CN1 to CN4. The first feature is that, as shown in FIGS. 20 to 23 (models of the first to fourth embodiments), the absolute value of the attenuation in the above frequency band increases as the number of connection parts CN1 to CN4 increases. The second feature is that, as shown in FIGS. 22 and 23 (models of the third and fourth embodiments), by integrating the connection parts CN1 to CN4, the absolute value of the attenuation in the above frequency band increases compared to when the connection parts CN1 to CN4 are physically separated from each other. The third feature is that, as shown in Figures 20 and 21 (models of the first and second embodiments), the absolute value of the attenuation in the above frequency band increases as the connection parts CN1 to CN4 approach multiple non-ground conductors.

[0139] The present invention is not limited to the above-described embodiment, and various modifications are possible. For example, the number of each of the connection portions CN1 to CN4 may be two, four, or six or more. Furthermore, one connection portion may include three or more through holes stacked in the stacking direction T.

[0140] As described above, the multilayer electronic component of the present invention includes a laminate formed of a plurality of stacked dielectric layers and including a plurality of conductors, and at least one ground terminal provided on the outer periphery of the laminate and connected to ground. The plurality of conductors include a plurality of ground conductors and a plurality of non-ground conductors. The plurality of ground conductors include a ground conductor layer and at least one connection portion electrically connecting the ground conductor layer and the at least one ground terminal. The at least one connection portion is disposed between the ground conductor layer and the plurality of non-ground conductors in the stacking direction of the plurality of dielectric layers.

[0141] In the multilayer electronic component of the present invention, the at least one connection portion may be a plurality of connection portions connected to the ground conductor layer at a plurality of mutually different positions, and the plurality of connection portions may include a plurality of through holes connected to the ground conductor layer, a plurality of first conductor portions connected to at least one ground terminal, and at least one second conductor portion connecting the plurality of first conductor portions.

[0142] Furthermore, in the multilayer electronic component of the present invention, the at least one ground terminal may include a first ground terminal and a second ground terminal. The ground conductor layer may have a first end and a second end located at both ends in a direction perpendicular to the stacking direction. The at least one connection portion may include at least one first connection portion connected to the ground conductor layer near the first end and connected to the first ground terminal, and at least one second connection portion connected to the ground conductor layer near the second end and connected to the second ground terminal. The at least one first connection portion may be a plurality of first connection portions lined up along the first end. The at least one second connection portion may be a plurality of second connection portions lined up along the second end. The plurality of first connection portions and the plurality of second connection portions may be arranged symmetrically with respect to an imaginary plane parallel to the stacking direction.

[0143] In the multilayer electronic component of the present invention, at least one connection portion may include a plurality of through holes stacked in the stacking direction.

[0144] In the multilayer electronic component of the present invention, the ground conductors may further include another ground conductor layer and at least one other connection portion electrically connecting the other ground conductor layer to at least one ground terminal. The other ground conductor layer may be positioned such that a non-ground conductor is sandwiched between the other ground conductor layer and the ground conductor layer. The at least one other connection portion may be positioned between the other ground conductor layer and the non-ground conductor in the stacking direction.

[0145] In the multilayer electronic component of the present invention, the plurality of non-ground conductors may include a main portion constituting an element and an end portion electrically connecting the main portion to at least one ground terminal. The end portion may be disposed between the at least one connection portion and the main portion in the stacking direction. The main portion may include a distributed constant resonator. [Explanation of symbols]

[0146] 1...electronic component, 2...first port, 3...second port, 11-13...resonator, 50...laminated body, 50A...first surface, 50B...second surface, 50C-50F...side surface, 111, 112...signal terminal, 113, 114...ground terminal, 541, 721...ground conductor layer, C1-C6...capacitor, CN1-CN4...connection portion.

Claims

1. a laminated body including a plurality of dielectric layers stacked together and including a plurality of conductors; at least one ground terminal provided on an outer periphery of the laminate and connected to ground; the plurality of conductors include a plurality of ground conductors and a plurality of non-ground conductors; the plurality of ground conductors include a ground conductor layer and at least one connection portion that electrically connects the ground conductor layer to the at least one ground terminal; the at least one connection portion is disposed between the ground conductor layer and the plurality of non-ground conductors in the stacking direction of the plurality of dielectric layers.

2. 2. The multilayer electronic component according to claim 1, wherein the at least one connection portion comprises a plurality of connection portions connected to the ground conductor layer at a plurality of mutually different positions.

3. 3. The multilayer electronic component according to claim 2, wherein the plurality of connection portions include a plurality of through holes connected to the ground conductor layer, a plurality of first conductor portions connected to the at least one ground terminal, and at least one second conductor portion connecting the plurality of first conductor portions.

4. the at least one ground terminal includes a first ground terminal and a second ground terminal; the ground conductor layer has a first end portion and a second end portion located at opposite ends in a direction perpendicular to the stacking direction, 2. The multilayer electronic component according to claim 1, wherein the at least one connection portion includes at least one first connection portion that is connected to the ground conductor layer near the first end and is connected to the first ground terminal, and at least one second connection portion that is connected to the ground conductor layer near the second end and is connected to the second ground terminal.

5. the at least one first connection portion is a plurality of first connection portions arranged along the first end portion; 5. The multilayer electronic component according to claim 4, wherein the at least one second connection portion comprises a plurality of second connection portions arranged along the second end portion.

6. 6. The multilayer electronic component according to claim 5, wherein the plurality of first connecting portions and the plurality of second connecting portions are arranged symmetrically with respect to a virtual plane parallel to the stacking direction.

7. 2. The multilayer electronic component according to claim 1, wherein the at least one connection portion includes a plurality of through holes stacked in the stacking direction.

8. the plurality of ground conductors further include another ground conductor layer and at least one other connection portion that electrically connects the other ground conductor layer and the at least one ground terminal; the other ground conductor layer is disposed at a position where the non-ground conductor is sandwiched between the other ground conductor layer and the ground conductor layer; 2. The multilayer electronic component according to claim 1, wherein the at least one other connection portion is disposed between the other ground conductor layer and the non-ground conductor in the stacking direction.

9. the plurality of non-ground conductors include a main portion constituting an element and an end portion electrically connecting the main portion to the at least one ground terminal; 2. The multilayer electronic component according to claim 1, wherein the end portion is disposed between the at least one connection portion and the main portion in the stacking direction.

10. 10. The multilayer electronic component according to claim 9, wherein the main portion includes a distributed constant resonator.

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