Photonic crystal surface-emitting laser and method for manufacturing the same

Abstract

A photonic crystal surface-emitting laser comprising a light emitting region for emitting light in a direction intersecting an in-plane direction, and a current constriction region which is adjacent to the light emitting region in the in-plane direction and through which current is less likely to flow than through the light emitting region. The light emitting region and the current constriction region include a photonic crystal layer. The photonic crystal layer includes a first region and second regions periodically arranged within the first region along the in-plane direction. The second regions have a refraction index different from a refraction index of the first region. The light emitting region includes a first semiconductor layer having a first conductivity-type, an active layer having an optical gain, and a second semiconductor layer having a second conductivity-type. The first semiconductor layer, the active layer, and the second semiconductor layer are stacked in order in a direction in which the light is output.　

Description

[Technical Field]

[0001] The present disclosure relates to a photonic crystal surface-emitting laser and a method for manufacturing the same. [Background technology]

[0002] Photonic-crystal surface-emitting lasers (PCSELs) are used, in which a photonic crystal and an active layer with optical gain are stacked (see, for example, Patent Document 1). The photonic crystal functions as a diffraction grating, reflecting and diffracting light. Light oscillates at the reflection wavelength of the photonic crystal, and the light is emitted in the normal direction of the surface. Because the resonator extends within a plane, PCSELs are superior to edge-emitting lasers in terms of single-mode operation and high output. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2007-258262 Summary of the Invention

[0004] The photonic crystal surface-emitting laser according to the present disclosure comprises a light-emitting region that emits light in a direction intersecting an in-plane direction, and a current confinement region that is adjacent to the light-emitting region in the in-plane direction and through which current flows more slowly than in the light-emitting region, the light-emitting region and the current confinement region having a photonic crystal layer, the photonic crystal layer having first regions and second regions that are periodically arranged in the in-plane direction within the first region, the refractive index of the second region being different from the refractive index of the first region, the light-emitting region having a first semiconductor layer having a first conductivity type, an active layer having optical gain, and a second semiconductor layer having a second conductivity type, the first semiconductor layer, the active layer, and the second semiconductor layer being stacked in this order in the light-emitting direction.

[0005] A method for manufacturing a photonic crystal surface-emitting laser according to the present disclosure includes the steps of forming a light-emitting region that emits light in a direction intersecting an in-plane direction, and forming a current confinement region adjacent to the light-emitting region in the in-plane direction and through which current flows more slowly than in the light-emitting region, wherein the steps of forming the light-emitting region and the current confinement region include the steps of providing a photonic crystal layer, wherein the photonic crystal layer has first regions and second regions periodically arranged in the in-plane direction of the first region, and the refractive index of the second region is different from the refractive index of the first region, and the step of forming the light-emitting region includes the step of sequentially stacking a first semiconductor layer having a first conductivity type, an active layer having optical gain, and a second semiconductor layer having a second conductivity type. [Brief explanation of the drawings]

[0006] [Figure 1A] FIG. 1A is a plan view illustrating a photonic crystal surface-emitting laser according to the first embodiment. [Figure 1B] FIG. 1B is a cross-sectional view taken along line AA in FIG. 1A. [Figure 2A] FIG. 2A is a plan view illustrating a method for manufacturing a photonic crystal surface-emitting laser. [Figure 2B] FIG. 2B is a cross-sectional view taken along line AA in FIG. 2A. [Figure 3A] FIG. 3A is a plan view illustrating a method for manufacturing a photonic crystal surface-emitting laser. [Figure 3B] FIG. 3B is a cross-sectional view taken along line AA in FIG. 3A. [Figure 4A] FIG. 4A is a plan view illustrating a method for manufacturing a photonic crystal surface-emitting laser. [Figure 4B] FIG. 4B is a cross-sectional view taken along line AA in FIG. 4A. [Figure 5A] FIG. 5A is a plan view illustrating a method for manufacturing a photonic crystal surface-emitting laser. [Figure 5B] FIG. 5B is a cross-sectional view taken along line AA in FIG. 5A. [Figure 6A] FIG. 6A is a plan view illustrating a method for manufacturing a photonic crystal surface-emitting laser. [Figure 6B] FIG. 6B is a cross-sectional view taken along line AA in FIG. 6A. [Figure 7A] FIG. 7A is a plan view illustrating a method for manufacturing a photonic crystal surface-emitting laser. [Figure 7B] FIG. 7B is a cross-sectional view taken along line AA in FIG. 7A. [Figure 8A] FIG. 8A is a plan view illustrating a method for manufacturing a photonic crystal surface-emitting laser. [Figure 8B] FIG. 8B is a cross-sectional view taken along line AA in FIG. 8A. [Figure 9A] FIG. 9A is a plan view illustrating a method for manufacturing a photonic crystal surface-emitting laser. [Figure 9B] FIG. 9B is a cross-sectional view taken along line AA in FIG. 9A. [Figure 10A] FIG. 10A is a plan view illustrating a method for manufacturing a photonic crystal surface-emitting laser. [Figure 10B] FIG. 10B is a cross-sectional view taken along line AA in FIG. 10A. [Figure 11A] FIG. 11A is a plan view illustrating a method for manufacturing a photonic crystal surface-emitting laser. [Figure 11B] FIG. 11B is a cross-sectional view taken along line AA in FIG. 11A. [Figure 12A] FIG. 12A is a plan view illustrating a method for manufacturing a photonic crystal surface-emitting laser. [Figure 12B] FIG. 12B is a cross-sectional view taken along line AA in FIG. 12A. [Figure 13] FIG. 13 is a cross-sectional view illustrating a photonic crystal surface-emitting laser according to a comparative example. [Figure 14] FIG. 14 is a cross-sectional view illustrating a photonic crystal surface-emitting laser according to the second embodiment. [Figure 15A] FIG. 15A is a plan view illustrating a method for manufacturing a photonic crystal surface-emitting laser. [Figure 15B] FIG. 15B is a cross-sectional view taken along line AA in FIG. 15A. [Figure 16A]FIG. 16A is a plan view illustrating a method for manufacturing a photonic crystal surface-emitting laser. [Figure 16B] FIG. 16B is a cross-sectional view taken along line AA in FIG. 16A. [Figure 17A] FIG. 17A is a plan view illustrating the photonic crystal surface-emitting laser according to the third embodiment. [Figure 17B] FIG. 17B is a cross-sectional view taken along line AA in FIG. 17A. [Figure 18A] FIG. 18A is a cross-sectional view illustrating a method for manufacturing a photonic crystal surface-emitting laser. [Figure 18B] FIG. 18B is a cross-sectional view illustrating a method for manufacturing a photonic crystal surface-emitting laser. [Figure 19] FIG. 19 is a cross-sectional view illustrating a method for manufacturing a photonic crystal surface-emitting laser. DETAILED DESCRIPTION OF THE INVENTION

[0007] [Problem to be solved by this disclosure] Light is generated by passing a current through a PCSEL and injecting carriers into the active layer. For example, light is emitted from one end face of the PCSEL. Current can leak outside the area from which the light is extracted (the light-emitting region). Current leakage can degrade the characteristics of a photonic crystal surface-emitting laser. Therefore, the objective is to provide a photonic crystal surface-emitting laser that can improve its characteristics, and a method for manufacturing the same.

[0008] [Effects of this disclosure] According to the present disclosure, it is possible to provide a photonic crystal surface-emitting laser capable of improving characteristics and a method for manufacturing the same.

[0009] [Description of the embodiments of the present disclosure] First, the contents of the embodiments of the present disclosure will be listed and described.

[0010] One aspect of the present disclosure provides a photonic crystal surface-emitting laser (PCS), comprising: a light-emitting region that emits light in a direction intersecting an in-plane direction; and a current confinement region that is adjacent to the light-emitting region in the in-plane direction and through which a current flows more slowly than in the light-emitting region. The light-emitting region and the current confinement region have photonic crystal layers. The photonic crystal layer has first regions and second regions that are periodically arranged in the in-plane direction within the first region. The refractive index of the second region is different from the refractive index of the first region. The light-emitting region has a first semiconductor layer having a first conductivity type, an active layer having optical gain, and a second semiconductor layer having a second conductivity type. The first semiconductor layer, the active layer, and the second semiconductor layer are stacked in this order in the light-emitting direction. A current can be injected into the light-emitting region. Meanwhile, because a current does not easily flow through the current confinement region, current leakage from the light-emitting region to the current confinement region can be suppressed. Suppressing current leakage can improve the characteristics of the photonic crystal surface-emitting laser. (2) The current confinement region may include the first semiconductor layer, a third semiconductor layer having the second conductivity type, a fourth semiconductor layer having the first conductivity type, and a fifth semiconductor layer having the second conductivity type, and the first semiconductor layer, the third semiconductor layer, the fourth semiconductor layer, and the fifth semiconductor layer may be stacked in this order in the light emission direction to form a thyristor. region By forming a thyristor in the light-emitting region, it becomes difficult for current to flow, and current leakage from the light-emitting region to the current confinement region can be suppressed. (3) The current confinement region may have a sixth semiconductor layer, and the sixth semiconductor layer may be insulated. By having the current confinement region have the insulated sixth semiconductor layer, region This makes it difficult for current to flow from the light-emitting region to the current confinement region, thereby suppressing current leakage from the light-emitting region to the current confinement region. (4) The active layer may be provided in the light emitting region and the current confinement region, which simplifies the manufacturing process. (5) The current confinement region may have a seventh semiconductor layer, which is adjacent to the active layer in the in-plane direction and has a band gap larger than the energy of the light. This increases the reflectivity of the current confinement region to light. By reflecting the light to the light-emitting region, light loss can be reduced. (6) The current confinement region may surround the entire periphery of the light emitting region in the in-plane direction, thereby suppressing current leakage from the light emitting region in all directions. (7) the light-emitting region teeth The light emitting device may further include an eighth semiconductor layer having the second conductivity type and stacked on the second semiconductor layer, and at least a portion of the current confinement region may be exposed from the eighth semiconductor layer. Current can be injected into the light emitting region through the eighth semiconductor layer. By not providing the eighth semiconductor layer in at least a portion of the current confinement region, parasitic capacitance can be reduced. (8) The light-emitting device may include a first electrode provided on the upper surface of the eighth semiconductor layer in the light-emitting region, and a second electrode provided on the surface of the substrate opposite to the side on which the first semiconductor layer is provided, the first electrode being ring-shaped in the in-plane direction, and the eighth semiconductor layer being exposed in a portion of the light-emitting region surrounded by the first electrode. A current can be injected into the light-emitting region using the first electrode and the second electrode. Light can be emitted from the portion of the light-emitting region surrounded by the first electrode. (9) The first semiconductor layer, the photonic crystal layer, the active layer, and the second semiconductor layer are stacked in this order, and a ninth semiconductor layer having the first conductivity type is provided between the photonic crystal layer and the active layer, and the photonic crystal layer has the first conductivity type, and the photonic crystal layer The second region may be a void, and an end of the void on the active layer side may be covered by the ninth semiconductor layer. Since the active layer is stacked on the ninth semiconductor layer, the occurrence of depressions and the like in the active layer is suppressed. (10) A method for manufacturing a photonic crystal surface-emitting laser, comprising: forming a light-emitting region that emits light in a direction intersecting an in-plane direction; and forming a current confinement region adjacent to the light-emitting region in the in-plane direction and through which a current flows more slowly than in the light-emitting region. The steps of forming the light-emitting region and the current confinement region include providing a photonic crystal layer. The photonic crystal layer has first regions and second regions periodically arranged in the in-plane direction of the first region, and the refractive index of the second regions is different from that of the first region. The step of forming the light-emitting region includes sequentially stacking a first semiconductor layer having a first conductivity type, an active layer having optical gain, and a second semiconductor layer having a second conductivity type. Current can be injected into the light-emitting region. However, current does not easily flow through the current confinement region, which can suppress current leakage from the light-emitting region to the current confinement region. Suppressing current leakage can improve the characteristics of the photonic crystal surface-emitting laser.

[0011] [Details of the embodiments of the present disclosure] Specific examples of photonic crystal surface-emitting lasers and methods for manufacturing the same according to embodiments of the present disclosure will be described below with reference to the drawings. Note that the present disclosure is not limited to these examples, but is defined by the claims, and is intended to include all modifications within the meaning and scope of the claims.

[0012] First Embodiment (Photonic crystal surface-emitting laser) FIG. 1A is a plan view illustrating a photonic crystal surface-emitting laser 100 according to the first embodiment, and FIG. 1B is a cross-sectional view taken along line AA in FIG. 1A. The XY plane in the figure is the direction in which the planes of the semiconductor layers included in the photonic crystal surface-emitting laser 100 extend (in-plane direction). The shape of the photonic crystal surface-emitting laser 100 in the XY plane is rectangular. The Z-axis direction is the stacking direction of the semiconductor layers and is the direction in which light is emitted. The X-axis, Y-axis, and Z-axis directions are perpendicular to each other. The figures in this specification are schematic diagrams, and the dimensions, number of holes, etc. can be changed from those shown in the figures.

[0013] 1A and 1B, photonic crystal surface-emitting laser 100 has a light-emitting region 30 and a current confinement region 32. As shown in Fig. 1A, in the XY plane, light-emitting region 30 is, for example, a circular region and is located at the center of photonic crystal surface-emitting laser 100. Current confinement region 32 surrounds the entire periphery of light-emitting region 30. Light-emitting region 30 and current confinement region 32 are each regions extending from the top end to the bottom end of photonic crystal surface-emitting laser 100 in the Z-axis direction.

[0014] As shown in FIG. 1B, in the light-emitting region 30, a substrate 10 (first semiconductor layer), a photonic crystal layer 12, a cladding layer 14 (ninth semiconductor layer), an active layer 16, a cladding layer 18, a cladding layer 22, and a contact layer 24 (eighth semiconductor layer) are stacked in this order. The cladding layer 18 and the cladding layer 22 are different layers and are formed in separate processes, as described below. The cladding layer 18 and the cladding layer 22 are both p-type semiconductor layers and correspond to the second semiconductor layer. The boundary between the cladding layer 18 and the cladding layer 22 is indicated by a dotted line in FIG. 1B. As shown in FIG. 1A, the contact layer 24 is circular in the XY plane and covers the entire light-emitting region 30. As shown in FIG. 1B, an electrode 28 (first electrode) is provided on the upper surface of the contact layer 24.

[0015] In the current confinement region 32, a substrate 10, a photonic crystal layer 12, a cladding layer 14, an active layer 16, a cladding layer 18 (third semiconductor layer), a buried layer 20 (fourth semiconductor layer), and a cladding layer 22 (fifth semiconductor layer) are stacked in this order. A contact layer 24 is not provided in the current confinement region 32. An insulating film 21 is provided on the upper surface of the cladding layer 22 and covers the entire current confinement region 32 as shown in FIG. 1A. As shown in FIG. 1B, an electrode 25 (second electrode) is provided on the lower surface of the substrate 10 and extends into the light emitting region 30 and the current confinement region 32.

[0016] 1A and 1B, a pad 26 and a wiring 27 are provided on the upper surface of the insulating film 21. The electrode 28 and the pad 26 are electrically connected by the wiring 27. The electrode 28 is made of a metal such as a laminate of titanium, platinum, and gold (Ti / Pt / Au). The wiring 27 and the pad 26 are made of a metal such as Au. The electrode 25 is made of a metal such as an alloy of gold, germanium, and Ni (AuGeNi).

[0017] The electrode 28 has a circular ring shape in the XY plane. No structure that blocks the emitted light is provided in the area surrounded by the electrode 28. A structure made of a material that is transparent to the emitted light may be provided. The portion of the light-emitting region 30 surrounded by the electrode 28 becomes the aperture 34. Light is emitted from the aperture 34 in the Z-axis direction. The diameter D1 of the light-emitting region 30 is, for example, 15 μm. The diameter D3 of the aperture 34 is, for example, 10 μm. The diameter D2 of the pad 26 is, for example, 50 μm. The length L1 of the side in the X-axis direction of the photonic crystal surface-emitting laser 100 is, for example, 500 μm. The length of the side in the Y-axis direction may be equal to the length L1 of the side in the X-axis direction, for example, or may be different from L1.

[0018] The substrate 10 is a semiconductor substrate made of, for example, n-type indium phosphide (n-InP). The cladding layer 14 and the buried layer 20 are made of, for example, n-InP. The cladding layer 14 has a thickness of, for example, 150 nm. The buried layer 20 has a thickness of, for example, 500 nm. The cladding layers 18 and 22 are made of, for example, p-InP. The cladding layer 18 from the active layer 16 to the buried layer 2 has a thickness of, for example, 300 nm. The cladding layer 22 in the light-emitting region 30 has a thickness of, for example, 3 μm. The contact layer 24 is made of, for example, p-type indium gallium arsenide (p-InGaAs) with a thickness of, for example, 300 nm. Silicon (Si) is used as the n-type dopant, for example, and zinc (Zn) is used as the p-type dopant.

[0019] The active layer 16 includes, for example, multiple well layers and barrier layers, and has a multi-quantum well (MQW) structure. The well layers and barrier layers are formed of, for example, undoped gallium indium arsenide phosphide (i-GaInAsP). When the substrate 10 is made of InP, the well layers and barrier layers are formed of a mixed crystal system that can lattice match with InP, for example, undoped indium aluminum gallium arsenide (i-InAlGaAs). The active layer 16 has spacer layers (not shown) between it and the cladding layer 14 and between it and the cladding layer 18. The thickness of the active layer 16, including the spacer layers, is, for example, 200 nm. The spacer layers may not be provided.

[0020] Photonic crystal layer 12 has a base material 12a (first region) and a plurality of voids 13 (second region). Base material 12a is formed of n-type indium gallium arsenide phosphide (n-InGaAsP) with a thickness of, for example, 300 nm. The bandgap wavelength of photonic crystal layer 12 is, for example, 1.1 μm, which is shorter than the oscillation wavelength of light. As shown in FIG. 1A, a plurality of voids 13 are provided in base material 12a and are periodically arranged in the X-axis direction and the Y-axis direction. The distance L2 between two adjacent voids 13 is, for example, 400 nm. The diameter D4 of voids 13 is, for example, 100 nm.

[0021] The depth D5 of the air holes 13 shown in FIG. 1B is, for example, 100 nm or more and 2000 nm or less. The air holes 13 extend from the lower surface of the cladding layer 14 in the Z-axis direction to the lower surface of the photonic crystal layer 12. The inside of the air holes 13 is hollow and filled with gas. The refractive index of the InGaAsP base material of the photonic crystal layer 12 is different from the refractive index of the air holes 13. In other words, the refractive index of the photonic crystal layer 12 varies periodically within the XY plane. Light is reflected and refracted within the plane of the photonic crystal layer 12, and oscillates at a wavelength that corresponds to the arrangement of the air holes 13.

[0022] In the light-emitting region 30 shown in FIG. 1B, the substrate 10, photonic crystal layer 12, and cladding layer 14 are n-type semiconductor layers and are located below the active layer 16 in the Z-axis direction. The cladding layers 18 and 22 are p-type semiconductor layers and are located above the active layer 16. The light-emitting region 30 has a pin (positive-intrinsic-negative) structure in the Z-axis direction. Because the light-emitting region 30 has the pin structure, current flows easily in the Z-axis direction. Light is generated by passing a current through the light-emitting region 30 and injecting carriers into the active layer 16. The spot diameter of the light emitted from the photonic crystal surface-emitting laser 100 depends on the diameter of the light-emitting region 30.

[0023] In current confinement region 32, substrate 10, photonic crystal layer 12, and cladding layer 14 are n-type semiconductor layers and are located below active layer 16. A p-type cladding layer 18, an n-type buried layer 20, and a p-type cladding layer 22 are stacked in this order on active layer 16. That is, in current confinement region 32, n-type layers and p-type layers are alternately stacked along the Z-axis direction to form thyristor 23. Due to the presence of thyristor 23, current flows less easily in current confinement region 32 than in light-emitting region 30.

[0024] By inputting a current using the electrodes 25 and 28, the current flows in the Z-axis direction in the light-emitting region 30, and carriers can be injected into the active layer 16. The injection of carriers causes the active layer 16 to generate light.

[0025] Because multiple air holes 13 are provided in the photonic crystal layer 12, light is reflected and diffracted within the XY plane. Light of a specific wavelength, such as 1.3 μm, is amplified in accordance with the period of the multiple air holes 13. Because the electrode 25 functions as a mirror that reflects light, light propagating downward in FIG. 1B is reflected and propagates upward rather than being emitted from the bottom surface. The portion of the light-emitting region 30 surrounded by the electrode 28 functions as an aperture 34. Light is emitted from inside the aperture 34 to the outside (upward) of the photonic crystal surface-emitting laser 100. The intensity of the light can be modulated by repeatedly turning the current on and off. The modulation frequency is several tens of GHz, for example, 25 GHz or 50 GHz.

[0026] As described above, the thyristor 23 is formed in the current confinement region 32, making it difficult for current to flow. On the other hand, the light emitting region 30 has a pin structure in the Z-axis direction, making it easy for current to flow. Current can be selectively input to the light emitting region 30, and current leakage to the current confinement region 32 can be suppressed. of current By suppressing the leakage, it is possible to improve the characteristics of the photonic crystal surface-emitting laser 100.

[0027] (Manufacturing method) Figures 2A, 3A, 4A, 5A, 6A, 7A, 8A, 9A, 10A, 11A, and 12A are plan views illustrating a method for manufacturing the photonic crystal surface-emitting laser 100. Figures 2B, 3B, 4B, 5B, 6B, 7B, 8B, 9B, 10B, 11B, and 12B are cross-sectional views taken along line AA of the corresponding plan views.

[0028] 2A and 2B, photonic crystal layer 12 is epitaxially grown on the upper surface of substrate 10 by, for example, metal-organic vapor phase epitaxy (MOVPE). In this process, voids 13 are not formed.

[0029] As shown in Figures 3A and 3B, an insulating film 40 made of silicon oxide (SiO2) is formed on the upper surface of the photonic crystal layer 12 by, for example, plasma CVD (Chemical Vapor Deposition). Photoresist is applied to the upper surface of the insulating film 40, and patterning is performed by lithography using an electron beam or the like. The resist pattern is transferred to the insulating film 40 by, for example, dry etching. The transferred pattern corresponds to the plurality of voids 13. Dry etching is performed using the insulating film 40 as a mask, and the plurality of voids 13 are formed in the photonic crystal layer 12. The arrangement of the plurality of voids 13 can be adjusted according to the wavelength of light, for example, to an arrangement corresponding to an oscillation wavelength of 1.3 µm. The etching gas used is, for example, Methane (CH 4 ) Gases that can process InP and InGaAsP, such as silicon tetrachloride (SiCl4), chlorine (Cl2), and hydrogen iodide (HI), are used. After the holes 13 are formed, the insulating film 40 is removed.

[0030] As shown in Figures 4A and 4B, cladding layer 14, active layer 16, and cladding layer 18a are grown by crystal growth in this order on the top surface of photonic crystal layer 12. Cladding layer 14 is, for example, an n-InP layer with a thickness of 150 nm. By providing cladding layer 14 on air holes 13, air holes 13 become closed spaces that do not communicate with the outside space. The top surface of cladding layer 14 is flat. Active layer 16 and cladding layer 18a are grown epitaxially on the top surface of cladding layer 14. Cladding layer 18a is, for example, a p-InP layer with a thickness of 200 nm.

[0031] As shown in Figures 5A and 5B, an insulating film 42 is formed on the upper surface of the cladding layer 18a, for example, by plasma CVD, and then processed into a circle with a diameter of 15 µm by photolithography, dry etching, or the like. The insulating film 42 is, for example, a 300 nm thick SiO2 film, and is located in the center of the upper surface of the cladding layer 18a. The portion covered by the insulating film 42 becomes the light-emitting region 30, and the portion outside the insulating film 42 becomes the current confinement region 32. As will be described with reference to Figures 6A and 6B, the insulating film 42 functions as a selective growth mask.

[0032] 6A and 6B, cladding layer 18b and buried layer 20 are epitaxially grown in this order on the portion of the upper surface of cladding layer 18a that is not covered with insulating film 42. Cladding layer 18b is, for example, a p-InP layer with a thickness of 300 nm, and together with cladding layer 18a, forms cladding layer 18. Cladding layer 18b and buried layer 20 are not grown on the portion of the upper surface of cladding layer 18a that is covered with insulating film 42.

[0033] 7A and 7B, the insulating film 42 is removed, so that the upper surface of the cladding layer 18 in the light emitting region 30 is exposed.

[0034] As shown in Figs. 8A and 8B, for example, MOVPE Cladding layer 22 is epitaxially grown on the upper surface of cladding layer 18 in light-emitting region 30 and on the upper surface of buried layer 20 in current confinement region 32 by epitaxial growth, for example. As shown in FIG. 8B , the step between cladding layer 18 and buried layer 20 is buried with cladding layer 22, and the upper surface of cladding layer 22 is flat. In current confinement region 32, n-type substrate 10, n-type photonic crystal layer 12 and n-type cladding layer 14, p-type cladding layer 18, n-type buried layer 20, and p-type cladding layer 22 are stacked to form thyristor 23. In light-emitting region 30, n-type substrate 10, n-type photonic crystal layer 12 and n-type cladding layer 14, active layer 16 with an MQW structure, p-type cladding layer 18, and p-type cladding layer 22 are stacked to form a p-i-n structure.

[0035] 9A and 9B, the contact layer 24 is epitaxially grown on the upper surface of the cladding layer 22 by, for example, MOVPE. A resist pattern (not shown) is formed by photolithography, and the contact layer 24 is removed from the current confinement region 32 by wet etching. A circular contact layer 24 remains in the light-emitting region 30.

[0036] 10A and 10B, the insulating film 21 is formed by, for example, plasma CVD, and then removed from above the contact layer 24 by etching or the like. The contact layer 24 is exposed in the light-emitting region 30. The insulating film 21 remains in the current confinement region 32.

[0037] 11A and 11B, an electrode 28 is formed on the upper surface of the contact layer 24 by, for example, vacuum deposition and lift-off. The electrode 28 is annular, and the contact layer 24 is exposed in the area surrounded by the electrode 28. The exposed portion of the contact layer 24 becomes an aperture 34.

[0038] 12A and 12B, pads 26, wiring 27, and electrodes 25 are formed by vacuum deposition, lift-off, or the like. Specifically, the lower surface of substrate 10 is polished to a mirror finish, and then electrodes 25 are provided over the entire lower surface. Pads 26 and wiring 27 are provided on the upper surface of insulating film 21. Through the above steps, photonic crystal surface-emitting laser 100 is formed.

[0039] (Comparative Example) Fig. 13 is a cross-sectional view illustrating a photonic crystal surface-emitting laser 100R according to a comparative example. As shown in Fig. 13, a cladding layer 18 is provided on an active layer 16, and a contact layer 24 and an insulating film 21 are provided on the upper surface of the cladding layer 18. The burying layer 20 and the cladding layer 22 are not provided, and a thyristor is not formed. The n-type layers (substrate 10, photonic crystal layer 12, and cladding layer 14), the active layer 16, and the p-type cladding layer 18 form a p-i-n structure throughout the photonic crystal surface-emitting laser 100R.

[0040] The current flows through the p-type contact layer 24 and the cladding layer 18 and is injected into the active layer 16. The current diffuses in the cladding layer 18 within the XY plane and leaks outside the light-emitting region 30. This leakage current does not contribute much to the generation of light extracted from the aperture 34. The current leakage may cause degradation of characteristics, such as a decrease in threshold current and optical output. The impact of the leakage current becomes particularly significant when the photonic crystal surface-emitting laser 100R is miniaturized. To modulate light at a frequency such as 25 GHz, the diameter of the light-emitting region 30 is set to, for example, 10 μm to 20 μm. The current leaks radially outward from the light-emitting region 30 in a region approximately 20 μm to 30 μm long. Because the current leakage region is approximately the same size as the light-emitting region 30, the impact of the current leakage on characteristics also becomes significant.

[0041] According to the first embodiment, in the light emitting region 30, an n-type substrate 10, an n-type photonic crystal layer 12, and an n-type cladding layer 14 are stacked below the active layer 16. P-type cladding layers 18 and 22 are stacked above the active layer 16. Since the light emitting region 30 has a pin structure in the Z-axis direction, a current can be injected into the active layer 16.

[0042] In the current confinement region 32, an n-type substrate 10, an n-type photonic crystal layer 12 and an n-type cladding layer 14, a p-type cladding layer 18, an n-type buried layer 20, and a p-type cladding layer 22 are stacked in this order. N-type layers and p-type layers are stacked alternately in the Z-axis direction, and a thyristor 23 is formed in the current confinement region 32. Current flows less easily in the current confinement region 32 that has the thyristor 23 than in the light-emitting region 30. Current leakage from the light-emitting region 30 to the current confinement region 32 is suppressed, and the current flows concentratedly in the light-emitting region 30. The characteristics of the photonic crystal surface-emitting laser 100 can be improved.

[0043] For example, the diameter D1 of the light-emitting region 30 shown in FIG. 1A is set to 15 to 20 μm, and the diameter D3 of the aperture 34 is set to 10 μm. In the comparative example shown in FIG. 13, the threshold current is 12 mA. The optical output when a current of 30 mA is input is 1.5 mW. According to the first embodiment, the threshold current is 3 mA, which is lower than that of the comparative example. The optical output when a current of 30 mA is input is 4 mW, which is higher than that of the comparative example. As described above, it is possible to improve characteristics such as an improved threshold current and an improved optical output. By setting the diameters D1 and D3 to the above values ​​and suppressing current leakage, it is possible to reduce the spot diameter of the emitted light and realize a highly efficient photonic crystal surface-emitting laser 100. By reducing the diameter of the light-emitting region 30, it is possible to modulate light at frequencies of 10 GHz or higher, such as 25 GHz and 50 GHz.

[0044] 1B, a p-type layer, an undoped layer (i), and an n-type layer are arranged in the light-emitting region 30 from top to bottom in the Z-axis direction. In the current confinement region 32, the layers are stacked in the order pnpn. The order of the p-type and n-type layers may be reversed. The semiconductor layers included in the photonic crystal surface-emitting laser 100 may be formed of compound semiconductors other than those mentioned above, such as GaAs-based semiconductors.

[0045] 1B, the active layer 16 is provided in the light emitting region 30 and the current confinement region 32. As shown in FIG. 4B, the active layer 16 is laminated in both regions at the same time, which simplifies the process and reduces costs.

[0046] As shown in Figures 1A and 1B, the light-emitting region 30 and the current confinement region 32 are adjacent to each other, which makes it possible to suppress current leakage from the light-emitting region 30 to the outside. As shown in Figure 1A, it is preferable that the current confinement region 32 surrounds the periphery of the light-emitting region 30, and it is particularly preferable that the current confinement region 32 completely surrounds the entire periphery of the light-emitting region 30. This makes it possible to suppress current leakage from the light-emitting region 30 in all directions within the XY plane. This effectively improves the characteristics.

[0047] The contact layer 24 is provided on the upper surface of the cladding layer 22 in the light-emitting region 30. The contact layer 24 is not provided in the current confinement region 32, leaving the upper surface of the current confinement region 32 exposed. Because the contact layer 24 has lower resistance than other semiconductor layers, an electric field is applied to the entire contact layer 24. If the contact layer 24 were provided on the entire upper surface of the cladding layer 22, an electric field would be applied not only to the light-emitting region 30 but also to the current confinement region 32, increasing parasitic capacitance. By not providing the contact layer 24 in the current confinement region 32, as shown in FIG. 1B, parasitic capacitance can be reduced. This is advantageous for high-speed modulation. The contact layer 24 may be provided on part of the current confinement region 32; however, it is preferable that at least a portion of the current confinement region 32 be exposed from the contact layer 24 to reduce parasitic capacitance. To reduce electrical resistance, it is preferable that the contact layer 24 cover the entire light-emitting region 30.

[0048] As shown in FIG. 1A, the light-emitting region 30 is circular in the XY plane, and the electrode 28 is annular. The shape of the light-emitting region 30 in the XY plane may be circular, elliptical, or polygonal. The electrode 28 may have an elliptical or oval outer shape, or may be ring-shaped. The area surrounded by the electrode 28 forms an aperture 34, allowing light to be emitted without loss due to the electrode 28. The electrode 28 only needs to be in contact with a portion of the contact layer 24. The dopant concentration of the contact layer 24 is higher than that of the other semiconductor layers, making the contact layer 24 highly conductive. When current is applied to the electrode 28, current flows throughout the contact layer 24 and is input to the active layer 16. The interface between the substrate 10 and the electrode 25 preferably functions as a mirror. Light propagating downward in the Z-axis direction is reflected upward to reduce light loss.

[0049] An aperture may be formed on the lower surface of the substrate 10, and light may be emitted from the lower surface. For example, the electrode 25 may be ring-shaped, and the area surrounded by the electrode 25 forms the aperture. To reflect light downward, it is preferable that the interface between the electrode 28 and the contact layer 24 has high reflectivity.

[0050] Photonic crystal layer 12 is an n-type layer and is provided between active layer 16 and substrate 10. Substrate 10, photonic crystal layer 12 and cladding layer 14 constitute a part of the pin structure and thyristor 23 as n-type layers.

[0051] As shown in FIG. 1B, multiple air holes 13 extend within photonic crystal layer 12. The upper ends of air holes 13 in the Z-axis direction are filled with cladding layer 14. In other words, a flat surface of cladding layer 14 is disposed above air holes 13. Active layer 16 undergoes crystal growth on the upper surface of cladding layer 14, and cladding layers 18 and 22, burying layer 20, and contact layer 24 grow on active layer 16. Because cladding layer 14 fills air holes 13, the influence of air holes 13 on crystal growth is small. This prevents the occurrence of depressions and the like, allowing for the growth of a semiconductor layer with high crystallinity.

[0052] The photonic crystal layer 12 may be a p-type layer and provided between the active layer 16 and the cladding layer 18. The photonic crystal layer 12 and the cladding layer 18 become part of the pin structure and the thyristor 23 as p-type layers.

[0053] 1A and 1B, a plurality of air holes 13 are provided in both the light-emitting region 30 and the current confinement region 32. Light is repeatedly diffracted and reflected across the entire XY plane of the photonic crystal surface-emitting laser 100, thereby amplifying light of a specific oscillation wavelength, such as 1.3 μm. Instead of the air holes 13, the photonic crystal layer 12 may have a region with a refractive index different from that of the base material. For example, the photonic crystal layer 12 may have a region of a base semiconductor (such as InGaAsP) and a region of a semiconductor different from the base material.

[0054] Second Embodiment (Photonic crystal surface-emitting laser) 14 is a cross-sectional view illustrating a photonic crystal surface-emitting laser 200 according to the second embodiment. Description of the same configuration as in the first embodiment will be omitted. The plan view is the same as FIG. 1A.

[0055] As shown in FIG. 14, the active layer 16 is not provided between the cladding layer 14 and the cladding layer 18 in the current confinement region 32, but a passive layer 50 (seventh semiconductor layer) is provided. The passive layer 50 is adjacent to the active layer 16 in the XY plane and surrounds the entire periphery of the active layer 16. The passive layer 50 is formed of a mixed crystal semiconductor such as InGaAsP, and does not have optical gain. The thickness of the passive layer 50 may be equal to or different from the thickness of the active layer 16. The equivalent refractive index of the passive layer 50 may be equal to or different from the equivalent refractive index of the active layer 16. It is sufficient that there is no adverse optical effect, such as a decrease in reflectance. optics The PL (Photoluminescence) wavelength of the passive layer 50 is 50 nm or more shorter than the wavelength at which the gain peaks, so the passive layer 50 does not easily absorb light.

[0056] (Manufacturing method) 15A and 16A are plan views illustrating a method for manufacturing the photonic crystal surface-emitting laser 200. Figures 15B and 16B are cross-sectional views taken along line AA in the corresponding plan views. The steps shown in Figures 3A to 5B are also common to the second embodiment.

[0057] 15A and 15B, an insulating film 42 is provided in the center of the upper surface of the cladding layer 18a. Using the insulating film 42 as a mask, dry etching, wet etching, or the like is performed to remove the portions of the cladding layer 18a and the active layer 16 that are not covered with the insulating film 42. After the etching, the portion of the upper surface of the cladding layer 14 that is included in the current confinement region 32 is exposed. The portion that is covered with the insulating film 42 is not etched.

[0058] 16A and 16B, a passive layer 50, a cladding layer 18c, and a buried layer 20 are epitaxially grown in this order on the upper surface of the cladding layer 14, for example, by MOVPE. The passive layer 50 surrounds the active layer 16. The cladding layer 18c, together with the cladding layer 18a remaining in the light-emitting region 30, forms the cladding layer 18. The subsequent steps are the same as those shown in FIGS. 7A to 12B.

[0059] According to the second embodiment, a pin structure including the active layer 16 is formed in the light emitting region 30, and therefore a current can be injected into the active layer 16. A thyristor 23 is formed in the current confinement region 32, and therefore a current does not flow as easily therein as in the light emitting region 30. By suppressing current leakage from the light emitting region 30 to the current confinement region 32, the characteristics of the photonic crystal surface emitting laser 200 can be improved.

[0060] In the second embodiment, a passive layer 50 is provided in the current confinement region 32. This increases the light reflectance of the current confinement region 32 compared to the first embodiment, improving the characteristics. The effective optical loss outside the aperture 34 (current confinement region 32) in the first embodiment is 240 cm -1 The optical reflectance is about 86%. On the other hand, the effective optical loss in the current confinement region 32 of the second embodiment is 15 cm -1 and the reflectivity is 97%. By reflecting most of the light incident on the current confinement region 32 from the light emitting region 30 back to the light emitting region 30, it is possible to suppress light loss. According to the second embodiment, the threshold current can be reduced to 1.5 mA. When a current of 30 mA is input, an optical output of 7 mW is obtained. As described above, it is possible to further improve the threshold current and optical output.

[0061] <Third embodiment> Fig. 17A is a plan view illustrating a photonic crystal surface-emitting laser 300 according to the third embodiment, and Fig. 17B is a cross-sectional view taken along line AA in Fig. 17A. Descriptions of the same configurations as those in the first and second embodiments will be omitted.

[0062] As shown in FIG. 17B , in the light-emitting region 30, an active layer 16 and a cladding layer 18 are stacked in this order on the upper surface of the cladding layer 14. A contact layer 24 is provided on the upper surface of the cladding layer 18. In the current confinement region 32, a passive layer 50 and a cladding layer 18 are stacked in this order on the upper surface of the cladding layer 14. An insulating film 21 is provided on the upper surface of the cladding layer 18. The cladding layer 18 is made of InP, for example, with a thickness of approximately 3.2 μm. Neither a buried layer 20 nor a cladding layer 22 is provided. No thyristor is formed in the current confinement region 32.

[0063] As shown in Figures 17A and 17B, the portion of the cladding layer 18 within the light-emitting region 30 is designated as region 18d (second semiconductor layer), and the portion within the current confinement region 32 is designated as region 18e (sixth semiconductor layer). Region 18e surrounds the entire periphery of region 18d. As will be described later, region 18d has p-type conductivity. Region 18e is a region that has been insulated by ion implantation.

[0064] (Manufacturing method) 18A to 19 are cross-sectional views illustrating a method for manufacturing a photonic crystal surface-emitting laser 300. The steps shown in Fig. 2A to Fig. 5B of the first embodiment and the steps shown in Fig. 15A and Fig. 15B of the second embodiment are also performed in the third embodiment.

[0065] As shown in Fig. 18A, a cladding layer 18c is epitaxially grown on the upper surface of the passive layer 50. No buried layer 20 is provided. As shown in Fig. 18B, the insulating film 42 used as the selective growth mask is removed. A p-InP layer is grown on the cladding layer 18c to form the cladding layer 18.

[0066] As shown in FIG. 19, the contact layer 24 is epitaxially grown on the upper surface of the cladding layer 18. Etching is performed using the insulating film 46 as a mask, and the contact layer 24 is shaped into a circular shape. Using the insulating film 46 as a mask, hydrogen ions (protons, H +) are injected into the cladding layer 18. The portions of the cladding layer 18 that are not covered with the insulating film 46 are insulated by injecting protons into them. The insulated portions are regions 18e. Protons are not injected into the portions that are covered with the insulating film 46. As a result, the contact layer 24 remains p-type conductive. The portion of the cladding layer 18 under the insulating film 46 is region 18d, which has p-type conductivity. The active layer 16 is also protected by the insulating film 46, so protons are not injected into it.

[0067] The depth of the proton implantation is approximately the same as the thickness of the cladding layer 18. Protons are not implanted into the layers below the cladding layer 18, i.e., the passive layer 50, the cladding layer 14, the photonic crystal layer 12, and the substrate 10. The cladding layer 14, the photonic crystal layer 12, and the substrate 10 maintain n-type conductivity. The processes after the proton implantation are the same as those in the first embodiment.

[0068] According to the third embodiment, the region 18e of the cladding layer 18 is an insulated region by proton implantation, making it difficult for current to flow through the current confinement region 32. This makes it possible to suppress current leakage from the light-emitting region 30 to the current confinement region 32, thereby improving the characteristics of the photonic crystal surface-emitting laser 300. Since the passive layer 50 is adjacent to the active layer 16, the optical reflectivity of the current confinement region 32 is increased, thereby suppressing optical loss.

[0069] The depth of proton implantation is preferably approximately the same as the thickness of the cladding layer 18. The region 18e of the cladding layer 18 within the current confinement region 32 can be insulated throughout the entire depth direction. Current leakage can be effectively suppressed. It is preferable that protons are not implanted into the cladding layer 14. Ions other than protons may be implanted for insulation.

[0070] Although the embodiments of the present disclosure have been described in detail above, the present disclosure is not limited to such specific embodiments, and various modifications and variations are possible within the scope of the gist of the present disclosure as described in the claims. [Explanation of symbols]

[0071] 10 Substrate (first semiconductor layer) 12 Photonic crystal layer 12a Base material (first area) 13 Holes (second region) 14 cladding layer (9th semiconductor layer) 18 cladding layer (second semiconductor layer, third semiconductor layer) 18a, 18b, 18c cladding layers 22 cladding layer (second semiconductor layer, fifth semiconductor layer) 16 Active layer 18d region (second semiconductor layer) 18e region (6th semiconductor layer) 20 buried layer (fourth semiconductor layer) 21, 40, 42, 46 Insulating film 23 Thyristor 24 Contact layer (8th semiconductor layer) 25, 28 electrodes 26 pads 27 Wiring 30 Light-emitting area 32 Current confinement region 34 aperture 50 Passive layer (7th semiconductor layer) 100, 100R, 200, 300 Photonic crystal surface-emitting laser

Claims

1. a light-emitting region that emits light in a direction intersecting the in-plane direction; a current confinement region adjacent to the light emitting region in the in-plane direction and through which a current flows more slowly than in the light emitting region, the light emitting region and the current confinement region each have a photonic crystal layer; the photonic crystal layer has a first region and second regions periodically arranged in the in-plane direction within the first region; the refractive index of the second region is different from the refractive index of the first region; the light emitting region has a first semiconductor layer having a first conductivity type, an active layer having optical gain, and a second semiconductor layer having a second conductivity type; the first semiconductor layer, the active layer, and the second semiconductor layer are stacked in this order in the light emission direction, the light emitting region includes an eighth semiconductor layer stacked on the second semiconductor layer and having the second conductivity type; at least a portion of the current confinement region is exposed from the eighth semiconductor layer; a first electrode provided on an upper surface of the eighth semiconductor layer in the light emitting region; a second electrode provided on a surface of the substrate opposite to the surface on which the first semiconductor layer is provided, The photonic crystal surface-emitting laser has the eighth semiconductor layer exposed in a portion of the light-emitting region surrounded by the first electrode.

2. the current confinement region includes the first semiconductor layer, a third semiconductor layer having the second conductivity type, a fourth semiconductor layer having the first conductivity type, and a fifth semiconductor layer having the second conductivity type; The photonic crystal surface-emitting laser according to claim 1 , wherein the first semiconductor layer, the third semiconductor layer, the fourth semiconductor layer, and the fifth semiconductor layer are stacked in order in the light emission direction to form a thyristor.

3. the current confinement region has a sixth semiconductor layer, The photonic crystal surface-emitting laser according to claim 1 , wherein the sixth semiconductor layer is insulated.

4. 2. The photonic crystal surface emitting laser according to claim 1, wherein the active layer is provided in the light emitting region and the current confinement region.

5. the current confinement region has a seventh semiconductor layer, The photonic crystal surface-emitting laser according to claim 1 , wherein the seventh semiconductor layer is adjacent to the active layer in the in-plane direction and has a band gap larger than the energy of the light.

6. The photonic crystal surface-emitting laser according to claim 1 , wherein the current confinement region surrounds the entire periphery of the light-emitting region in the in-plane direction.

7. In the light-emitting region, the first electrode is ring-shaped in the in-plane direction, The photonic crystal surface-emitting laser according to claim 1 , wherein the eighth semiconductor layer is exposed in a portion of the light-emitting region that is surrounded by the ring-shaped first electrode.

8. the first semiconductor layer, the photonic crystal layer, the active layer, and the second semiconductor layer are stacked in this order; a ninth semiconductor layer having the first conductivity type, the ninth semiconductor layer being provided between the photonic crystal layer and the active layer; the photonic crystal layer has the first conductivity type; the second region of the photonic crystal layer is a hole; The photonic crystal surface-emitting laser according to claim 1 , wherein the end of the hole on the active layer side is covered with the ninth semiconductor layer.

9. forming a light-emitting region that emits light in a direction intersecting an in-plane direction; forming a current confinement region adjacent to the light emitting region in the in-plane direction and through which a current flows more slowly than in the light emitting region; forming a first electrode; and forming a second electrode, the step of forming the light emitting region and the step of forming the current confinement region include a step of providing a photonic crystal layer; the photonic crystal layer has first regions and second regions periodically arranged in the in-plane direction of the first regions, the refractive index of the second region is different from the refractive index of the first region; the step of forming the light emitting region includes a step of sequentially stacking a first semiconductor layer having a first conductivity type, an active layer having optical gain, a second semiconductor layer having a second conductivity type, and a third semiconductor layer having the second conductivity type; at least a portion of the current confinement region is exposed from the third semiconductor layer; the first electrode is provided on an upper surface of the third semiconductor layer in the light emitting region; the second electrode is provided on a surface of the substrate opposite to a surface on which the first semiconductor layer is provided, A method for manufacturing a photonic crystal surface-emitting laser, wherein the third semiconductor layer is exposed in a portion of the light-emitting region surrounded by the first electrode.

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