Power Conversion Device

Abstract

The communication abnormality determination unit (45) classifies the N submodules (SM) into a plurality of healthy submodules capable of communication and zero or more abnormal submodules unable to communicate, based on the state of data communication via a communication path (170) multiplexed for each of the N submodules (SM) constituting an arm. The SM control unit (50) generates an output voltage command value (Vsmref) and carrier shift parameters (Nsf,Ni) for each submodule (SM) and transmits them to the submodules (SM). The PWM control unit (30) controls the on / off of a plurality of switching elements in each submodule (SM) based on a comparison between the carrier wave (CW) and the output voltage command value (Vsmref). The carrier generation unit (31) generates a carrier wave (CW) using the carrier shift parameters (Nsf,Ni) so that the phases of the carriers (CW) of the plurality of healthy submodules are shifted at equal intervals.

Description

[Technical Field]

[0001] The present disclosure relates to a power conversion device. [Background technology]

[0002] A modular multilevel converter (hereinafter also referred to as an MMC converter), in which multiple unit converters are connected in cascade, can easily accommodate higher voltages by increasing the number of unit converters. A "unit converter" is also called a "sub-module" or "converter cell."

[0003] MMC converters are widely used in power transmission and distribution systems as large-capacity static var compensators or AC / DC power converters for high-voltage DC transmission. Each submodule contains multiple switching elements and a storage element. Even if a submodule fails, MMC converters can continue operation by bypassing the failed submodule.

[0004] Furthermore, Japanese Patent Publication No. 6689472 (Patent Document 1) describes a control method in which the control device detects failures in each sub-module through communication between the overall control device and each sub-module, and stabilizes output control excluding the failed sub-module.

[0005] Specifically, the document describes a control method for output control of multiple submodules in the same arm that uses phase-shift PWM (Pulse Width Modulation). When a submodule fails, the control equalizes the phase intervals of the carrier signals among the remaining healthy submodules, excluding the failed submodule. This prevents the failed submodule from simply being excluded, resulting in uneven carrier phase intervals among the healthy submodules. This optimizes phase-shift PWM control excluding the failed submodule to prevent degradation of power quality, such as distortion due to residual harmonic components in the output voltage caused by uneven carrier phase intervals. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Patent No. 6689472 Summary of the Invention [Problem to be solved by the invention]

[0007] However, in the power conversion device of Patent Document 1, the control device determines whether each sub-module is healthy or faulty based on a signal (health determination signal cn) transmitted from each sub-module to the control device. Therefore, there is a concern that when a communication abnormality occurs in the optical fiber or the like, control for optimizing the phase-shift PWM control may not be able to be performed normally.

[0008] Furthermore, in Patent Document 1, it is necessary to install communication wiring such as optical fiber cables in order to mutually communicate various signals including control commands between the control device and each sub-module. Therefore, in order to reduce communication wiring costs, it is conceivable to introduce a configuration in which a wavelength division multiplexing (WDM) method is applied and multiple sub-modules and the control device communicate with one communication wiring.

[0009] However, with such a communication configuration, when a communication abnormality related to WDM occurs, many sub-modules will be unable to communicate with the control device, which may exacerbate the problems of Patent Document 1 described above.

[0010] The present disclosure has been made to solve such problems, and an object of the present disclosure is to optimize phase-shift PWM control and suppress deterioration of power quality even when a communication abnormality occurs in a power conversion device in which data communication is performed between a control device and a power converter via communication paths multiplexed for each of a plurality of sub-modules. [Means for solving the problem]

[0011] According to one aspect of the present disclosure, there is provided a power conversion device. The power conversion device includes a power converter including multiple arms and a control device that controls the power converter. Each arm includes multiple submodules connected in series. Each submodule includes multiple switching elements, a power storage element, a pair of output terminals, and a control unit. The control unit controls the output voltage between the output terminals by turning on and off the multiple switching elements. Bidirectional data communication between the control device and the multiple submodules is performed via communication paths multiplexed for each of the multiple submodules. The control device classifies the multiple submodules into multiple healthy submodules that can communicate and zero or more abnormal submodules that cannot communicate based on a state of data communication. The control device further generates output voltage command values ​​for each of the multiple submodules based on voltage command values ​​for each of the multiple arms, and generates carrier shift parameters for each of the multiple healthy submodules based on the classification result. The control unit has a PWM control unit. The PWM control unit controls the on / off of the multiple switching elements based on a comparison between a carrier according to the carrier shift parameter received from the control device via the communication path and the output voltage command value received from the control device via the communication path. The PWM control units of the plurality of healthy sub-modules use the carrier shift parameter to generate carriers such that the phases of the carriers are shifted at equal intervals among the plurality of healthy sub-modules. [Effects of the Invention]

[0012] According to the present disclosure, by using carrier shift parameters that reflect the classification results of multiple healthy submodules that can communicate and abnormal submodules that cannot communicate on the control device side, a carrier to be used for phase shift PWM control is generated on the submodule side so that the carrier phase is shifted at equal intervals between multiple healthy submodules, thereby making it possible to optimize phase shift PWM control even when a communication abnormality occurs. [Brief explanation of the drawings]

[0013] [Figure 1]1 is a schematic configuration diagram of a power conversion device according to an embodiment of the present invention; [Figure 2] FIG. 10 is a conceptual diagram illustrating a comparative example of a communication path between a control device and a submodule. [Figure 3] 3 is a conceptual diagram illustrating a communication path between a control device and a submodule in the power conversion device according to the first embodiment. FIG. [Figure 4] FIG. 2 is a circuit diagram illustrating an example of a submodule shown in FIG. [Figure 5] FIG. 2 is a block diagram illustrating a configuration for controlling the output of each sub-module. [Figure 6] 4A to 4C are conceptual waveform diagrams illustrating PWM control by a gate signal generating unit. [Figure 7] FIG. 2 is a conceptual diagram illustrating a carrier waveform for phase shift PWM control. [Figure 8] FIG. 10 is a conceptual diagram illustrating a carrier waveform of phase shift PWM control when a communication abnormality occurs. [Figure 9] FIG. 10 is a conceptual diagram illustrating a carrier waveform of phase shift PWM control to which degeneration control is applied when a communication abnormality occurs. [Figure 10] FIG. 10 is a process flow diagram when degeneration control is applied to phase shift PWM control in the power conversion device according to the present embodiment. [Figure 11] 2 is a block diagram illustrating an example of a hardware configuration of a control device shown in FIG. 1. FIG. [Figure 12] 4 is a flowchart illustrating processing on the control device side when a communication abnormality occurs in the power conversion device according to the first embodiment. [Figure 13] 4 is a flowchart illustrating processing on the sub-module side when a communication abnormality occurs in the power conversion device according to the first embodiment. [Figure 14] 10 is a conceptual diagram illustrating a communication path between a control device and a submodule in a power conversion device according to a second embodiment. FIG. [Figure 15] 10 is a flowchart illustrating processing on the control device side when a communication abnormality occurs in the power conversion device according to the second embodiment. [Figure 16]10 is a table illustrating an example of operation of the power conversion device according to the second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0014] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. In the following, the same or corresponding parts in the drawings will be denoted by the same reference numerals, and their description will not be repeated in principle.

[0015] Embodiment 1 <Overall configuration of power conversion device> FIG. 1 is a schematic configuration diagram of a power conversion device 1 according to this embodiment.

[0016] 1, power conversion device 1 is configured by a modular multilevel converter including a plurality of sub-modules SM connected in series with each other. Power conversion device 1 performs power conversion between a DC circuit 14 and an AC circuit 12. Power conversion device 1 includes a power converter 2 and a control device 3.

[0017] The power converter 2 includes a plurality of leg circuits 4u, 4v, 4w (hereinafter, collectively referred to as "leg circuits 4" when referring to any one of them) connected in parallel between a positive DC terminal (i.e., a high-potential side DC terminal) Np and a negative DC terminal (i.e., a low-potential side DC terminal) Nn.

[0018] A leg circuit 4 is provided for each of the multiple phases constituting the AC. The leg circuit 4 is connected between the AC circuit 12 and the DC circuit 14, and performs power conversion between the two circuits. Fig. 1 shows a case where the AC circuit 12 is a three-phase AC system, and three leg circuits 4u, 4v, and 4w are provided corresponding to the U phase, V phase, and W phase, respectively.

[0019] The AC input terminals Nu, Nv, and Nw provided in the leg circuits 4u, 4v, and 4w, respectively, are connected to an AC circuit 12 via a transformer 13. The AC circuit 12 is, for example, an AC power system including an AC power source. For ease of illustration, the connection between the AC input terminals Nv and Nw and the transformer 13 is not shown in FIG. 1.

[0020] A high-potential side DC terminal Np and a low-potential side DC terminal Nn, which are commonly connected to each leg circuit 4, are connected to a DC circuit 14. The DC circuit 14 is, for example, a DC terminal of a DC power system including a DC transmission network or other power conversion device.

[0021] 1, a configuration may be adopted in which the leg circuits 4u, 4v, and 4w are connected to the AC circuit 12 via an interconnection reactor. Furthermore, instead of the AC input terminals Nu, Nv, and Nw, primary windings may be provided in the leg circuits 4u, 4v, and 4w, respectively, and the leg circuits 4u, 4v, and 4w may be connected to the transformer 13 or the interconnection reactor via secondary windings magnetically coupled to the primary windings. In this case, the primary windings may be reactors 8A and 8B described below. That is, the leg circuit 4 is electrically (i.e., DC- or AC-connected) to the AC circuit 12 via connection parts provided in the leg circuits 4u, 4v, and 4w, such as the AC input terminals Nu, Nv, and Nw or the above-mentioned primary windings.

[0022] The leg circuit 4u includes an upper arm 5 extending from the high potential side DC terminal Np to the AC input terminal Nu, and a lower arm 6 extending from the low potential side DC terminal Nn to the AC input terminal Nu. The AC input terminal Nu, which is the connection point between the upper arm 5 and the lower arm 6, is connected to a transformer 13. The high potential side DC terminal Np and the low potential side DC terminal Nn are connected to a DC circuit 14. The leg circuits 4v and 4w have a similar configuration, so the leg circuit 4u will be described below as a representative example.

[0023] The upper arm 5 includes a plurality of cascaded submodules SM(1) to SM(N) and a reactor 8A. In the upper arm 5, the plurality of submodules SM(1) to SM(N) and the reactor 8A are connected in series. Similarly, the lower arm 6 includes a plurality of cascaded submodules SM(1) to SM(N) and a reactor 8B. In the lower arm 6, the plurality of submodules SM(1) to SM(N) and the reactor 8B are connected in series. In the following description, the number of submodules included in each of the upper arm 5 and the lower arm 6 is defined as N, where N≧2. In the following description, when there is no need to distinguish between the upper arm 5 and the lower arm 6, such as when describing matters common to both the upper arm 5 and the lower arm 6, the upper arm 5 and the lower arm 6 will be collectively referred to simply as "arms."

[0024] Furthermore, when explaining matters common to the submodules, the submodules SM(1) to SM(N) are collectively referred to as submodules SM, while when distinguishing between the submodules, the submodules are written with the suffix (i). This also applies to the elements arranged in each submodule. Note that the suffix (i) is written just to confirm that it does not necessarily relate to the physical arrangement of the submodules SM.

[0025] The reactor 8A may be inserted at any position in the upper arm 5 of the leg circuit 4u, and the reactor 8B may be inserted at any position in the lower arm 6 of the leg circuit 4u. There may be a plurality of reactors 8A and a plurality of reactors 8B. The inductance values ​​of the reactors may be different from each other. Only the reactor 8A in the upper arm 5 or only the reactor 8B in the lower arm 6 may be provided.

[0026] Reactors 8A and 8B are provided to suppress circulating current and to prevent a sudden increase in fault current in the event of a fault in AC circuit 12 or DC circuit 14 or the like.

[0027] The power conversion device 1 includes detectors for measuring electrical quantities (e.g., current, voltage, etc.) used for control, such as an AC voltage detector 10, an AC current detector 16, DC voltage detectors 11A and 11B, and arm current detectors 9A and 9B provided in each leg circuit 4. Signals detected by these detectors are input to the control device 3.

[0028] 1, for ease of illustration, the signal lines for signals input from each detector to the control device 3 and the signal lines for signals input / output between the control device 3 and each sub-module SM are partially shown together so that the elements that are communicatively connected can be understood, but in reality, signal lines are provided for each detector and each sub-module SM so that communication with the control device 3 is possible. Separate signal lines for transmission and reception may be provided between each sub-module SM and the control device 3. The signal lines may be formed, for example, of optical fiber.

[0029] FIG. 2 shows a conceptual diagram illustrating a comparative example of a communication path between the control device 3 and the submodule SM.

[0030] 2 shows the communication paths of 12 sub-modules SM(1) to SM(12) in one arm, where N=12 for one arm. Data communication is performed between the control device 3 and the sub-modules SM by communication of optical signals via optical fibers.

[0031] In the control device 3, a first data signal for transmitting operation commands and the like is generated for each sub-module SM. The first data signal is converted into an optical signal and output from the optical communication module 41a (denoted as "SFP: Small Form-factor Pluggable" in the figure) to the optical fiber OFB. In each sub-module SM, the first data signal is received by the optical communication module 41b (denoted as "SFP" in the figure) and used to control each sub-module SM.

[0032] Meanwhile, each sub-module SM generates a second data signal indicating the sensor detection value, operating state, etc. of that sub-module SM. The second data signal is converted into an optical signal and output from the optical communication module 41b to the optical fiber OFB. The second data signal is received by the optical communication module 41a in the control device 3.

[0033] 2, an optical fiber OFB is provided as a communication line for each sub-module SM. That is, the first data signal and the second data signal are transmitted and received between the control device 3 and one arm of sub-modules SM(1) to SM(12) via a communication path including optical fibers OFB1 to OFB12.

[0034] The optical fiber OFB connects a relatively long distance between the control and protection panel room 150, where the control device 3 is installed, and the electrical equipment room 160, where the power converter 2 including the submodule SM is installed. Therefore, installing a large number of optical fiber OFBs in the control and protection panel room 150 and the electrical equipment room 160 would restrict the layout and increase costs. In Figure 2, N = 12 is used for simplicity, but in actual MMC converters for HVDC applications, there are examples where the total number of submodules SM exceeds 1,000, raising concerns about increased optical fiber installation costs.

[0035] FIG. 3 shows a conceptual diagram illustrating a communication path between the control device 3 and the submodule SM in this embodiment.

[0036] As shown in Figure 3, in the power conversion device 1 of this embodiment, a communication path is formed by applying wavelength division multiplexing (WDM) so as to reduce the number of long-distance optical fibers OFB laid in the control and protection panel room 150 and the electrical equipment room 160.

[0037] In the communication path 170 of FIG. 3, compared with FIG. 2 (comparative example), in order to multiplex data communication for each of a plurality (M) of sub-modules SM (M: a natural number where 2 ≦ M < N), the WDM processing unit 110a is arranged on the control device 3 side, and the WDM processing unit 110b is arranged on the power converter 2 (sub-module SM) side. In the example of FIG. 3, for N = 12 similar to FIG. 2, M = 4 is set. Therefore, three (N / M) WDM processing units 110a1 to 110a3 are arranged on the control device 3 side, and WDM processing units 110b1 to 110b3 are arranged on the power converter 2 (sub-module SM) side.

[0038] Each WDM processing unit 110a is connected to four optical communication modules 41a by four optical fibers OFBa. Similarly, each WDM processing unit 110b is connected to four optical communication modules 41b (sub-modules SM) by four optical fibers OFBb.

[0039] Each WDM processing unit 110a and each WDM processing unit 110b execute processing to multiplex four optical signals (M optical signals) respectively related to each of the four (M) sub-modules SM using a plurality of wavelengths and transmit them through one optical fiber OFB. Therefore, the long-distance optical fiber OFB for connecting between the control and protection panel room 150 and the electrical equipment room 160 does not need to be laid for each sub-module SM as in FIG. 2 (comparative example), and it is sufficient to lay it for every four (M) sub-modules SM.

[0040] As a result, in the example of FIG. 3 (N = 12, M = 4), as the communication path for one arm, twelve (N) optical fibers OFBb1 to OFBa12 and optical fibers OFBb1 to OFBa12, and three (N / M) optical fibers OFB1 to OFB3 are arranged.

[0041] The optical fibers OFBa1 to OFBa12 and the optical fibers OFBb1 to OFBb12 for each submodule SM are relatively short cables because they are laid in the control and protection panel room 150 and the electrical room 160, respectively. In contrast, by employing multiplexed communication paths 170 for each of a plurality (M) of submodules, the number of long-distance optical fibers OFB can be reduced, thereby making it possible to suppress the cost of laying optical fibers.

[0042] Referring again to FIG. 1, each detector will be described in detail. The AC voltage detector 10 detects a U-phase AC voltage Vacu, a V-phase AC voltage Vacv, and a W-phase AC voltage Vacw of the AC circuit 12. In the following description, Vacu, Vacv, and Vacw will be collectively referred to as AC voltage Vac.

[0043] The AC current detector 16 detects a U-phase AC current Iacu, a V-phase AC current Iacv, and a W-phase AC current Iacw of the AC circuit 12. In the following description, Iacu, Iacv, and Iacw will be collectively referred to as AC current Iac.

[0044] The DC voltage detector 11A detects a DC voltage Vdcp at a high potential side DC terminal Np connected to the DC circuit 14. The DC voltage detector 11B detects a DC voltage Vdcn at a low potential side DC terminal Nn connected to the DC circuit 14. The difference between the DC voltage Vdcp and the DC voltage Vdcn is defined as a DC voltage Vdc.

[0045] The arm current detectors 9A and 9B provided in the U-phase leg circuit 4u detect the upper arm current Ipu flowing in the upper arm 5 and the lower arm current Inu flowing in the lower arm 6, respectively. The arm current detectors 9A and 9B provided in the V-phase leg circuit 4v detect the upper arm current Ipv and the lower arm current Inv, respectively. The arm current detectors 9A and 9B provided in the W-phase leg circuit 4w detect the upper arm current Ipw and the lower arm current Inw, respectively. In the following description, the upper arm currents Ipu, Ipv, and Ipw are collectively referred to as upper arm current Iarmp, the lower arm currents Inu, Inv, and Inw are collectively referred to as lower arm current Iarmn, and the upper arm current Iarmp and the lower arm current Iarmn are collectively referred to as arm current Iarm.

[0046] <Submodule configuration> FIG. 4 is a circuit diagram showing an example of a sub-module that constitutes each leg circuit of FIG.

[0047] Referring to Fig. 4, the submodule SM includes a series body formed by connecting two switching elements 22A and 22B in series, a power storage element 24, a bypass switch BSW, and a voltage detector 27. The series body of switching elements 22A and 22B and the power storage element 24 are connected in parallel. The submodule SM in Fig. 2 has a circuit configuration called a half-bridge configuration. The voltage detector 27 detects the voltage Vc across the power storage element 24.

[0048] The switching elements 22A and 22B are configured by self-extinguishing semiconductor switching elements such as an IGBT (Insulated Gate Bipolar Transistor), a GCT (Gate Commutated Turn-off) thyristor, a MOSFET (Metal Oxide Semiconductor Field-Effect Transistor), etc. Freewheeling diodes (FWDs) 23A and 23B are connected in antiparallel to the switching elements 22A and 22B.

[0049] A capacitor such as a film capacitor is mainly used as the power storage element 24. In the following description, the power storage element 24 may also be referred to as a capacitor 24. The voltage Vc may also be referred to as a capacitor voltage Vc.

[0050] Both terminals of the switching element 22B serve as output terminals 26P and 26N. In the same arm, the output terminals 26P and 26N are sequentially connected to the output terminals 26N and 26P of the adjacent submodules SM, thereby connecting N submodules SM(1) to SM(N) in series (cascade connection) as shown in FIG.

[0051] In each submodule SM, the output voltage of the submodule SM, which corresponds to the voltage difference between the output terminals 26P and 26N, becomes the capacitor voltage Vc or zero voltage due to the switching operation of turning on and off the switching elements 22A and 22B.

[0052] For example, when switching element 22A is on and switching element 22B is off, the submodule SM outputs the capacitor voltage Vc. On the other hand, when switching element 22A is off and switching element 22B is on, the submodule SM outputs zero voltage. Note that, although both terminals of switching element 22B are output terminals 26P and 26N in FIG. 4, both terminals of switching element 22A may also be output terminals 26P and 26N. In that case, the relationship between the output voltage of the submodule SM and switching elements 22A and 22B is reversed from that described above.

[0053] The bypass switch BSW is connected between the output terminals 26P and 26N. In the example of Fig. 4, the bypass switch BSW is connected in parallel with the switching element 22B. However, if both terminals of the switching element 22A are used as the output terminals 26P and 26N, the bypass switch BSW is connected in parallel with the switching element 22A.

[0054] By turning on the bypass switch BSW, the output terminals 26P, 26N of the submodule SM are short-circuited. By shorting the submodule SM in the event of an abnormality, the submodule SM is bypassed, allowing the remaining healthy submodules in the arm to continue operating the power converter 2. In addition, the switching elements 22A, 22B included in the submodule SM can be protected from overcurrent that occurs in the event of an accident.

[0055] The submodule SM further includes a communication abnormality control unit 25, an information communication unit 28, and a PWM control unit 30, which constitute a "control unit" for controlling the on / off of the switching elements 22A and 22B and the bypass switch BSW. As will be described later, the control unit can be configured by a microcomputer, and the functions of the communication abnormality control unit 25, the information communication unit 28, and the PWM control unit 30 can be realized by software processing and / or hardware processing by the microcomputer.

[0056] The information communication unit 28 is configured to include the optical communication module 41b (denoted as "SFP") in Fig. 3, and periodically performs data communication with the control device 3. The transmission data 17 from the information communication unit 28 to the control device 3 corresponds to the second data signal described in Fig. 2, and can include data indicating the operating state of the submodule SM, such as the capacitor voltage Vc detected by the voltage detector 27.

[0057] The data 15 received by the information communication unit 28 from the control device 3 corresponds to the first data signal described in FIG. 2, and can include an operation command for the submodule SM (typically, a voltage command value, etc.).

[0058] The communication abnormality control unit 25 detects a communication abnormality with the control device 3 from the data communication state of the information communication unit 28. When a communication abnormality occurs, the communication abnormality control unit 25 generates a control signal Sbp to turn on the bypass switch BSW. On the other hand, when no communication abnormality occurs and the system is normal, the control signal Sbp is generated to turn off the bypass switch BSW.

[0059] The PWM control unit 30 generates gate signals Sa and Sb that control the on / off of the switching elements 22A and 22B by PWM control, which will be described later, so as to control the output voltage of the submodule SM in accordance with a voltage command value and a carrier shift parameter (described later) from the control unit 3. The operation commands from the control unit 3 also include a gate block command for stopping the operation of all the submodules SM on an arm-by-arm basis, and a command to cancel this (gate deblock). When the PWM control unit 30 receives a gate block command, it generates the gate signals Sa and Sb so that the switching elements 22A and 22B are fixed to the off state until it receives a gate deblock command.

[0060] The configuration of the submodule SM is not limited to the half-bridge cell shown in Figure 2, and other configurations such as a full-bridge configuration or a circuit configuration called a clamped double cell can also be applied, as long as output control is possible through PWM control using the switching operation of the switching elements.

[0061] <Submodule output control> As will be described below, in the power conversion device according to this embodiment, phase shift PWM control is applied to each arm to control the output of each submodule SM.

[0062] 5 is a block diagram illustrating a configuration for controlling the output of each submodule SM to which phase-shift PWM control is applied. FIG. 5 also shows the output control configuration for N submodules SM(1) to SM(N) for one arm.

[0063] Referring to FIG. 5, the control device 3 includes an arm control unit 40, a communication abnormality determination unit 45, and SM control units 50(1) to 50(N).

[0064] The arm control unit 40 receives as input measured values ​​of the AC current Iac and AC voltage Vac of the arm and the DC voltage Vdc of the power converter 2, and outputs an arm voltage command value Varmref for controlling these electrical quantities in accordance with command values. For example, the command value may include a command value for the AC current Iac and a command value for the DC voltage Vdc. In this case, as described in Patent Document 1, the arm voltage command value Varmref can be an output voltage command that causes the AC current Iac to follow the command value and the DC voltage Vdc to follow the command value in each phase, thereby feedforward controlling the AC voltage Vac. The arm voltage command value Varmref is common to the N submodules SM(1) to SM(N) of the same arm.

[0065] The arm control unit 40 can further generate a capacitor voltage command value Vcrefarm for the arm based on the measured values ​​of the capacitor voltages Vc(1) to Vc(N) of the submodules SM(1) to SM(N) of the arm. The capacitor voltage command value Vcrefarm for each arm can be set for each arm so that the representative values ​​(average value, maximum value, minimum value, etc.) of the capacitor voltages Vc are balanced between the arms.

[0066] The communication abnormality determination unit 45 monitors the state of periodic data communication between the control device 3 and each sub-module SM, and detects a communication abnormality with each sub-module SM. For example, if the periodic communication with any of the sub-modules SM is interrupted, it can detect that a communication abnormality has occurred in that sub-module SM.

[0067] The communication abnormality determination unit 45 periodically outputs communication monitoring result data Dsm based on the communication status with the N submodules SM(1) to SM(N) of the arm. The communication monitoring result data Dsm includes information that classifies the submodules SM(1) to SM(N) of the arm into healthy submodules that can communicate and abnormal submodules that cannot communicate, based on the communication status (normal / abnormal) of each submodule SM.

[0068] The communication monitoring result data Dsm can be generated each time communication is performed between the control device 3 and the submodules SM(1) to SM(N). It is understood that the communication monitoring result data Dsm includes information indicating whether each of the N submodules SM(1) to SM(N) in the arm is an abnormal submodule or a healthy submodule. It is understood that under normal conditions when no communication abnormality occurs, there are zero abnormal submodules and N healthy submodules. On the other hand, when a communication abnormality occurs, the number of abnormal submodules becomes one or more, and the number of healthy submodules becomes a number obtained by subtracting the number of abnormal submodules from N.

[0069] The SM control units 50(1) to 50(N) have the same configuration. The SM control unit 50, which collectively refers to the SM control units 50(1) to 50(N), includes a Vc control unit 51, an adder 52, and a parameter setting unit 53.

[0070] The parameter setting unit 53 generates carrier shift parameters for phase shift PWM control. The carrier shift parameters include a healthy submodule number Nsf indicating the number of healthy submodules, which corresponds to the number of submodules SM that can normally execute PWM control in the arm, based on the communication monitoring result data Dsm from the communication abnormality determination unit 45, and a numbering coefficient Ni that orders each of the Nsf healthy submodules.

[0071] The number of healthy submodules Nsf is set to a value common to all submodules SM in the same arm. Meanwhile, the numbering coefficients Ni are set to each of the Nsf healthy submodules in order from 1 to Nsf according to the order uniquely assigned to the submodules SM(1) to (N). That is, Ni is a natural number from 1 to Nsf, and no numbering coefficient Ni is set for an abnormal submodule. The number of healthy submodules Nsf corresponds to an example of a "first parameter," and the numbering coefficients Ni correspond to an example of a "second parameter."

[0072] The Vc control unit 51 calculates a voltage command correction value ΔVref for each submodule SM to bring the capacitor voltage Vc of each submodule SM closer to the capacitor voltage command value Vcrefarm for each arm. For example, the voltage command correction value ΔVref can be obtained by a PI (proportional-integral) control calculation for the deviation between the measured value of the capacitor voltage Vc (voltage detector 27) and the capacitor voltage command value Vcrefarm.

[0073] The adder 52 generates an output voltage command value Vsmref for each submodule SM using the arm voltage command value Varmref from the arm control unit 40 and the voltage command correction value ΔVref from the Vc control unit 51. As a result, the SM control units 50(1) to 50(N) generate output voltage command values ​​Vsmref(1) to Vsmref(N) for the submodules SM(1) to SM(N). Note that, within the same arm, the arm voltage command value Varmref is common to each submodule SM, while the voltage command correction value ΔVref can be a different value for each submodule SM in accordance with the capacitor voltage Vc.

[0074] Note that the VC control unit 51 may be omitted, and each of the output voltage command values ​​Vsmref(1) to Vsmref(N) of the submodules SM(1) to SM(N) may be set to the arm voltage command value Varmref. In this manner, the output voltage command value Vsmref of each submodule SM in phase shift PWM control is set, but the setting method is not limited to the configuration example of FIG. 5 and can be any method.

[0075] In this way, the SM control units 50(1) to 50(N) on the control device 3 side generate the output voltage command value Vsmref and the carrier shift parameters (Nsf,Ni) for the phase shift PWM control for each of the submodules SM(1) to SM(N) of the same arm. The output voltage command value Vsmref and the carrier shift parameters (Nsf,Ni) are transmitted from the control device 3 to each submodule SM via the communication path 170 described in FIG.

[0076] Furthermore, the SM control units 50(1) to 50(N) on the control device 3 transmit common synchronization information Dsyn to each of the submodules SM(1) to SM(N) to synchronize them on the time axis. The synchronization information Dsyn can be transmitted as part of the first data signal, but a third data signal dedicated to the synchronization information Dsyn may also be provided and transmitted. Furthermore, by transmitting the synchronization information Dsyn at a constant interval even during normal operation, time lags that increase over time due to frequency differences between clock components, etc., can be eliminated. This allows the timing between the submodules SM to be constantly synchronized.

[0077] The submodules SM(1) to SM(N) have PWM control units 30(1) to 30(N), respectively. Each of the PWM control units 30(1) to 30(N) corresponds to the PWM control unit 30 in Fig. 4. The output voltage command value Vsmref, carrier shift parameters (Nsf, Ni), and synchronization information Dsyn are transmitted to the PWM control units 30(1) to 30(N) from each of the SM control units 50(1) to 50(N) via the communication path 170 and the information communication unit 28 (Fig. 4).

[0078] The PWM control unit 30 has a carrier generation unit 31 and a gate signal generation unit 32. The carrier generation unit 31 generates a carrier CW having a predetermined frequency and amplitude and a reference phase set in accordance with carrier shift parameters (Nsf, Ni). The gate signal generation unit 32 generates gate signals Sa and Sb by comparing the output voltage command value Vsmref of the submodule SM with the carrier CW.

[0079] FIG. 6 is a conceptual waveform diagram illustrating the PWM control by the gate signal generating unit 32. In FIG. Referring to FIG. 6, the gate signal generating unit 32 generates the gate signals Sa and Sb in accordance with a comparison between the output voltage command value Vsmref and the carrier CW.

[0080] The carrier CW is composed of a periodic signal wave with a predetermined frequency (typically, a triangular wave). The output voltage command value Vsmref indicates the waveform of an alternating voltage (e.g., a sine wave voltage) on the time axis.

[0081] For example, during the period when Vsmref > CW, the gate signal generation unit 32 can be set to Sa = H level and Sb = L level in order to output the capacitor voltage Vc from the sub-module SM. As a result, in the configuration example of FIG. 4, while the switching element 22A is on, the switching element 22B is off.

[0082] On the contrary, during the period when Vsmref < CW, the gate signal generation unit 32 can be set to Sa = L level and Sb = H level in order to output a zero voltage from the sub-module SM. As a result, in the configuration example of FIG. 4, while the switching element 22B is on, the switching element 22A is off.

[0083] In each of the sub-modules SM(1) to SM(N), the gate signal generation unit 32 executes the same PWM control. However, for the phase-shifted PWM control, the phase of the carrier CW is set to have a phase difference among the sub-modules SM(1) to SM(N) within the same arm.

[0084] FIG. 7 is a conceptual diagram for explaining the carrier waveform of the phase-shifted PWM control. Also in FIG. 7, assuming N = 12, the carriers CW(1) to CW(12) generated by the carrier generation unit 31 in each of the sub-modules SM(1) to SM(12) within the same arm are shown.

[0085] As shown in Figure 7, the N=12 carriers CW(1) to CW(12) have a phase difference of 30°, which corresponds to (360° / N), and are generated so as to shift at equal intervals according to the phase difference. Carriers CW(1) to CW(12) are generated as periodic waves (triangular waves) with the same frequency but different reference phases. For example, the reference phase for each submodule SM can be set using the number of healthy submodules Nsf and the numbering coefficient Ni.

[0086] 7, under normal conditions, the parameter setting unit 53 sets the number of healthy submodules Nsf=N=12, and sets the numbering coefficients Ni=1 to 12 for the submodules SM(1) to SM(12), respectively. Therefore, the reference phase θ(i) of the submodule SM(i) can be set according to the following equation (1), where i is a natural number from 1 to N.

[0087] θ(i)=(360° / Nsf)×(Ni-1) …(1) From equation (1), the submodule SM(1) is set to θ(1) = 0°, the submodule SM(2) is set to θ(2) = 30°, ..., the submodule SM(12) is set to θ(12) = 330°. By using these reference phases θ(i) and the above-mentioned synchronization information Dsyn, it is possible to generate carriers CW(1) to CW(N) whose phases are shifted at equal intervals, as shown in FIG.

[0088] Phase-shift PWM control is achieved by performing PWM control using carriers with different phases for each submodule SM within an arm, which cancels out the harmonic components of the output voltage of each submodule SM within the same arm and increases the equivalent switching frequency of the output voltage of one arm.

[0089] 3, if a communication abnormality occurs in the path related to the optical fiber OFB2, multiple (four) submodules SM(5) to SM(8) will simultaneously become abnormal submodules that are unable to communicate with the control device 3. For example, such a communication abnormality may occur due to a problem such as a break in the optical fiber OFB2 or an insufficient amount of light, or a failure in the WDM processing units 110a2 and 110b2.

[0090] Due to such a communication abnormality, the output voltage command value Vsmref, carrier shift parameters (Nsf, Ni), and synchronization information Dsyn of the submodule SM described in FIG. 5 cannot be received, and therefore the abnormal submodules SM(5) to SM(8) cannot perform PWM control.

[0091] FIG. 8 is a conceptual diagram illustrating the carrier waveform of the phase shift PWM control when a communication abnormality occurs. FIG. 8 shows the state of phase shift PWM control when the submodules SM(5) to SM(8) become abnormal submodules due to the above-mentioned communication abnormality, and PWM control cannot be executed.

[0092] As shown in Figure 8, PWM control by carriers CW(5) to CW(8) cannot be performed on submodules SM(5) to SM(8), which are abnormal submodules. Therefore, in this arm, carriers CW(1) to CW(4) and CW(9) to CW(12) are used to PWM control the output voltages from submodules SM(1) to SM(4) and SM(9) to SM(12), which are healthy submodules. Meanwhile, submodules SM(5) to SM(8) with a communication abnormality are bypassed from the current path formed in the arm by turning on bypass switch BSW.

[0093] As a result, in the state shown in Figure 8, the phase intervals of the carriers of the healthy submodules in the arm become unequal. Therefore, when the output of each healthy submodule is PWM controlled in accordance with the output voltage command value Vsmref, the harmonic components of the output voltage of each submodule SM in the arm cannot be canceled out, and the harmonic components of the output voltage of each submodule SM remain in the output voltage of the arm. As a result, there is concern that power quality may deteriorate.

[0094] In contrast, in this embodiment, by setting the phase of the carrier CW of the healthy submodule using the above-mentioned equation (1), even when a communication abnormality occurs, degeneration control can be performed to shift the carrier phase of the healthy submodules excluding the abnormal submodule at equal intervals without changing the control logic.

[0095] 5, when the communication abnormality determination unit 45 detects a communication abnormality between the control device 3 and submodules SM(5) to SM(8) among the N=12 submodules SM(1) to SM(12), the submodules SM(5) to SM(8) are recognized as abnormal submodules. As a result, the number of healthy submodules becomes eight: submodules SM(1) to SM(4) and SM(9) to SM(12).

[0096] As a result, in the control device 3, the carrier shift parameters are set such that the number of healthy submodules Nsf=8, and the numbering coefficients Ni are set to Ni=1 to 8 for the submodules SM(1) to SM(4) and SM(9) to SM(12), respectively. Furthermore, the number of healthy submodules Nsf (common among the submodules SM) and the numbering coefficients Ni (for each submodule SM) are transmitted to the submodules SM(1) to SM(4) and SM(9) to SM(12), which are healthy submodules, respectively.

[0097] In the submodules SM(1) to SM(4), SM(9) to SM(12), the reference phases θ(1) to θ(4), θ(9) to θ(12) of the carriers CW(1) to CW(4), CW(9) to CW(12) are set using the transmitted carrier shift parameters (Nsf, Ni) according to the above-mentioned equation (1).

[0098] As a result, θ(1) is set to 0°, θ(2) to 45°, θ(3) to 90°, θ(4) to 135°, θ(9) to 180°, θ(10) to 225°, θ(11) to 270°, and θ(12) to 315°, resulting in a phase difference of 360° / Nsf=360° / 8=45°.

[0099] FIG. 9 shows a conceptual diagram illustrating a carrier type of phase shift PWM control to which such degeneration control is applied.

[0100] 9, by applying degeneration control, carriers CW(1) to CW(4), CW(9) to CW(12) can be generated using the reference phases θ(1) to θ(4), θ(9) to θ(12) in the same healthy submodule as in FIG. 8. As a result, carriers for each of a plurality of healthy submodules can be generated so that the phases of carriers CW(1) to CW(4), CW(9) to CW(12) are shifted at equal intervals, unlike in FIG. 8.

[0101] As a result, when a communication abnormality occurs in a communication path involving multiplexing, even if phase shift PWM control is performed only on healthy submodules excluding multiple abnormal submodules, it is possible to cancel out the harmonic components of the output voltage of healthy submodules SM in the same arm, just as when the carrier in Figure 7 (normal state) is used. In other words, by applying degeneration control, phase shift PWM control can be properly performed to suppress the harmonic components of the output voltage of the arm.

[0102] FIG. 10 shows an example of a process flow diagram when the above-described degeneration control is applied to the phase shift PWM control in the power conversion device according to the present embodiment.

[0103] 10, the control device 3 repeatedly executes, at each predetermined control period, a control calculation for controlling the output of the power converter 2. The control calculation includes, for example, a calculation process for setting an arm voltage command value Varmref and a capacitor voltage command value Vcrefarm (for each arm) for each arm (upper arm 5 and lower arm 6) of each phase, in order to control the electrical quantities (AC current Iac, AC voltage Vac, DC voltage Vdc) of the power converter 2 in accordance with command values, performed by the arm control unit 40 in FIG.

[0104] The results of the control calculation are transmitted from the control device 3 to each sub-module SM (power converter 2). In addition, information (capacitor voltage Vc) from each sub-module SM is transmitted to the control device 3 and used in the control calculation. In this way, bidirectional data communication (converter communication) is performed between the control device 3 and each sub-module SM for each control period.

[0105] This converter communication is performed for each of the optical fibers OFB1 to OFB3 via the communication path 170 illustrated in Fig. 4. Therefore, converter communication is performed individually between the control device 3 and each of the groups of submodules SM(1) to SM(4), SM(5) to SM(8), and SM(9) to SM(12).

[0106] 10, after control calculation CAL1 is executed, converter communication CM1 is executed, but at this time, no communication abnormality has occurred, and the control device 3 is able to normally communicate (transmit and receive) data with three groups of submodules SM(1) to SM(4), SM(5) to SM(8), and SM(9) to SM(12). Based on the communication result of converter communication CM1, the communication abnormality determination unit 45 generates communication monitoring result data Dsm indicating that the submodules SM(1) to SM(12) are healthy submodules.

[0107] As a result, the SM control units 50(1) to 50(12) set Nsf=12 and assign Ni=1 to 12 to the submodules SM(1) to SM(N), respectively. In accordance with these carrier shift parameters (Nsf, Ni), the arm performs phase shift PWM control using the carriers of the 12 healthy submodules shown in FIG. 7.

[0108] In contrast, in the converter communication CM2 after the execution of the next control calculation CAL2, data is normally transmitted and received between the control device 3 and the submodules SM(1) to SM(4), SM(9) to SM(12), but data is not normally transmitted and received between the control device 3 and the submodules SM(5) to SM(8).

[0109] Due to this communication state, if data communication between the control device 3 and the submodules SM(5) to SM(8) is not established for a predetermined period of time, a communication abnormality is detected and the submodules SM(5) to SM(8) can be recognized as abnormal submodules. On the other hand, the submodules SM(1) to SM(4) and SM(9) to SM(12), with which data communication is established in the converter communication CM2, are recognized as healthy submodules.

[0110] As a result, only the eight submodules SM(1) to SM(4) and SM(9) to SM(12) are recognized as submodules SM that can execute phase-shift PWM control in the arm. The control device 3 executes recovery processing to execute phase-shift PWM control to which degeneration control is applied as shown in FIG. 9 using healthy submodules excluding the abnormal submodule.

[0111] Specifically, in the control device 3, Nsf=8 is set in accordance with the number of healthy sub-modules, and Ni=1 to 8 is set for each of the eight sub-modules SM(1) to SM(4), SM(9) to SM(12), thereby performing carrier rearrangement for degeneration control.

[0112] Meanwhile, in each of the submodules SM(5) to SM(8), the communication abnormality control unit 25 detects a communication abnormality with the control device 3 in response to the state of the converter communication CM2 in which communication with the control device 3 has not been established for a certain period of time, and generates a control signal Sbp to turn on the bypass switch BSW. As a result, the bypass switch BSW is turned on in the abnormal submodule, and output control is stopped.

[0113] In the next control calculation CAL3, calculation processing is performed to execute phase shift PWM control to which degeneration control is applied, and in converter communication CM3, data communication to realize the degeneration control is performed between the submodules SM(1) to SM(4) and SM(9) to SM(12), which are healthy submodules. By transmitting the carrier shift parameters (Nsf, Ni) updated for carrier rearrangement to the healthy submodules, the arm executes phase shift PWM control to which degeneration control is applied, using the eight healthy submodules shown in Figure 9.

[0114] When starting phase shift PWM control with degeneration control after detecting a communication abnormality, a process is performed to ensure carrier synchronization between healthy submodules. Specifically, it is preferable to first issue a gate block command to all healthy submodules of the arm, and then, after releasing the gate block (gate deblocking), start phase shift PWM control with degeneration control while resetting synchronization information Dsyn between the healthy submodules.

[0115] <Hardware configuration example and processing procedure> Next, an example of the hardware configuration and processing procedure of the control device 3 and PWM control unit 30 for realizing degeneration control in phase shift PWM control according to the present embodiment will be described.

[0116] FIG. 11 is a block diagram illustrating an example of the hardware configuration of the control device 3. As shown in FIG. 11, the control device 3 has a configuration similar to that of a so-called digital relay device to which a microcomputer is applied. The control device 3 includes an AD (analog-digital) conversion unit 530, an arithmetic processing unit 535, an IO (input and output) unit 543, and a display unit 547.

[0117] A plurality of transformers (not shown) may be provided in front of the AD conversion unit 530 to convert input signals from the arm current detectors 9A, 9B, AC voltage detector 10, AC current detector 16, DC voltage detectors 11A, 11B, and voltage detector 33 into voltage levels suitable for signal processing inside the control device 3.

[0118] The AD conversion unit 530 includes an analog filter 531 and an AD converter 532. The analog filter 531 is a low-pass filter provided to remove aliasing errors that occur during AD conversion. The AD converter 532 converts the signal that has passed through the analog filter 531 into a digital value.

[0119] 11, only one channel of input to the AD conversion unit 530 is shown as a representative example, but in reality, the AD conversion unit 530 has a multi-input configuration in order to receive signals from each detector. Therefore, more specifically, the AD conversion unit 530 includes a plurality of analog filters 531 and a multiplexer (not shown) for selecting signals that have passed through the plurality of analog filters 531.

[0120] The arithmetic processing unit 535 includes a CPU (Central Processing Unit) 536, a memory 537, bus interfaces 538 and 539, and a bus 540 connecting these. The CPU 536 controls the overall operation of the control device 3. The memory 537 is used as a main storage device for the CPU 536. Furthermore, the memory 537 includes a nonvolatile memory such as a flash memory, thereby storing programs, setting values ​​for signal processing, and the like.

[0121] The arithmetic processing unit 535 may be configured by any circuit having an arithmetic processing function, and is not limited to the example of FIG. 11. For example, the arithmetic processing unit 535 may include multiple CPUs. Furthermore, instead of a processor such as a CPU, the arithmetic processing unit 535 may be configured by at least one ASIC (Application Specific Integrated Circuit) or at least one FPGA (Field Programmable Gate Array). Alternatively, the arithmetic processing unit 535 may be configured by any combination of a processor, an ASIC, and an FPGA.

[0122] The IO unit 543 includes a communication circuit 544, a digital input circuit 545, and a digital output circuit 546. The communication circuit 544 generates an optical signal to be output to each submodule SM. The signal output from the communication circuit 544 is output from an optical communication module 555 (denoted as "SFP:" in the figure) and transmitted to the submodule SM via a communication configuration described below. The optical communication module 555 corresponds to the optical communication module 41a in FIG. 3.

[0123] The digital input circuit 545 and the digital output circuit 546 are interface circuits for communication between the CPU 536 and an external device. For example, the digital output circuit 546 outputs a trip signal to the AC circuit 12.

[0124] Display unit 547 includes a touch panel 548 for inputting and displaying setting values. Touch panel 548 is an input / output interface that combines a display device such as a liquid crystal panel with an input device such as a touchpad. Touch panel 548 is connected to bus 540 via bus interface 539.

[0125] The control unit of the submodule SM (communication abnormality control unit 25, information communication unit 28, and PWM control unit 30) described in FIG. 4 can also be realized by a microcomputer using part or all of the configuration of FIG.

[0126] Fig. 12 is a flowchart illustrating processing on the control device side when a communication abnormality occurs in the power conversion device according to embodiment 1. The processing in Fig. 12 can be performed, for example, by software processing in which the CPU 536 executes a program stored in the memory 537. Alternatively, some or all of the steps shown in Fig. 12 may be realized by hardware processing such as an FPGA, an electronic circuit, or the like.

[0127] 12, in step (hereinafter simply referred to as "S") 110, the control device 3 determines whether or not a communication abnormality has occurred based on monitoring the communication state between the control device 3 and the submodule SM of the power converter 2. For example, the processing of S110 can be realized by the function of the communication abnormality determination unit 45 (FIG. 5).

[0128] When no communication abnormality has occurred (NO determination in S110), the control device 3 maintains the number of healthy submodules Nsf and the numbering coefficient Ni, which are parameters for phase shift PWM control, at their current values ​​in S115. In a normal state in which all of the submodules SM(1) to SM(N) of the same arm are healthy submodules, Nsf is set to N as a default value, and Ns = 1 to N is set for each of the submodules SM(1) to SM(N). This normal state corresponds to a "first state" in which the number of abnormal submodules is 0.

[0129] In response to this, when a communication abnormality occurs (YES determination in S110), the control device 3 executes degeneration control according to S120 to S160. When YES determination is made in S110, it is understood that a change occurs from a "first state" in which the number of abnormal submodules is 0 to a "second state" in which the number of abnormal submodules is 1 or more.

[0130] In S120, the control device 3 transmits a standby command by a gate block to each submodule SM, whereby the switching elements 22A and 22B (FIG. 4) are turned off in each healthy submodule that can receive the standby command.

[0131] In S130, the control device 3 executes a communication abnormality analysis and updates the number of healthy submodules Nsf and the numbering coefficient Ni, which are parameters for phase shift PWM control. For example, as described in Fig. 5, by classifying the submodules SM(1) to SM(N) of the same arm into abnormal submodules and healthy submodules based on the communication monitoring result data Dsm, it is possible to reset the number of healthy submodules Nsf and the numbering coefficient Ni for healthy submodules after the occurrence of a communication abnormality.

[0132] In S140, the control device 3 transmits the carrier shift parameters (Nsf, Ni) updated in S130 to each of the healthy submodules. As a result, each of the healthy submodules is put into a state where it can generate the rearranged carriers by applying the degeneration control.

[0133] Furthermore, in S150, the control device 3 determines whether the standby release condition is satisfied in order to set the start timing of the phase shift PWM control to which the degeneration control is applied. For example, if a reception notification in response to the data transmission in S140 is returned from all healthy cells, the determination in S150 can be YES.

[0134] When the standby release condition is satisfied, the control device 3 determines YES in S150 and transmits a standby release command to each submodule SM in S160 by releasing the gate block (gate deblocking). As a result, the arm including the abnormal submodule becomes capable of executing phase shift PWM control to which degeneration control is applied. On the other hand, until the standby release condition is satisfied, the determination in S150 is NO, and the process of S160 is not executed. The processes of S120 to S160 can be realized by the functions of the arm control unit 40 and parameter setting unit 53 in FIG. 5.

[0135] The transmission of the standby command in S120 and the transmission of the standby release command in S160 may be executed to each sub-module SM of each arm, including arms in which no communication abnormality has occurred. Furthermore, after execution of S160, a signal for aligning the timing of resuming control of the power converter 2 is transmitted to each sub-module SM of each arm.

[0136] In this way, if a communication abnormality occurs in any arm, the control of the power converter 2 is temporarily stopped, and the phase shift PWM control (using the carrier in Figure 9) to which degeneration control is applied in the arm where the communication abnormality occurred and the phase shift PWM control (using the carrier in Figure 7) in the arm where the communication abnormality is not occurring are started at the same timing. This stabilizes the output of the power converter 2.

[0137] Fig. 13 is a flowchart illustrating processing on the submodule side when a communication abnormality occurs in the power conversion device according to embodiment 1. The processing in Fig. 13 is realized, for example, by software processing and / or hardware processing by a microcomputer (not shown) provided in the submodule SM.

[0138] 12, the submodule SM determines in S210 whether or not a communication abnormality has occurred in the submodule (its own submodule) with the control device 3. When the submodule SM detects the communication abnormality, it determines YES in S210 and proceeds to S220 for the abnormal submodule. In S220, the bypass switch BSW is turned on. Furthermore, the switching elements 22A and 22B are turned off, and the abnormal submodule is placed in a gate-blocked state. The processes of S210 and S220 can be implemented by the function of the communication abnormality control unit 25 (FIG. 4).

[0139] If the communication with the control device 3 is normal, the submodule SM judges NO in S210 and executes the processing from S250 onwards for a healthy submodule.

[0140] In S250, the submodule SM determines whether or not a standby command (S120) has been received from the control device 3, and if so (YES in S250), executes gate blocking to keep the switching elements 22A, 22B off in S260. Furthermore, in S270, it determines whether or not a standby release command (S160) has been received from the control device 3, and maintains the gate blocking in S260 until it is received (NO in S270).

[0141] When the submodule SM receives a standby release command (S160) from the control device 3 (YES determination in S270), it releases the gate block in S280. As described in Fig. 12, before the standby release command is issued, the control device 3 has transmitted updated carrier shift parameters (Nsf, Ni) for applying degeneration control to the healthy submodule SM. Therefore, when S280 is executed, the carrier shift parameters (Nsf, Ni) in the healthy submodule have also been updated from the values ​​before the occurrence of the communication abnormality to values ​​for applying degeneration control.

[0142] When the gate block is released, the submodule SM executes PWM control using the updated carrier shift parameters (Nsf, Ni) in S290. This allows the arm including the abnormal submodule to execute output control using phase shift PWM control, using only healthy submodules, with the carrier phase set to shift at equal intervals. At this time, in S290, the carrier shift parameters (Nsf, Ni) are substituted into equation (1), and degenerate control can be achieved by the same calculation process as when no communication abnormality occurs.

[0143] In the processing of FIG. 13, in the other arms in which no communication abnormality has occurred, a NO determination is made in S210 in all sub-modules, and the processing of S250 to S290 for healthy sub-modules is executed.

[0144] The control device 3 and each sub-module SM operate according to the flowcharts of FIGS. 12 and 13, thereby realizing the processing flow of the degeneration control illustrated in FIG. 10 when a communication abnormality occurs.

[0145] In addition, when no communication abnormality occurs in any arm, S210 and S250 are determined to be NO in all submodules SM, and S290 is executed, whereby phase shift PWM control is executed by N submodules SM(1) to SM(N) in each arm. In this case, too, by substituting the carrier shift parameters (Nsf, Ni) into equation (1), the carrier in the normal state shown in Figure 7 can be generated.

[0146] As described above, according to the power conversion device of the first embodiment, phase shift PWM control in an arm is executed by generating a carrier CW in each submodule SM in accordance with the carrier setting parameters (Nsf, Ni) in the arm set by the control device 3. As a result, when a communication abnormality occurs, the carrier shift parameters are updated to reflect the classification of healthy submodules and abnormal submodules in the control device 3, and a common calculation according to equation (1) is applied to execute phase shift PWM control by applying degeneration control using only healthy submodules.

[0147] As a result, phase-shift PWM control can continue to be executed normally even if a communication abnormality occurs. In particular, by applying multiplexing using WDM, phase-shift PWM control can continue to be executed normally even if a communication abnormality causes multiple sub-modules to become uncontrollable at the same time.

[0148] In addition, the phase shift PWM control scheme with degeneration control according to this embodiment can be realized without limiting the number of abnormal submodules that occur by updating the carrier shift parameters to reflect the distinction between healthy submodules and abnormal submodules.

[0149] For this reason, we will confirm that phase shift PWM control with degeneration control can be achieved by the same control processing as described in Figures 12 and 13, not only when multiple submodules SM multiplexed in association with the same optical fiber OFB simultaneously become abnormal submodules, as exemplified in Figures 8 to 10, but also when any number of abnormal submodules, including one, occur due to communication abnormalities caused by other failure causes.

[0150] Embodiment 2 As explained in the first embodiment, in a communication system involving WDM multiplexing, a large number of sub-modules SM can become uncontrollable at once due to a failure in an optical fiber. Therefore, it is useful to apply a redundant configuration to the optical fiber.

[0151] FIG. 14 is a conceptual diagram illustrating a communication path between the control device and the submodule in the power conversion device according to the second embodiment.

[0152] 14, a communication path 170X of the power conversion device according to the second embodiment differs from the communication path 170 (FIG. 3) of the first embodiment in that optical fibers OFB1x-OFB3x are additionally arranged in parallel to the optical fibers OFB1-OFB3, respectively. That is, the communication path 170X has a configuration in which the optical fibers OFB1-OFB3 of the regular system and the optical fibers OFB1x-OFB3x of the standby system are connected in parallel, respectively.

[0153] The WDM processing unit 110a1 and the WDM processing unit 110b1 select either the optical fiber OFB1 of the normal system or the optical fiber OFB1x of the standby system in accordance with an instruction from the control device 3, and perform optical communication to which WDM is applied.

[0154] Similarly, the WDM processing units 110a2 and 110b2 select either the optical fiber OFB2 of the normal system or the optical fiber OFB2x of the standby system in accordance with instructions from the control unit 3, and the WDM processing units 110a3 and 110b3 select either the optical fiber OFB3 of the normal system or the optical fiber OFB3x of the standby system in accordance with instructions from the control unit 3.

[0155] If a communication error occurs due to an optical fiber while using optical fibers OFB1 to OFB3 of the regular system, the control device 3 controls the WDM processing units 110a1 to 110a3, 110b1 to 110b3 so as to use optical fibers OFB1x to OFB3x of the standby system. Therefore, the optical fibers OFB1 to OFB3 (regular system) correspond to an embodiment of the "first communication line," and the optical fibers OFB1x to OFB3x (standby system) correspond to an embodiment of the "second communication line."

[0156] The power conversion device according to the second embodiment is configured similarly to the power conversion device according to the first embodiment, except for the communication path 170X having a redundant optical fiber configuration shown in FIG.

[0157] FIG. 15 is a flowchart illustrating processing on the control device side when a communication abnormality occurs in the power conversion device according to the second embodiment.

[0158] In the power conversion device according to the second embodiment, the process of S110 (FIG. 12) related to the determination by the control device 3 of the occurrence of a communication abnormality is configured to include S111 to S114a and S114b shown in FIG.

[0159] In S111, the control device 3 determines whether or not a communication abnormality has occurred based on monitoring the communication state between the control device 3 and the submodule SM of the power converter 2, by performing processing similar to that of S110 in Fig. 12. If no communication abnormality has occurred (NO determination in S111), the control device 3 determines NO in S110 and proceeds to processing S115 in Fig. 12. From S115 onwards, processing similar to that in the first embodiment (Fig. 12) is executed.

[0160] On the other hand, when a communication abnormality occurs (YES determination in S110), the control device 3 determines in S112a whether the communication abnormality is an abnormality in the optical fiber. For example, when the number of abnormal submodules is the same as the number multiplexed in the optical fiber (four in the example of FIG. 14), YES determination is made in S112a.

[0161] When the control device 3 detects a communication abnormality in the optical fiber (YES in S112a), it determines in S112b whether or not the communication abnormality has occurred in the optical fiber of the standby system.

[0162] If the optical fiber abnormality is not an abnormality in the standby system (NO determination in S112b), that is, when an abnormality occurs in the normal system, the process proceeds to S113, and an instruction is given to the WDM processing units 110a and 110b to switch from communication via the normal system optical fiber OFB (OFB1 to OFB3) to communication via the standby system optical fiber OFBx (OFB1x to OFB3x). In this case, NO determination is made in S114b in S110 of Fig. 12, and the process proceeds to S115 of Fig. 12. The process from S115 onwards is the same as in the first embodiment (Fig. 12), and therefore description thereof will not be repeated.

[0163] As a result, the optical fiber can be switched to the standby system, and data communication between the control device 3 and each submodule SM can be continued. As a result, no abnormal submodule occurs, and phase shift PWM control without degeneration control can be executed.

[0164] On the other hand, if an optical fiber abnormality has occurred in the standby system (YES determination in S112b), the control device 3 determines YES in S110 in S114a and proceeds to S120 in Fig. 2. The processing from S120 onwards is the same as in the first embodiment (Fig. 12), and therefore description thereof will not be repeated.

[0165] As a result, the submodules that had been communicating with the control device 3 through the optical fiber (standby system) are determined to be abnormal submodules, and phase shift PWM control to which degeneration control is applied is executed, as in the first embodiment.

[0166] Furthermore, if the communication abnormality is not an abnormality in the optical fiber (NO judgment in S112a), processing proceeds to S114a. As a result, S110 is judged as YES and processing proceeds to S120 in Figure 2, so as in embodiment 1, the abnormal submodule is stopped and phase shift PWM control with degeneration control applied is executed.

[0167] FIG. 16 is a table illustrating an example of the operation of the power conversion device according to the second embodiment. 16, in state A, data communication is normally performed between the control device 3 and the submodules SM(1) to SM(12) of the same arm using the regular optical fibers OFB1 to OFB3 in the communication path 170X of FIG. 14. Therefore, phase-shift PWM control is performed in that arm using the 12 equally spaced carriers CW(1) to CW(12) shown in FIG.

[0168] In state B, a communication abnormality occurs due to a failure of the optical fiber OFB2 from state A. In response to this, in the flowchart of FIG. 15, a YES determination is made in S112a and a NO determination is made in S112b, causing the processing of S113 to be executed. As a result, the control device 3 and the submodules SM(5) to SM(8) can switch to the standby optical fiber OFB2x and execute data communication with the control device 3. As a result, similar to state A, it is possible to execute phase shift PWM control (FIG. 7) in the arm using 12 equally spaced carriers CW(1) to CW(12).

[0169] In state C, a communication abnormality occurs due to a failure in the optical fiber OFB2x, which occurred in state B. As a result, data communication between the control device 3 and the submodules SM(5) to SM(8) becomes impossible. In this case, YES determinations are made in S112a and S112b in the flowchart of FIG. 15, and the processing from S120 onwards in FIG. 12 is executed. As a result, with the submodules SM(5) to SM(8) treated as abnormal submodules, phase shift PWM control with degenerate control applied is executed in the arm using the eight equally spaced carriers CW(1) to CW(4) and CW(9) to CW(12) shown in FIG. 9.

[0170] As described above, the power conversion device according to the second embodiment can suppress the occurrence of an abnormal submodule due to a communication abnormality by providing redundant optical fibers in a communication path where WDM multiplexing is applied. As a result, in addition to the same effect as in the first embodiment, in which phase-shifted PWM control can be continued normally by applying degeneration control even if an abnormal submodule occurs, it is possible to increase the frequency of execution of effective phase-shifted PWM control using all the submodules SM in the same arm.

[0171] The power conversion devices described in the first and second embodiments can be used as power conversion devices for power systems such as HVDC (High Voltage Direct Current) or STATCOM (Static Synchronous Compensator).

[0172] The configurations exemplified as the above-described embodiments are merely examples of the configurations of the present invention, and may be combined with other known technologies, or may be modified, such as by omitting some parts, without departing from the spirit of the present invention. Furthermore, the above-described embodiments may be implemented by appropriately adopting the processes and configurations described in other embodiments.

[0173] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. The scope of the present disclosure is defined by the claims, not the above description, and is intended to include all modifications within the meaning and scope of the claims. [Explanation of symbols]

[0174] 1 power conversion device, 2 power converter, 3 control device, 4u, 4v, 4w leg circuit, 5 upper arm, 6 lower arm, 8A, 8B reactor, 9A, 9B arm current detector, 10 AC voltage detector, 11A, 11B DC voltage detector, 12 AC circuit, 13 transformer, 14 DC circuit, 15 received data, 16 AC current detector, 17 transmitted data, 22A, 22B switching element, 24 storage element (capacitor), 25 communication abnormality control unit, 26N, 26P output terminal (submodule), 27, 33 voltage detector, 28 information communication unit, 30 PWM control unit, 31 carrier generation unit, 32 gate signal generation unit, 40 arm control unit, 41a, 41b, 555 optical communication module, 45 communication abnormality determination unit, 50 SM control unit, 51 Vc control unit, 52 Adder, 53 Parameter setting unit, 110a1 to 101a3, 101b1 to 101b3 WDM processing unit, 150 Control and protection panel room, 160 Electrical equipment room, 170, 170X Communication path, 530 Conversion unit, 531 Analog filter, 532 AD converter, 535 Arithmetic processing unit, 537 Memory, 538, 539 Bus interface, 540 Bus, 543 IO unit, 544 Communication circuit, 545 Digital input circuit, 546 Digital output circuit, 547 Display unit, 548 Touch panel, BSW Bypass switch, CAL1 to CAL3 Control calculation, CM1 to CM3 Converter communication, CW Carrier, Dsm Communication monitoring result data, Dsyn Synchronization information, Iac, Iacu, Iacv, Iacw AC current, Iarm, Iarmn, Iarmv, Iarmw Arm current, Ni Numbering coefficient (carrier shift parameter), Nn low-potential side DC terminal, Np high-potential side DC terminal, Nsf number of healthy submodules (carrier shift parameter), Nu, Nv, Nw AC input terminal, OFB, OFB1 to OFB12, OFB1x to OFB3x, OFBa, OFBa1 to OFB12, OFBb, OFBb1 to OFB12 optical fiber, SM, SM(1) to SM(N) submodule, Sa, Sb gate signal, Sbp control signal (bypass switch), Vac, Vacu, Vacv, Vacw AC voltage, Varmref arm voltage command value, Vc capacitor voltage, Vcrefarm capacitor voltage command value, Vdc, Vdcn,Vdcp is the DC voltage, Vsmref is the output voltage command value.

Claims

1. a power converter including a plurality of arms; a control device for controlling the power converter, each of the plurality of arms includes a plurality of sub-modules connected in series with one another; each of the plurality of sub-modules includes a plurality of switching elements, a power storage element, a pair of output terminals, and a control unit for controlling an output voltage between the output terminals by turning on and off the plurality of switching elements; bidirectional data communication between the control device and the plurality of sub-modules is performed via communication paths multiplexed for each of a plurality of sub-modules among the plurality of sub-modules; The control device Based on the state of the data communication, the plurality of sub-modules are classified into a plurality of healthy sub-modules that can communicate and zero or one or more abnormal sub-modules that cannot communicate; generating an output voltage command value for each of the plurality of sub-modules based on the voltage command values ​​for each of the plurality of arms, and generating a carrier shift parameter for each of the plurality of healthy sub-modules based on the result of the classification; The control unit a PWM control unit that controls on / off of the plurality of switching elements based on a comparison between a carrier according to the carrier shift parameter received from the control device via the communication path and the output voltage command value received from the control device via the communication path, A power conversion device, wherein the PWM control units of the plurality of healthy sub-modules use the carrier shift parameter to generate the carrier such that the phase of the carrier is shifted at equal intervals among the plurality of healthy sub-modules.

2. When the control device detects that the data communication has changed from a first state in which the number of abnormal submodules is 0 to a second state in which the number of abnormal submodules is 1 or more, the control device updates the carrier shift parameter using a classification result between the plurality of healthy submodules and the one or more abnormal submodules; The power conversion device according to claim 1, wherein the PWM control unit uses the updated carrier shift parameter to generate the carrier such that the phase of the carrier is shifted at equal intervals among the plurality of healthy sub-modules, the number of which is less than the number of sub-modules.

3. the control device sequentially transmits, to each of the plurality of healthy sub-modules, a gate block command for fixing the plurality of switching elements to OFF and the updated carrier shift parameter in response to a change from the first state to the second state, and then transmits a gate block release command; 3. The power conversion device according to claim 2, wherein, after receiving the release command, the PWM control units of the plurality of healthy submodules start on / off control of the plurality of switching elements based on a comparison between the carrier generated according to the updated carrier shift parameter and the output voltage command value, in accordance with a control resumption timing set commonly among the plurality of healthy submodules.

4. the communication path is configured by connecting a first communication line of a regular system and a second communication line of a standby system in parallel, The power conversion device of claim 1, wherein when the control device detects, based on the state of the data communication, that the communication path using the first communication line has changed from a first state in which the number of abnormal submodules is 0 to a second state in which the number of abnormal submodules is 1 or more, the control device controls the communication path to use the second communication line instead of the first communication line.

5. When the control device detects that the communication path using the second communication line has changed from the first state to the second state based on the state of the data communication, updating the carrier shift parameter using a classification result between the plurality of healthy sub-modules and the one or more abnormal sub-modules; The power conversion device according to claim 4, wherein the PWM control unit uses the updated carrier shift parameter to generate the carrier such that the phase of the carrier is shifted at equal intervals among the plurality of healthy sub-modules, the number of which is less than the number of sub-modules.

6. the control device sequentially transmits, to each of the plurality of healthy sub-modules, a gate block command for fixing the plurality of switching elements to OFF and the updated carrier shift parameter in response to a change from the first state to the second state in the communication path using the second communication line, and then transmits a gate block release command; 6. The power conversion device according to claim 5, wherein, after receiving the release command, the PWM control units of the plurality of healthy submodules start on / off control of the plurality of switching elements based on a comparison between the carrier generated according to the updated carrier shift parameter and the output voltage command value, in accordance with a control resumption timing set commonly among the plurality of healthy submodules.

7. the carrier shift parameters include a first parameter indicating the number of healthy sub-modules among the plurality of sub-modules, and a second parameter numbering the healthy sub-modules; The PWM control unit A power conversion device according to any one of claims 1 to 6, comprising a carrier generating unit that generates the carrier so as to have a predetermined frequency and amplitude, a phase difference obtained by dividing one period of the carrier by the number of the plurality of healthy submodules, and a reference phase based on a product of integers according to the numbering.

8. Each of the plurality of sub-modules comprises: further including a bypass switch for connecting the output terminals of the sub-modules; The control unit The power conversion device according to any one of claims 1 to 6, further comprising a communication abnormality control unit that turns on the bypass switch when an abnormality in the data communication with the control device is detected.

9. Each of the plurality of sub-modules comprises: further comprising a voltage detector for measuring a voltage of the storage element; a voltage measurement value of the storage element measured by the voltage detector is transmitted from the plurality of sub-modules to the control device via the communication path; The output voltage command value of each of the plurality of submodules is generated using a voltage command value for each of the plurality of arms that is common to the plurality of submodules and a voltage correction command value calculated for each of the plurality of submodules in order to balance the voltage measurement values ​​of each of the plurality of submodules. The power conversion device according to any one of claims 1 to 6.

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